Display devices

Abstract

The present invention discloses a display device. The display device includes: a display element; a substrate including: an opening area, a display area adjacent to the opening area, and a non-display area between the opening area and the display area; an encapsulation layer including: a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer in the display area, the first and second inorganic encapsulation layers extending from the display area to the non-display area; and a dam portion in the non-display area and adjacent to a boundary line. The dam portion adjacent to the boundary line includes a plurality of grooves in which the first and second inorganic encapsulation layers in the non-display area contact each other.

Description

[0001] This application claims priority to and all benefits arising from Korean Patent Application No. 10-2020-0000486, filed on January 2, 2020, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] One or more embodiments relate to a display device, and more particularly, to a display device including a display panel having an opening area. Background Art

[0003] The use of display devices has been diversified. In addition, as display devices have become thinner and lighter, the range of use of such display devices has been broadened.

[0004] As the planar area occupied by the display area in a display device has expanded, various functions combined with and / or associated with the display device have been added. As a method of increasing the display area while adding various functions, research has been conducted on display devices having a planar area for adding various functions in addition to functions such as image display within the display area. Summary of the Invention

[0005] One or more embodiments include a highly reliable display device including a display panel having an opening area within a display area.

[0006] Additional features are set forth in part in the description which follows and, in part, will be apparent from the description, or may be learned by practice of the disclosed embodiments.

[0007] According to one or more embodiments, a display device includes a display element including a pixel electrode and a counter electrode; a substrate including an opening area, a display area including the display element and adjacent to the opening area, and a non-display area between the opening area and the display area; an encapsulation layer including a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer in the display area and each covering the display element, the first and second inorganic encapsulation layers extending from the display area to the non-display area; and a dam portion in the non-display area and adjacent to a boundary line separating the opening area from the non-display area. The dam portion adjacent to the boundary line includes a plurality of grooves, and the first and second inorganic encapsulation layers in the non-display area are in contact with each other in the plurality of grooves.

[0008] In an embodiment, the width of each of the plurality of trenches may increase in a thickness direction of the substrate and then decrease.

[0009] In an embodiment, the display device may further include a first counter electrode pattern in the same layer as the counter electrode and between the plurality of trenches adjacent to each other.

[0010] In an embodiment, the display device may further include a second opposite electrode pattern spaced apart from the first opposite electrode pattern in the plurality of grooves.

[0011] In an embodiment, the display element may further include an intermediate layer between the pixel electrode and the counter electrode, and the display device may further include a first intermediate layer pattern in the same layer as the intermediate layer and between the plurality of trenches adjacent to each other.

[0012] In an embodiment, the display device may further include a second intermediate layer pattern spaced apart from the first intermediate layer pattern and in the plurality of grooves.

[0013] In an embodiment, the display device may further include: a pixel defining layer including an opening exposing the pixel electrode; and a spacer on the pixel defining layer. The dam portion may further include: a first layer in the same layer as the pixel defining layer; and a first auxiliary dam in the same layer as the spacer.

[0014] In an embodiment, a bottom surface of the plurality of trenches may coincide with an upper surface of the first layer.

[0015] In embodiments, the plurality of trenches may be defined by the first auxiliary dam and the first layer.

[0016] In an embodiment, a thickness of a pattern portion between a plurality of trenches adjacent to each other may be smaller than a thickness of the first auxiliary dam.

[0017] In an embodiment, the display device may further include a second auxiliary dam on the first auxiliary dam.

[0018] In embodiments, the first auxiliary dam may define an upper trench.

[0019] In an embodiment, the depth of the upper trench may be equal to the thickness of the first auxiliary dam.

[0020] In an embodiment, the substrate may define a lower groove in the non-display area and spaced apart from the dam portion in a direction from the opening area to the display area.

[0021] In an embodiment, an organic encapsulation layer may fill the lower trench.

[0022] In an embodiment, the display device may further include a touch input layer including an insulating layer and a sensing electrode on the encapsulation layer.

[0023] In an embodiment, the insulating layer may be within the plurality of trenches.

[0024] According to one or more embodiments, a display device includes: a substrate including an opening area, a display area adjacent to the opening area and including a display element, and a non-display area between the opening area and the display area; a dam portion in the non-display area and including a plurality of grooves; an encapsulation layer covering the display element; and a touch input layer including an insulating layer and sensing electrodes in the display area, the touch input layer facing the substrate, and the encapsulation layer between the touch input layer and the substrate. The insulating layer in the display area extends from the display area to the non-display area, and the insulating layer in the non-display area extends into the plurality of grooves in the dam portion.

[0025] In an embodiment, the dam portion may coincide with a boundary line separating the opening area and the non-display area.

[0026] In embodiments, the insulating layer may include an inorganic layer and an organic layer, and the inorganic layer may fill the plurality of trenches. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The above and other features and advantages of the embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0028] Figure 1 is a schematic perspective view of an embodiment of a display device;

[0029] Figure 2 yes Figure 1 A schematic cross-sectional view of a display device;

[0030] Figure 3 is a schematic plan view of an embodiment of a display panel;

[0031] Figure 4 is a schematic equivalent circuit of an embodiment of a pixel of a display panel;

[0032] Figure 5A It is along Figure 3 A cross-sectional view taken along line AA' and line BB', Figure 5B and Figure 5C They are Figure 5A An enlarged cross-sectional view of regions A and B;

[0033] Figure 6A and Figure 6B are enlarged cross-sectional views of embodiments of the grooves;

[0034] Figure 7 According to another embodiment of the present invention, Figure 3 a cross-sectional view taken along line AA' and line BB'; and

[0035] Figure 8 and Figure 9According to other embodiments of the present invention, Figure 3 A cross-sectional view taken along line AA' and line BB'. DETAILED DESCRIPTION

[0036] Reference will now be made in detail to embodiments, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to like elements throughout. In this regard, the embodiments may have different forms and should not be construed as being limited to the description set forth herein. Therefore, the embodiments will be described below with reference to the accompanying drawings only to illustrate the features of the present description.

[0037] The present disclosure may have various modifications and embodiments. Embodiments are illustrated in the accompanying drawings and will be described in detail in the detailed description. Advantages and features of the present disclosure and methods for achieving them will become more apparent from the following embodiments described in detail in conjunction with the accompanying drawings. However, the present disclosure is not limited to the following embodiments and may be embodied in various forms.

[0038] Hereinafter, the embodiments will be described in detail with reference to the accompanying drawings. When describing the embodiments with reference to the accompanying drawings, the same or corresponding elements are marked with the same reference numerals, and redundant descriptions thereof will be omitted.

[0039] It should be understood that although the terms "first," "second," etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another.

[0040] The terms used herein are for the purpose of describing specific embodiments only and are not intended to be limiting. As used herein, the singular forms "a" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. For example, "an element" has the same meaning as "at least one element" unless the context clearly indicates otherwise. "At least one" should not be interpreted as being limited to "one." "Or" means "and / or." As used herein, the term "and / or" includes any and all combinations of one or more of the relevant listed items. Throughout this disclosure, the expression "at least one of a, b, and c" indicates only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.

[0041] It should be understood that terms such as “include,” “comprises,” and “has” used herein specify the presence of stated features or elements, but do not preclude the presence or addition of one or more other features or elements.

[0042] The sizes of the components in the drawings may be exaggerated for the convenience of description. In other words, since the sizes and thicknesses of the components in the drawings are arbitrarily illustrated for the convenience of description, the following embodiments are not limited thereto.

[0043] When the embodiments can be implemented differently, the processes may be performed in an order different from the described order. For example, two processes described in succession may be performed substantially simultaneously, or in an order opposite to the described order.

[0044] In the following embodiments, it will be understood that when a film, layer, region, element or component is referred to as being associated with another element, such as being "on" or "connected" or "coupled" to another film, layer, region, element or component, it may be directly or indirectly connected or coupled to another film, layer, region, element or component. That is, for example, there may be an intervening film, region or component. In the following embodiments, it will be understood that when a film, layer, region, element or component is referred to as being associated with another element, such as being "electrically connected" or "electrically coupled" to another film, layer, region, element or component, it may be directly or indirectly electrically connected or coupled to another film, layer, region, element or component. That is, for example, there may be an intervening film, layer, region, element or component. On the contrary, when a layer, region or element is referred to as being associated with another element, such as being "directly" "on" or "directly" "connected" or "coupled" to another layer, region or element, there may be no intervening layer, region or element between them.

[0045] Further, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe the relationship of one element to another element as shown in the accompanying drawings. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the accompanying drawings. For example, if a device in the accompanying drawings is turned over, an element described as being on its "lower" side would then be oriented on its "upper" side. The exemplary term "lower" can therefore encompass both the "lower" and "upper" orientations, depending on the particular orientation of the drawing. Similarly, if a device in the accompanying drawings is turned over, an element described as being "below" or "beneath" would then be oriented "above" thereof. The exemplary terms "below" or "beneath" can therefore encompass both the "upper" and "lower" orientations.

[0046] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the present disclosure, and should not be interpreted in an idealized or overly formal sense unless expressly defined as such herein.

[0047] Exemplary embodiments are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments. As such, variations between the illustrated shapes are to be expected, for example, as a result of manufacturing techniques and / or tolerances. Therefore, the embodiments described herein should not be construed as limited to the specific shapes of the illustrated regions, but are intended to include deviations in shape resulting from, for example, manufacturing. For example, an area illustrated or described as flat may typically have rough and / or nonlinear features. Furthermore, illustrated sharp corners may be rounded. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to represent the precise shapes of the illustrated regions and are not intended to limit the scope of the present claims.

[0048] Figure 1 is a schematic perspective view of an embodiment of the display device 1 .

[0049] refer to Figure 1 The display device 1 may include a first area A1 and a second area A2 adjacent to the first area A1 (eg, surrounding the first area A1). Figure 3 ) (e.g., a plurality of pixels P) (e.g., an array of pixels P) may be disposed in the second area A2. The second area A2 may allow an image to be displayed through operation or control of the array of pixels P. The second area A2 corresponds to a display area where an image is displayed. The first area A1 may be completely surrounded by the second area A2 in a top view. The first area A1 may be within the second area A2 serving as a display area. The entire planar area of ​​the first area A1 may be within the total planar area of ​​the second area A2.

[0050] The first area A1 may be provided with components 20 (see FIG. Figure 2 ), circuits, etc. (e.g., component area). In an embodiment, for example, when the component 20 includes a sensor and a camera, etc. as a functional element that uses light in a function combined with and / or associated with the display device 1, the first area A1 corresponds to a transmission area (e.g., a light-transmitting area) through which light from the sensor to the outside of the display device 1 and / or light propagating from the outside of the display device 1 toward the camera is transmitted. The first area A1 may be included in the substrate 100 (see Figure 3 ) in the opening area OA (see Figure 5A ) (e.g., an open or closed opening) to improve light transmittance. The first area A1 can be regarded as a non-display area (e.g., a third non-display area) where no pixels P are provided. That is, no image is displayed in the first area A1. The first area A1 can correspond to the opening area OA.

[0051] The third area A3 may be disposed between the first area A1 and the second area A2. The third area A3 is a first non-display area where no pixels P are disposed. That is, no image is displayed in the third area A3. Lines (e.g., signal lines or conductive lines) or dam portions that bypass the first area A1 (e.g., are excluded from or not disposed in the first area A1) may be disposed in the third area A3. The third area A3 may be within the second area A2, which serves as the display area. The entire planar area of ​​the third area A3 may be within the total planar area of ​​the second area A2.

[0052] Similar to the third area A3, the fourth area A4 surrounding the second area A2 may be a second non-display area where no pixels P are provided. That is, no image is displayed in the fourth area A4. Various types of lines and internal circuits for operating and / or controlling the display device 1 may be provided in the fourth area A4. Figure 1 For example, the first area A1, the third area A3, the second area A2, and the fourth area A4 may be sequentially arranged in a direction along the plane of the display device 1. One or more elements of the display device 1 may include the first area A1, the second area A2, the third area A3, and / or the fourth area A4 corresponding to those described above for the display device 1. Each of the first area A1, the second area A2, the third area A3, and / or the fourth area A3 may define a closed shape or a closed planar shape.

[0053] Each of the pixels P provided in the display device 1 may include a light emitting diode as a display element that generates and / or emits colored light. The display element may include an organic material as a light emitting layer 220b (see Figure 5C ) of an organic light emitting diode ("OLED"). Alternatively, the display element may include an inorganic light emitting diode. Alternatively, the display element may include quantum dots as the light emitting layer 220b. Hereinafter, for convenience of description, the case where the display element includes an OLED will be described.

[0054] The display device 1 and its elements may be arranged in a plane defined by a first direction (e.g., an x-direction) and a second direction (e.g., a y-direction) intersecting the first direction. The thickness of the display device 1 and its elements may be arranged along a third direction (e.g., a z-direction or a thickness direction) intersecting each of the first and second directions.

[0055] Figure 1The first area A1 is shown as being located at the center of the second area A2 along the width direction (e.g., the ±x direction) of the display device 1, but is not limited thereto. In an embodiment, the first area A1 may be located so as to be offset to the left or right relative to the center of the second area A2 along the width direction of the display device 1. Furthermore, the first area A1 may be located at various positions along the length direction (e.g., the ±y direction) of the display device 1, such as at the top, middle, or bottom of the second area A2.

[0056] Figure 1 The display device 1 is illustrated as including one first area A1, but is not limited thereto. In an embodiment, the display device 1 may include a first area A1 provided in plurality (eg, a plurality of first areas A1).

[0057] Figure 2 It is along Figure 1 Schematic cross-sectional view of the display device 1 taken along line II-II'.

[0058] refer to Figure 2 The display device 1 may include a display panel 10, a touch input layer 40 (e.g., a touch sensing layer) disposed on the display panel 10, and an optical functional layer 50. A window 60 may be used to cover each of the display panel 10, the touch input layer 40, and the optical functional layer 50. The window 60 may be bonded to an underlying element, such as the optical functional layer 50, via an adhesive layer OCA. The adhesive layer OCA may include an optically clear adhesive ("OCA"). The window 60 may form an outer surface of the display device 1, without being limited thereto. The window 60 may define a display surface (or display screen) of the display device 1.

[0059] The display device 1 may be provided in various electronic devices such as a mobile phone, a tablet personal computer (“PC”), a notebook computer, or a smart watch.

[0060] The display panel 10 may include a plurality of light-emitting diodes disposed in the second area A2. The touch input layer 40 may obtain coordinate information based on external input, such as a touch event. The touch input layer 40 may include sensing electrodes (or touch electrodes) and traces connected to the sensing electrodes. The touch input layer 40 may be disposed on the display panel 10. The touch input layer 40 may sense external input using a mutual capacitance method or a self-capacitance method. The display panel 10 may face the window 60, with the touch input layer 40 being between the display panel 10 and the window 60.

[0061] The touch input layer 40 may be directly provided or formed on the display panel 10. Alternatively, the touch input layer 40 may be provided or formed separately and then bonded via the adhesive layer OCA. Figure 2As shown in FIG, the touch input layer 40 may be directly provided or formed on the display panel 10. In this case, the adhesive layer OCA may be excluded from between the touch input layer 40 and the display panel 10.

[0062] The optical functional layer 50 (e.g., a light control layer) may include an anti-reflection layer. The anti-reflection layer may reduce the reflection of light (e.g., external light) incident from the outside of the display device 1 and toward the display panel 10 through the window 60. The anti-reflection layer may include a retarder and / or a polarizer. The retarder may be a film-type retarder or a liquid crystal coating-type retarder, and may include a λ / 2 retarder and / or a λ / 4 retarder. The polarizer may also be a film-type polarizer or a liquid crystal coating-type polarizer. The film-type polarizer may include a stretched synthetic resin film, and the liquid crystal coating-type polarizer may include liquid crystals arranged in an arrangement. The retarder and / or the polarizer may each further include a protective film.

[0063] In an embodiment, the anti-reflection layer may include a structure of a black matrix and / or a color filter. The color filter may be provided in consideration of the color of light emitted from each pixel P of the display panel 10.

[0064] In an embodiment, the anti-reflection layer may include a destructive interference structure. The destructive interference structure may include a first reflective layer and a second reflective layer stacked, for example, in different layers. The first reflected light and the second reflected light reflected from the first reflective layer and the second reflective layer, respectively, may destructively interfere with each other, thereby reducing the reflectivity of external light.

[0065] The optical function layer 50 may include a lens layer. The lens layer may improve the light output efficiency of light emitted from the display panel 10 and / or reduce chromatic aberration. The lens layer may include a layer having a concave lens shape or a convex lens shape and / or may include multiple layers having different refractive indices. The optical function layer 50 may include either or both an antireflection layer and a lens layer.

[0066] The display panel 10, the touch input layer 40, and the optical functional layer 50 may each define or include a hole (e.g., a component hole). In an embodiment, for example, the display panel 10 may include a first hole 10H that passes through the top and bottom surfaces of the display panel 10 (e.g., extends through the thickness of the display panel 10), the touch input layer 40 may include a second hole 40H that passes through the top and bottom surfaces of the touch input layer 40, and the optical functional layer 50 may include a third hole 50H that passes through the top and bottom surfaces of the optical functional layer 50. The first hole 10H of the display panel 10, the second hole 40H of the touch input layer 40, and the third hole 50H of the optical functional layer 50 may be provided in the first area A1 and may be provided to correspond to each other. The first hole 10H, the second hole 40H, and the third hole 50H may be aligned with each other to provide a single hole or a single component hole.

[0067] When the adhesive layer OCA between the window 60 and the optical function layer 50 includes an optically transparent adhesive, the adhesive layer OCA may not include a hole corresponding to the first area A1 because light may still be transmitted through the adhesive layer OCA.

[0068] The component 20 may be provided in the first area A1. The component 20 defined in or corresponding to the first area A1 may include an electronic component. In an embodiment, for example, the component 20 may be an electronic component that uses light or sound within a function combined with and / or associated with the display device 1. In an embodiment, for example, the electronic component may be a sensor (e.g., an infrared sensor) that receives and uses light to perform a function related to the display device 1, a camera that receives light and captures an image as a function related to the display device 1, a sensor that outputs and senses light or sound in order to measure a distance or recognize a fingerprint as a function related to the display device 1, a small lamp that outputs light as a function related to the display device 1, a speaker that outputs sound as a function related to the display device 1, and the like.

[0069] When the component 20 is an electronic component that uses light in a function combined with and / or associated with the display device 1, the component 20 can use light of various wavelength bands, such as visible light, infrared light, and ultraviolet light. In one or more embodiments, the first area A1 can be a transmission area (e.g., a light-transmitting area) through which light output from the component 20 is transmitted to the outside of the display device 1, and / or light propagating from the outside of the display device 1 toward the electronic component is transmitted.

[0070] In an embodiment, when the display device 1 is used as a smartwatch and / or a vehicle dashboard, the component 20 may be a member such as a clock hand or a pointer indicating information (e.g., vehicle speed, etc.). When the display device 1 includes a clock hand or a pointer in a vehicle dashboard, the component 20 may be exposed outside the window 60 of the display device 1. Here, the window 60 may include or define an opening or hole corresponding to the first area A1.

[0071] Component 20 may include devices that add functionality associated with display device 1 as described above, or may include features such as accessories that enhance the aesthetic appearance of display panel 10 .

[0072] Figure 3 is a schematic top view of an embodiment of the display panel 10, and Figure 4 is a schematic equivalent circuit of an embodiment of a pixel P in the display panel 10 .

[0073] The display panel 10 may include a first area A1, a second area A2 surrounding the first area A1, a third area A3 between the first area A1 and the second area A2, and a fourth area A4 surrounding the second area A2. Alternatively, the substrate 100 of the display panel 10 may include the first area A1, the second area A2, the third area A3, and the fourth area A4.

[0074] The display panel 10 may include a plurality of pixels P disposed in the second area A2. Figure 4 As shown in FIG, each pixel P may include a pixel circuit PC and a display element connected to the pixel circuit PC. The display element may include, for example, an organic light emitting diode ("OLED"). The pixel circuit PC may include a first thin film transistor ("TFT") T1, a second TFT T2, and a storage capacitor Cst. Each pixel P may generate and / or emit, for example, red, green, or blue light through an OLED, or may generate and / or emit, for example, red, green, blue, or white light through an OLED.

[0075] The second TFT T2 may function as a switching TFT and may be connected to one or more signal lines, such as a scan line SL and a data line DL. The switching TFT may transmit an electronic signal, such as a data signal input from the data line DL, to the first TFT T1 based on an electronic signal, such as a switching voltage input from the scan line SL. The storage capacitor Cst may be connected to the second TFT T2 and the driving voltage line PL and may store a voltage corresponding to a difference between a voltage received from the second TFT T2 and a first power supply voltage ELVDD supplied to the driving voltage line PL.

[0076] The first TFT T1 may function as a driving TFT and may be connected to the driving voltage line PL and the storage capacitor Cst. The driving TFT may control a driving current flowing from the driving voltage line PL to the OLED based on the voltage value stored in the storage capacitor Cst. The OLED may generate and / or emit light having a corresponding brightness based on the driving current. An opposing electrode (e.g., a cathode) of the OLED may receive a second power supply voltage ELVSS.

[0077] Figure 4 The pixel circuit PC is illustrated as including two TFTs and one storage capacitor Cst, but is not limited thereto. In embodiments, the number of TFTs and the number of storage capacitors Cst may be variously changed according to the design of the pixel circuit PC.

[0078] Reference again Figure 3, the third area A3 may surround the first area A1. The third area A3 is a planar area where display elements such as light-emitting OLEDs are excluded or not disposed. Signal lines that provide electrical signals (e.g., control signals, drive signals, power signals, etc.) to pixels P disposed outside and around the first area A1 may pass through the third area A3. These signal lines connected to the pixels P may bypass the first area A1 to be excluded from the first area A1.

[0079] In an embodiment, the third area A3 may include a dam portion DP ( Figure 5A As described above, the dam portion DP can restrict or control the flow of the organic encapsulation layer material used to form the organic encapsulation layer covering the second area A2 during the manufacture of the display device 1, thereby reducing or effectively preventing the infiltration of this material into the first area A1. In this case, the dam portion DP can be provided to surround the first area A1 in a top view. Specifically, the dam portion DP can be provided adjacent to the first area A1 in a direction along the substrate 100. That is, the dam portion DP can be adjacent to the boundary line BL separating the first area A1 and the third area A3.

[0080] Reference again Figure 3 A first scan driver 1100 (e.g., a first driver) and a second scan driver 1200 (e.g., a second driver), each of which provides a scan signal to the pixel P, a data driver 1300 (e.g., a third driver) that provides a data signal to the pixel P, and a main voltage line (not shown) that provides a first power supply voltage ELVDD and a second power supply voltage ELVSS, etc., may be disposed in the fourth area A4. The first scan driver 1100 and the second scan driver 1200 may be disposed in the fourth area A4 and may be disposed on opposite sides of the second area A2, with the second area A2 being between the first scan driver 1100 and the second scan driver 1200. That is, the first scan driver 1100 and the second scan driver 1200 may face each other, with the second area A2 being between the first scan driver 1100 and the second scan driver 1200.

[0081] Figure 3 The data driver 1300 is shown as being disposed adjacent to one side or an outer edge of the substrate 100, but is not limited thereto. In an embodiment, the data driver 1300 may be disposed on a flexible printed circuit board ("FPCB") that is a separate component from the display panel 10 and may be electrically connected to a pad of the display panel 10. The pad may be disposed adjacent to one side or an outer edge of the display panel 10, for example, corresponding to an area of ​​the data driver 1300.

[0082] Figure 5A It is along Figure 3 A cross-sectional view taken along line AA' and line BB'. Figure 5B and Figure 5C They are Figure 5A An enlarged cross-sectional view of region A and region B.

[0083] refer to Figure 5A , the display device 1 may include a display panel 10 and a touch input layer 40. The display panel 10 may include a substrate 100, a buffer layer 101, an inorganic insulating layer IL, a first planarization layer 109, a second planarization layer 111, a pixel defining layer 113, and a thin film encapsulation layer 300 stacked sequentially. In this case, the inorganic insulating layer IL may include a first gate insulating layer 103, a second gate insulating layer 105, and an interlayer insulating layer 107. In addition, a pixel circuit PC may be provided on the substrate 100, and an OLED may be provided on the pixel circuit PC. The OLED may be electrically connected to the pixel circuit PC and may include a pixel electrode 210, an intermediate layer 220, and an opposing electrode 230.

[0084] In an embodiment, the substrate 100 may include an opening area OA. The opening area OA may be provided to correspond to the first area A1. Specifically, the first area A1 and the opening area OA may be aligned with each other. The opening area OA may be surrounded by the second area A2, which serves as a display area. The third area A3, which serves as a first non-display area, may be provided between the opening area OA and the second area A2 along a direction along the substrate 100. In this case, a dam portion DP adjacent to the boundary line BL separating the first area A1 and the third area A3 may be provided in the third area A3.

[0085] The substrate 100 may include glass, or may include a polymer resin such as polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate, or cellulose acetate propionate.

[0086] The buffer layer 101 may be provided on the substrate 100. The buffer layer 101 may reduce or block the penetration of foreign matter, moisture, or external air from the bottom surface of the substrate 100, and may provide a flat surface relative to the substrate 100. The buffer layer 101 may include an inorganic material such as an oxide or a nitride, an organic material, or an organic / inorganic material combination, and may have a single-layer structure or a multi-layer structure including an inorganic material and an organic material. A barrier layer (not shown) that blocks the penetration of external air may be further included between the substrate 100 and the buffer layer 101. In one or more embodiments, the buffer layer 101 may include silicon oxide (SiO2) or silicon nitride (SiN x ).

[0087] The TFT may be disposed on the buffer layer 101. In this case, the TFT may be a driving TFT. The TFT may include a semiconductor layer A, a gate electrode G, a source electrode S, and a drain electrode D.

[0088] The semiconductor layer A may be disposed on the buffer layer 101 and may include polycrystalline silicon. In an embodiment, the semiconductor layer A may include amorphous silicon. In an embodiment, the semiconductor layer A may include an oxide of at least one selected from the group consisting of indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), and zinc (Zn). The semiconductor layer A may include a channel region and a source region and a drain region each doped with impurities.

[0089] A first gate insulating layer 103 may be provided to cover the semiconductor layer A. The first gate insulating layer 103 may include an inorganic insulating material, such as silicon oxide (SiO2), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2) or zinc oxide (ZnO2). The first gate insulating layer 103 may be a single layer or multiple layers including the above inorganic insulating materials.

[0090] The gate electrode G may be disposed on the first gate insulating layer 103 so as to overlap with the semiconductor layer A. The gate electrode G may include molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), or the like, and may be a single layer or a multilayer. In an embodiment, for example, the gate electrode G may be a single layer of Mo.

[0091] A second gate insulating layer 105 may be provided to cover the gate electrode G. The second gate insulating layer 105 may include an inorganic insulating material, such as silicon oxide (SiO2), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2) or zinc oxide (ZnO2). The second gate insulating layer 105 may be a single layer or multiple layers including the above inorganic insulating materials.

[0092] An upper electrode CE2 of the storage capacitor Cst may be disposed on the second gate insulating layer 105 .

[0093] The upper electrode CE2 may overlap the lower gate electrode G. The gate electrode G and the upper electrode CE2 overlapping each other with the second gate insulating layer 105 therebetween may form a storage capacitor Cst. The gate electrode G may be the lower electrode CE1 of the storage capacitor Cst.

[0094] The upper electrode CE2 may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W) and / or copper (Cu), and may be a single layer or a multilayer including the above materials.

[0095] An interlayer insulating layer 107 may be provided or formed to cover the upper electrode CE2. The interlayer insulating layer 107 may include silicon oxide (SiO2), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2) or zinc oxide (ZnO2).

[0096] The source electrode S and the drain electrode D may be provided on the interlayer insulating layer 107. The source electrode S and the drain electrode D may each include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), or the like, and may each be a single layer or a multilayer including the above materials. In an embodiment, for example, the source electrode S and the drain electrode D may each have a multilayer structure of Ti / Al / Ti.

[0097] A first planarization layer 109 may be provided to cover the source electrode S and the drain electrode D. The first planarization layer 109 may have a flat upper surface.

[0098] The first planarization layer 109 may be a single layer or multiple layers including an organic material or an inorganic material. The first planarization layer 109 may include a general polymer (e.g., benzocyclobutene ("BCB"), polyimide, hexamethyldisiloxane ("HMDSO"), polymethyl methacrylate, or polystyrene), a polymer derivative having a phenolic group, an acrylic polymer, an imide polymer, an aromatic ether polymer, an amide polymer, a fluorine polymer, a paraxylene polymer, a vinyl alcohol polymer, and combinations thereof. The first planarization layer 109 may include silicon oxide (SiO2), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), or zinc oxide (ZnO2). In this case, in the manufacturing method of the display device 1, after providing or forming the first planarization layer 109, chemical mechanical polishing may be performed thereon to provide a flat upper surface.

[0099] The connection metal CM may be provided on the first planarization layer 109. The connection metal CM may contact the source electrode S or the drain electrode D of the TFT through a contact hole provided or formed in the first planarization layer 109 to be electrically connected to the TFT.

[0100] A line (not shown) (e.g., a signal line or a conductive line) spaced apart from the connection metal CM (e.g., a connector or a connection plug) in a direction along the substrate 100 and including the same material as the connection metal CM may be further provided on the first planarization layer 109. That is, the line and the connection metal CM may be in the same layer among the layers provided on the substrate 100. As used herein, in the same layer may mean that the patterns or elements are corresponding parts of the same single material layer among the material layers provided on the substrate 100.

[0101] The second planarization layer 111 may be disposed on the connection metal CM. The second planarization layer 111 may have a flat upper surface so that the pixel electrode 210 disposed thereon is provided or formed to be flat.

[0102] The second planarization layer 111 may be a single layer or multiple layers including an organic material or an inorganic material. The second planarization layer 111 may include a general polymer (e.g., benzocyclobutene ("BCB"), polyimide, hexamethyldisiloxane ("HMDSO"), polymethyl methacrylate, or polystyrene), a polymer derivative having a phenolic group, an acrylic polymer, an imide polymer, an aromatic ether polymer, an amide polymer, a fluorine polymer, a paraxylene polymer, a vinyl alcohol polymer, and combinations thereof. The second planarization layer 111 may include silicon oxide (SiO2), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), or zinc oxide (ZnO2). In this case, in the method of manufacturing the display device 1, after providing or forming the second planarization layer 111, chemical mechanical polishing may be performed thereon to provide a flat upper surface.

[0103] The second planarization layer 111 may include or define an opening or a contact hole exposing the connection metal CM. The pixel electrode 210 may contact the connection metal CM at or through the opening to be electrically connected to the TFT.

[0104] The pixel electrode 210 may include a conductive oxide, such as indium tin oxide ("ITO"), indium zinc oxide ("IZO"), zinc oxide ("ZnO"), indium oxide ("In2O3"), indium gallium oxide ("IGO"), or aluminum zinc oxide ("AZO"). In an embodiment, the pixel electrode 210 may include a reflective layer comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or a combination thereof. In an embodiment, the pixel electrode 210 may further include a layer comprising ITO, IZO, ZnO, or In2O3 above and / or below the reflective layer. In one or more embodiments, the pixel electrode 210 may have a stacked structure of ITO / Ag / ITO.

[0105] The pixel defining layer 113 may be disposed on the pixel electrode 210. The pixel defining layer 113 may include or define an opening that exposes the upper surface of the pixel electrode 210, but may cover the outer edge of the pixel electrode 210. The pixel defining layer 113 may include an organic insulating material. Alternatively, the pixel defining layer 113 may include an inorganic insulating material, such as silicon nitride, silicon oxynitride, or silicon oxide. Alternatively, the pixel defining layer 113 may include an organic insulating material and an inorganic insulating material. Hereinafter, for convenience of description, the case where the pixel defining layer 113 includes an organic insulating material will be described.

[0106] The intermediate layer 220 may include a light-emitting layer 220b. The light-emitting layer 220b may include, for example, an organic material. The light-emitting layer 220b may include a relatively high molecular weight organic material or a relatively low molecular weight organic material that emits colored light. The intermediate layer 220 may include a first functional layer 220a disposed below the light-emitting layer 220b and / or a second functional layer 220c disposed above the light-emitting layer 220b.

[0107] The first functional layer 220a may be a single layer or a multilayer. In an embodiment, for example, when the first functional layer 220a includes a relatively high molecular weight material, the first functional layer 220a may be a hole transport layer ("HTL") having a single layer structure and may include poly-(3,4)-ethylenedioxythiophene ("PEDOT") or polyaniline ("PANI"). When the first functional layer 220a includes a relatively low molecular weight material, the first functional layer 220a may include a hole injection layer ("HIL") and the HTL.

[0108] The second functional layer 220c may be optional. In an embodiment, for example, when the first functional layer 220a and the light-emitting layer 220b each include a relatively high molecular weight material, the second functional layer 220c may not be provided or formed. The second functional layer 220c may be a single layer or a multilayer. The second functional layer 220c may include an electron transport layer ("ETL") and / or an electron injection layer ("EIL").

[0109] The light emitting layer 220b of the intermediate layer 220 may be provided in the second area A2 for each pixel P. The light emitting layer 220b may be provided to overlap with the opening in the pixel defining layer 113 and / or overlap with the pixel electrode 210. The first functional layer 220a and the second functional layer 220c of the intermediate layer 220 may each be a single body extending from the second area A2 to the third area A3 so as to also be provided or formed on the dam portion DP.

[0110] The counter electrode 230 may include a conductive material having a relatively low work function. In an embodiment, for example, the counter electrode 230 may include a (semi-) transparent layer containing silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca) or an alloy thereof. Alternatively, the counter electrode 230 may further include a layer such as ITO, IZO, ZnO or In2O3 on the (semi-) transparent layer containing the above materials. The counter electrode 230 is a single body and may be provided or formed to cover more than one pixel electrode 210 in the second area A2. In addition, the counter electrode 230 may extend from the second area A2 to the third area A3 so as to also be provided on the dam portion DP. In the method of manufacturing the display device 1, the intermediate layer 220 and the counter electrode 230 may be provided or formed by thermal evaporation.

[0111] The spacer 115 may be provided or formed on the pixel defining layer 113. The spacer 115 may include an organic insulating material such as polyimide. Alternatively, the spacer 115 may include an inorganic insulating material such as silicon nitride or silicon oxide, or may include both an organic insulating material and an inorganic insulating material.

[0112] In an embodiment, the spacer 115 may include a material different from that of the pixel defining layer 113. Alternatively, in an embodiment, the spacer 115 may include the same material as that of the pixel defining layer 113. In this case, in the method of manufacturing the display device 1, the pixel defining layer 113 and the spacer 115 may be provided or formed together in a mask process using a halftone mask or the like. That is, the pixel defining layer 113 and the spacer 115 may be in the same layer as each other. The pixel defining layer 113 and the spacer 115 may each include polyimide.

[0113] The thin film encapsulation layer 300 (eg, an encapsulation layer) may cover the OLED. In an embodiment, the thin film encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. In this regard, Figure 5A 3 , a first inorganic encapsulating layer 310 , a second inorganic encapsulating layer 330 , and an organic encapsulating layer 320 between the first inorganic encapsulating layer 310 and the second inorganic encapsulating layer 330 are illustrated.

[0114] The thin film encapsulation layer 300 may extend from the second area A2 to the third area A3. Specifically, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may extend from the second area A2 to the third area A3. In this case, the organic encapsulation layer 320 may be shielded by the dam portion DP. In other words, the organic encapsulation layer 320 may not be provided in the first area A1 due to the dam portion DP, and the organic encapsulation layer 320 may be provided in the second area A2 and in a portion of the third area A3 due to the dam portion DP. Therefore, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may intersect with each other to contact each other in the third area A3 at the dam portion DP.

[0115] The first inorganic encapsulation layer 310 and / or the second inorganic encapsulation layer 330 may be provided according to the upper surface shape of the layer provided thereunder. That is, the cross-sectional profile of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may follow the cross-sectional profile of the layer provided thereunder. Figure 5A For example, the first inorganic encapsulating layer 310 may be provided according to the shape of the upper surface of the counter electrode 230 , and the second inorganic encapsulating layer 330 may be provided according to the shape of the upper surface of the organic encapsulating layer 320 .

[0116] The first inorganic encapsulating layer 310 and the second inorganic encapsulating layer 330 may each include one or more inorganic insulating materials. The one or more inorganic insulating materials may include aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and / or silicon oxynitride. In the method of manufacturing the display device 1, each of the first inorganic encapsulating layer 310 and the second inorganic encapsulating layer 330 may be provided or formed by chemical vapor deposition.

[0117] The upper surface of the organic encapsulating layer 320 may be provided or formed to be flat. Since the lower layer of the organic encapsulating layer 320 is not flat, the lower surface of the organic encapsulating layer 320 may not be flat, but the upper surface of the organic encapsulating layer 320 may be flat as described above.

[0118] The organic encapsulation layer 320 may include a polymer material. Polymer materials may include acrylic resins, epoxy resins, polyimide, polyethylene, and the like. In an embodiment, for example, the organic encapsulation layer 320 may include an acrylic resin such as polymethyl methacrylate or polyacrylic acid. In the method of manufacturing the display device 1, the organic encapsulation layer 320 may be provided or formed by curing a monomer or applying a polymer.

[0119] The touch input layer 40 may be disposed on the second inorganic encapsulation layer 330 and may include a sensing electrode and at least one insulating layer. In this case, the touch input layer 40 may extend from the second area A2 to the third area A3. In addition, the touch input layer 40 may be disposed on the dam portion DP in the third area A3.

[0120] In the touch input layer 40, insulating layers and conductive layers may be alternately stacked. In an embodiment, the touch input layer 40 may include a first insulating layer 410, a first conductive layer 420, a second insulating layer 430, a second conductive layer 440, and a third insulating layer 450. The first conductive layer 420 and the second conductive layer 440 may be connected to each other at a contact hole (not shown) within the touch input layer 40. A sensing electrode may be included in at least one of the first conductive layer 420 and the second conductive layer 440.

[0121] The first conductive layer 420 or the second conductive layer 440 may include a metal material layer or a transparent conductive material layer. The metal material layer may include molybdenum (Mo), mendelevium (Md), silver (Ag), titanium (Ti), copper (Cu), aluminum (Al), or any alloy thereof. The transparent conductive material layer may include a transparent conductive oxide, such as indium tin oxide ("ITO"), indium zinc oxide ("IZO"), or indium tin zinc oxide ("ITZO"). In addition, the transparent conductive material layer may include a conductive polymer such as PEDOT, metal nanowires, or graphene, etc.

[0122] The first conductive layer 420 or the second conductive layer 440 may be a single layer or multiple layers. The single layer structure of the first conductive layer 420 or the single layer structure of the second conductive layer 440 may include a metal layer or a transparent conductive layer. The materials of the metal layer and the transparent conductive layer are the same as described above. One of the first conductive layer 420 and the second conductive layer 440 may include a single metal layer. One of the first conductive layer 420 and the second conductive layer 440 may include multiple metal layers. The multilayer metal layer may include, for example, three layers of titanium layer / aluminum layer / titanium layer, or two layers of molybdenum layer / mendeleyum layer. Alternatively, the multilayer metal layer may include a metal layer and a transparent conductive layer.

[0123] The first conductive layer 420 and the second conductive layer 440 may have different stacking structures from each other, or may have the same stacking structure. In an embodiment, for example, the first conductive layer 420 may include a metal layer and the second conductive layer 440 may include a transparent conductive layer. Alternatively, the first conductive layer 420 and the second conductive layer 440 may include the same metal layer.

[0124] The materials of the first conductive layer 420 and / or the second conductive layer 440 and the arrangement of the sensing electrodes provided by portions of the first conductive layer 420 and the second conductive layer 440 may be determined in consideration of sensing sensitivity. Resistance-capacitance (RC) delay may affect sensing sensitivity. Since the sensing electrodes comprising a metal layer have a lower resistance than that of the transparent conductive layer, the RC value may be reduced. Therefore, the charging time of the sensing capacitor defined between the sensing electrodes may be reduced. Compared to a metal layer, the sensing electrodes comprising a transparent conductive layer are not visible from the outside of the touch input layer 40, and the input area to which an external input may be applied may be increased, thereby increasing capacitance and / or sensing sensitivity.

[0125] The first insulating layer 410, the second insulating layer 430, and the third insulating layer 450 may each include an inorganic insulating material and / or an organic insulating material. The inorganic insulating material may include silicon oxide, silicon nitride, or silicon oxynitride, and the organic insulating material may include a relatively high molecular weight organic material. In one or more embodiments, the first insulating layer 410 may be omitted or excluded. Hereinafter, a case where the first insulating layer 410 and the second insulating layer 430 include an inorganic insulating material and the third insulating layer 450 includes an organic insulating material will be described.

[0126] Reference again Figure 5A , a dam portion DP may be provided in the third area A3. Specifically, the dam portion DP may be provided adjacent to the first area A1. That is, the dam portion DP may be closer to the first area A1 than to the second area A2. In this case, the dam portion DP may be provided so as to surround the first area A1 in a top view. In an embodiment, for example, the dam portion DP may be provided adjacent to the boundary line BL separating the first area A1 from the third area A3. Specifically, the dam portion DP may be provided so that one side of the dam portion DP includes the boundary line BL. That is, the boundary of the dam portion DP may coincide with or be aligned with the boundary line BL.

[0127] The dam portion DP may control the flow of an organic encapsulation layer material forming the organic encapsulation layer 320 during the manufacture of the display device 1, so as to reduce or effectively prevent the material of the organic encapsulation layer 320 from penetrating from the third area A3 into the first area A1. In addition, the dam portion DP may reduce or effectively prevent external impurities introduced through the first area A1 from penetrating through the organic encapsulation layer 320 into the second area A2.

[0128] The dam portion DP may include a first base layer 1La, a second base layer 109a, a third base layer 111a, a first layer 113a, a plurality of grooves Gv (e.g., a plurality of grooves Gv), and a first auxiliary dam 115D. The grooves Gv are open in a direction away from the substrate 100. In an embodiment, an end portion or side surface of the second base layer 109a, an end portion or side surface of the third base layer 111a, and an end portion or side surface of the first layer 113a, respectively facing the first area A1, may include a boundary line BL or be aligned with the boundary line BL.

[0129] The first base layer ILa, the second base layer 109a, and the third base layer 111a may be sequentially stacked in the third area A3 in a direction away from the substrate 100 (e.g., along the thickness direction or the z-direction). In one or more embodiments, the first base layer ILa may be omitted. In this case, the first base layer ILa in the third area A3 may include the same material as the inorganic insulating layer IL in the second area A2 and may be in the same layer as the inorganic insulating layer IL in the second area A2, the second base layer 109a in the third area A3 may include the same material as the first planarizing layer 109 in the second area A2 and may be in the same layer as the first planarizing layer 109 in the second area A2, and the third base layer 111a in the third area A3 may include the same material as the second planarizing layer 111 in the second area A2 and may be in the same layer as the second planarizing layer 111 in the second area A2. In the method of manufacturing the display device 1, when the inorganic insulating layer IL, the first planarization layer 109, and the second planarization layer 111 in the second area A2 are provided or formed, the first base layer ILa, the second base layer 109a, and the third base layer 111a in the third area A3 can be provided or formed simultaneously.

[0130] The first layer 113a may be provided on the third substrate layer 111a. In this case, the first layer 113a may include the same material as the pixel defining layer 113 and may be in the same layer as the pixel defining layer 113. In the method of manufacturing the display device 1, the first layer 113a may be provided or formed in the third area A3 simultaneously with the pixel defining layer 113 provided or formed in the second area A2.

[0131] The first auxiliary dam 115D may be disposed on the first layer 113a. The first auxiliary dam 115D may include a first auxiliary layer 115Da (e.g., a first auxiliary dam portion) and a second auxiliary layer 115Db (e.g., a second auxiliary dam portion) on the first auxiliary layer 115Da. In an embodiment, the first auxiliary layer 115Da and the second auxiliary layer 115Db may include the same material and be in the same layer. In this case, in the method of manufacturing the display device 1, the first auxiliary layer 115Da and the second auxiliary layer 115Db may be provided or formed together in a mask process using a halftone mask or the like. In an embodiment, the first auxiliary layer 115Da and the second auxiliary layer 115Db may include different materials. Hereinafter, for convenience of description, a case will be described in which the first auxiliary layer 115Da and the second auxiliary layer 115Db include the same material and are in the same layer. In an embodiment, the first auxiliary dam 115D may include the same material as the spacer 115.

[0132] Similar to the dam portion DP, the first auxiliary dam 115D can control the flow of the organic encapsulation layer material forming the organic encapsulation layer 320, so as to reduce or effectively prevent such material of the organic encapsulation layer 320 from penetrating from the third area A3 into the first area A1. In addition, the first auxiliary dam 115D can reduce or effectively prevent external impurities introduced through the first area A1 from penetrating through the organic encapsulation layer 320 into the second area A2.

[0133] The counter electrode 230, the first inorganic encapsulating layer 310, the second inorganic encapsulating layer 330, the first insulating layer 410, and the second insulating layer 430 may be sequentially arranged from the substrate 100 at the dam portion DP and may have a profile that follows the surface shape of the first auxiliary dam 115D within the dam portion DP. In this case, the counter electrode 230, the first inorganic encapsulating layer 310, the second inorganic encapsulating layer 330, the first insulating layer 410, and the second insulating layer 430 may extend along the substrate 100 in a direction from the second area A2 toward the first area A1 so as to be arranged along the surface shape of the dam portion DP. Therefore, the stacked structure of the counter electrode 230, the first inorganic encapsulating layer 310, the second inorganic encapsulating layer 330, the first insulating layer 410, and the second insulating layer 430 can reduce or effectively prevent external impurities from penetrating from the second base layer 109a, the third base layer 111a, the first layer 113a, or the first auxiliary dam 115D through the organic encapsulating layer 320 into the second area A2.

[0134] A groove Gv may be provided or formed in the dam portion DP. Specifically, a groove Gv may be provided or formed on the first layer 113a. In addition, a groove Gv may be provided or formed between the first area A1 and the first auxiliary dam 115D within the third area A3. A pattern of at least one material layer may be provided in the groove Gv, and the first functional layer 220a, the second functional layer 220c, the opposing electrode 230, the first inorganic encapsulation layer 310, the second inorganic encapsulation layer 330, the first insulating layer 410, the second insulating layer 430, and the third insulating layer 450 are patterns or portions of the at least one material layer. In this case, the material layer may be disconnected at a position corresponding to the groove Gv in the third area A3, and the first functional layer 220a, the second functional layer 220c, and the opposing electrode 230 may be provided by the material layer. The following reference Figure 6A and Figure 6B Describe this.

[0135] One or more pattern portions 115P may be provided between adjacent grooves Gv. Thus, the grooves Gv may be spaced apart from one another in the direction along the substrate 100. In an embodiment, the width of the pattern portion 115P may decrease to a minimum width along the thickness direction (e.g., the z direction) and then increase from the minimum width. The maximum thickness of the pattern portion 115P may be less than the maximum thickness of the first auxiliary dam 115D. The pattern portion 115P may include the same material as the first auxiliary layer 115Da and / or the spacer 115. In this case, in the method of manufacturing the display device 1, when providing or forming the first auxiliary dam 115D, the pattern portion 115P may be provided or formed together in a mask process using a halftone mask or the like. The dam portion DP in the third area A3 may include all layers including from the first base layer ILa to the auxiliary dam layer (e.g., the pattern portion 115P plus the first auxiliary dam 115D), without limitation thereto. The spacer layer in the display area and the first non-display area may include a set of spacers 115 , first auxiliary dams 115D, and pattern portions 115P.

[0136] The substrate 100 may further include or define a lower trench LGv corresponding to the third area A3. The lower trench LGv may be provided or formed between the dam portion DP and the second area A2. Specifically, the lower trench LGv may be spaced apart from the dam portion DP in a direction along the substrate 100 from the first area A1 to the second area A2. The lower trench LGv may be closer to the boundary between the second area A2 and the third area A3 than to the boundary between the first area A1 and the third area A3.

[0137] Patterns or portions of one or more of the intermediate layer 220, the counter electrode 230, the first inorganic encapsulation layer 310, and the organic encapsulation layer 320 may be disposed within the lower groove LGv. In this case, the intermediate layer 220 and the counter electrode 230 may be disconnected in the third area A3 at a location corresponding to the lower groove LGv. In embodiments, the intermediate layer 220 and / or the counter electrode 230 may include or define a protrusion that protrudes into the lower groove LGv in a direction toward the substrate 100. Within the lower groove LGv, the first inorganic encapsulation layer 310 may extend from the exterior of the lower groove LGv into the lower groove LGv and be disposed over the entire inner surface of the lower groove LGv. A portion of the organic encapsulation layer 320 may be disposed to fill the lower groove LGv. Since the first inorganic encapsulation layer 310 and the organic encapsulation layer 320 remain connected within the lower groove LGv, the contact area between the substrate 100 and the thin-film encapsulation layer 300 may be increased. Consequently, the bonding strength between the substrate 100 and the thin-film encapsulation layer 300 may be enhanced.

[0138] As described above, a dam portion DP may be provided adjacent to the boundary line BL between the first area A1 and the third area A3 to improve the reliability of the display device 1. In the comparative display device, when the dam portion DP of the third area A3 is spaced apart from the first area A1, the amount of etching of the organic material used to provide or form the first base layer ILa, the second base layer 109a, the third base layer 111a, and the first layer 113a may be increased. Furthermore, to provide or form the touch input layer 40 on a flat surface, a third planarization layer may be further included to planarize the upper surface between the dam portion DP and the first area A1. In this case, a process for providing or forming the third planarization layer is added during the manufacture of the comparative display device. The addition of this process may reduce the production efficiency of the comparative display device or may cause defects in the comparative display device.

[0139] In one or more embodiments of the display device that differ from the comparative embodiment, the dam portion DP, which blocks the flow of the material of the organic encapsulating layer 320, extends up to and including the boundary line BL between the first area A1 and the third area A3, and replaces the role of the third planarization layer discussed above. Consequently, the amount of organic material etched can be reduced, the process of providing or forming the third planarization layer can be omitted, and the production efficiency of the display device 1 can be improved. Furthermore, because the possibility of defects caused by the process of forming the third planarization layer is eliminated, the reliability of the resulting display device 1 can be improved.

[0140] In the following, reference will be made to Figure 6A and Figure 6B The shape of the groove Gv is described in detail.

[0141] Figure 6A and Figure 6B They are respectively Figure 5A The corresponding enlarged cross-sectional view of the embodiment of the groove Gv indicated by the dotted box in FIG. Figure 6A and Figure 6B In, with Figures 5A to 5C The same reference numerals as those in FIG. 1 denote the same components, and redundant descriptions thereof will be omitted.

[0142] refer to Figure 6A and Figure 6B , a pattern portion 115P and / or a first auxiliary layer 115Da may be provided on the first layer 113a. The sidewalls of the pattern portion 115P face the sidewalls of the first auxiliary layer 115Da. The facing sidewalls and the upper surface of the first layer 113a may together define a groove Gv. The upper surface of the first layer 113a may be formed by a recess ( Figure 6B ) or by the top surface farthest from the substrate 100 ( Figure 6A Patterns or portions of the first functional layer 220a, the second functional layer 220c, the counter electrode 230, the first inorganic encapsulation layer 310, the second inorganic encapsulation layer 330, the first insulating layer 410, the second insulating layer 430, and the third insulating layer 450 may be sequentially stacked on the pattern portion 115P and / or the first auxiliary layer 115Da.

[0143] In an embodiment, the thickness of the pattern portion 115P at the corresponding sidewalls in the facing sidewalls may be equal to the thickness of the first auxiliary layer 115Da. In an embodiment, the thickness of the pattern portion 115P may be different from the thickness of the first auxiliary layer 115Da at the groove Gv. In an embodiment, for example, the thickness of the first auxiliary layer 115Da at its facing sidewalls may be greater than the thickness of the pattern portion 115P at its facing sidewalls. In this case, the groove Gv provided between the pattern portion 115P and the facing sidewalls of the first auxiliary layer 115Da and defined by the facing sidewalls may be arranged in an asymmetric shape relative to the center of the groove Gv. Hereinafter, for convenience of description, the case where the thickness of the pattern portion 115P at the groove Gv is equal to the thickness of the first auxiliary layer 115Da will be described in detail.

[0144] In an embodiment, the side surface (or sidewall) of the pattern portion 115P or the first auxiliary layer 115Da may be curved. In an embodiment, for example, the width of the pattern portion 115P or the first auxiliary layer 115Da may decrease along the thickness direction (e.g., the z-direction) and then increase. That is, the side surface of the auxiliary dam layer defining the groove Gv may convex in a direction away from the center of the groove Gv and toward the pattern portion 115P or the first auxiliary layer 115Da, respectively.

[0145] The first intermediate layer pattern 221P and the first opposing electrode pattern 231P may be sequentially arranged on the pattern portion 115P. The first intermediate layer pattern 221P may be part of the first functional layer 220a and / or part of the second functional layer 220c. In this case, within the third area A3, more than one first intermediate layer pattern 221P and more than one first opposing electrode pattern 231P may be adjacent to and spaced apart from each other along the direction of the substrate 100. In addition, the first intermediate layer pattern 221P and the first opposing electrode pattern 231P, which serve as disconnected portions between the intermediate layer 220 and the opposing electrode 230, may be spaced apart from the remaining portions of the intermediate layer 220 and the opposing electrode 230, respectively.

[0146] More than one groove Gv may be provided between the pattern portion 115P and the first auxiliary layer 115Da, or between pattern portions 115P adjacent to each other.

[0147] In an embodiment, the width of each of the grooves Gv may increase along the thickness direction (e.g., the z direction) and then decrease (e.g., both increase and decrease). In an embodiment, for example, the side surface of the auxiliary dam layer defining the groove Gv may have an arc shape. In one or more embodiments, the width of each of the grooves Gv may increase or decrease along the thickness direction (e.g., the z direction). In one or more embodiments, the width of each of the grooves Gv may be constant, that is, it does not increase or decrease. When the same material layer of which the spacer 115 is a part is provided or formed on the first layer 113a and the grooves Gv are subsequently provided or formed by the same material layer, the width of each of the above-mentioned grooves Gv may be provided or formed by controlling the etching rate and / or etching time of the etching process applied to such the same material layer.

[0148] In an embodiment, the depth H1 of the trench Gv may be equal to the thickness H2 of the first auxiliary layer 115Da or the pattern portion 115P. Figure 6A , for example, the depth H1 of the groove Gv may be equal to the thickness H2 of the first auxiliary layer 115Da or the pattern portion 115P. The groove Gv may include a bottom surface closest to the substrate 100. The first layer 113a may include an upper surface farthest from the substrate 100. In this case, the bottom surface of the groove Gv may be coplanar with the upper surface or top surface of the first layer 113a. In an embodiment, the depth H1 of the groove Gv may be different from the thickness H2 of the first auxiliary layer 115Da or the pattern portion 115P. Reference Figure 6BFor example, the depth H1 of the groove Gv may be greater than the thickness H2 of the first auxiliary layer 115Da or the pattern portion 115P. In this case, the groove Gv may extend into the auxiliary dam layer at the pattern portion 115P and into the first layer 113a. That is, the groove Gv may be defined by the side surfaces of the first layer 113a and the side surfaces of the auxiliary dam layer.

[0149] In an embodiment, the depth H1 of the groove Gv may be less than the thickness H2 of the first auxiliary layer 115Da or the pattern portion 115P. In this case, more than one first auxiliary layer 115Da and pattern portion 115P adjacent to each other along the substrate 100 may be connected to each other. Here, the groove Gv may be defined simply by the inner surface of the auxiliary dam layer, and a portion of the auxiliary dam layer may separate the groove Gv from the first layer 113a. When the same material layer of which the spacer 115 is a part is provided or formed on the first layer 113a and the groove Gv is subsequently provided or formed by the same material layer, the depth H1 of the above-mentioned groove Gv can be provided or formed by controlling the etching rate or etching time of the etching process applied to such the same material layer.

[0150] The second intermediate layer pattern 222P and the second opposing electrode pattern 232P can be disposed within the groove Gv. In this case, the second intermediate layer pattern 222P can be a portion of the first functional layer 220a and / or a portion of the second functional layer 220c. Specifically, the second intermediate layer pattern 222P and the second opposing electrode pattern 232P can be disposed on the bottom surface of the groove Gv. In this case, the second intermediate layer pattern 222P and the second opposing electrode pattern 232P, which serve as the disconnection between the intermediate layer 220 and the opposing electrode 230, can be spaced apart from the remaining portions of the intermediate layer 220 and the opposing electrode 230, respectively. Furthermore, the second intermediate layer pattern 222P and the intermediate layer 220 can be corresponding portions of the same material layer, and the second opposing electrode pattern 232P and the opposing electrode 230 can be corresponding portions of the same material layer. Therefore, the intermediate layer 220 and the opposing electrode 230 can be disconnected at a location corresponding to the groove Gv.

[0151] The second intermediate layer pattern 222P and the second opposing electrode pattern 232P can be arranged to be spaced apart from the first intermediate layer pattern 221P and the first opposing electrode pattern 231P, respectively. In an embodiment, for example, the second intermediate layer pattern 222P and the first intermediate layer pattern 221P can be arranged to be spaced apart from each other along the thickness direction (e.g., the z-direction). In addition, the second opposing electrode pattern 232P and the first opposing electrode pattern 231P can be arranged to be spaced apart from each other along the thickness direction (e.g., the z-direction).

[0152] The first inorganic encapsulation layer 310, the second inorganic encapsulation layer 330, the first insulating layer 410, and the second insulating layer 430 may be disposed in the groove Gv. In this case, the first inorganic encapsulation layer 310, the second inorganic encapsulation layer 330, the first insulating layer 410, and the second insulating layer 430 may be continuously disposed without being disconnected at the groove Gv. Figure 6A and Figure 6B , the first inorganic encapsulation layer 310 , the second inorganic encapsulation layer 330 , the first insulating layer 410 , and the second insulating layer 430 in the trench Gv each extend to the outside of the trench Gv to maintain connection between the trenches Gv.

[0153] The first inorganic encapsulation layer 310, the second inorganic encapsulation layer 330, the first insulating layer 410, and the second insulating layer 430 in the groove Gv can be opened in a direction away from the substrate 100 to form a sub-opening. The third insulating layer 450 can fill the groove Gv, that is, it can fill the sub-opening and extend to the outside of the groove Gv. In this case, the contact area between the touch input layer 40 and the dam portion DP can be increased to enhance the adhesive strength between the two. In addition, the intermediate layer 220, the first intermediate layer pattern 221P, and the second intermediate layer pattern 222P can be disconnected and spaced apart from each other to reduce or effectively prevent external impurities from penetrating into the second area A2 through the intermediate layer 220.

[0154] Figure 7 According to another embodiment of the present invention, Figure 3 The enlarged cross-sectional view taken along line AA' and line BB' is shown. Figures 5A to 5C The same reference numerals as those in FIG. 1 denote the same components, and redundant descriptions thereof will be omitted.

[0155] refer to Figure 7 , the display device 1 may include a first area A1, a second area A2 surrounding the first area A1, and a third area A3 disposed between the first area A1 and the second area A2. In this case, the substrate 100 may include an opening area OA corresponding to the first area A1. The OLED as a display element may include a pixel electrode 210 and an opposing electrode 230. A thin film encapsulation layer 300 may be provided to cover the OLED, and the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may extend to the third area A3 to contact the dam portion DP including the plurality of grooves Gv. In this case, the dam portion DP may be adjacent to and coincide with a boundary line BL separating the first area A1 and the third area A3.

[0156] In an embodiment, the dam portion DP may include a first auxiliary dam 115D, and the second auxiliary dam 117D may be disposed on the first auxiliary dam 115D. In an embodiment, the first auxiliary dam 115D and the second auxiliary dam 117D may include the same material and / or be in the same layer as each other. In this case, in the method of manufacturing the display device 1, the first auxiliary dam 115D and the second auxiliary dam 117D may be provided or formed together in a mask process using a half-tone mask or the like. In an embodiment, the first auxiliary dam 115D and the second auxiliary dam 117D may include different materials and / or be in different layers from each other. That is, the first auxiliary dam 115D and the second auxiliary dam 117D may be corresponding parts of different material layers.

[0157] The first auxiliary layer 115Da, the second auxiliary layer 115Db, and the second auxiliary dam 117D may form a stepped structure, wherein the upper surface of the second auxiliary dam 117D is further away from the substrate 100 than the upper surface of each of the first auxiliary layer 115Da and the second auxiliary layer 115Db. Similar to the dam portion DP, the first auxiliary dam 115D and the second auxiliary dam 117D may control the flow of the organic encapsulation layer material forming the organic encapsulation layer 320 so as to reduce or effectively prevent the organic encapsulation layer 320 from penetrating from the third area A3 into the first area A1. In addition, the first auxiliary dam 115D and the second auxiliary dam 117D may reduce or effectively prevent external impurities introduced through the first area A1 from penetrating through the organic encapsulation layer 320 into the second area A2.

[0158] Figure 8 and Figure 9 According to other embodiments of the present invention, Figure 3 An enlarged cross-sectional view taken along line AA' and line BB'. Figure 8 and Figure 9 In, with Figures 5A to 5C The same reference numerals as those in FIG. 1 denote the same components, and redundant descriptions thereof will be omitted.

[0159] refer to Figure 8 and Figure 9 , the display device 1 may include a first area A1, a second area A2 surrounding the first area A1, and a third area A3 disposed between the first area A1 and the second area A2. In this case, the substrate 100 may include an opening area OA corresponding to the first area A1. The OLED as a display element may include a pixel electrode 210 and an opposing electrode 230. A thin film encapsulation layer 300 may be provided to cover the OLED, and the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may extend to the third area A3 to contact the dam portion DP including the plurality of grooves Gv. In this case, the dam portion DP may be adjacent to the boundary line BL separating the first area A1 and the third area A3.

[0160] In embodiments, the first auxiliary dam 115D may include an upper trench UGv. Specifically, the upper trench UGv may be defined by facing sidewalls of the first auxiliary layer 115Da and / or the second auxiliary layer 115Db.

[0161] In an embodiment, the width of the upper groove UGv may increase along the thickness direction (e.g., z direction) and then decrease. In one or more embodiments, the width of the upper groove UGv may increase or decrease along the thickness direction (e.g., z direction). In one or more embodiments, the width of the upper groove UGv may be constant. In the method of manufacturing the display device 1, when a plurality of grooves Gv are provided or formed in the auxiliary dam layer, the upper groove UGv as described above may be provided or formed simultaneously. In this case, when the first auxiliary dam 115D is provided or formed and the upper groove UGv is subsequently formed, the width of the upper groove UGv may be limited by controlling the etching rate or etching time of the etching process of the auxiliary dam layer material.

[0162] In an embodiment, the depth H3 of the upper trench UGv defined by the first auxiliary dam 115D may be different from the thickness H4 of the first auxiliary dam 115D, which is measured from a reference surface, eg, a top surface of the first auxiliary dam 115D farthest from the substrate 100. Figure 8 , for example, the depth H3 of the upper trench UGv may be less than the thickness H4 of the first auxiliary dam 115D. In this case, the bottom surface of the upper trench UGv may be coplanar with the upper surface of the first auxiliary layer 115Da farthest from the substrate 100. In an embodiment, the depth H3 of the upper trench UGv may be equal to the thickness H4 of the first auxiliary dam 115D. Figure 9 For example, the depth H3 of the upper trench UGv defined by the first auxiliary dam 115D may be equal to the thickness H4 of the first auxiliary dam 115D. In this case, the bottom surface of the upper trench UGv may be coplanar with the upper surface of the first layer 113a.

[0163] In an embodiment, the depth H3 of the upper trench UGv may be greater than the thickness H4 of the first auxiliary dam 115D. In this case, the side surface of the first layer 113a may form the upper trench UGv together with the side surface of the auxiliary dam layer. In this case, in the method of manufacturing the display device 1, when providing or forming the first auxiliary dam 115D and then providing or forming the upper trench UGv, the depth H3 of the upper trench UGv may be provided by controlling the etching speed or etching time of the etching process.

[0164] Similar to the interior of the groove Gv, the intermediate layer pattern and the counter electrode pattern can be arranged in the upper groove UGv. The first inorganic encapsulation layer 310, the second inorganic encapsulation layer 330, the first insulating layer 410 and the second insulating layer 430 can also be arranged in the upper groove UGv. In this case, the first inorganic encapsulation layer 310, the second inorganic encapsulation layer 330, the first insulating layer 410 and the second insulating layer 430 can be arranged continuously without being disconnected, as described above with reference to Figure 6A and Figure 6B The third insulating layer 450 may fill the upper groove UGv. In this case, the contact area between the touch input layer 40 and the dam portion DP may be increased to enhance the adhesive strength therebetween. Furthermore, the upper groove UGv may reduce or effectively prevent external impurities from penetrating into the second area A2 through the intermediate layer 220, and may control the flow of the organic encapsulation layer material forming the organic encapsulation layer 320.

[0165] As described above, one or more embodiments may provide a highly reliable display device 1 in which the dam portion DP adjoins the boundary line BL separating the opening area OA where the component 20 is arranged from the first non-display area (eg, the third area A3 around the opening area OA).

[0166] It should be understood that the embodiments described herein should be considered in an illustrative sense only and not for purposes of limitation. Descriptions of features within each embodiment should generally be considered applicable to other similar features in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, those skilled in the art will appreciate that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. A display device, comprising: A display element including a pixel electrode and a counter electrode; The substrate comprises: an opening area, a display area including the display element and adjacent to the opening area, and a non-display area between the opening area and the display area; a pixel defining layer having an opening exposing a central portion of the pixel electrode; a spacer, disposed on the pixel defining layer; an encapsulation layer, comprising: a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer, each of which is in the display area and covers the display element, and the first inorganic encapsulation layer and the second inorganic encapsulation layer extend from the display area to the non-display area; and a dam portion in the non-display area and adjacent to a boundary line separating the opening area from the non-display area, wherein the dam portion adjacent to the boundary line includes a plurality of grooves, and the first inorganic encapsulation layer and the second inorganic encapsulation layer in the non-display area are in contact with each other in the plurality of grooves, wherein the dam portion includes a first layer disposed in the same layer as the pixel defining layer and a first auxiliary dam disposed in the same layer as the spacer, and The bottom surfaces of the plurality of grooves are formed by the upper surface of the first layer.

2. The display device according to claim 1, The counter electrode comprises: the counter electrode in the display area extending to the dam portion in the non-display area; as well as The counter electrode in the non-display area includes a portion of the counter electrode that is disconnected from each other, and wherein the portions of the counter electrode disconnected from each other include a first counter electrode pattern between the plurality of trenches adjacent to each other, wherein the portion of the counter electrode disconnected from each other further includes a second counter electrode pattern in each of the plurality of grooves adjacent to each other, and The second counter electrode pattern is spaced apart from the first counter electrode pattern between the plurality of trenches adjacent to each other.

3. The display device according to claim 1, wherein The display element in the display area further includes an intermediate layer between the pixel electrode and the counter electrode, and The intermediate layer comprises: the intermediate layer in the display area extending to the dam portion in the non-display area; and The intermediate layer in the non-display area includes portions of the intermediate layer that are disconnected from each other, and The portions of the intermediate layer that are disconnected from each other include first intermediate layer patterns between the plurality of trenches adjacent to each other.

4. The display device according to claim 3, wherein The portions of the intermediate layer disconnected from each other further include a second intermediate layer pattern in each of the plurality of trenches adjacent to each other, and The second intermediate layer pattern is spaced apart from the first intermediate layer pattern between the plurality of trenches adjacent to each other.

5. The display device according to claim 1, wherein The pixel defining layer is in the display area, The spacer is in the display area and protrudes from the pixel defining layer in the display area, The first layer is disconnected from the pixel defining layer in the display area, and The first auxiliary dam is in the non-display area and is disconnected from the spacer in the display area. The display device according to claim 5 , wherein: In the dam portion, the plurality of trenches include the bottom surface closest to the substrate, the first layer includes an upper surface farthest from the substrate, and the bottom surface is closer to the substrate than the upper surface.

7. The display device according to claim 5, wherein The dam portion further includes a second auxiliary dam protruding from the first auxiliary dam.

8. The display device according to claim 5, wherein The first auxiliary dam in the dam portion includes an upper groove.

9. The display device according to claim 1 , further comprising a touch input layer, the touch input layer comprising an insulating layer and a sensing electrode in the display area, the touch input layer facing the substrate, the encapsulation layer being between the touch input layer and the substrate, wherein the insulating layer in the display area extends from the display area to the non-display area, and The insulating layer in the non-display area extends into the plurality of trenches of the dam portion.

10. A display device comprising: A display element including a pixel electrode and a counter electrode; A substrate comprising: an opening area, a display area adjacent to the opening area, and a non-display area between the opening area and the display area; a dam portion in the non-display area and including a plurality of grooves; a pixel defining layer having an opening exposing a central portion of the pixel electrode; a spacer, disposed on the pixel defining layer; an encapsulation layer covering the display element; and a touch input layer, comprising an insulating layer and sensing electrodes in the display area, the touch input layer facing the substrate, the encapsulation layer being between the touch input layer and the substrate, in: The insulating layer in the display area extends from the display area to the non-display area, and The insulating layer in the non-display area extends into the plurality of grooves of the dam portion, wherein the dam portion includes a first layer disposed in the same layer as the pixel defining layer and a first auxiliary dam disposed in the same layer as the spacer, and The bottom surfaces of the plurality of grooves are formed by the upper surface of the first layer.

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