Storage device with a predictor engine for host turnaround time

Abstract

A method for accessing data by a storage device includes issuing a DMA read request to a host memory. Estimating a host turnaround time. The host turnaround time is the time interval between when the DMA read request is issued and when an initial data packet of request data from the DMA read request arrives from the host to the storage device. Initializing a data path of the storage device to transfer the request data of the DMA read request to a device buffer of the storage device. Initialization of the data path begins after issuing the DMA read request and is completed at the end of the estimated host turnaround time. Receive the request data from the host. Transfer the received request data to the device buffer using the data path.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This patent application claims priority to U.S. patent application No. 16 / 427,076, filed on May 30, 2019, which is assigned to the assignee herein and is incorporated herein by reference in its entirety. Background Art Technical Field

[0004] Embodiments generally relate to methods and apparatus for a storage device having a non-volatile memory to access a host memory of a host.

[0005] Description of Related Art

[0006] NVM Express (NVMe) is a register-level interface protocol for communication between a host's software application and a storage device's non-volatile memory. The NVMe logic includes a direct memory access (DMA) block that allows the storage device to access the host's main system memory. A DMA read operation refers to reading data from the host's main memory and writing it to the storage device, and a DMA write operation refers to obtaining data from the storage device and writing it to the host. For example, a DMA read operation can be performed to obtain data read from a submission queue within the host's main memory.

[0007] In a DMA read operation, the host turnaround time refers to the time interval from when the storage device sends a read data request to the host until the data arrives at the storage device from the host. The data path of the storage device is activated to start the data transfer of the received data from the host to the device buffer of the storage device. The data is transferred from the device buffer to the non-volatile memory of the storage device. The delay time from initializing the data path to activating the data path causes performance degradation or reduced efficiency of the storage device.

[0008] Therefore, there is a need for improved storage devices and methods for accessing data from storage devices. Summary of the invention

[0009] In one embodiment, a method for accessing data by a storage device includes: issuing a direct memory access (DMA) read request to a host memory. Initializing a data path of the storage device to transfer request data of the DMA read request to a device buffer of the storage device. Initializing the data path after issuing the DMA read request and before receiving an initial data packet of the received request data. Receive the request data from the host. Transfer the received request data to the device buffer of the storage device using the data path.

[0010] In another embodiment, a method for accessing data by a storage device includes: issuing a DMA read request to a host memory. Estimating a host turnaround time. The host turnaround time is the time interval between when the DMA read request is issued and when an initial data packet of request data from the DMA read request arrives from the host to the storage device. Initializing a data path of the storage device to transfer the request data of the DMA read request to a device buffer of the storage device. Initialization of the data path begins after issuing the DMA read request and is completed at the end of the estimated host turnaround time. Receive the request data from the host. Transfer the received request data to the device buffer using the data path.

[0011] In one embodiment, a storage device includes: a non-volatile memory and a device controller. The device controller includes a host interface, a data path, a counter, a statistics collector, and a predictor engine device. The data path includes a DMA module and a device buffer. The device controller is operable to: issue a DMA read request to a host memory to a host through the DMA module; count an actual host turnaround time of the DMA read request through the counter; collect one or more parameters related to the DMA read request through the statistics collector; estimate the estimated host turnaround time through the predictor engine device; and initialize the data path of the storage device to transfer the request data of the DMA read request to the device buffer. Initialization of the data path begins after the DMA read request is issued and is completed when the host turnaround time is about to end. Receive the request data from the host. Transfer the received request data to the device buffer using the data path. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Thus, a detailed understanding of the manner in which the above-described features of the present disclosure are understood, a more particular description of the present disclosure, the above brief overview, may be obtained by reference to the embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the drawings illustrate only typical embodiments of the present disclosure and are therefore not to be considered limiting of its scope, as the present disclosure may admit to other equally effective embodiments.

[0013] Figure 1 is a schematic diagram of one embodiment of a system including a host connected to a storage device.

[0014] Figure 2A A time interval of a method for initializing a data path of a storage device for a DMA read request from the storage device to a host is shown, wherein the data path is initialized when a DMA read request is issued to the host.

[0015] Figure 2BA time interval for another method of initializing a data path of a storage device for a DMA read request from the storage device to a host is shown, wherein the data path is initialized once an initial packet of request data arrives at the storage device.

[0016] Figure 2C A time interval of yet another method of initializing a data path of a storage device for a DMA read request from the storage device to a host is shown, wherein the data path is initialized using an estimated host turnaround time.

[0017] Figure 3 is a schematic diagram of certain embodiments of a method of estimating a time to initialize a data path of a storage device.

[0018] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements disclosed in one embodiment may be beneficially utilized on other embodiments without specific recitation. DETAILED DESCRIPTION

[0019] Hereinafter, reference is made to the embodiments of the present disclosure. However, it should be understood that the present disclosure is not limited to the embodiments specifically described. On the contrary, any combination of the following features and elements (whether or not related to different embodiments) is considered to realize and practice the present disclosure. In addition, although the embodiments of the present disclosure can achieve advantages that are superior to other possible solutions and / or superior to the prior art, whether a specific advantage is achieved by a given embodiment is not a limitation to the present disclosure. Therefore, the following aspects, features, embodiments and advantages are merely illustrative, and are not considered to be elements or limitations of the appended claims, unless explicitly stated in the claims. Similarly, reference to "the present disclosure" should not be interpreted as a summary of any inventive subject matter disclosed herein, and should not be considered to be elements or limitations of the appended claims, unless explicitly stated in the claims.

[0020] The embodiment relates to a method and apparatus for a storage device having a non-volatile memory to access a host memory of a host. The storage device can access the host memory through a direct memory access (DMA) read request. High performance and high efficiency of the storage device during a DMA read request operation are provided.

[0021] Figure 1 is a schematic diagram of one embodiment of a system 100 including a host 150 connected to a storage device 102, such as a solid state drive (SSD), for the host 150. The system 100 may also include a switch or bridge connecting the host 150 and the storage device 102.

[0022] The host 150 can utilize a non-volatile memory (NVM) 106 included in the storage device 102 to write and read data, such as for long-term memory storage. The storage device 102 can be an internal storage drive, such as a laptop hard drive or a desktop hard drive. The storage device 102 can be a removable mass storage device, such as, but not limited to, a handheld removable memory device, such as a memory card (e.g., a secure digital (SD) card, a micro secure digital (micro-SD) card, or a multimedia card (MMC)) or a universal serial bus (USB) device. The storage device 102 can take the form of an embedded mass storage device (such as an eSD / eMMC embedded flash drive) embedded in the host 150. The storage device 102 can also be any other type of internal storage device, removable storage device, embedded storage device, external storage device, or network storage device.

[0023] Host 150 may include a wide variety of devices, such as computer servers, network attached storage (NAS) units, desktop computers, notebook (i.e., laptop) computers, tablet computers (i.e., "smart" tablets), set-top boxes, telephone handsets (i.e., "smart" phones), televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, and automotive applications (i.e., mapping, autonomous driving). In certain embodiments, host 150 includes any device having a processing unit or any form of hardware capable of processing data, including a general-purpose processing unit, dedicated hardware (such as an application-specific integrated circuit (ASIC)), configurable hardware (such as a field programmable gate array (ASIC)), or any other form of processing unit configured by software instructions, microcode, or firmware.

[0024] The host 150 includes a central processing unit (CPU) 152 connected to a host memory space 160, such as DRAM or other main memory. Applications can be stored in the memory space 160 for execution by components of the host 150. The host memory space 160 can include host queues 162, such as a command submission queue and a command completion queue. The host memory space 160 can include data buffers, such as a host memory buffer 164 for use by the storage device 102.

[0025] The storage device 102 includes a host interface 101 for communication between the storage device interface 153 of the host 150. The host interface 101 and the storage device interface 153 operate under a communication protocol such as a peripheral component express interface (PCIe), a serial advanced technology attachment (SATA), a serial attached SCSI (SAS), a universal flash storage (UFS), and other suitable serial communication protocols. The link between the storage device 102 and the host 150 can be any appropriate corresponding link, such as a PCIe link, a SATA link, a SAS link, or a UFS link. The link can be one channel to thirty-two channels, depending on the number of available physical devices connecting the storage device 102 and the host 150. The number of links and channels is usually set during the initialization of the storage device 102.

[0026] The NVM 106 of the storage device 102 is configured for long-term storage of information as a non-volatile memory space and retains the information after power on / off cycles. The NVM 106 may be composed of one or more dies of NAND flash memory. Other examples of non-volatile memory include phase change memory, ReRAM memory, MRAM memory, magnetic media (including shingled magnetic recording), optical disks, floppy disks, electrically programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), and other solid-state memories. The magnetic media non-volatile memory may be one or more disks in the storage device 102. Each disk may contain one or more areas consisting of one or more data tracks. The NVM 106 may include one or more types of non-volatile memory.

[0027] The storage device 102 includes a device controller 110 that manages the operation of the storage device 102, such as writing to and reading from the NVM 106. The device controller 110 may include one or more processors, which may be multi-core processors. The device controller 110 may operate under the NVM Express (NVMe) protocol, but other protocols are also applicable. The NVME protocol is a communication interface / protocol developed for SSDs to operate hosts and storage devices connected via a PCIe interface. The NVMe protocol provides a command submission queue and a command completion queue for transmitting data between the storage device 102 and the host 150. The command submission queue and the command completion queue are typically stored in the host memory 160. Commands (such as read commands and write commands) are placed in the submission queue by the host software and retrieved by the storage device for execution. The completion item is placed in the associated completion queue by the storage device controller to notify the host of the completion of the command.

[0028] The device controller 110 includes a data path 120. The data path 120 includes a direct memory access module 122, a security engine 124, a device buffer 126, and a non-volatile memory (NVM) interface 128. The direct memory access module 122 can access the host memory 160 without the participation of the CPU 152 from the host 150 to perform read operations and write operations on the host memory 160. The security engine 124 protects data transmission by encrypting data to be written to the NVM 106, decrypting data read from the NVM 106, parity checking, and / or other data protection mechanisms. The encryption and decryption of data involves an encoding process and a decoding process, which may involve multiple iterations during encoding and decoding. The device buffer 126 is used for short-term storage or temporary storage during the operation of the storage device 102. The device buffer 126 may include dynamic random access memory (DRAM), static random access memory (SRAM), and other forms of volatile memory. Device buffer 126 is used to cache data to be written to and read from non-volatile memory through NVM interface 128. Device buffer 126 may also be used to store metadata, such as a flash translation layer table.

[0029] The storage device 102 includes a counter 132, a statistics collector 134, and a predictor engine 136. The counter 132 measures the actual host turnaround time from when the storage device 102 issues a DMA read request to when the host interface 101 receives the initial data packet of the request data. The statistics collector 134 collects statistical information about the parameters of the DMA read request operation. The statistics collector 134 can collect one or more of the following parameters: average host turnaround time, networking architecture structure of the interface connecting the host and the storage device, host storage device interface type, host storage device communication protocol type, host interface speed of the storage device, number of channels of the link between the host and the storage device, packet size of the transaction, current stress across the link between the host and the storage device, other suitable parameters, and combinations thereof.

[0030] The predictor engine 136 uses the collected statistics of the statistics collector 134 to estimate the estimated host turnaround time from the issuance of a DMA read request by the storage device 102 to the estimated receipt of an initial data packet of the request data by the host interface 101. The estimated host turnaround time is used by the device controller 110 to initialize the data path 120 after the DMA read request is issued by the DMA module 122 and before the initial data packet of the request data is received. Initializing the data path 120 at this time reduces the lag time between the completion of the initialization of the data path 120 and the receipt of the initial data packet of the request data, and allows the data path 120 to be used for other operations and other threads before the data path for the DMA read request is initialized. For example, the data path 120 can be used for host memory buffer operations of the host memory buffer 164. For another example, the data path 120 can be used for security operations of the security engine 124. For example, the security engine 124 can perform encoding operations on data read from the host 150 for transmission to the NVM 106.

[0031] The device controller 110 executes computer-readable program code (e.g., software or firmware) executable instructions (referred to herein as “instructions”). The instructions may be executed by various components of the controller 110, such as processors, logic gates, switches, application specific integrated circuits (ASICs), programmable logic controllers, embedded microcontrollers, and other components of the controller 110.

[0032] The instructions are stored in a non-transitory computer-readable storage medium. In some embodiments, the instructions are stored in a non-transitory computer-readable storage medium of the storage device 102, such as a read-only memory or NVM 106. The instructions stored in the storage device 102 can be executed without input or instructions added from the host 150. In other embodiments, the instructions are transmitted from the host 150. The controller 110 is configured with hardware and instructions for performing the various functions described herein and shown in the figures.

[0033] Figure 2A 1 shows a DMA read request from a storage device to a host (such as a storage device 102 to Figure 1 A method 210 of initializing a data path of a storage device when a DMA read request is issued to a host 150 or other suitable storage device) at a time interval. The method 210 initializes the data path when a DMA read request is issued to the host.

[0034] The method 210 begins by issuing a DMA read request 211 to the host. At the moment when the storage device issues the DMA read request 211 to the host, the internal data path initialization 212 of the storage device begins. During the time interval of the internal data path initialization 212, a data path lock 213 occurs during the time interval in which the data path engine is locked until the request data 215 from the host arrives at the storage device. When the request data 215 from the host arrives at the storage device, the data path is unlocked and becomes the active data path 216 to process and transmit the received data, such as encrypting the request data and transferring the data to the device buffer. The storage device waits for the host turnaround time 214 from issuing the DMA read request 211 to receiving the request data 215 before it can process and transmit the received data through the active data path 216. During the time interval of the data path lock 213 and the active data path 216, a data path blockage 217 occurs, wherein the data path cannot be used by other components or other threads of the storage device. For example, during the data path blockage 217, the data path is blocked and cannot perform host memory buffer transfers or internal security operations of the storage device. Data paths (such as Figure 1 The data path 120 of the embodiment of the present invention is operated in a pipeline architecture in which the data value of the operation is propagated forward. The data path can handle multiple operations at different stages of the pipeline. When a data path block 217 occurs, the processing and transmission of the request data 215 handled by the components of the data path (such as the address register and the control register) cannot be input into the pipeline of the data path with other operations.

[0035] Method 210 provides high performance but low efficiency for storage devices. Performance is the amount of data that arrives at the device buffer from the host interface through the data path over time for DMA read requests. Efficiency is the utilization of the data path for DMA read request threads and other threads. High performance is provided because the internal data path engine is initialized in advance and waits for request data. Once the request data arrives, the data path engine starts processing the request data with little or no delay. Since the internal data path engine cannot perform any other tasks during the data path lock 213 and the active data path 216, low efficiency is provided during the data path blocking 217. The internal data path efficiency is the sum of the data path initialization 212 and the active data path 216 divided by the time interval of the data path blocking 217. Since the internal data path efficiency is a function of the host turnaround time 214, the internal data path efficiency of method 210 is low.

[0036] Figure 2B 1 shows a DMA read request from a storage device to a host (such as a storage device 102 to Figure 1Another method 220 of initializing the data path of the storage device (initiating a DMA read request from a host 150 or other suitable storage device) is described in detail below. Once the initial packet of requested data arrives at the storage device, the method 220 initializes the data path.

[0037] The method 220 begins by issuing a DMA read request 221 to the host. At the moment when the request data 225 from the host arrives at the storage device, the internal data path initialization 222 of the storage device begins. During the time interval of the internal data path initialization 222, a data path lock 223 occurs. When the internal data path initialization 222 is completed, the data path is unlocked and becomes an active data path 226 to process and transmit the received data, such as encrypting the request data and transferring the data to the device buffer. The storage device waits for the host turnaround time 224 from issuing the DMA read request 221 to receiving the request data 225 before starting the data path initialization 222. After completing the data path initialization 222, the active data path 226 processes and transmits the received data. During the time interval of the data path lock 223 and the active data path 226, a data path blocking 227 occurs, wherein the data path cannot be used by other components or other threads of the storage device. For example, during the data path blocking 227, the data path is blocked and cannot perform host memory buffer transfers and internal security operations of the storage device.

[0038] Method 220 provides high efficiency but low performance of the storage device. Since the time interval of data path locking 223 is short and only equal to the time required to complete data path initialization 222, high efficiency is provided during data path blocking 227. The internal data path efficiency is the sum of data path initialization 222 and active data path 226 divided by the time interval of data path blocking 227. Since the internal data path efficiency is not a function of the host turnaround time 224, the internal data path efficiency of method 220 is close to or equal to 100%. Since the internal data path is not ready when the request data arrives 222, low performance is provided. Alternatively, the storage driver must wait for the time interval for the completion of data path initialization 222 of the active data path 226 before starting to process and transmit the request data 225.

[0039] Figure 2C 1 shows a DMA read request from a storage device to a host (such as a storage device 102 to Figure 1 Another method 230 of initializing a data path of a storage device is disclosed in claim 10 . The method 230 uses the estimated host turnaround time to start initializing the data path after the storage device issues a DMA read request and before the storage device receives an initial data packet of the requested data.

[0040] The method 230 begins by issuing a DMA read request 231 to a host. After a first time interval 241 greater than zero since the read request 231 was issued and before a second time interval 242 greater than zero since the storage device received the request data 235 from the host, an internal data path initialization 232 of the storage device begins. During the time interval of the internal data path initialization 232, a data path lock 233 occurs. The storage device begins the data path initialization 232 using an estimate of the host turnaround time 234 from issuing the DMA read request 231 to receiving the request data 235. The storage device waits for the first time interval 241 after issuing the read request 231 so that completion of the data path initialization 232 occurs when the storage device is about to receive the request data 235. The data path initialization 232 for the DMA read request may involve initializing internal addresses, data sizes, encryption keys, data vectors, other components, and combinations thereof.

[0041] When request data 235 from the host arrives at the storage device, the data path is unlocked and becomes the active data path 236 to process and transmit the received data, such as encrypting the request data and transferring the data to the device buffer. The active data path 236 occurs with little or no time lag between the completion of the data path initialization 232 and the receipt of the request data 235. During the time interval between the data path lock 233 and the active data path 236, a data path block 237 occurs, wherein the data path cannot be used by other components or other threads of the storage device. For example, during the data path block 237, the data path is blocked and cannot perform host memory buffer transfers and internal security operations of the storage device. Shortening the data path block 237 by shortening the data path lock 233 allows the data path to be input with other operations to flow through the pipeline, thereby increasing the overall data path throughput.

[0042] The method 230 provides high performance and high efficiency. Since the data path initialization 232 is completed when the request data 235 is about to arrive, high performance is provided. There is little or no time lag since the data path starts processing and transmitting the request data 235. Since the time interval of the data path lock 233 is short and approximately equal to the time required to complete the data path initialization 232, high efficiency is provided during the data path blocking 237. The internal data path efficiency is the sum of the data path initialization 232 and the active data path 236 divided by the time interval of the data path blocking 237. By completing the data path initialization 232 at the end of the host turnaround time 234 or close to the end of the host turnaround time, the internal data path efficiency of the method 230 can be close to or equal to 100%. The time interval of the data path lock 233 is similar to the time interval of the data path initialization 232, which reduces the time interval of the data path blocking 237.

[0043] The device controller of the storage device may include a counter to measure the host turnaround time from issuing a DMA read request from the storage device and receiving the request data from the host. The device controller of the storage device may include a statistics collector that collects parameters of historical completed DMA read request operations. The statistics collector may collect one or more of the following parameters: average host turnaround time, networking architecture structure of the interface connecting the host and the storage device, host storage device interface type, host storage device communication protocol type, host interface speed of the storage device, number of channels of the link between the host and the storage device, packet size of the transaction, current stress across the link between the host and the storage device, other suitable parameters, and combinations thereof.

[0044] The device controller of the storage device may include a predictor engine to determine the time to start initializing the data path 236. The predictor engine may refer to one or more parameters collected by a statistics collector. In one embodiment, the predictor engine uses an average turnaround time based on the current operating mode of the device controller. The current operating mode may include one or more of the following parameters: the networking architecture structure of the interface connecting the host and the storage device, the host storage device interface type, the host storage device communication protocol type, the host interface speed of the storage device, the number of channels of the link between the host and the storage device, the packet size of the transaction, the current stress of the link between the cross host and the storage device, other suitable parameters, and combinations thereof.

[0045] The networking architecture structure of the interface connecting the host and the storage device details the topology of the connection host and the storage device, such as the network nodes, switches and bridges connecting the host and the storage device. A specific host interface can be associated with a specific data rate transmission. For example, in a PCIe interface, each generation of the PCIe interface (i.e., Gen1, Gen2, Gen3, Gen4 and Gen5) can be associated with a specific speed. The number of channels of the link between the host interface and the storage device interface can be associated with a specific speed. For example, in a PCIe interface, the number of serial channels can be 1, 2, 4, 8, 16 or 32. The more channels, the greater the corresponding data transfer rate. The packet size describes the packet size of the read request and the size of the payload of the request data in one or more data packets. Generally, a larger packet size can be associated with a longer host turnaround time compared to a smaller packet size. The number of other uncompleted commands on the link between the current uncompleted command description host interface and the storage device interface. For example, if there are a large number of other outstanding commands, the completion of these other outstanding commands across the link may increase the host turnaround time for the requested data for the DMA read request due to the increased stress, traffic, or data across the link. One or more parameters of the operating mode of the storage controller may be associated with an average host turnaround time, which is periodically updated by the statistics collector based on the collected parameters of the completed transactions.

[0046] Across a reset or power down of the storage device, the statistics collector may store the collected data of the collected parameters in non-volatile memory so that the predictor engine may use the stored statistics across a reset or power down. In other modes, the statistics collector may start at a zero state across a reset or power down and update the state during operation of the storage device. In other modes, the statistics collector may start at a factory or user input state across a reset or power down and update the initial state with the collected parameters of completed transactions during operation of the storage device.

[0047] The predictor engine uses the collected parameters from the statistics collector to estimate the time when the initial packet of the request to read data will arrive at the storage device. The device controller of the storage device begins initializing the data path before the estimated arrival time of the request data. In some embodiments, the device controller of the storage device uses the estimated time to determine the time to start data path initialization 232 so that the completion of the data path initialization corresponds to the time when the initial packet of the request to read data arrives at the storage device.

[0048] Since the data path can be used in other components and other threads separate from the DMA read request 231, the method 230 provides high efficiency of the data path. For example, the data path can be used in the host memory buffer transmission between the host memory buffer of the host and the storage device. The security engine of the data path can decrypt the data from the NVM of the storage device for storage in the host memory buffer. For another example, the data path can be used in the internal security operation of the storage device. Due to the special keys required for encryption and decryption of data, the security engine needs time to be initialized for each thread.

[0049] In other embodiments, the predictor engine may use machine learning rather than estimated host turnaround time to begin initializing the data path so that initialization of the data path is complete when request data is about to be received.

[0050] Figure 3 is to estimate the data path for initializing storage devices (such as Figure 1 Schematic diagram of some embodiments of method 300 for determining the time from issuing the DMA read request to receiving the requested data from the host (data path 120 or other suitable data path of the storage device). At block 310, the storage device issues a DMA read request to the host. At block 312, a counter of the storage device is activated to determine the time from issuing the DMA read request to the storage device receiving the requested data from the host. The counter can be the same as the counter used by the completion timeout mechanism of the DMA read request.

[0051] At box 314, the predictor engine of the storage device estimates the host turnaround time at which the initial data packet of the requested data will arrive at the host interface and the time to initialize the data path, so that the completion of the data path initialization corresponds to the time when the initial data packet arrives. For example, the estimated host turnaround time minus the data path initialization time can be used as a time interval for starting data path initialization for the DMA read request of box 310. The predictor engine can use one or more parameters related to the host turnaround time to determine the estimated host turnaround time. For example, the parameters may include the networking architecture structure, the host storage device interface type, the host storage device communication protocol type, the host interface speed, the number of channels of the link between the host and the storage device, the packet size of the DMA request, the current stress across the link between the host and the storage device, the average host turnaround time of previous transactions, and combinations thereof. The statistics collector can collect one or more parameters for use by the predictor engine. The average host turnaround time of the mode of the storage device can be determined by the statistics collector

[0052] At block 316, the storage device waits for the determined time of block 314. If the determined wait time has not elapsed, the storage device uses the data path for one or more other threads at block 318. In some embodiments, the device controller may determine whether to perform operations of other threads at the time interval of block 316. If the operations of other threads cannot be performed before the estimated time of receiving the request data from the DMA read request, the operations of other threads on the data path are postponed.

[0053] If the determined latency has elapsed, then at block 320, the storage device initializes the data path. At block 322, the request data is received by the storage device. If the predictor engine accurately estimates the host turnaround time, the data path initialization will be completed just as the request data is about to arrive at the storage device at block 322. If the data path initialization is completed slightly before or slightly after the arrival of the initial data packet of the request, the overall efficiency is still high because the time lag between the completion of the data path initialization and the receipt of the initial data packet of the request data is reduced compared to method 210.

[0054] In some embodiments, if the predictor engine does not accurately estimate the host turnaround time and the storage device is still waiting to initialize the data path when the initial data packet of the request data arrives, the storage device can start initializing the data path immediately upon receiving the initial data packet of the request data without waiting at block 316 for the full amount of time determined by the predictor engine at block 314.

[0055] Once the initial data packet of the request data arrives at block 322, the activated counter of block 312 is stopped. The elapsed time of the counter represents the actual host turnaround time. At block 326, the actual host turnaround time from block 324 is used to update the statistics collector with the updated average host turnaround time. One or more blocks of method 300 may be performed in other orders, may be performed simultaneously, may be performed in parallel, and / or may be omitted.

[0056] Figure 3 Only one embodiment of one sequence of blocks of the method 300 of estimating the time to initialize a data path of a storage device is shown. In other embodiments of the method 300, one or more blocks may be deleted, may be added, and / or may be performed in other orders.

[0057] Embodiments relate to methods and apparatus for accessing a host memory of a host by a storage device having a non-volatile memory. The storage device can access the host memory by a direct memory access (DMA) read request. High performance and high efficiency of the storage device during a DMA read request operation are provided. In certain embodiments, high performance is provided by completing the initialization of a data path when the request data of a DMA read request is about to arrive. There is little or no time lag since the data path begins to process and transmit the request data. In certain embodiments, high efficiency is provided because the time interval for locking the data path for DMA read requests is short and approximately equal to the time required to complete the data path initialization. Other threads can be executed by the data path before the data path for DMA read requests is initialized.

[0058] In one embodiment, a method for accessing data by a storage device includes: issuing a direct memory access (DMA) read request to a host memory. Initializing a data path of the storage device to transfer request data of the DMA read request to a device buffer of the storage device. Initializing the data path after issuing the DMA read request and before receiving an initial data packet of received request data. Receiving the request data from the host. Transferring the received request data to the device buffer of the storage device using the data path,

[0059] In another embodiment, a method for accessing data by a storage device includes: issuing a DMA read request to a host memory. Estimating a host turnaround time. The host turnaround time is the time interval between when the DMA read request is issued and when an initial data packet of request data from the DMA read request arrives from the host to the storage device. Initializing a data path of the storage device to transfer the request data of the DMA read request to a device buffer of the storage device. Initialization of the data path begins after issuing the DMA read request and is completed at the end of the estimated host turnaround time. Receive the request data from the host. Transfer the received request data to the device buffer using the data path.

[0060] In one embodiment, a storage device includes: a non-volatile memory and a device controller. The device controller includes a host interface, a data path, a counter, a statistics collector, and a predictor engine device. The data path includes a DMA module and a device buffer. The device controller is operable to: issue a DMA read request to a host memory to a host through the DMA module; count an actual host turnaround time of the DMA read request through the counter; collect one or more parameters related to the DMA read request through the statistics collector; estimate the estimated host turnaround time through the predictor engine device; and initialize the data path of the storage device to transfer the request data of the DMA read request to the device buffer. Initialization of the data path begins after the DMA read request is issued and is completed when the host turnaround time is about to end. Receive the request data from the host. Transfer the received request data to the device buffer using the data path.

[0061] Example

[0062] Example 1

[0063] Table 1 below is an example of a parameter collected by the statistics collector. The numerical value of the parameter depends on a variety of factors that affect the parameter of a single system of hosts and storage devices. The statistics collector may collect other configuration and other parameters. The average turnaround time may be updated after the operation is completed. Table 1 may represent a portion of a table collected by the statistics collector, where the full table extends across other parameters and other modes, such as other interface speeds, other numbers of lanes, other packet sizes, and other currently outstanding commands.

[0064]

[0065] Example 2

[0066] right FIG. 2A to FIG. 2C ASIC simulations are performed to compare the performance and efficiency of a storage device using methods 210, 220, and 230. The storage device utilizes NVMe communication via a PCIe Gen4 host interface having a link of four lanes. The host turnaround time is approximately 1 μsec. The number of outstanding requests on the host interface is approximately 64. The packet size of the transaction for the DMA read request is 512B.

[0067]

[0068] Method 210 has high performance but low efficiency. Method 220 has low performance but high efficiency. Method 230 has high performance and high efficiency. In some cases, the efficiency of method 230 is less than 100% because the completion of the initialization of the data path is slightly earlier than the arrival of the initial data packet of the request data from the DMA read request.

[0069] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the present disclosure may be envisaged without departing from the basic scope of the present disclosure, and the scope of the present disclosure is determined by the appended claims.

Claims

1. A method for accessing data by a storage device, the method comprising: Sending a direct memory access read request, i.e., a DMA read request, to the host; Initializing a data path of the storage device to transfer request data of the DMA read request to a device buffer of the storage device; receiving the request data from the host; as well as The received request data is transferred to the device buffer of the storage device using the data path, wherein initialization of the data path begins after a first time interval from issuing the DMA read request and before a second time interval until an initial data packet of the received request data is received.

2. The method according to claim 1, further comprising: The received request data is encrypted during transmission of the received request data to the device buffer.

3. The method according to claim 1, wherein: Completion of the initialization of the data path is completed upon receipt of the initial data packet of the received request data.

4. The method according to claim 1, wherein: The time interval during which the data path is locked is similar to the time interval during which the data path is initialized.

5. The method according to claim 1, further comprising: The data path is used on a separate thread from the DMA read request.

6. The method according to claim 5, wherein: The thread separate from the DMA read request is selected from the group consisting of: transferring data between a host memory buffer within the host memory and the storage device; performing security operations; and combinations thereof.

7. A method for accessing data by a storage device, the method comprising: Sending a direct memory access read request, i.e., a DMA read request, to the host; estimating a host turnaround time, the host turnaround time being a time interval between when the DMA read request is issued and when an initial data packet of requested data from the DMA read request arrives from the host to the storage device; initializing a data path of the storage device to transfer the request data of the DMA read request to a device buffer of the storage device, wherein initialization of the data path begins after issuing the DMA read request and wherein initialization is completed at the end of an estimated host turnaround time; receiving the request data from the host; as well as The received request data is transferred to the device buffer using the data path.

8. The method according to claim 7, further comprising: The received request data is encrypted during transmission of the received request data to the device buffer.

9. The method according to claim 7, wherein: The initial data packet is received toward the end of the estimated host turnaround time.

10. The method according to claim 7, further comprising: A counter is activated that measures the time interval between issuance of the DMA read request and arrival of the initial data packet.

11. The method according to claim 7, wherein: The estimated host turnaround time is estimated by a predictor engine of a device controller of the storage device.

12. The method according to claim 11, further comprising: collecting parameters related to the host turnaround time, the parameters selected from the group consisting of: networking architecture, host storage device interface type, host storage device communication protocol type, host interface speed, number of channels of a link between the host and the storage device, packet size of the DMA read request, current stress across the link between the host and the storage device, average host turnaround time of previous transactions, and combinations thereof, Wherein the predictor engine estimates the host turnaround time based on the collected parameters.

13. The method according to claim 7, further comprising: Waiting to initialize the data path after issuing the DMA read request based on an estimated host turnaround time.

14. The method according to claim 13, further comprising: The data path is used on a thread separate from the DMA read request during the wait for the data path to be initialized.

15. A storage device comprising: Non-volatile memory; as well as A device controller, the device controller comprising: Host interface; a data path, the data path comprising a DMA module and a device buffer; counter; Statistics Collector; and predictor engine means for activating the data path when data is to be received at the host interface in response to the DMA module accessing a host memory, The device controller is operable to: Sending a direct memory access read request, i.e., a DMA read request, to the host memory through the DMA module; counting, by the counter, an actual host turnaround time of the DMA read request; collecting, by the statistics collector, one or more parameters associated with the DMA read request; estimating, by said predictor engine means, an estimated host turnaround time; initializing the data path of the storage device to transfer request data of the DMA read request to the device buffer, wherein initialization of the data path begins after issuing the DMA read request and is completed at the end of an estimated host turnaround time; receiving the request data from the host; and The received request data is transferred to the device buffer using the data path.

16. The storage device according to claim 15, wherein: The data path also includes a security engine, and the device controller is operable to encrypt the received request data during transmission of the received request data to the device buffer.

17. The storage device according to claim 15, wherein: The device controller is further operable to utilize the data path in a separate thread between issuing the DMA read request and initializing the data path to transfer data.

18. The storage device according to claim 17, wherein: The device controller is further operable to determine that the separate thread will complete prior to initializing the data path to transfer the requested data of the DMA read request.

19. The storage device according to claim 15, wherein: The statistics collector collects parameters related to the actual host turnaround time, the parameters selected from the group consisting of: networking architecture structure, host storage device interface type, host storage device communication protocol type, host interface speed, number of channels of the link between the host and the storage device, packet size of the DMA read request, current stress across the link between the host and the storage device, average host turnaround time of previous transactions, and combinations thereof.

20. The storage device according to claim 19, wherein: The statistics collector updates the average host turnaround time based on the actual host turnaround time.

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