Class F power amplifier based on optimized output matching structure and its design method

Abstract

The present invention discloses a class F power amplifier based on an optimized output matching structure and a design method thereof, which at least includes a transistor and an output matching network, wherein the output matching network includes a bias circuit, a fundamental matching circuit, a second harmonic control circuit, and a third harmonic control circuit; wherein the fundamental matching circuit is a T-type matching structure, which includes a third harmonic control circuit and a first microstrip line TL1; the first microstrip line TL1 is a common part of the fundamental matching circuit, the third harmonic control circuit, and the second harmonic control circuit. Compared with the prior art, the optimized output matching network proposed in the present invention simplifies the structure of the output network of the class F power amplifier, achieves the same broadband and high efficiency, reduces the size, and its simple structure is conducive to the realization of multi-stage power amplifier circuits and integrated power amplifier circuits.

Description

Technical Field

[0001] The present invention relates to the field of radio frequency communication technology, and in particular to a class F power amplifier based on an optimized output matching structure and a design method thereof. Background Art

[0002] The RF power amplifier is one of the most important components of the RF transmission front end. With the rapid development of wireless communication technology, the communication system has higher efficiency, smaller size, lower latency, higher rate and better linearity. As the frequency band of communication frequency becomes higher and higher, the size of the power amplifier is also reduced accordingly, and the difficulty of designing a power amplifier with a complex structure is also increasing. Therefore, how to simplify the structure of the power amplifier while maintaining or even improving the output power and efficiency of the power amplifier has become one of the research hotspots in academia and industry.

[0003] See also Figure 1 ,The output matching network of the traditional class F power amplifier first performs second harmonic control and third harmonic control after compensating the parasitic parameters of the transistor, and then connects to the fundamental matching circuit, and finally to the terminal load. The structure is complicated, which increases the structural size of the power amplifier.

[0004] Therefore, in view of the above-mentioned deficiencies existing in the current prior art, it is necessary to conduct research and improvement to provide a design solution for an optimized output matching structure to solve the deficiencies existing in the prior art. Summary of the invention

[0005] In view of this, the purpose of the present invention is to provide a class F power amplifier based on an optimized output matching structure and a design method thereof. For a traditional class F power amplifier, it is proposed to realize third harmonic control by using an open short stub of a fundamental matching circuit of a T-type structure and a microstrip line connected in series before the open short stub, and to realize second harmonic control by using a part of the microstrip line connected in series before the open short stub of the fundamental matching circuit of the T-type structure and a bias circuit. In the case of T-type structure fundamental matching, no additional structure is used, and only the bias circuit and the fundamental matching circuit are used to realize second harmonic control and third harmonic control, so that the output matching network structure is simplified and the size is reduced, which is conducive to the realization of multi-stage power amplifier circuits and integrated power amplifier circuits.

[0006] In order to overcome the defects of the prior art, the present invention adopts the following technical solutions:

[0007] A class F power amplifier based on an optimized output matching structure comprises at least a transistor and an output matching network, wherein the output matching network comprises a bias circuit, a fundamental matching circuit, a second harmonic control circuit, and a third harmonic control circuit; wherein:

[0008] One end of the output matching network is connected to the transistor, and the other end is connected to the terminal load, and is used to match the fundamental impedance, the second harmonic impedance, and the third harmonic impedance to the optimal value;

[0009] The fundamental wave matching circuit is a T-type matching structure, which includes a third harmonic control circuit and a first microstrip line TL1;

[0010] The first microstrip line TL1 is a common part of the fundamental wave matching circuit, the third harmonic control circuit, and the second harmonic control circuit;

[0011] The transistor is in a class AB working state or a deep class B working state.

[0012] As a further improvement scheme, the fundamental wave matching circuit includes a first microstrip line TL1, a second microstrip line TL2, a third microstrip line TL3, a fourth microstrip line TL4 and a fifth microstrip line TL5, wherein TL1, TL3 and TL5 are series microstrip lines, and TL2 and TL4 are parallel microstrip lines; the drain of the transistor is connected to one end of the first microstrip line TL1; the other end of the first microstrip line TL1 is connected to one end of the second microstrip line TL2 and one end of the third microstrip line TL3, and the other end of the second microstrip line TL2 is grounded; the other end of the third microstrip line TL3 and one end of the fourth microstrip line TL4 are connected to one end of the fifth microstrip line TL5, and the other end of the fourth microstrip line TL4 is open; the other end of the fifth microstrip line TL5 is connected to the output load.

[0013] As a further improvement scheme, the first microstrip line TL1 and the second microstrip line TL2 are used to jointly control the second harmonic; the first microstrip line TL1, the third microstrip line TL3 and the fourth microstrip line TL4 are used to jointly control the third harmonic; the first microstrip line TL1, the third microstrip line TL3, the fourth microstrip line TL4 and the fifth microstrip line TL5 are used to jointly perform fundamental impedance matching.

[0014] The present invention also discloses a design method of a class F power amplifier based on an optimized output matching structure, comprising the following steps:

[0015] Step S1: Design the fundamental matching circuit and the third harmonic control; using the traditional T-type matching structure, set the length of the open circuit stub TL4 of the T-type matching circuit to The characteristic impedance Z of microstrip line TL1 and microstrip line TL3 TL1 =Z TL3 ; One end of the microstrip line TL4 is open circuit, The length of the third harmonic is a quarter wavelength. After impedance transformation, the other end of the microstrip line TL4 presents a third harmonic short circuit. In addition, the third harmonic optimal impedance is pure reactance. By changing the characteristic impedance of the series transmission line TL1 and the series transmission line TL3 and the total length LTL1 +L TL3 The third harmonic control can be achieved; the characteristic impedance of the series transmission line TL1 and the series transmission line TL3 and the total length L TL1 +L TL3 The relationship can be expressed by the following formula:

[0016]

[0017] From the load-pull technique, we know that the third harmonic impedance occupies a large area on the Smith chart, so the condition of equation (1) is easy to satisfy. Under the condition of equation (1), the 50 ohm terminal load is matched to the optimal fundamental impedance Z obtained by load-pull technology on the Smith chart. in (f0), the characteristic impedance Z of microstrip line TL1 and microstrip line TL3 is obtained TL1 and its total length (L TL1 +L TL3 ), the characteristic impedance Z of microstrip line TL4 and microstrip line TL5 TL4 , Z TL5 and length L TL5 ;

[0018] Microstrip lines TL1 and TL3 match the third harmonic impedance from short circuit to the best third harmonic impedance obtained by load-pull technology; microstrip lines TL1, TL3, TL4 and TL5 match the fundamental impedance from 50 ohms to the best fundamental load impedance obtained by load-pull technology;

[0019] Step S2: Design a second harmonic control circuit; set the length of the parallel microstrip line TL2 to One end of the parallel microstrip line is short-circuited; for the fundamental wave, the quarter wavelength of the parallel microstrip line TL2 transforms the short-circuit impedance of one end into an open circuit condition, so the microstrip line TL2 does not affect the fundamental wave impedance matching; for the third harmonic, the quarter wavelength of the parallel microstrip line TL2 The length of the parallel microstrip line TL2 is equivalent to a quarter wavelength, which transforms the short-circuit impedance at one end into an open-circuit condition. Therefore, the microstrip line TL2 does not affect the third harmonic control. For the second harmonic, the parallel microstrip line TL2 The length of the microstrip line TL1 is equivalent to half a wavelength, one end of which is short-circuited and the other end is still short-circuited; in addition, the second harmonic optimal impedance is pure reactance, so the second harmonic control can be achieved by changing the position of the microstrip line TL2; the length L of the series transmission line TL1 is TL1 The length L of the series transmission line TL3 TL3 It can be calculated by the following formula:

[0020]

[0021] L TL3 =(L TL1 +L TL3 )-L TL1 (3)

[0022] The microstrip line TL1 matches the second harmonic impedance from a short circuit to the optimal second harmonic impedance obtained by the load-pull technique;

[0023] Step S3: Design the input matching circuit and bias circuit of the power amplifier, connect the input matching network, bias circuit, transistor, and output matching network together, tune and optimize the overall circuit, and finally obtain a complete circuit.

[0024] As a further improvement scheme, the fundamental wave matching circuit includes a first microstrip line TL1, a second microstrip line TL2, a third microstrip line TL3, a fourth microstrip line TL4 and a fifth microstrip line TL5, wherein TL1, TL3 and TL5 are series microstrip lines, and TL2 and TL4 are parallel microstrip lines; the drain of the transistor is connected to one end of the first microstrip line TL1; the other end of the first microstrip line TL1 is connected to one end of the second microstrip line TL2 and one end of the third microstrip line TL3, and the other end of the second microstrip line TL2 is grounded; the other end of the third microstrip line TL3 and one end of the fourth microstrip line TL4 are connected to one end of the fifth microstrip line TL5, and the other end of the fourth microstrip line TL4 is open; the other end of the fifth microstrip line TL5 is connected to the output load.

[0025] As a further improvement scheme, the first microstrip line TL1 and the second microstrip line TL2 are used to jointly control the second harmonic; the first microstrip line TL1, the third microstrip line TL3 and the fourth microstrip line TL4 are used to jointly control the third harmonic; the first microstrip line TL1, the third microstrip line TL3, the fourth microstrip line TL4 and the fifth microstrip line TL5 are used to jointly perform fundamental impedance matching.

[0026] Compared with the traditional class F power amplifier, the output matching network first performs second harmonic control and third harmonic control, then connects to the fundamental matching circuit, and then connects to the terminal load. The present invention optimizes the output matching network of the traditional class F power amplifier, realizes second harmonic control and third harmonic control through the fundamental matching circuit and the bias circuit, simplifies the output matching network structure, reduces the size, is conducive to the realization of multi-stage power amplifier circuits and integrated power amplifier circuits, and has good application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 This is a schematic diagram of the output matching network structure of a traditional class F power amplifier;

[0028] Figure 2It is a schematic diagram of the output matching network structure of a class F power amplifier based on an optimized output matching structure of the present invention;

[0029] Figure 3 is a schematic diagram of an output matching circuit in the present invention;

[0030] Figure 4 The present invention uses the Smith circle diagram to match the fundamental impedance diagram;

[0031] Figure 5 It is a schematic diagram of the optimal fundamental wave, second harmonic and third harmonic impedance regions obtained by load pulling;

[0032] Figure 6 It is a schematic diagram of the fundamental wave, second harmonic and third harmonic impedance changes with frequency in the output matching circuit of the present invention;

[0033] Figure 7 It is a schematic diagram of simulation results in the present invention; DETAILED DESCRIPTION

[0034] The following are specific embodiments of the present invention and the accompanying drawings to further describe the technical solution of the present invention, but the present invention is not limited to these embodiments.

[0035] In response to the problems existing in the prior art, the applicant has conducted an in-depth study on the structure of the traditional Class F power amplifier in the prior art. Through theoretical analysis, the applicant found that in the output matching network of the traditional Class F power amplifier in the prior art, the second harmonic and third harmonic control are first performed, and then the fundamental impedance matching is performed. The structure is complex and the size is large, which is not conducive to the cascade connection with multi-stage amplifiers and the integration of amplifiers.

[0036] In response to the problems brought about by traditional output matching networks, the applicant proposed a Class F power amplifier based on an optimized output matching structure and a design method thereof, wherein the third harmonic control is achieved by utilizing an open short-circuited line of a fundamental matching circuit of a T-type structure and a microstrip line connected in series in front of the open short-circuited line, and the second harmonic control is achieved by utilizing a portion of the microstrip line connected in series in front of the open short-circuited line of the fundamental matching circuit of the T-type structure and a bias circuit. In the case of fundamental matching of the T-type structure, no additional structure is used, and second harmonic control and third harmonic control are achieved by only using a bias circuit and a fundamental matching circuit, thereby simplifying the output matching network structure and reducing its size.

[0037] See also Figure 2 , which is a schematic diagram of the structure of a class F power amplifier based on an optimized output matching structure of the present invention, including a transistor, an output matching network, a bias circuit, a fundamental matching circuit, a second harmonic control circuit, and a third harmonic control circuit,

[0038] One end of the output matching network is connected to the transistor, and the other end is connected to the terminal load, and is used to match the fundamental impedance, the second harmonic impedance, and the third harmonic impedance to the optimal value;

[0039] The output matching network includes a bias circuit, a fundamental wave matching circuit, a second harmonic control circuit, and a third harmonic control circuit;

[0040] The fundamental wave matching circuit is a T-type matching structure;

[0041] The fundamental wave matching circuit includes a third harmonic control circuit and a part of a second harmonic control circuit TL1;

[0042] The third harmonic control circuit includes a part TL1 of the second harmonic control circuit;

[0043] The second harmonic control circuit includes a bias circuit and a portion TL1 of a third harmonic control circuit.

[0044] See also Figure 3 , which is a schematic diagram of an output matching circuit, includes a first microstrip line TL1, a second microstrip line TL2, a third microstrip line TL3, a fourth microstrip line TL4 and a fifth microstrip line TL5, wherein TL1, TL3 and TL5 are series microstrip lines, and TL2 and TL4 are parallel microstrip lines. The drain of the transistor is connected to one end of the first microstrip line TL1; one end of the first microstrip line TL1 and the second microstrip line TL2 are connected to one end of the third microstrip line TL3; one end of the third microstrip line TL3 and the fourth microstrip line TL4 are connected to one end of the fifth microstrip line TL5; one end of the fifth microstrip line TL5 is connected to the output load. The first microstrip line TL1 and the second microstrip line TL2 jointly control the second harmonic; the first microstrip line TL1, the third microstrip line TL3 and the fourth microstrip line TL4 jointly control the third harmonic; the first microstrip line TL1, the third microstrip line TL3, the fourth microstrip line TL4 and the fifth microstrip line TL5 jointly perform fundamental impedance matching.

[0045] For the fundamental wave, the quarter wavelength of the parallel microstrip line TL2 transforms the short-circuit impedance at one end into an open-circuit condition, so the microstrip line TL2 does not affect the fundamental wave impedance matching. The first microstrip line TL1, the third microstrip line TL3, the fourth microstrip line TL4 and the fifth microstrip line TL5 form a T-shaped structure for fundamental wave impedance matching. One end of the fourth microstrip line TL4 is open-circuited. For the third harmonic, the fourth microstrip line TL4 The length of the microstrip line TL4 is one quarter of a wavelength. After impedance transformation, the other end of the microstrip line TL4 presents a third harmonic short circuit, so the fifth microstrip line TL5 will not affect the third harmonic control. For the third harmonic, the quarter wavelength of the parallel microstrip line TL2 transforms the short-circuit impedance of one end into an open circuit condition, so the microstrip line TL2 does not affect the third harmonic control. In addition, the optimal third harmonic impedance obtained by the load-pull technology is pure reactance, so the third harmonic impedance can be matched from the third harmonic short circuit to the optimal third harmonic impedance by only the first microstrip line TL1 and the third microstrip line TL3. For the second harmonic, the parallel microstrip line TL2 The length of is equivalent to half a wavelength, one end of which is short-circuited and the other end is still short-circuited, so the third microstrip line TL3, the fourth microstrip line TL4 and the fifth microstrip line TL5 do not affect the second harmonic control. In addition, the optimal subharmonic impedance obtained by the load-pull technology is a pure reactance, so the second harmonic impedance can be matched from the second harmonic short circuit to the optimal second harmonic impedance by only the first microstrip line TL1. So far, the first microstrip line TL1 and the second microstrip line TL2 jointly control the second harmonic; the first microstrip line TL1, the third microstrip line TL3 and the fourth microstrip line TL4 jointly control the third harmonic; the first microstrip line TL1, the third microstrip line TL3, the fourth microstrip line TL4 and the fifth microstrip line TL5 jointly perform fundamental impedance matching to realize a Class F power amplifier.

[0046] The class F power amplifier based on the optimized output matching structure of the present invention is designed and implemented by the following steps:

[0047] Step S1: Design the fundamental matching circuit and third harmonic control. Using the traditional T-type matching structure, set the length of the open short stub TL4 of the T-type matching circuit to The characteristic impedance Z of microstrip line TL1 and microstrip line TL3 TL1 =Z TL3 One end of the microstrip line TL4 is open, so The length of the microstrip line TL4 is a quarter wavelength for the third harmonic. After impedance transformation, the other end of the microstrip line TL4 presents a third harmonic short circuit. In addition, the third harmonic optimal impedance is pure reactance, so by changing the characteristic impedance of the series transmission line TL1 and the series transmission line TL3 and the total length L TL1 +L TL3 The characteristic impedance of the series transmission line TL1 and the series transmission line TL3 and the total length L TL1 +L TL3 The relationship can be obtained by

[0048]

[0049] express.

[0050] From the load-pull technique, we know that the third harmonic impedance occupies a large area on the Smith chart, so the condition of equation (1) is easy to satisfy. Under the condition of equation (1), the 50 ohm terminal load is matched to the optimal fundamental impedance Z obtained by load-pull technology on the Smith chart. in (f0), see Figure 4 The characteristic impedance Z of microstrip line TL1 and microstrip line TL3 is obtained TL1 and its total length (L TL1 +L TL3 ), the characteristic impedance Z of microstrip line TL4 and microstrip line TL5 TL4 , Z TL5 and length L TL5 .

[0051] Microstrip lines TL1 and TL3 match the third harmonic impedance from short circuit to the optimal third harmonic impedance obtained by load-pull technology. Microstrip lines TL1, TL3, TL4 and TL5 match the fundamental impedance from 50 ohms to the optimal fundamental load impedance obtained by load-pull technology.

[0052] Step S2: Design the second harmonic control circuit. Set the length of the parallel microstrip line TL2 to One end of the parallel microstrip line is short-circuited. For the fundamental wave, the quarter wavelength of the parallel microstrip line TL2 transforms the short-circuit impedance of one end into an open circuit condition, so the microstrip line TL2 does not affect the fundamental wave impedance matching. For the third harmonic, the quarter wavelength of the parallel microstrip line TL2 The length of the parallel microstrip line TL2 is equivalent to a quarter wavelength, which transforms the short-circuit impedance at one end into an open-circuit condition. Therefore, the microstrip line TL2 does not affect the third harmonic control. For the second harmonic, the parallel microstrip line TL2 The length of the microstrip line TL1 is equivalent to half a wavelength. One end is short-circuited and the other end is still short-circuited. In addition, the second harmonic optimal impedance is pure reactance, so the second harmonic control can be achieved by changing the position of the microstrip line TL2. The length L of the series transmission line TL1 is TL1 The length L of the series transmission line TL3 TL3 can be

[0053]

[0054] L TL3 =(L TL1 +L TL3 )-L TL1 (3)

[0055] calculate.

[0056] Microstrip line TL1 matches the second harmonic impedance from a short circuit to the optimal second harmonic impedance obtained by load-pull technology.

[0057] Step S3: Design the input matching circuit and bias circuit of the power amplifier, connect the input matching network, bias circuit, transistor, and output matching network together, tune and optimize the overall circuit, and finally obtain a complete circuit.

[0058] In the simulation experiment, in order to obtain the best fundamental impedance, the best second harmonic impedance and the best third harmonic impedance, the present invention uses the fundamental, second harmonic and third harmonic load pulling in the ADS simulation system. Figure 5 , showing the drain efficiency and output power contours of the fundamental impedance, second harmonic impedance and third harmonic impedance at a frequency of 1.9 GHz, where the drain efficiency is 70% and the output power is 40 dBm.

[0059] See also Figure 6 , which shows the fundamental wave, second harmonic and third harmonic impedances of the output matching network simulated and tested in the present invention. It can be seen that in the working frequency band of 1.5 to 2.4 GHz, the fundamental wave, second harmonic and third harmonic impedances change with the frequency, and the fundamental wave, second harmonic and third harmonic impedances are all located in the high-efficiency impedance region. However, it should be pointed out that the impedance matching principle of this scheme is based on load pulling, so the type of broadband power amplifier applied by this method is not limited to this impedance.

[0060] See also Figure 7 , which is a simulation result diagram of the gain, output power and efficiency of the class F power amplifier based on the optimized output matching structure of the present invention. In the operating frequency band of 1.5 to 2.4 GHz, the saturated output power is 39.8 dBm to 42.7 dBm, the gain is 9.8 dB to 12.7 dB, and the drain efficiency is between 69.2% and 80.9%, which is consistent with the design method described in the present invention.

[0061] The description of the above embodiments is only used to help understand the method of the present invention and its core idea. It should be pointed out that for those of ordinary skill in the art, without departing from the principles of the present invention, the present invention can also be improved and modified in a number of ways, and these improvements and modifications also fall within the scope of protection of the claims of the present invention. It is obvious to those skilled in the art that various modifications to these embodiments can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to these embodiments shown in the present application, but will conform to the widest range consistent with the principles and novel features disclosed in the present application.

Claims

1. A design method for a class F power amplifier based on an optimized output matching structure, characterized in that: The following steps are involved: Step S1: Design the fundamental matching circuit and the third harmonic control; using the traditional T-type matching structure, set the length of the open short stub TL4 of the T-type matching circuit to The characteristic impedance Z of microstrip line TL1 and microstrip line TL3 TL1 =Z TL3 ; One end of the microstrip line TL4 is open. The length of the third harmonic is a quarter wavelength. After impedance transformation, the other end of the microstrip line TL4 presents a third harmonic short circuit. In addition, the third harmonic optimal impedance is pure reactance. By changing the characteristic impedance of the series transmission line TL1 and the series transmission line TL3 and the total length L TL1+ L TL3 The third harmonic control is achieved; the characteristic impedance of the series transmission line TL1 and the series transmission line TL3 and the total length L TL1+ L TL3 The relationship is expressed by the following formula: From the load-pull technique, we know that the third harmonic impedance occupies a large area on the Smith chart, so the condition of equation (1) is easy to satisfy. Under the condition of equation (1), the 50 ohm terminal load is matched to the optimal fundamental impedance Z obtained by load-pull technology on the Smith chart. in (f0), the characteristic impedance Z of microstrip line TL1 and microstrip line TL3 is obtained TL1 and its total length (L TL1 +L TL3 ), the characteristic impedance Z of microstrip line TL4 and microstrip line TL5 TL4 , Z TL5 and length L TL5 ; Microstrip lines TL1 and TL3 match the third harmonic impedance from short circuit to the best third harmonic impedance obtained by load-pull technology; microstrip lines TL1, TL3, TL4 and TL5 match the fundamental impedance from 50 ohms to the best fundamental load impedance obtained by load-pull technology; Step S2: designing a second harmonic control circuit; Set the length of the parallel microstrip line TL2 to One end of the parallel microstrip line is short-circuited; for the fundamental wave, the quarter wavelength of the parallel microstrip line TL2 transforms the short-circuit impedance of one end into an open circuit condition, so the microstrip line TL2 does not affect the fundamental wave impedance matching; for the third harmonic, the quarter wavelength of the parallel microstrip line TL2 The length of the parallel microstrip line TL2 is equivalent to a quarter wavelength, which transforms the short-circuit impedance at one end into an open-circuit condition. Therefore, the microstrip line TL2 does not affect the third harmonic control. For the second harmonic, the parallel microstrip line TL2 The length of the microstrip line TL1 is equivalent to half a wavelength, one end of which is short-circuited and the other end is still short-circuited; in addition, the second harmonic optimal impedance is pure reactance, so the second harmonic control can be achieved by changing the position of the microstrip line TL2; the length L of the series transmission line TL1 is TL1 The length L of the series transmission line TL3 TL3 Calculated by the following formula: L TL3 =(L TL1 +L TL3 )-L TL1 (3) Microstrip line TL1 matches the second harmonic impedance from a short circuit to the optimal second harmonic impedance obtained by load-pull technology; Step S3: Design the input matching circuit and bias circuit of the power amplifier, connect the input matching network, bias circuit, transistor, and output matching network together, tune and optimize the overall circuit, and finally obtain a complete circuit.

2. The design method of a class F power amplifier based on an optimized output matching structure according to claim 1, characterized in that: The fundamental wave matching circuit includes a first microstrip line TL1, a second microstrip line TL2, a third microstrip line TL3, a fourth microstrip line TL4 and a fifth microstrip line TL5, wherein TL1, TL3 and TL5 are series microstrip lines, and TL2 and TL4 are parallel microstrip lines; the drain of the transistor is connected to one end of the first microstrip line TL1; the other end of the first microstrip line TL1 is connected to one end of the second microstrip line TL2 and one end of the third microstrip line TL3, and the other end of the second microstrip line TL2 is grounded; the other end of the third microstrip line TL3 and one end of the fourth microstrip line TL4 are connected to one end of the fifth microstrip line TL5, and the other end of the fourth microstrip line TL4 is open; the other end of the fifth microstrip line TL5 is connected to the output load.

3. The design method of a class F power amplifier based on an optimized output matching structure according to claim 1, characterized in that: The first microstrip line TL1 and the second microstrip line TL2 are used to jointly control the second harmonic; the first microstrip line TL1, the third microstrip line TL3 and the fourth microstrip line TL4 are used to jointly control the third harmonic; the first microstrip line TL1, the third microstrip line TL3, the fourth microstrip line TL4 and the fifth microstrip line TL5 are used to jointly perform fundamental impedance matching.

4. The class F power amplifier based on the optimized output matching structure according to the method of claim 1, characterized in that: At least includes a transistor and an output matching network, wherein the output matching network includes a bias circuit, a fundamental matching circuit, a second harmonic control circuit, and a third harmonic control circuit; wherein, One end of the output matching network is connected to the transistor, and the other end is connected to the terminal load, and is used to match the fundamental impedance, the second harmonic impedance, and the third harmonic impedance to the optimal value; The fundamental wave matching circuit is a T-type matching structure, which includes a third harmonic control circuit and a first microstrip line TL1; The first microstrip line TL1 is a common part of the fundamental wave matching circuit, the third harmonic control circuit, and the second harmonic control circuit; The transistor is in a class AB working state or a deep class B working state; The fundamental wave matching circuit comprises a first microstrip line TL1, a second microstrip line TL2, a third microstrip line TL3, a fourth microstrip line TL4 and a fifth microstrip line TL5, wherein TL1, TL3 and TL5 are series microstrip lines, and TL2 and TL4 are parallel microstrip lines; the drain of the transistor is connected to one end of the first microstrip line TL1; the other end of the first microstrip line TL1 is connected to one end of the second microstrip line TL2 and one end of the third microstrip line TL3, and the other end of the second microstrip line TL2 is grounded; the other end of the third microstrip line TL3 and one end of the fourth microstrip line TL4 are connected to one end of the fifth microstrip line TL5, and the other end of the fourth microstrip line TL4 is open; the other end of the fifth microstrip line TL5 is connected to the output load; The first microstrip line TL1 and the second microstrip line TL2 are used to jointly control the second harmonic; the first microstrip line TL1, the third microstrip line TL3 and the fourth microstrip line TL4 are used to jointly control the third harmonic; the first microstrip line TL1, the third microstrip line TL3, the fourth microstrip line TL4 and the fifth microstrip line TL5 are used to jointly perform fundamental impedance matching.

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