Circuit and method for reducing distortion in amplifier

Abstract

An apparatus for reducing distortion in an amplifier includes an input transistor configured to generate a voltage based on an input signal. The apparatus also includes a diode-connected transistor configured to sink current. The diode-connected transistor includes an output terminal and a control terminal, wherein the output terminal is coupled to the control terminal. The apparatus also includes a current source circuit coupled to the control terminal. The apparatus additionally includes an impedance element coupled to the output terminal at a first node and coupled to the control terminal and the current source circuit at a second node.

Description

Technical Field

[0001] This document relates generally, but not by way of limitation, to amplifier circuits and, more particularly, to reducing signal distortion in amplifiers caused by bias current sources. Background Art

[0002] An amplifier includes an electronic circuit that receives electrical signals and provides conditioned versions of these signals for further use or processing. The received signal may be conditioned by modifying one or more electrical characteristics of the received signal according to a provided specification. Such modification may include level shifting the signal, such as by changing the direct current (DC) bias point of the signal. Such modification may include amplifying the current, voltage, or total power of the signal. In an example, the amplifier may include a source follower circuit configured to buffer the signal by shifting the DC bias point of the signal and increasing the total power of the signal, such as by providing a signal current gain. An amplifier generally modifies a specific electrical characteristic of an input signal to produce a conditioned output signal that maintains high fidelity to the original input signal. However, source follower circuits, as well as other amplifier circuits, may use a bias circuit that incorporates a current source with a nonlinear output characteristic, such as a nonlinear output impedance, which may introduce signal distortion. Such nonlinear output characteristics may be artifacts of defects in these bias circuits, such as nonlinear junction capacitance, nonlinear drain impedance, or nonlinear collector impedance of a transistor used to construct the bias circuit.

[0003] Techniques for reducing signal distortion caused by nonlinear characteristics of bias circuits include incorporating adjustable gain before the node with nonlinear characteristics of negative feedback. However, this technique can increase the complexity of the circuit, such as due to the need for additional circuit elements to provide adjustable gain and feedback. This technique can also reduce the frequency performance of the amplifier, such as due to the gain dropping or rolling off with increasing frequency. Other techniques for reducing signal distortion can include degradation of the amplifier's internal current source. However, these techniques do not improve the impedance of the amplifier's internal current source, such as the junction capacitance in parallel with the current source.

[0004] There is a need for amplifier circuits including bias circuits that incorporate current sources having nonlinear output characteristics, such as imperfect current sources, without significantly increasing complexity or degrading performance. Summary of the invention

[0005] According to one aspect of the present disclosure, there is provided an apparatus for reducing distortion in an amplifier, the apparatus comprising: an input transistor configured to generate a voltage based on an input signal; a diode-connected transistor configured to sink the current, the diode-connected transistor comprising: an output terminal, and a control terminal, the output terminal being coupled to the control terminal; a current source circuit coupled to the control terminal; and an impedance element coupled to the output terminal at a first node and to the control terminal and the current source circuit at a second node.

[0006] According to one aspect of the present disclosure, a system having an amplifier circuit is provided, the amplifier circuit comprising: an output stage; a bias stage driving the output stage, the bias stage comprising: a diode-connected transistor; an impedance element disposed between an output terminal and a control terminal of the diode-connected transistor; and a current source coupled to the diode-connected transistor at a first node formed by the control terminal and the impedance element. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 An example of an amplifier including an input bias circuit configured to reduce signal distortion caused by a nonlinear output impedance of a bias current source is depicted.

[0008] Figure 2 Depicted is a schematic diagram of an example of a circuit that includes a passive impedance element in a feedback path of a diode-connected transistor to reduce signal distortion caused by a nonlinear impedance of a bias current source.

[0009] Figure 3 Depicted is a schematic diagram of an example of an input bias circuit including a transistor in a feedback path of a diode-connected transistor to reduce signal distortion caused by a nonlinear impedance of a bias current source.

[0010] Figure 4 An example of an amplifier including an input bias circuit configured to reduce signal distortion caused by a nonlinear impedance of a bias current source is depicted.

[0011] Figure 5 Depicted is a set of operations for reducing signal distortion caused by a bias current source in an amplifier according to various examples.

[0012] In the drawings, which are not necessarily drawn to scale, like numbers may describe similar components in different views. Like numbers with different letter suffixes may represent different instances of similar components. The accompanying drawings generally illustrate various embodiments discussed in this document by way of example and not limitation. DETAILED DESCRIPTION

[0013] The present disclosure includes techniques for reducing signal distortion or other undesirable artifacts (such as gain error, offset error, or drift effects) caused by imperfect bias current sources in amplifier circuits. In an example, an impedance device such as a resistor or load transistor is inserted into the feedback path of an input bias circuit of an amplifier to sample and remove the signal distortion caused by the current source. These techniques enable the manufacture of amplifiers that are resilient to finite impedance of the bias current source, such as caused by nonlinearity, process, temperature, or amplitude variations in the imperfect bias current source. This resiliency is achieved without incorporating additional gain and feedback circuits.

[0014] Various aspects of the present disclosure are based on the recognition that a bias current source in an amplifier circuit may have a significant component of an undesirable (including nonlinear) output impedance. Such a bias current source is generally a subcircuit of an input bias circuit of a voltage follower stage of the amplifier. The nonlinear output impedance of the bias current source may arise from nonlinear junction capacitance, drain impedance, or collector impedance of a transistor, or other switch or semiconductor element in the input bias circuit. The nonlinear impedance presents a nonlinear load at the follower stage and causes signal distortion.

[0015] In an example of the present disclosure, an input bias circuit includes a diode-connected transistor coupled to a bias current source, such as to control a bias voltage of another circuit or to provide a more accurate voltage based on an input signal. An impedance element is inserted into a feedback path of the diode-connected transistor, such as between the gate and drain of a diode-connected metal oxide semiconductor field effect transistor (MOSFET) or between the base and collector of a bipolar junction transistor (BJT). The impedance device is sized or configured to have an impedance that matches the output impedance of the input bias circuit. In operation, a distortion (such as a voltage drop) is generated across the impedance element to cancel the signal distortion effect of an undesirable (such as, nonlinear) impedance of the bias current source.

[0016] Figure 1 An example of an amplifier 100 having an input bias circuit 115 configured to reduce signal distortion caused by a nonlinear output impedance of a bias current source is depicted. In an example, the amplifier 100 includes a buffer amplifier, such as a voltage or source follower. In another example, the amplifier 100 includes a follower stage of a larger amplifier circuit. The amplifier 100 includes an input bias circuit 115 and a bias current source 130. In an example, the amplifier 100 includes an input stage 105 and an output stage 110.

[0017] In the example, the input stage 105 includes receiving and conditioning the input signal V INSuch a circuit may include a high impedance circuit configured to IN The voltage level of V is shifted to a level useful for circuits in subsequent stages of the driver amplifier 100. In an example, the input stage 105 includes a p-type MOSFET circuit (PMOS) configured to convert V IN The offset indicates the voltage and will offset the V IN Provided to the output stage 110 or the input bias circuit 115.

[0018] In an example, the output stage 110 includes providing an input signal V IN Such a circuit may include receiving a first version V from an input stage 105. IN The pull-up circuit 145 and the second version V received from the input bias circuit 115 IN 150 pull-down circuit. In the example, the output stage 110 is configured to buffer V IN , such as by using V IN With V OUT Provides current or power gain between.

[0019] In an example, the input bias circuit 115 is configured to bias the input circuit or element of the output stage 110, such as to cause the input circuit to operate within an indicated region of its operation or characteristic curve. Biasing the input circuit may include biasing the V received from the input stage 105. IN The voltage level of the version of is shifted (eg, offset) to the indicated voltage level. In an example, the input bias circuit 115 includes an input transistor 120 , a diode-connected transistor 125 , and an impedance circuit 135 .

[0020] Input transistor 120 may include any suitable transistor, such as a MOSFET, a BJT, or a JFET. Input transistor 120 may include any circuit having one or more semiconductor devices (such as a transistor or a diode) and configured to operate as an input transistor or perform the function of an input transistor. In an example, input transistor 120 is configured to receive V from input stage 105. IN A version of the MOSFET coupled to a diode-connected transistor 125. This coupling may include placing V IN The voltage level is shifted to offset the V caused by the input stage 105 IN In the example, input transistor 120 is configured to shift the voltage level from the power rail V DD A conductive path is provided for a bias current I1 such as determined by a bias current source 130 .

[0021] The diode-connected transistor 125 may include any suitable transistor configured to operate as a two-terminal diode, such as a MOSFET, a BJT, or a JFET. The diode-connected transistor 125 may include any circuit having one or more transistors and configured to operate as a diode-connected transistor or perform its function. In an example, the diode-connected transistor 125 includes an input terminal 155, an output terminal 160, and a control terminal 165. In an example, the diode-connected transistor 125 is a MOSFET, and the input terminal 155, the output terminal 160, and the control terminal 165 are the source, drain, and gate of the MOSFET, respectively. In other examples, the diode-connected transistor 125 is a BJT, and the input terminal 155, the output terminal 160, and the control terminal 165 are the emitter, collector, and base of the BJT, respectively. The output terminal 160 may be coupled to the control terminal 165 to form a feedback path including the impedance element 135.

[0022] Impedance element 135 may include any circuit or circuit element configured to insert a passive or active impedance into a feedback path between output terminal 160 and control terminal 165. In an example, impedance element 135 includes a resistor network having one or more resistors. In another example, impedance element 135 includes an active circuit having one or more transistors. In an example, impedance element 135 has an impedance that matches the impedance seen by the circuit observing node 170. In an example, the impedance of impedance element 135 matches the impedance of the series combination of the emitter impedance of input transistor 120 and the output impedance of diode-connected transistor 125 (hereinafter collectively referred to as "the series impedance of input transistor 120 and output transistor 125").

[0023] The bias current source 130 may include any suitable current source configured to provide a substantially fixed current, such as a current having only an indicated threshold amount of variation (e.g., a specification limit) specified for a target application, to operate with the input transistor 120 and the diode-connected transistor 125 to set a bias point for circuit elements (such as transistors) in the output stage 110. In an example, the bias current source 130 is an internal current source of the amplifier 100, such as a MOSFET current mirror, and is configured to operate with the input transistor 120 and the diode-connected transistor 125 to convert the input signal V IN The voltage level of the output stage 110 is shifted to a suitable voltage range for driving transistors in the output stage 110, such as MOSFETs.

[0024] By considering the amplifier 100 with node 170 shorted to node 140, the operation of an existing amplifier, such as an amplifier without impedance element 135, is described. In such an amplifier, the combination of input transistor 120, diode-connected transistor 125, and bias current source 130 form a bias circuit that operates similarly to a level shifting circuit. Bias current source 130 biases input transistor 120 and diode-connected transistor 125 to a suitable operating point, such as by sinking current I1.

[0025] The combinational circuit receives an input signal from input stage 105, such as V IN The level-shifted version of the input signal is generated at node 170. In the example, the series impedance of input transistor 120 and diode-connected transistor 125 is zero and the output impedance of bias current source 130 is infinite by observing output terminal 160. In this example, the level-shifted version of the input generated at node 170 is a high fidelity or perfect level-shifted copy of the input signal.

[0026] In another example, the series combination of input transistor 120 and diode-connected transistor 125 has a finite non-zero impedance, and bias current source 130 has a large but finite impedance. The finite series impedance of input transistor 120 and diode-connected transistor 125 operates together with the finite output impedance of bias current source 130 to form an attenuator circuit that causes a gain loss or distortion loss (hereinafter referred to as "signal distortion") in the level-shifted copy of the input signal at node 170. In an example, the signal distortion is the voltage drop across input transistor 120 and diode-connected transistor 125 due to I1 flow. This signal distortion can be presented to output stage 110, where it can be propagated to other circuits.

[0027] An impedance element 135 is added to the input bias circuit 115, such as Figure 1 As shown in FIG. 1 , a mechanism is created for canceling or attenuating at least a portion of the signal distortion generated at node 170. In operation, input bias circuit 115 configured with impedance element 135 receives an input signal, such as V IN120 and the diode-connected transistor 125 operate together with the finite series impedance of the bias current source 130 to form an attenuator circuit that causes signal distortion in the level-shifted copy of the input signal at node 170. However, the impedance element 135 causes a voltage drop between 140 and 170 that is equal in magnitude to the voltage drop between the base terminal of 120 and node 140, but is level-shifted. The current I2 causes a voltage to be generated across the impedance element 135. From observing the circuit at node 140, the voltage generated across the impedance element 135 due to I2 has equal magnitudes of opposite polarity to the voltage generated across the input transistor 120 and the diode-connected transistor 125 due to I1. This is due in part to the equal magnitudes and opposite polarities of I1 and I2, as well as the matched impedance of the impedance element 135 and the series impedance of the input transistor 120 and the diode-connected transistor 125. The voltages of equal magnitude and opposite polarity developed across impedance element 135 and the series combination of input transistor 120 and diode-connected transistor 125 cancel at node 140, thereby canceling or removing the signal distortion effects at node 170. In other words, the distortion developed at node 170 is canceled at node 140 by the operation of impedance element 135.

[0028] Figure 2 A schematic diagram of an example of a circuit 200 is depicted that includes a passive impedance element 135 in a feedback path of a diode-connected transistor to reduce signal distortion caused by a nonlinear impedance of a bias current source. The circuit 200 includes an input bias circuit 115 and a bias current source 130. The bias current source 130 includes a MOSFET current source such as formed by transistors 210 and 215, which is driven by a bias voltage V BIAS is actuated to generate a constant current to bias the input transistor 120 and the diode-connected transistor 125. V BIAS is created with an external current mirrored by 215. The passive impedance element 135 may include a network of one or more resistors 205 disposed between the node 140 and the node 170. The total resistance of the one or more resistors 205 is determined based on the impedance seen by the circuit observing the drain of the diode-connected transistor 125. In an example, the resistance of the one or more resistors 205 matches and is substantially equal to the sum of the emitter resistance of the input transistor 120 and the output or drain resistance of the diode-connected transistor 125. Similar to Figure 1 The combination of the input bias circuit 115 and the bias current source 130 described in the discussion above, the circuit 200 is configured to receive an input signal V IN , such as input stage 105 ( Figure 1) and produces a shifted copy of the input signal at node 170. This shifted copy of the input signal is coupled to node 140 and is output as V OUT As previously described, although distortion is generated at node 170, this distortion is cancelled at node 140 by the voltage generated across one or more resistors 205. Therefore, the distortion at node 170 will not be reflected in signal V OUT propagates, such as to the output stage 110 ( Figure 1 ).

[0029] Figure 3 A schematic diagram of an example of a circuit 300 is depicted that includes an active impedance element 135 in the feedback path of a diode-connected transistor to reduce signal distortion caused by the nonlinear impedance of the bias current. The circuit 300 includes an input bias circuit 115 and a bias current source 130. Similar to the example in FIG. Figure 1 and Figure 2 The combination of the input bias circuit 115 and the bias current source 130 described in the discussion above, the circuit 300 is configured to receive an input signal V IN , such as input stage 105 ( Figure 1 ) and produces a shifted copy of the input signal at node 140. This shifted copy of the input signal is coupled to node 140 and is output as V OUT The distortion generated at node 170 is cancelled at node 140 by the voltage generated across active impedance element 135, thereby preventing the distortion from propagating to signal V OUT Other circuits in the output stage 110 ( Figure 1 ).

[0030] The active impedance element 135 may include a circuit having one or more active circuit elements, such as a load transistor 310 (such as a cancellation transistor), configured to provide an adjustable impedance between the node 140 and the node 170. In an example, the active impedance element 135 also includes a feedback element 315 (such as a compensation circuit), such as a diode-connected transistor. The impedance of the active impedance element 135 or the impedance of the load transistor 310 is selected to match or substantially equal to the impedance of the emitter impedance of the input transistor 120 and the output or drain impedance of the diode-connected transistor 125. In an example, the impedance of the active impedance element 135 is the sum of the emitter resistance of the input transistor 120 and the output resistance or drain resistance of the diode-connected transistor 125. In an example, the impedance of the active impedance element 135 is determined at least in part based on the selection of the geometry of the load transistor 310 and the feedback element 315.

[0031] The feedback element 315 is configured to adjust the impedance of the active impedance circuit 135 to compensate for the effects of process, temperature and voltage (PVT) variations on the output impedance of the diode-connected transistor 125. In an example, the feedback element 315 is manufactured to have a threshold voltage that is greater than the threshold voltage of the active impedance element 135. The feedback element 315, the diode-connected transistor 125, and the impedance element 135 all experience substantially the same PVT variations. This allows PVT-related variations in the output impedance of the diode-connected transistor 125 to be tracked by corresponding changes in the impedance of the active impedance element 135 or the impedance of the load transistor 310, thereby ensuring that the impedance of the active impedance element 135 remains matched to the impedance of the input transistor 120 and the diode-connected transistor 125 over PVT variations.

[0032] Figure 4 An example of an amplifier 400 is depicted that includes an input bias circuit configured to reduce signal distortion. Amplifier 400 is an example of amplifier 100. Figure 4 As shown in FIG. 1 , the input bias circuit 115 receives an input signal from the input stage 105 in conjunction with the bias current source 130. In the example, the input signal is V IN A downshifted version of the gate-to-source voltage V GS Upward V IN The input bias circuit 115 in conjunction with the bias current source 130 is configured to provide a shifted copy of the input signal to the output stage 110 at node 140. In the example, this shifted copy of the input signal is obtained by shifting the input signal down by V GS or any other suitable voltage for driving the gate of transistor 410. As described herein, the distortion generated at node 170 is cancelled at node 140 by the voltage generated across active impedance element 135, thereby preventing the distortion from propagating to other circuits, such as output stage 110.

[0033] Figure 5 A process 500 is depicted for reducing signal distortion caused by a bias current source in an amplifier, such as amplifier 400. At 505, an input signal, such as from input stage 105 ( Figure 1 or Figure 4 ). In an example, the input signal is received by an input transistor coupled in series with an input terminal of a diode-connected transistor. At 510, the input signal can be coupled to an output stage of an amplifier, such as output stage 110 ( Figure 1 or Figure 4). As described herein, such coupling can include biasing the output stage using an input transistor, a diode-connected transistor, and a bias current source. At 510, a voltage generated across an impedance element (such as an impedance device) coupled to a control terminal of the diode-connected transistor eliminates distortion in the coupled signal, as described herein. In an example, the impedance of the impedance element is determined or established based on the impedance of the input transistor and the diode-connected transistor. In an example, the impedance element includes a network of one or more resistors. In an example, the impedance element includes a circuit having one or more active elements (such as a load transistor and a feedback element), wherein the feedback element is configured to adjust the impedance of the impedance element to track or match the impedance of the diode-connected transistor.

[0034] Process 500 may also include other suitable steps or operations for implementing the techniques described herein.

[0035] Although the operations of process 500 are shown as occurring or being performed sequentially in a particular order, in other examples, one or more operations may be performed in parallel or in a different order. Additionally, one or more operations may be repeated two or more times.

[0036] Each of the non-limiting aspects or examples described herein may stand alone or may be combined with one or more of the other examples in various permutations or combinations.

[0037] The present disclosure depicts and describes examples of circuits that include specific types of transistors. The types of transistors depicted or described are used as examples to illustrate the techniques of the present disclosure. However, such techniques may be implemented using any other suitable type of transistor without departing from the scope of the present disclosure. More specifically, any MOSFET or BJT described or discussed herein may be replaced by a suitable MOSFET, BJT, junction FET, or other semiconductor device or circuit.

[0038] Various aspects of the present disclosure are discussed in terms of techniques for reducing or eliminating signal distortion caused by amplifier input bias circuits. However, such techniques are also useful for reducing or eliminating signal distortion or other undesirable signal artifacts (such as gain error, offset error, or drift effects) in any device that uses an input bias diode-connected transistor (hereinafter referred to as a "diode-connected transistor") coupled to a bias current source.

[0039] The above detailed description includes references to the accompanying drawings that form a part of the detailed description. The accompanying drawings show, by way of illustration, specific embodiments in which the invention may be practiced. These embodiments are also referred to herein as "examples". Such examples may include elements other than those shown or described. However, the inventors also contemplate examples in which only those elements shown or described are provided. In addition, the inventors also contemplate examples using any combination or arrangement of those elements shown or described with respect to a particular example (or one or more aspects thereof) or with respect to other examples (or one or more aspects thereof) shown or described herein.

[0040] In the event of an inconsistency in usage between this document and any document incorporated by reference, the usage in this document shall control.

[0041] In this document, as is common in patent documents, the terms "a" or "an" are used to include one or more than one, independent of any other instance or use of "at least one" or "one or more." In this document, unless otherwise noted, the term "or" is used to represent a non-exclusive or, such that "A or B" includes: "A but not B," "B but not A," and "A and B." In this document, the terms "including" and "in which" are used as the plain English equivalents of the respective terms "comprising" and "wherein." In the following claims, the terms "including" and "comprising" are open-ended, i.e., a system, apparatus, article, composition, preparation, or process that includes elements in addition to those listed after the term in a claim is still considered to fall within the scope of the claim. In addition, in the appended claims, the terms "first," "second," and "third," etc. are used merely as labels and are not intended to impose numerical requirements on their objects.

[0042] The method examples described herein may be at least partially machine or computer implemented. The examples may include a computer-readable medium or machine-readable medium encoded with instructions that are operable to configure an electronic device to perform the methods described in the above examples. Implementations of such methods may include code, such as microcode, assembly language code, high-level language code, etc. Such code may include computer-readable instructions for performing various methods. The code may form part of a computer program product. In addition, in the examples, the code may be tangibly stored on one or more volatile, non-temporary or non-volatile tangible computer-readable media, such as during execution or at other times. Examples of these tangible computer-readable media may include, but are not limited to, hard disks, removable disks, removable optical disks (such as optical disks and digital video disks), cassettes, memory cards or memory sticks, random access memory (RAM), read-only memory (ROM), etc.

[0043] The above description is intended to be illustrative, not limiting. For example, the above examples (or one or more aspects thereof) may be used in combination with each other. Other embodiments may be used when, for example, the above description is reviewed by a person of ordinary skill in the art. The abstract of the specification is provided to comply with 37 CFR §1.72 (b) to allow the reader to quickly determine the nature of the technical disclosure. It should be understood at the time of submission that it will not be used to interpret or limit the scope or meaning of the claims. Moreover, in the above detailed description, various features may be combined together to simplify the disclosure. This should not be interpreted as an intention that the disclosed functions that are not claimed for protection are essential to any claim. On the contrary, the subject matter of the invention may lie in less than all the features of a particular disclosed embodiment. Here, the following claims are incorporated into the detailed description as examples or embodiments, each claim being independent as an independent embodiment, and it is conceivable that such embodiments may be combined with each other in various combinations or arrangements. The scope of this subject matter should be determined by reference to the appended claims together with the full scope of equivalent rights enjoyed by such claims.

Claims

1. A device for reducing distortion in an amplifier, the device comprising: an input transistor for generating a voltage based on an input signal; a diode-connected transistor coupled in series to the input transistor, the diode-connected transistor comprising: output terminals, and Control Terminals a current source circuit; and an impedance element coupled to the output terminal at a first node and to the control terminal and the current source circuit at a second node, wherein the current source circuit is coupled to the control terminal at the second node, The impedance element is configured to cancel distortion generated by the current source circuit at the second node.

2. The apparatus of claim 1, wherein an impedance of the impedance element matches a series combination of an output impedance of the input transistor and an output impedance of the diode-connected transistor. The device of claim 1 , wherein the impedance element comprises a resistor. 4 . The apparatus of claim 1 , wherein the impedance element comprises a cancellation transistor and a compensation circuit configured to control an impedance of the cancellation transistor. 5 . The apparatus of claim 4 , wherein the compensation circuit comprises a second diode-connected transistor disposed between the current source and the second node.

6. The apparatus of claim 1, further comprising an output stage coupled to the first node.

7. The apparatus of claim 6, wherein the output stage comprises a source circuit and a sink circuit, the source circuit coupled in parallel with the input transistor and the sink circuit coupled to the first node.

8. The apparatus of claim 1, wherein the diode-connected transistor is a metal oxide semiconductor field effect transistor, the output terminal comprises a drain terminal and the control terminal comprises a gate terminal.

9. A system having an amplifier circuit, the amplifier circuit comprising: Output stage; A bias stage, used to drive the output stage, the bias stage comprising: an input transistor for generating a voltage based on an input signal; a diode-connected transistor coupled in series with the input transistor; an impedance element coupled to the output terminal of the diode-connected transistor at a first node and to the control terminal of the diode-connected transistor at a second node; and a current source coupled at a second node to a control terminal of the diode-connected transistor and to the impedance element, The impedance element is configured to cancel distortion caused by the current source at the second node.

10. The system of claim 9, wherein the input transistor is configured to couple the diode-connected transistor to a power source, the input transistor being configured to provide current to the diode-connected transistor in response to an input signal.

11. The system of claim 9, wherein the impedance element is configured to match a series impedance of the input transistor and the diode-connected transistor.

12. The system of claim 9, wherein the impedance element comprises a load transistor and a bias circuit configured to control an impedance of the load transistor.

13. The system of claim 12, wherein the bias circuit comprises a diode-connected transistor disposed between the current source and the second node.

14. A method of reducing distortion in an amplifier using a bias stage, The bias stage is configured to drive the output stage and comprises: an input transistor for generating a voltage based on an input signal; a diode-connected transistor coupled in series with the input transistor; an impedance element coupled to an output terminal of the diode-connected transistor at a first node and to a control terminal of the diode-connected transistor at a second node; as well as a current source coupled at a second node to a control terminal of the diode-connected transistor and to the impedance element, The method comprises: biasing an output stage of an amplifier using the diode-connected transistor and the current source; as well as Signal distortion in the output stage is eliminated using the impedance element.

15. The method according to claim 14, further comprising: receiving an input signal using the input transistor; The impedance of the impedance element is established based on the impedance of the input transistor and the diode-connected transistor. The method of claim 15 , wherein the impedance element comprises a resistor.

17. The method of claim 15, wherein the impedance element comprises a load transistor and a bias circuit configured to control an impedance of the load transistor.

18. The method of claim 17, further comprising adjusting an impedance of the impedance element in response to a change in an impedance of the diode-connected transistor.

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