Display device

Abstract

Disclosed is a display device including a substrate, a first electrode, a second electrode, and a third electrode, at least one first light-emitting element, at least one second light-emitting element, a first contact electrode, a second contact electrode, and a third contact electrode. The first electrode, the second electrode, and the third electrode are positioned on the substrate and arranged in order along a first direction. The first light-emitting element is positioned between the first electrode and the second electrode. The second light-emitting element is positioned between the second electrode and the third electrode. The first contact electrode overlaps and is in contact with one end of the first electrode and the first light-emitting element. The second contact electrode overlaps and is in contact with the other end of the first light-emitting element. The third contact electrode overlaps and is in contact with the other end of the second light-emitting element and the second electrode. The second contact electrode extends while bypassing the third contact electrode.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2020-0016648, filed on February 11, 2020, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0003] This disclosure generally relates to display devices. Background Technology

[0004] Recently, a technique has been developed to fabricate micro-light-emitting elements using materials with highly reliable inorganic crystal structures and to manufacture light-emitting devices using these elements. For example, a technique has been developed to construct light sources for light-emitting devices using micro-light-emitting elements with dimensions down to the micrometer or nanometer scale. Such light-emitting devices can be used in various types of electronic devices, such as lighting equipment.

[0005] In order to improve the emission efficiency of the display device (e.g., the amount of light output of the light-emitting element or the input current per pixel), the light-emitting elements can be connected to each other in a structure in which light sources, each comprising light-emitting elements connected in parallel to each other, are connected in series (i.e., a connection structure in which series connection and parallel connection are combined).

[0006] However, because the ratio of light-emitting elements connected in series between the two pixel electrodes is not high, the emission efficiency of the display device is not improved. Summary of the Invention

[0007] One or more embodiments provide a display device with improved emission efficiency.

[0008] According to one or more embodiments of the present disclosure, a display device is provided, the display device comprising: a substrate; a first electrode, a second electrode, and a third electrode located on the substrate, the first electrode, the second electrode, and the third electrode being sequentially disposed along a first direction; at least one first light-emitting element located between the first electrode and the second electrode; at least one second light-emitting element located between the second electrode and the third electrode; a first contact electrode overlapping one end of the first electrode and at least one first light-emitting element, the first contact electrode contacting one end of the first electrode and at least one first light-emitting element; a second contact electrode overlapping the other end of the at least one first light-emitting element, the second contact electrode contacting the other end of the at least one first light-emitting element; and a third contact electrode overlapping the other end of the second electrode and at least one second light-emitting element, the third contact electrode contacting the other end of the second electrode and at least one second light-emitting element, wherein the second contact electrode extends while bypassing the third contact electrode, overlaps with one end of the third electrode and at least one second light-emitting element, and contacts one end of at least one second light-emitting element.

[0009] In one or more embodiments, the other end of at least one first light-emitting element and the other end of at least one second light-emitting element may include semiconductor layers of the same type and face each other, with a second electrode inserted between them.

[0010] In one or more embodiments, at least one first light-emitting element and at least one second light-emitting element may be connected in series between the first electrode and the second electrode.

[0011] In one or more embodiments, on a plane, the second contact electrode may be spaced apart from the third contact electrode and surround at least a portion of the third contact electrode.

[0012] In one or more embodiments, the second contact electrode may have a closed loop.

[0013] In one or more embodiments, each of the first electrode, the second electrode, and the third electrode may extend in a second direction intersecting the first direction. The length of the second electrode in the second direction may be longer than the length of the first electrode in the second direction.

[0014] In one or more embodiments, the display device may further include a dam extending along the edge of a light-emitting region of the substrate, the dam defining the light-emitting region. A first contact electrode, a second contact electrode, and a third contact electrode may be located at the light-emitting region. The first electrode, the second electrode, and the third electrode may overlap with the dam.

[0015] In one or more embodiments, the display device may further include transistors located on a substrate and power lines located on the substrate. A first electrode may overlap with and be connected to an electrode of the transistor. A second electrode may overlap with and be connected to the power lines. A third electrode may be insulated from the transistor and the power lines.

[0016] In one or more embodiments, the first contact electrode and the second contact electrode may be located in different layers, and at least one insulating layer is inserted between them.

[0017] In one or more embodiments, the first contact electrode, the second contact electrode, and the third contact electrode may be located in the same layer.

[0018] In one or more embodiments, the display device may further include transistors located on a substrate and power lines located on the substrate. A first electrode may overlap with and be connected to the power lines. A second electrode may overlap with and be connected to one electrode of the transistor. A third electrode may be insulated from the transistor and the power lines.

[0019] In one or more embodiments, the display device may further include a fourth electrode located between the first electrode and the second electrode. At least one first light-emitting element may be located between the first electrode and the fourth electrode. A second contact electrode may overlap with the fourth electrode.

[0020] In one or more embodiments, the width of each of the second and fourth electrodes in the first direction may be smaller than the width of the first electrode in the first direction.

[0021] In one or more embodiments, the second contact electrode may contact the fourth electrode.

[0022] According to one or more embodiments of the present disclosure, a display device is provided, the display device comprising: a substrate; a first electrode, a second electrode, a third electrode, and a fourth electrode located on the substrate, the first electrode, the second electrode, the third electrode, and the fourth electrode being arranged sequentially along a first direction; at least one first light-emitting element located between the first electrode and the second electrode; at least one second light-emitting element located between the second electrode and the third electrode; at least one third light-emitting element located between the third electrode and the fourth electrode; a first contact electrode overlapping one end of the first electrode and at least one first light-emitting element, the first contact electrode contacting one end of the first electrode and at least one first light-emitting element; and a second contact electrode overlapping the other end of at least one first light-emitting element, the second contact electrode... The electrode is in contact with the other end of at least one first light-emitting element; a third contact electrode overlaps with the other end of the second electrode and at least one second light-emitting element, and the third contact electrode is in contact with the other end of the second electrode and at least one second light-emitting element; and a fourth contact electrode overlaps with the other end of the fourth electrode and at least one third light-emitting element, and the fourth contact electrode is in contact with the other end of at least one third light-emitting element, wherein the second contact electrode extends around the third contact electrode, overlaps with one end of at least one third light-emitting element, and is in contact with one end of at least one third light-emitting element, wherein the fourth contact electrode extends around the second contact electrode, overlaps with one end of at least one second light-emitting element, and is in contact with one end of at least one second light-emitting element.

[0023] In one or more embodiments, the other end of at least one first light-emitting element and the other end of at least one second light-emitting element may comprise semiconductor layers of the same type and face each other, with a second electrode inserted between them. One end of at least one second light-emitting element and one end of at least one third light-emitting element may comprise semiconductor layers of the same type and face each other, with a third electrode inserted between them.

[0024] In one or more embodiments, at least one first light-emitting element, at least one second light-emitting element, and at least one third light-emitting element may be connected in series between the first electrode and the second electrode.

[0025] In one or more embodiments, the second contact electrode may extend from the second electrode to the third electrode while being adjacent to one end of the third contact electrode. The fourth contact electrode may extend from the fourth electrode to the third electrode while being adjacent to the other end of the third contact electrode.

[0026] In one or more embodiments, the display device may further include a fifth electrode located between the first electrode and the second electrode. At least one first light-emitting element may be located between the first electrode and the fifth electrode. A second contact electrode may overlap with the fifth electrode.

[0027] The display device may also include a sixth electrode located between the third and fourth electrodes. At least one third light-emitting element may be located between the sixth and fourth electrodes. The second contact electrode may overlap with the sixth electrode. Attached Figure Description

[0028] One or more embodiments will be described more fully below with reference to the accompanying drawings; however, they may be implemented in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the exemplary embodiments to those skilled in the art.

[0029] In the accompanying drawings, dimensions may be exaggerated for clarity. It should be understood that when an element is referred to as "between two elements," it may be the only element between those two elements, or there may be one or more intervening elements. The same reference numerals always denote the same elements.

[0030] Figure 1A This is a view showing a light-emitting element according to one or more embodiments of the present disclosure.

[0031] Figure 1B yes Figure 1A The image shows a cross-sectional view of the light-emitting element.

[0032] Figure 2A This is a view showing a light-emitting element according to one or more embodiments of the present disclosure.

[0033] Figure 2B yes Figure 2A The image shows a cross-sectional view of the light-emitting element.

[0034] Figure 3A This is a view showing a light-emitting element according to one or more embodiments of the present disclosure.

[0035] Figure 3B yes Figure 3A The image shows a cross-sectional view of the light-emitting element.

[0036] Figure 4A This is a view showing a light-emitting element according to one or more embodiments of the present disclosure.

[0037] Figure 4B yes Figure 4A The image shows a cross-sectional view of the light-emitting element.

[0038] Figure 5 This is a plan view illustrating a display device according to one or more embodiments of the present disclosure.

[0039] Figures 6A to 6E It is shown that it includes Figure 5 The circuit diagram shows an example of a pixel in a display device.

[0040] Figure 7 It is shown that it includes Figure 5 A plan view of an example of pixels in a display device.

[0041] Figure 8A and Figure 8B It shows along Figure 7 The example cross-sectional view of the pixels cut off by line I-I' shown.

[0042] Figures 9A to 9C It is shown that it includes Figure 5 A plan view of another example of pixels in a display device shown.

[0043] Figure 10 It is shown that it includes Figure 5 A plan view of an example of pixels in a display device.

[0044] Figure 11A and Figure 11B It shows along Figure 10 A cross-sectional view of an example of pixels cut off by line II-II' shown.

[0045] Figure 12A and Figure 12B It is shown that it includes Figure 5 A plan view of another example of pixels in a display device shown.

[0046] Figure 13 It is shown that it includes Figure 5 A plan view of an example of pixels in a display device.

[0047] Figure 14A and Figure 14B It shows along Figure 13 A cross-sectional view of an example of the pixels captured by line III-III' shown.

[0048] Figure 15 It is shown that it includes Figure 5 A plan view of another example of pixels in a display device shown.

[0049] Figure 16 It is shown that it includes Figure 5 A plan view of an example of pixels in a display device.

[0050] Figure 17A and Figure 17B It shows along Figure 16 The example cross-sectional view of the pixels cut off by line IV-IV' shown.

[0051] Figure 18 It is shown that it includes Figure 5 A plan view of another example of pixels in a display device shown.

[0052] Figure 19 It is shown that it includes Figure 5 A plan view of an example of pixels in a display device.

[0053] Figure 20A and Figure 20B It shows along Figure 19 The example cross-sectional view of the pixels cut off by the line V-V' shown. Detailed Implementation

[0054] Since embodiments according to this disclosure can have different shapes and can be modified in various ways, specific examples will be shown and described in detail in the accompanying drawings. However, embodiments according to this disclosure are not limited to the examples described below and can be modified to have various shapes and be changed with equivalent materials and / or substitutions.

[0055] In the following embodiments and accompanying drawings, elements not directly related to this disclosure are omitted from the description, and the dimensional relationships between the elements in the drawings are for ease of understanding only and are not intended to limit actual scale. It should be noted that when assigning reference numerals to elements in each drawing, the same reference numerals denote the same element even if the same element is shown in different drawings.

[0056] It should be understood that although the terms "first," "second," "third," etc., may be used herein to describe various elements, components, regions, layers, and / or segments, these elements, components, regions, layers, and / or segments should not be limited by these terms. These terms are used only to distinguish one element, component, region, layer, or segment from another element, component, region, layer, or segment. Therefore, without departing from the spirit and scope of the inventive concept, the first element, first component, first region, first layer, or first segment discussed herein may be referred to as a second element, second component, second region, second layer, or second segment.

[0057] For ease of description, spatial relative terms such as “below,” “under,” “down,” “below,” “above,” and “above” are used herein to describe the relationship between one element or feature and another element (or feature) or feature (or feature) as shown in the figures. It should be understood that, in addition to the orientations depicted in the figures, these spatial relative terms are intended to encompass different orientations of the device in use or operation. For example, if the device in the figures is flipped, an element described as “below,” “under,” or “below” other elements or features will be oriented “above” other elements or features. Thus, the exemplary terms “below” and “below” can encompass both above and below orientations. The device may have other orientations (e.g., rotated 90 degrees or in other orientations), and the spatial relative descriptive terms used herein should be interpreted accordingly. Furthermore, it should be understood that when a layer is referred to as “between two layers,” it may be the only layer between the two layers, or there may be one or more intervening layers.

[0058] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the inventive concept. As used herein, the terms “substantially,” “about,” and similar terms are used as approximate terms rather than as terms of degree and are intended to explain the inherent biases of measured or calculated values ​​that will be recognized by one of ordinary skill in the art.

[0059] As used herein, the singular forms “a” and “an” are intended to also include the plural forms unless the context clearly indicates otherwise. It will be further understood that, when used in this specification, the terms “comprises” and / or “comprising” specify the presence of the described features, integrals, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof. As used herein, the term “and / or” includes any and all combinations of one or more of the related listed items. When following a list of elements, expressions such as “at least one of…” modify the elements of the entire list, rather than individual elements within the list. Furthermore, when describing embodiments of the inventive concept, the use of “may” means “one or more embodiments of the invention.” Additionally, the term “exemplary” is intended to indicate an example or illustration. As used herein, the terms “use,” “using,” and “used” may be considered synonymous with the terms “utilize,” “utilizing,” and “utilized,” respectively.

[0060] It should be understood that when an element or layer is referred to as being "on," "connected to," "attached to," or "adjacent to" another element or layer, it may be directly on, directly connected to, directly attached to, or directly adjacent to that other element or layer, or one or more intervening elements or layers may exist. Conversely, when an element or layer is referred to as being "directly on," "directly connected to," "directly attached to," or "closely adjacent to" another element or layer, no intervening element or layer exists.

[0061] Figure 1A This is a view showing a light-emitting element according to one or more embodiments of the present disclosure. Figure 1B yes Figure 1A The image shows a cross-sectional view of the light-emitting element. Figure 2A This is a view showing a light-emitting element according to one or more embodiments of the present disclosure. Figure 2B yes Figure 2A The image shows a cross-sectional view of the light-emitting element. Figure 3A This is a view showing a light-emitting element according to one or more embodiments of the present disclosure. Figure 3B yes Figure 3A The image shows a cross-sectional view of the light-emitting element. Figure 4A This is a view showing a light-emitting element according to one or more embodiments of the present disclosure. Figure 4B yes Figure 4A The image shows a cross-sectional view of the light-emitting element.

[0062] The description illustrates a light-emitting element manufactured using an etching process. Figure 1A , Figure 1B , Figure 2A , Figure 2B , Figure 3A and Figure 3B And then the description shows the light-emitting element manufactured by the growth process. Figure 4A and Figure 4B In one or more embodiments of this disclosure, the type and / or shape of the light-emitting element are not limited to... Figure 1A , Figure 1B , Figure 2A , Figure 2B , Figure 3A , Figure 3B , Figure 4A and Figure 4B The implementation shown is illustrated.

[0063] First, refer to Figure 1A , Figure 1B , Figure 2A , Figure 2B , Figure 3A and Figure 3BEach light-emitting element (LD) may include a first semiconductor layer 11, a second semiconductor layer 13, and an active layer 12 interposed between the first semiconductor layer 11 and the second semiconductor layer 13. In one or more embodiments, the light-emitting element LD may be implemented as a light-emitting stack structure in which the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13 are sequentially stacked.

[0064] In one or more embodiments, the light-emitting element (LD) may have a shape extending in one direction. When assuming the extending direction of the LD is the length direction, the LD may have one end and another end along the extending direction. Either the first semiconductor layer 11 or the second semiconductor layer 13 may be disposed at one end of the LD, and the other of the first semiconductor layer 11 and the second semiconductor layer 13 may be disposed at the other end of the LD.

[0065] Light-emitting elements (LDs) can have various shapes. For example, an LD can have a rod-like or bar-like shape that is long in its longitudinal direction (e.g., the aspect ratio of the LD is greater than 1). For example, the length L of the LD in its longitudinal direction can be greater than the diameter D (or the width of the cross-section) of the LD. An LD can include a light-emitting diode manufactured small enough to have a diameter D and / or length L on the micrometer or nanometer scale. According to one or more embodiments of this disclosure, the dimensions of the LD can be modified to suit the requirements (or design conditions) of lighting devices or self-emissive display devices that utilize the LD.

[0066] The first semiconductor layer 11 may include at least one n-type semiconductor layer. For example, the first semiconductor layer 11 may include any one of the semiconductor materials InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, and may include an n-type semiconductor layer doped with a first conductive dopant (such as Si, Ge, or Sn). However, the materials constituting the first semiconductor layer 11 are not limited thereto. In one or more embodiments, the first semiconductor layer 11 may be configured with various materials.

[0067] An active layer 12 is formed on the first semiconductor layer 11 and can be formed as a single quantum well structure or a multi-quantum well structure. The position of the active layer 12 can vary depending on the type of light-emitting element (LD). The active layer 12 can emit light with wavelengths from 400 nm to 900 nm and uses a dual heterostructure. A capping layer (not shown) doped with a conductive dopant can be formed on the top and / or bottom of the active layer 12. In one or more embodiments, the capping layer can be formed as an AlGaN layer or an InAlGaN layer. In some embodiments, materials such as AlGaN or AlInGaN can be used to form the active layer 12. In one or more embodiments, the active layer 12 can be configured with various materials.

[0068] When an electric field with an appropriate voltage (e.g., a set or predetermined voltage) or greater is applied between the ends of the light-emitting element (LD), the LD emits light due to the combination of electron-hole pairs in the active layer 12. Using this principle to control the emission of the LD allows it to be used as a light source for various light-emitting devices, including pixels in display devices.

[0069] The second semiconductor layer 13 is formed on the active layer 12 and may include a semiconductor layer of a different type than the first semiconductor layer 11. For example, the second semiconductor layer 13 may be formed of a semiconductor material different from the semiconductor material of the first semiconductor layer 11, or the second semiconductor layer 13 may be formed of a semiconductor material having material properties different from the semiconductor material of the first semiconductor layer 11. The second semiconductor layer 13 may include at least one p-type semiconductor material. For example, the second semiconductor layer 13 may include at least one semiconductor material selected from InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, and may include a p-type semiconductor layer doped with a second conductive dopant such as Mg. However, the materials constituting the second semiconductor layer 13 are not limited thereto. In one or more embodiments, the second semiconductor layer 13 may be configured with a variety of other suitable materials.

[0070] In one or more embodiments of this disclosure, the first semiconductor layer 11 and the second semiconductor layer 13 may have different widths (or thicknesses) along the length L of the light-emitting element LD. In one or more embodiments, the first semiconductor layer 11 may have a width (or thickness) that is relatively wider (or thicker) than the width (or thickness) of the second semiconductor layer 13 along the length L of the light-emitting element LD. For example, as Figures 1A to 3B As shown, compared to the lower surface of the first semiconductor layer 11, the active layer 12 of the light-emitting element LD can be positioned closer to the upper surface of the second semiconductor layer 13.

[0071] In one or more embodiments, in addition to the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13 as described above, the light-emitting element LD may further include an additional electrode 15 disposed on top of the second semiconductor layer 13. In some embodiments, such as Figure 3A and Figure 3B As shown, the light-emitting element LD may also include another additional electrode 16 disposed at one end of the first semiconductor layer 11.

[0072] Additional electrodes 15 and 16 may be ohmic contact electrodes, but this disclosure is not limited thereto. In some embodiments, additional electrodes 15 and 16 may be Schottky contact electrodes. Additional electrodes 15 and 16 may include metals or metal oxides. For example, additional electrodes 15 and 16 may include one or a mixture of chromium (Cr), titanium (Ti), aluminum (Al), gold (Au), nickel (Ni) and any oxides or alloys thereof, as well as ITO, but this disclosure is not limited thereto.

[0073] The materials included in the additional electrodes 15 and 16 may be the same (or substantially the same) or different from each other. The additional electrodes 15 and 16 may be substantially transparent or translucent. For example, light generated in the light-emitting element LD can be emitted to the outside of the light-emitting element LD by passing through the additional electrodes 15 and 16. In some embodiments, when light generated in the light-emitting element LD does not pass through the additional electrodes 15 and 16 and is emitted to the outside of the light-emitting element LD through a region other than the two ends of the light-emitting element LD, the additional electrodes 15 and 16 may include an opaque metal.

[0074] In one or more embodiments, the light-emitting element LD may further include an insulating film 14. However, in some embodiments, the insulating film 14 may be omitted, or the insulating film 14 may be configured to cover only a portion of the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13.

[0075] The insulating film 14 can prevent (or suppress) short circuits that may occur when the active layer 12 comes into contact with conductive materials other than the first semiconductor layer 11 and the second semiconductor layer 13. Furthermore, the insulating film 14 is formed to minimize or reduce surface defects in the light-emitting element LD, thereby improving the lifetime and efficiency of the light-emitting element LD. Additionally, when multiple light-emitting elements LD are densely arranged, the insulating film 14 can prevent (or suppress) unwanted short circuits that may occur between the light-emitting elements LD. Whether or not the insulating film 14 is provided is not limited, as long as it can prevent (or suppress) short circuits between the active layer 12 and external conductive materials.

[0076] like Figure 1A and Figure 1BAs shown, the insulating film 14 can be arranged in a shape that completely surrounds the peripheral (e.g., circumferential) surface of the light-emitting stack structure, which includes a first semiconductor layer 11, an active layer 12, a second semiconductor layer 13, and an additional electrode 15. For ease of description, in Figure 1A The illustration shows a case where a portion of the insulating film 14 is omitted, but the first semiconductor layer 11, active layer 12, second semiconductor layer 13, and additional electrode 15 included in the actual light-emitting element LD can be completely surrounded by (or partially covered by) the insulating film 14.

[0077] Although the above embodiments describe an insulating film 14 arranged in a shape that completely surrounds the outer circumferential surface of each of the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13, and the additional electrode 15, this disclosure is not limited thereto.

[0078] In some implementations, such as Figure 2A and Figure 2B As shown, the insulating film 14 may surround (or partially cover) the peripheral (e.g., circumferential) surface of each of the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13, and may not completely surround the peripheral (e.g., circumferential) surface of the additional electrode 15 disposed on the second semiconductor layer 13. In some embodiments, the insulating film 14 may surround only a portion of the peripheral (e.g., circumferential) surface of the additional electrode 15, or may not surround the peripheral (e.g., circumferential) surface of the additional electrode 15. However, the insulating film 14 may expose at least two ends of the light-emitting element LD. In one or more embodiments, in addition to the additional electrode 15 disposed at one end of the second semiconductor layer 13, the insulating film 14 may also expose one end of the first semiconductor layer 11. In some embodiments, as... Figure 3A and Figure 3B As shown, when the auxiliary electrodes 15 and 16 are disposed at both ends of the light-emitting element LD, the insulating film 14 may expose at least one area of ​​each of the auxiliary electrodes 15 and 16. In one or more embodiments, the insulating film 14 may not be provided.

[0079] According to one or more embodiments of this disclosure, the insulating film 14 may include a transparent insulating material. For example, the insulating film 14 may be made of SiO2, which is not specifically identified as SiO2 or Si3N4. x SiN x Such materials are formed. However, this disclosure is not limited thereto, and various materials with insulating properties can be used for insulating film 14.

[0080] In one or more embodiments, when an insulating film 14 is provided in the light-emitting element LD, short circuits between the active layer 12 and the first electrode and / or the second electrode can be prevented (or suppressed). In one or more embodiments, the insulating film 14 is formed to minimize or reduce surface defects of the light-emitting element LD, thereby improving the lifetime and efficiency of the light-emitting element LD. In one or more embodiments, when multiple light-emitting elements LD are densely arranged, the insulating film 14 can prevent (or suppress) unwanted short circuits that may occur between the light-emitting elements LD.

[0081] Light-emitting elements (LDs) can be used as light sources for various display devices. LDs can be manufactured using surface treatment processes. For example, when multiple LDs are mixed in a liquid solution (or solvent) to be supplied to each light-emitting area (e.g., the light-emitting area of ​​each pixel or the light-emitting area of ​​each sub-pixel), each LD can be surface-treated to ensure that it is uniformly dispersed in the solution rather than unevenly aggregated.

[0082] Light-emitting devices, including light-emitting elements (LDs), can be used in various types of devices (including display devices) that require a light source. When multiple light-emitting elements (LDs) are provided in the light-emitting area of ​​each pixel of a display panel, the LDs can be used as the light source for the pixels. However, the applications of LDs are not limited to the examples above. For example, LDs can be used in other types of devices that require a light source (e.g., lighting devices).

[0083] Next, we will refer to Figure 4A and Figure 4B Describes a light-emitting element (LD) manufactured using a growth process.

[0084] In the description of the light-emitting element (LD) manufactured by the growth process, the parts that differ from the embodiments described above will be described primarily to avoid or reduce redundancy. Parts of the light-emitting element (LD) manufactured by the growth process that are not specifically described follow the parts of the embodiments described above. In one or more embodiments, components similar to and / or identical to those in the embodiments described above are indicated by the same reference numerals.

[0085] Reference Figure 4A and Figure 4BA light-emitting element (LD) according to one or more embodiments of the present disclosure includes a first semiconductor layer 11', a second semiconductor layer 13', and an active layer 12' interposed between the first semiconductor layer 11' and the second semiconductor layer 13'. In some embodiments, the light-emitting element LD may include a light-emitting pattern 10' having a core-shell structure, the light-emitting pattern 10' including a first semiconductor layer 11' located at its center, an active layer 12' surrounding at least one side of the first semiconductor layer 11' (e.g., the active layer 12' may surround the first semiconductor layer 11' around its periphery), a second semiconductor layer 13' surrounding at least one side of the active layer 12' (e.g., the second semiconductor layer 13' may surround the active layer 12' around its periphery), and an additional electrode 15' surrounding at least one side of the second semiconductor layer 13' (e.g., the additional electrode 15' may surround the second semiconductor layer 13' around its periphery).

[0086] The light-emitting element (LD) can be configured as a polygonal pyramid shape extending in one direction. In one or more embodiments, the LD can be configured as a hexagonal pyramid shape. Assuming the extending direction of the LD is along its length L, the LD can have one end (or lower end) and another end (or upper end) along the length L. A portion of one of the first semiconductor layer 11' and the second semiconductor layer 13' can be exposed at one end (or lower end) of the LD, and a portion of the other semiconductor layer 11' and the second semiconductor layer 13' can be exposed at the other end (or upper end) of the LD. In one or more embodiments, a portion of the first semiconductor layer 11' can be exposed at one end (or lower end) of the LD, and a portion of the second semiconductor layer 13' can be exposed at the other end (or upper end) of the LD. When the LD is used as a light source for a display device, the exposed portion of the first semiconductor layer 11' can contact one of the driving electrodes used to drive the LD, and the exposed portion of the second semiconductor layer 13' can contact the other driving electrode.

[0087] In some embodiments, when the light-emitting element LD includes an additional electrode 15', a portion of the additional electrode 15' surrounding at least one side of the second semiconductor layer 13' may be exposed at the other end (or upper end) of the light-emitting element LD. When the light-emitting element LD is used as a light source for a display device, the exposed portion of the additional electrode 15' may contact another driving electrode for electrical connection to an electrode.

[0088] In one or more embodiments, the first semiconductor layer 11' may be located at the core (e.g., the center (or middle)) of the light-emitting element LD. The light-emitting element LD may be arranged in a shape corresponding to the shape of the first semiconductor layer 11'. In one or more embodiments, when the first semiconductor layer 11' has a hexagonal pyramid shape, the light-emitting element LD and the light-emitting pattern 10' may also have a hexagonal pyramid shape.

[0089] The active layer 12' may be disposed and / or formed in a shape surrounding the peripheral (e.g., circumferential) surface of the first semiconductor layer 11' in the direction of the length L of the light-emitting element LD. For example, the active layer 12' may be disposed and / or formed in a shape surrounding a region other than one of the two ends of the first semiconductor layer 11' located on the lower side in the direction of the length L of the light-emitting element LD.

[0090] The second semiconductor layer 13' may be disposed and / or formed in a shape surrounding the active layer 12' along the length L of the light-emitting element LD, and may include a semiconductor layer of a different type than the first semiconductor layer 11'. For example, the second semiconductor layer 13' may be formed of a semiconductor material different from the semiconductor material of the first semiconductor layer 11', or the second semiconductor layer 13' may be formed of a semiconductor material having material properties different from those of the semiconductor material of the first semiconductor layer 11'. In one or more embodiments, the second semiconductor layer 13' may include at least one p-type semiconductor layer.

[0091] In one or more embodiments, the light-emitting element LD may include an additional electrode 15' surrounding at least one side of the second semiconductor layer 13'. The additional electrode 15' may be an ohmic contact electrode or a Schottky contact electrode electrically connected to the second semiconductor layer 13', but this disclosure is not limited thereto.

[0092] As described above, the light-emitting element (LD) can be configured as a hexagonal pyramid shape with two protruding ends, and can include a light-emitting pattern 10' with a core-shell structure. The light-emitting pattern 10' includes a first semiconductor layer 11' located at its center, an active layer 12' surrounding at least one side of the first semiconductor layer 11', a second semiconductor layer 13' surrounding at least one side of the active layer 12', and an additional electrode 15' surrounding at least one side of the second semiconductor layer 13'. The first semiconductor layer 11' can be disposed at one end (or the lower end) of the light-emitting element LD with the hexagonal pyramid shape, and the additional electrode 15' can be disposed at the other end (or the upper end) of the light-emitting element LD.

[0093] In some embodiments, the light-emitting element LD may further include an insulating film 14' disposed on the peripheral (e.g., surrounding) surface of the light-emitting pattern 10' having a core-shell structure. The insulating film 14' may include a transparent insulating material.

[0094] Figure 5 This is a plan view illustrating a display device according to one or more embodiments of the present disclosure. In some embodiments, a display device (e.g., a display panel PNL disposed in the display device) is shown as a device that can... Figures 1A to 4B Examples of devices using light-emitting elements (LDs) as light sources, as described herein. In some embodiments, the structure of a display panel PNL is briefly shown based on the display area DA. However, in some embodiments, the display panel PNL may also include at least one driving circuit (e.g., a scan driver and a data driver) and / or multiple lines.

[0095] Reference Figure 5 The display panel PNL may include a base layer SUB (or substrate) and pixels PXL disposed on the base layer SUB. For example, the display panel PNL and the base layer SUB may include a display area DA in which an image is displayed and a non-display area NDA other than the display area DA. The non-display area NDA may surround the display area DA along one or more edges of the display area DA (or around the periphery of the display area DA).

[0096] In some implementations, the display area DA is located in the central area of ​​the display panel PNL, and the non-display area NDA may be located along the edge of the display panel PNL to surround the display area DA. However, the positions of the display area DA and the non-display area NDA are not limited to this and can be changed.

[0097] The base layer SUB can form the basic component of the display panel PNL. For example, the base layer SUB can form the basic component of the bottom panel (e.g., the bottom plate of the display panel PNL).

[0098] In some embodiments, the base layer SUB can be a rigid substrate or a flexible substrate, and the material or properties of the base layer SUB are not particularly limited. In one or more embodiments, the base layer SUB can be a rigid substrate made of glass or tempered glass, or a flexible substrate disposed with a thin film made of plastic or metal. Furthermore, the base layer SUB can be a transparent substrate, but this disclosure is not limited thereto. In one or more embodiments, the base layer SUB can be a translucent substrate, an opaque substrate, or a reflective substrate.

[0099] One region on the base layer SUB is defined as the display region DA, such that pixel PXL is arranged in the display region DA, while another region is defined as the non-display region NDA. In one or more embodiments, the base layer SUB may include the display region DA and the non-display region NDA disposed on the periphery of the display region DA, the display region DA including a plurality of pixel regions in which pixel PXL is formed. Various lines and / or built-in circuitry connected to pixel PXL in the display region DA may be disposed in the non-display region NDA.

[0100] Pixel PXL may include at least one light-emitting element LD (e.g., according to...) Figures 1A to 4B In any of the embodiments shown, at least one rod-shaped light-emitting diode (LD) is used, which is driven by a corresponding scan signal and a corresponding data signal. For example, a pixel PXL may include multiple rod-shaped light-emitting diodes having dimensions ranging from micrometers to nanometers and connected in parallel or series with each other. Multiple rod-shaped light-emitting diodes can constitute the light source of the pixel PXL.

[0101] although Figure 5 The illustration shows one or more embodiments in which pixels PXL are arranged in a strip shape, but this disclosure is not limited thereto. For example, pixels PXL can be arranged in various suitable pixel arrangements known to those skilled in the art.

[0102] Figures 6A to 6E This illustrates one or more embodiments of the present disclosure, including... Figure 5 The circuit diagram shows an example of a pixel in a display device.

[0103] First, refer to Figure 6A The pixel PXL may include light-emitting units EMU1 and EMU2 and a pixel driving circuit DC for driving the light-emitting units EMU1 and EMU2.

[0104] The light-emitting units EMU1 and EMU2 can be connected in series between the first power supply VDD (or the first driving power supply) and the second power supply VSS (or the second driving power supply). Each of the light-emitting units EMU1 and EMU2 may include multiple light-emitting elements LD connected in parallel between the first power supply VDD (or the first electric field line to which the first power supply VDD is applied) and the second power supply VSS (or the second electric field line to which the second power supply VSS is applied).

[0105] The first light-emitting unit EMU1 may include a first electrode EL1 (or a first alignment electrode) connected to a first power supply VDD via a pixel driving circuit DC, a second electrode EL2 (or a second alignment electrode) connected to a second power supply VSS via a second light-emitting unit EMU2, and a plurality of light-emitting elements LD connected in parallel in the same direction between the first electrode EL1 and the second electrode EL2. For example, the first electrode EL1 may be an anode electrode, and the second electrode EL2 may be a cathode electrode.

[0106] In one or more embodiments, the second light-emitting unit EMU2 may include a third electrode EL3 (or a third alignment electrode) connected to a first power supply VDD via the first light-emitting unit EMU1 and the pixel driving circuit DC, a fourth electrode EL4 (or a fourth alignment electrode) connected to a second power supply VSS, and a plurality of light-emitting elements LD connected in parallel in the same direction between the third electrode EL3 and the fourth electrode EL4. For example, the third electrode EL3 may be an anode electrode, and the fourth electrode EL4 may be a cathode electrode.

[0107] Each of the light-emitting elements (LDs) included in the light-emitting units EMU1 and EMU2 may include a first end connected to a first power supply VDD via a first electrode EL1 (or a third electrode EL3) and a second end connected to a second power supply VSS via a second electrode EL2 (or a fourth electrode EL4). The first power supply VDD may be set to a high potential power supply, and the second power supply VSS may be set to a low potential power supply. The potential difference between the first power supply VDD and the second power supply VSS may be set to be greater than or equal to the threshold voltage of the light-emitting element LD during the light-emitting period of pixel PXL.

[0108] As described above, each of the light-emitting elements LD connected in parallel in the same direction (e.g., forward direction) between the first electrode EL1 and the second electrode EL2, which are respectively provided with different voltages, can form an effective light source.

[0109] The light-emitting elements (LDs) of the light-emitting units EMU1 and EMU2 can emit light with a brightness corresponding to the drive current supplied by the corresponding pixel driving circuit DC. For example, the pixel driving circuit DC can supply the light-emitting units EMU1 and EMU2 with a drive current corresponding to the grayscale value of the corresponding frame data during each frame period. The drive current supplied to each of the light-emitting units EMU1 and EMU2 can be separated to flow through the light-emitting elements LDs connected in the same direction (e.g., connected in parallel with each other). For example, while each light-emitting element LD emits light with a brightness corresponding to the current flowing through it, the light-emitting units EMU1 and EMU2 can emit light with a brightness corresponding to the drive current.

[0110] In some embodiments, in addition to the light-emitting element LD that forms the corresponding effective light source, the light-emitting units EMU1 and EMU2 may also include at least one inactive light source. For example, at least one reverse light-emitting element LDr may be connected between the first electrode EL1 and the second electrode EL2 of the first light-emitting unit EMU1. The reverse light-emitting element LDr is connected in parallel between the first electrode EL1 and the second electrode EL2 together with the light-emitting element LD that forms the effective light source (e.g., the light-emitting element LD connected in the forward direction). However, the reverse light-emitting element LDr may be connected between the first electrode EL1 and the second electrode EL2 in the opposite direction to the direction in which the light-emitting element LD is connected. Although a driving voltage (e.g., a set or predetermined driving voltage or a forward driving voltage) is applied between the first electrode EL1 and the second electrode EL2, the reverse light-emitting element LDr may remain inactive, and therefore, essentially no current can flow through the reverse light-emitting element LDr.

[0111] In some embodiments of this disclosure, the pixel driving circuit DC may include a first transistor M1, a second transistor M2, and a storage capacitor Cst.

[0112] The first electrode of the first transistor M1 (e.g., a driving transistor) can be connected to a first power supply VDD, and the second electrode of the first transistor M1 can be electrically connected to the first electrode (e.g., the anode electrode) of the light-emitting element LD. For example, the second electrode of the first transistor M1 can be electrically connected to the first electrode EL1 (or the first alignment electrode) of the first light-emitting unit EMU1. The gate electrode of the first transistor M1 can be connected to a first node N1. The first transistor M1 can control the amount of driving current supplied to the light-emitting element LD in accordance with the voltage of the first node N1. For example, the first transistor M1 can control the amount of driving current supplied to each of the light-emitting elements LD of the first light-emitting unit EMU1 and the second light-emitting unit EMU2.

[0113] The first electrode of the second transistor M2 (e.g., a switching transistor) can be connected to the data line DL, and the second electrode of the second transistor M2 can be connected to the first node N1. The first and second electrodes of the second transistor M2 are different electrodes. For example, when the first electrode is the source electrode, the second electrode can be the drain electrode. The gate electrode of the second transistor M2 can be connected to a scan line (e.g., the first scan line SL).

[0114] When a scan signal with a voltage (e.g., gate turn-on voltage) capable of turning on the first transistor M1 is provided from a scan line (e.g., the first scan line SL), the second transistor M2 can be turned on to electrically connect the data line DL and the first node N1. The data signal for the corresponding frame can be provided to the data line DL. Therefore, the data signal can be transmitted to the first node N1. The data signal transmitted to the first node N1 can be stored in a storage capacitor Cst.

[0115] One electrode of the storage capacitor Cst can be connected to the first power supply VDD, and the other electrode of the storage capacitor Cst can be connected to the first node N1. The storage capacitor Cst can be charged using the voltage corresponding to the data signal provided to the first node N1, and the charged voltage is maintained until the data signal of the next frame is provided.

[0116] For ease of description, a pixel driving circuit DC with a relatively simple structure has been shown, which includes a second transistor M2 for transmitting a data signal into the pixel PXL, a storage capacitor Cst for storing the data signal, and a first transistor M1 for providing a driving current corresponding to the data signal to the light-emitting element LD.

[0117] However, this disclosure is not limited thereto, and various modifications and implementations can be made to the structure of the pixel driving circuit DC. In one or more embodiments, the pixel driving circuit DC may additionally include various types of transistors (such as compensation transistors for compensating the threshold voltage of the first transistor M1, initialization transistors for initializing the first node N1, and / or emission control transistors for controlling the emission time of the light-emitting element LD) or other circuit elements (such as boost capacitors for increasing the voltage of the first node N1).

[0118] although Figure 6A The illustration shows a case where all transistors (e.g., first transistor M1 and second transistor M2) included in the pixel drive circuit DC are P-type transistors, but this disclosure is not limited thereto. For example, at least one of the first transistor M1 and second transistor M2 included in the pixel drive circuit DC may be changed to an N-type transistor.

[0119] For example, such as Figure 6B As shown, the first transistor M1 and the second transistor M2 of the pixel driving circuit DC can be implemented using N-type transistors. Except for the fact that the connection positions of some components (e.g., the storage capacitor Cst connected between the first node N1 and the second electrode of the first transistor M1) change due to the change in transistor type, Figure 6B The configuration or operation of the pixel drive circuit DC shown can be compared with... Figure 6AThe pixel drive circuit DC shown is configured or operates similarly. Therefore, its detailed description will not be repeated.

[0120] In one or more embodiments, reference Figure 6C The pixel PXL may also include a third transistor M3 (e.g., a sensing transistor).

[0121] The gate electrode of the third transistor M3 can be connected to the sensing signal line SSL. One electrode of the third transistor M3 can be connected to the sensing line SENL, and the other electrode of the third transistor M3 can be connected to the anode electrode of the light-emitting element LD. For example, the other electrode of the third transistor M3 can be electrically connected to the first electrode EL1 (or the first alignment electrode) of the first light-emitting unit EMU1 and the second electrode of the first transistor M1. The third transistor M3 can transmit the voltage value of the anode electrode of the light-emitting element LD to the sensing line SENL according to the sensing signal provided to the sensing signal line SSL during the sensing period. The voltage value transmitted through the sensing line SENL can be provided to external circuitry (e.g., a timing controller), and the external circuitry can extract feature information of pixel PXL (e.g., the threshold voltage of the first transistor M1, etc.) based on the provided voltage value. The extracted feature information can be used to convert image data to compensate for characteristic changes in pixel PXL.

[0122] In one or more embodiments, the first transistor M1 may further include a back gate electrode connected to the first electrode EL1 (or first alignment electrode) of the first light-emitting unit EMU1. The back gate electrode may be configured to overlap with the gate electrode, and an insulating layer may be inserted between the back gate electrode and the gate electrode. The back gate electrode may form the body of the first transistor M1 and may also serve as the gate electrode.

[0123] In one or more embodiments, although Figure 6C In China (and also in) Figure 6A and Figure 6B The image shows a pixel PXL with two light-emitting units, EMU1 and EMU2, but the pixel PXL is not limited to this.

[0124] For example, such as Figure 6D As shown, in addition to the first light-emitting unit EMU1 and the second light-emitting unit EMU2, the pixel PXL may also include a third light-emitting unit EMU3. The first light-emitting unit EMU1, the second light-emitting unit EMU2, and the third light-emitting unit EMU3 can be connected in series with each other between the first power supply VDD and the second power supply VSS.

[0125] The third light-emitting unit (EMU3) may include a fifth electrode EL5 (or fifth alignment electrode) connected to a first power supply VDD via a pixel driving circuit DC, a sixth electrode EL6 (or sixth alignment electrode) connected to a second power supply VSS, and a plurality of light-emitting elements LD connected in parallel in the same direction between the fifth electrode EL5 and the sixth electrode EL6. For example, the fifth electrode EL5 may be an anode electrode, and the sixth electrode EL6 may be a cathode electrode. In one or more embodiments, at least one reverse light-emitting element LDr may also be connected between the fifth electrode EL5 (or fifth alignment electrode) and the sixth electrode EL6 (or sixth alignment electrode) of the third light-emitting unit EMU3.

[0126] Reference Figure 6E The pixel PXL according to one or more embodiments of this disclosure may include a light-emitting element LD (e.g., for example, for...) Figures 6A to 6C The discussed components include one or more light-emitting elements LD connected in parallel with each of the first light-emitting unit EMU1 and the second light-emitting unit EMU2 (where the first light-emitting unit EMU1 and the second light-emitting unit EMU2 are connected in series), a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, and a seventh transistor T7, as well as a storage capacitor Cst.

[0127] The first electrode (e.g., the anode electrode) of the light-emitting element LD can be connected to the first transistor T1 via the sixth transistor T6, and the second electrode (e.g., the cathode electrode) of the light-emitting element LD can be connected to the second power supply VSS. For example, the first electrode EL1 of the first light-emitting unit EMU1 can be connected to the first transistor T1 via the sixth transistor T6, and the fourth electrode EL4 of the second light-emitting unit EMU2 can be connected to the second power supply VSS. The light-emitting element LD can emit light at a brightness (e.g., a set or predetermined brightness) corresponding to the amount of driving current supplied from the first transistor T1.

[0128] One electrode of the first transistor T1 (e.g., a driver transistor) can be connected to the first power supply VDD via the fifth transistor T5, and the other electrode of the first transistor T1 can be connected to the first electrode of the light-emitting element LD via the sixth transistor T6. The first transistor T1 can control the amount of current flowing from the first power supply VDD through the light-emitting element LD (e.g., one or more light-emitting elements LD in each of the first light-emitting unit EMU1 and the second light-emitting unit EMU2) to the second power supply VSS.

[0129] A second transistor T2 (e.g., a switching transistor) may be connected between a data line DL and an electrode of the first transistor T1. In one or more embodiments, the gate electrode of the second transistor T2 may be connected to a first scan line SL. The second transistor T2 may be turned on when a scan signal with a gate on-state voltage is provided to the first scan line SL to electrically connect the data line DL and an electrode of the first transistor T1.

[0130] A third transistor T3 may be connected between the other electrode of the first transistor T1 and the first node N1. In one or more embodiments, the gate electrode of the third transistor T3 may be connected to the first scan line SL. The third transistor T3 may be turned on when a scan signal with a gate on-state voltage is provided to the first scan line SL to electrically connect the other electrode of the first transistor T1 and the first node N1.

[0131] A fourth transistor T4 may be connected between the first node N1 and the initialization power supply Vint. In one or more embodiments, the gate electrode of the fourth transistor T4 may be connected to the second scan line SL-1 (e.g., the scan line preceding the first scan line SL). The fourth transistor T4 may be turned on when a scan signal with a gate on-state voltage is provided to the second scan line SL-1 to provide the voltage of the initialization power supply Vint to the first node N1. The initialization power supply Vint may be set to a voltage lower than the voltage of the data signal. The scan signal provided to the second scan line SL-1 may have the same waveform as the scan signal provided to the first scan line of the preceding pixel.

[0132] The fifth transistor T5 can be connected between the first power supply VDD and one electrode of the first transistor T1. The gate electrode of the fifth transistor T5 can be connected to the emitter control line EL. The fifth transistor T5 can be turned on when an emitter control signal with a gate on-state voltage is provided to the emitter control line EL, and turned off under other conditions.

[0133] The sixth transistor T6 can be connected between the other electrode of the first transistor T1 and the first electrode of the light-emitting element LD (e.g., the first electrode EL1 of the first light-emitting unit EMU1). The gate electrode of the sixth transistor T6 can be connected to the emission control line EL. The sixth transistor T6 can be turned on when an emission control signal with a gate on-state voltage is provided to the emission control line EL, and turned off under other conditions.

[0134] A seventh transistor T7 may be connected between the initialization power supply Vint and the first electrode (e.g., the anode electrode) of the light-emitting element LD (e.g., the first electrode EL1 of the first light-emitting unit EMU1). In one or more embodiments, the gate electrode of the seventh transistor T7 may be connected to a third scan line SL+1 (e.g., the scan line following the first scan line SL). The seventh transistor T7 may be turned on when a scan signal with a gate on-state voltage is provided to the third scan line SL+1 to provide the voltage of the initialization power supply Vint to the first electrode of the light-emitting element LD (e.g., the first electrode EL1 of the first light-emitting unit EMU1). The scan signal provided to the third scan line SL+1 may have the same waveform as the scan signal provided to the first scan line of the next pixel.

[0135] Figure 6E The diagram illustrates a case where the gate electrode of the seventh transistor T7 is connected to the third scan line SL+1. However, the scope of the present disclosure is not limited thereto. For example, in another embodiment of the present disclosure, the gate electrode of the seventh transistor T7 may be connected to either the first scan line SL or the second scan line SL-1. When a scan signal with a gate on voltage is provided to either the first scan line SL or the second scan line SL-1, the voltage of the initialization power supply Vint may be provided to the anode electrode of the light-emitting element LD (e.g., the first electrode EL1 of the first light-emitting unit EMU1) via the seventh transistor T7.

[0136] The storage capacitor Cst can be connected between the first power supply VDD and the first node N1. The voltage corresponding to the data signal and the threshold voltage of the first transistor T1 can be stored in the storage capacitor Cst.

[0137] In one or more embodiments, although Figure 6E The present invention has shown that all transistors included in the pixel driving circuit DC (e.g., first transistor T1, second transistor T2, third transistor T3, fourth transistor T4, fifth transistor T5, sixth transistor T6, and seventh transistor T7) are P-type transistors, but this disclosure is not limited thereto. For example, at least one of the first transistor T1, second transistor T2, third transistor T3, fourth transistor T4, fifth transistor T5, sixth transistor T6, and seventh transistor T7 may be changed to N-type transistors.

[0138] Figure 7 This illustrates one or more embodiments of the present disclosure, including... Figure 5 A plan view of an example of pixels in a display device. Figure 7 LDL based on light-emitting element layer (see Figure 8A The diagram illustrates the structure of pixel PXL, where a light-emitting element LD (or reference LD) is disposed in the light-emitting element layer LDL. Figure 6C The light-emitting units EMU1 and EMU2 are described.

[0139] Reference Figure 7 Pixel PXL can be formed in pixel region PXA defined on base layer SUB. Pixel region PXA may include light-emitting region EMA. In some embodiments, pixel PXL may include dam BANK (or partition wall), and light-emitting region EMA may be defined by dam BANK surrounding light-emitting region EMA.

[0140] Pixel PXL may include a first electrode ELT1, a second electrode ELT2, and a third electrode ELT3 arranged sequentially along a first direction DR1. Each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 may correspond to a reference. Figure 6A , Figure 6B , Figure 6C and Figure 6E One of the first electrode EL1, the second electrode EL2, the third electrode EL3, and the fourth electrode EL4 described.

[0141] Each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 may extend along a second direction DR2 intersecting the first direction DR1, and the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 may be arranged to be spaced apart from each other along the first direction DR1. However, the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 are not limited thereto. For example, the shape and / or arrangement of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 may be varied.

[0142] In some embodiments, the length of the second electrode ELT2 in the second direction DR2 may be longer than the length of each of the first electrode ELT1 and the third electrode ELT3 in the second direction DR2. For example... Figure 7 As shown, the first electrode ELT1 and the third electrode ELT3 can be disposed in the pixel region PXA, and the second electrode ELT2 can extend to another pixel region adjacent to the pixel region PXA. Although described later, the first electrode ELT1 can be connected to a reference. Figure 6A The first transistor M1 is described above, and the second electrode ELT2 can be connected to the reference. Figure 6AThe second power supply VSS (or second power line) is described above. The first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 may overlap with the dam BANK, and the end of each of the first electrode ELT1 and the third electrode ELT3 may be closer to the edge of the pixel region PXA than the dam BANK. Before providing the light-emitting elements LD1 and LD2, the first electrode ELT1 and the third electrode ELT3 may extend to the pixel region adjacent to the pixel region PXA, and after the light-emitting elements LD1 and LD2 are provided and arranged in the pixel region PXA, the first electrode ELT1 and the third electrode ELT3 may be cut (or partially removed) outside the dam BANK.

[0143] In some embodiments, each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 may have a single-layer or multi-layer structure. In one or more embodiments, each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 may have a multi-layer structure including a reflective electrode and a conductive capping layer. The reflective electrode may have a single-layer or multi-layer structure. In one or more embodiments, the reflective electrode may include at least one reflective conductive layer, and further include at least one transparent conductive layer disposed on the top and / or bottom of the reflective conductive layer.

[0144] In some implementations, pixel PXL may include a first dam pattern PW1 overlapping a region of the first electrode ELT1, a second dam pattern PW2 overlapping a region of the second electrode ELT2, and a third dam pattern PW3 overlapping a region of the third electrode ELT3.

[0145] The first dam pattern PW1, the second dam pattern PW2, and the third dam pattern PW3 can be arranged separately in the light-emitting region EMA, and each allows a region of the first electrode ELT1, a region of the second electrode ELT2, and a region of the third electrode ELT3 to protrude in the upper direction. For example, the first electrode ELT1 can be disposed on the first dam pattern PW1 to protrude in the height direction (or thickness direction) of the base layer SUB due to the first dam pattern PW1, the second electrode ELT2 can be disposed on the second dam pattern PW2 to protrude in the height direction of the base layer SUB due to the second dam pattern PW2, and the third electrode ELT3 can be disposed on the third dam pattern PW3 to protrude in the height direction of the base layer SUB due to the third dam pattern PW3.

[0146] Pixel PXL may include a first light-emitting element LD1 and a second light-emitting element LD2. Additionally, pixel PXL may include a reference element. Figure 6A The reverse light-emitting element LDr is described above.

[0147] A first light-emitting element LD1 can be disposed between a first electrode ELT1 and a second electrode ELT2. A first end EP1 of the first light-emitting element LD1 can face the first electrode ELT1, and a second end EP2 of the first light-emitting element LD1 can face the second electrode ELT2. When multiple first light-emitting elements LD1 are disposed, the multiple first light-emitting elements LD1 can be connected in parallel between the first electrode ELT1 and the second electrode ELT2, forming a reference. Figure 6A The first light-emitting unit EMU1 is described above.

[0148] In one or more embodiments, the second light-emitting element LD2 may be disposed between the second electrode ELT2 and the third electrode ELT3. The first end EP1 of the second light-emitting element LD2 may face the third electrode ELT3, and the second end EP2 of the second light-emitting element LD2 may face the second electrode ELT2. The second end EP2 of the first light-emitting element LD1 and the second end EP2 of the second light-emitting element LD2 may comprise the same type of semiconductor layer (e.g., reference...). Figure 1A The first semiconductor layer 11 is described, and they face each other, with the second electrode ELT2 inserted between them. When multiple second light-emitting elements LD2 are provided, the multiple second light-emitting elements LD2 can be connected in parallel between each other between the second electrode ELT2 and the third electrode ELT3, and form a reference. Figure 6A The second light-emitting unit EMU2 is described in the following.

[0149] In one or more embodiments, although Figure 7 The diagram already shows the alignment of light-emitting elements LD1 and LD2 in a first direction DR1 (e.g., in a transverse direction intersecting the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3), but the arrangement direction of light-emitting elements LD1 and LD2 is not limited to this. For example, at least one of light-emitting elements LD1 and LD2 may be arranged in an inclined direction.

[0150] The first light-emitting element LD1 and the second light-emitting element LD2 can be electrically connected between the first electrode ELT1 and the second electrode ELT2. For example, the first end EP1 of the first light-emitting element LD1 can be electrically connected to the first electrode ELT1, and the second end EP2 of the second light-emitting element LD2 can be electrically connected to the second electrode ELT2.

[0151] In one or more embodiments, the first end EP1 of the first light-emitting element LD1 is not directly disposed on the first electrode ELT1, but is electrically connected to the first electrode ELT1 through at least one contact electrode (e.g., the first contact electrode CNE1). Similarly, the second end EP2 of the second light-emitting element LD2 is not directly disposed on the second electrode ELT2, but is electrically connected to the second electrode ELT2 through at least one contact electrode (e.g., the third contact electrode CNE3). However, this disclosure is not limited thereto. For example, in another embodiment of this disclosure, the first end EP1 of the first light-emitting element LD1 can directly contact the first electrode ELT1 to be electrically connected to the first electrode ELT1.

[0152] In some embodiments, each of the light-emitting elements LD1 and LD2 can be a light-emitting diode with a microscale (e.g., a size as small as nanometers or micrometers) made using a material having an inorganic crystal structure. For example, each of the first light-emitting element LD1 and the second light-emitting element LD2 can be... Figures 1A to 4B The light-emitting element LD shown in any one of them.

[0153] In some embodiments, light-emitting elements LD1 and LD2 can be prepared in a form in which light-emitting elements LD1 and LD2 are dispersed in a solution (e.g., a set or predetermined solution) to provide light-emitting elements LD1 and LD2 to the light-emitting region EMA of the pixel region PXA via inkjet printing, slot coating, or the like. In one or more embodiments, light-emitting elements LD1 and LD2 can be provided to the light-emitting region EMA while being mixed in a volatile solvent. When a voltage (e.g., a set or predetermined voltage) is applied between the first electrode ELT1 and the second electrode ELT2 and between the second electrode ELT2 and the third electrode ELT3, an electric field is formed between the first electrode ELT1 and the second electrode ELT2 and between the second electrode ELT2 and the third electrode ELT3, and the light-emitting elements LD1 and LD2 self-align between the first electrode ELT1 and the second electrode ELT2 and between the second electrode ELT2 and the third electrode ELT3. After aligning the light-emitting elements LD1 and LD2, the solvent is evaporated or removed by another process, so that the light-emitting elements LD1 and LD2 can be stably arranged between the first electrode ELT1 and the second electrode ELT2, and between the second electrode ELT2 and the third electrode ELT3, respectively.

[0154] In some implementations, in addition to the first contact electrode CNE1 and the third contact electrode CNE3, the pixel PXL may also include a second contact electrode CNE2.

[0155] The first contact electrode CNE1 may be formed at at least one region corresponding to the first end EP1 of the first light-emitting element LD1 and the first electrode ELT1, so as to physically connect and / or electrically connect the first end EP1 of the first light-emitting element LD1 to the first electrode ELT1.

[0156] The second contact electrode CNE2 may be formed on at least one region of the second end EP2 of the first light-emitting element LD1 and the second electrode ELT2 corresponding to the second end EP2. Furthermore, the second contact electrode CNE2 may extend around the third contact electrode CNE3 or the second light-emitting element LD2, and be formed on at least one region of the first end EP1 of the second light-emitting element LD2 and the third electrode ELT3 corresponding to the first end EP1. The second contact electrode CNE2 may be electrically connected to the second end EP2 of the first light-emitting element LD1 and the first end EP1 of the second light-emitting element LD2.

[0157] like Figure 7 As shown, the second contact electrode CNE2 is spaced apart from the third contact electrode CNE3 and may have a closed-loop shape surrounding the third contact electrode CNE3.

[0158] The third contact electrode CNE3 can be formed on at least one region of the second end EP2 of the second light-emitting element LD2 and the second electrode ELT2 corresponding to the second end EP2, so as to physically connect and / or electrically connect the second end EP2 of the second light-emitting element LD2 to the second electrode ELT2. Therefore, the first light-emitting element LD1 and the second light-emitting element LD2 can be connected in series between the first electrode ELT1 and the second electrode ELT2 through the first contact electrode CNE1, the second contact electrode CNE2 and the third contact electrode CNE3.

[0159] The light-emitting elements LD1 and LD2, which are clustered in the pixel region PXA, can constitute the light source of the corresponding pixel PXL. In one or more embodiments, when the driving current flows along the first path PATH1, etc., in the pixel PXL during each frame period, the light-emitting elements LD1 and LD2, which are connected in the forward direction between the first electrode ELT1 and the second electrode ELT2 of the pixel PXL, emit light, and the pixel PXL can emit light with a brightness corresponding to the driving current.

[0160] Figure 8A and Figure 8B This illustrates one or more embodiments of the present disclosure along... Figure 7 The example cross-sectional view of the pixels cut off by line I-I' shown.

[0161] Reference Figure 8AA pixel circuit layer (PCL) and a light-emitting element layer (LDL) can be sequentially disposed on the base layer (SUB). In some embodiments, the pixel circuit layer (PCL) and the light-emitting element layer (LDL) can be entirely formed on the display panel PNL (see [link to PNL]). Figure 5 The display area DA is in the display area.

[0162] The pixel circuit layer (PCL) may include a first conductive layer, a first insulating layer (INS1), a semiconductor layer, a second insulating layer (INS2), a second conductive layer, a third insulating layer (INS3), a third conductive layer, a fourth insulating layer (INS4), a fourth conductive layer, and a protective layer (PSV). For example... Figure 8A As shown, the first conductive layer, the first insulating layer INS1, the semiconductor layer, the second insulating layer INS2, the second conductive layer, the third insulating layer INS3, the third conductive layer, the fourth insulating layer INS4, the fourth conductive layer, and the protective layer PSV can be stacked sequentially on the base layer SUB.

[0163] The first conductive layer can be disposed on the base layer SUB and includes a back gate electrode BML1. The back gate electrode BML1 can be connected to a reference. Figure 6C The back gate electrodes described are essentially the same and form the back gate electrode of the first transistor T1. The first transistor T1 can be a reference. Figures 6A to 6D The first transistor M1 or reference described Figure 6E The first transistor T1 is described. In one or more embodiments, the second transistor T2 may be a reference. Figures 6A to 6D The second transistor M2 described or referenced Figure 6E The second transistor T2 is described, and apart from the back gate electrode BML1, the second transistor T2 may be substantially the same as or similar to the first transistor T1. Therefore, the pixel circuit layer PCL will be described based on the first transistor T1.

[0164] In some embodiments, a buffer layer may be provided between the first conductive layer and the base layer SUB. The buffer layer may be provided on the entire surface of the base layer SUB. The buffer layer can prevent (or inhibit) the diffusion of impurity ions, prevent (or inhibit) the penetration of moisture or external air, and perform a surface planarization function. The buffer layer may include silicon nitride, silicon oxide, silicon oxide nitride, etc.

[0165] The first insulating layer INS1 can be disposed on the base layer SUB and the first conductive layer (e.g., the back gate electrode BML1 of the first conductive layer). The first insulating layer INS1 can be disposed approximately across the entire surface of the base layer SUB.

[0166] The first insulating layer INS1 may comprise an inorganic insulating material (such as silicon oxide, silicon nitride, silicon nitride oxide, hafnium oxide, aluminum oxide, titanium oxide, tantalum oxide, or zinc oxide) or an organic insulating material (such as polyacrylate resin, epoxy resin, phenolic resin, polyamide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin, or benzocyclobutene (BCB)). The first insulating layer INS1 may be a single layer or a multilayer in which layers made of different materials are stacked.

[0167] A semiconductor layer may be disposed on the first insulating layer INS1. The semiconductor layer may be an active layer forming the channel of the first transistor T1. The semiconductor layer may include a source region and a drain region, which are in contact with the first transistor electrode (or source electrode) and the second transistor electrode (or drain electrode), as will be described later. The region between the source region and the drain region may be a channel region.

[0168] The semiconductor layer may include a semiconductor pattern SCL. The semiconductor pattern SCL may form the channel of the first transistor T1 (or the second transistor T2).

[0169] Semiconductor patterned channels (SCLs) can include oxide semiconductors. The channel region of the SCL is an undoped semiconductor pattern and can be an intrinsic semiconductor. The source and drain regions of the SCL can be doped semiconductor patterns. n-type impurities can be used as the dopant.

[0170] The second insulating layer INS2 (or gate insulating layer) can be disposed on the semiconductor layer and the first insulating layer INS1. The second insulating layer INS2 can be disposed approximately on the entire surface of the base layer SUB. The second insulating layer INS2 can be a gate insulating layer with gate insulation function.

[0171] Similar to the first insulating layer INS1, the second insulating layer INS2 may include inorganic insulating materials, such as silicon compounds or metal oxides.

[0172] The second conductive layer may be disposed on the second insulating layer INS2. The second conductive layer may include a gate electrode GE (or a first conductive pattern) and a first sub-power line PL2_1. In addition, the second conductive layer may also include lines connected to the gate electrode GE or constituting the gate electrode GE, capacitor electrodes, etc. (e.g., scan lines and gate lines).

[0173] The gate electrode GE can be configured to overlap with the semiconductor pattern SCL and form the gate electrode of the first transistor T1 (or the second transistor T2).

[0174] refer to Figure 6A The second power supply VSS, as described above, can be applied to the first sub-power line PL2_1.

[0175] The second conductive layer may include at least one metal selected from molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu). The second conductive layer may have a single-layer or multi-layer structure.

[0176] The third insulating layer INS3 (or interlayer insulating layer) can be disposed on the second conductive layer and can cover approximately the entire surface of the base layer SUB. The third insulating layer INS3 serves to insulate the second and third conductive layers from each other and can be an interlayer insulating layer.

[0177] The third insulating layer INS3 may comprise inorganic insulating materials (such as silicon oxide, silicon nitride, silicon nitride oxide, hafnium oxide, aluminum oxide, titanium oxide, tantalum oxide, or zinc oxide) or organic insulating materials (such as polyacrylate resin, epoxy resin, phenolic resin, polyamide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin, or benzocyclobutene (BCB)). The third insulating layer INS3 may be a single layer or a multilayer in which layers made of different materials are stacked.

[0178] A third conductive layer may be disposed on a third insulating layer INS3. The third conductive layer may include a first transistor electrode ET1 (or a second conductive pattern), a second transistor electrode ET2 (or a third conductive pattern), and a second sub-power line PL2_2. In addition, the third conductive layer may also include power lines and lines (e.g., data lines) connected to at least one of the first transistor electrode ET1 and the second transistor electrode ET2.

[0179] The first transistor electrode ET1 may overlap with a portion of the semiconductor pattern SCL (e.g., the source region of the first transistor T1 or the second transistor T2) and may be connected to a portion of the semiconductor pattern SCL exposed through a contact hole. The first transistor electrode ET1 may form the first electrode (e.g., the source electrode) of the first transistor T1 (or the second transistor T2).

[0180] In one or more embodiments, the second transistor electrode ET2 may overlap with a portion of the semiconductor pattern SCL (e.g., the drain region of the first transistor T1) and may be connected to a portion of the semiconductor pattern SCL exposed through a contact hole. The second transistor electrode ET2 may form a second electrode (e.g., a drain electrode) of the first transistor T1 (or the second transistor T2).

[0181] The second sub-power line PL2_2 can be connected to the first sub-power line PL2_1 exposed through a contact hole. Together with the first sub-power line PL2_1, the second sub-power line PL2_2 can constitute a second power supply VSS for providing a second power supply VSS to the pixel PXL (see [link]). Figure 6A ) power lines.

[0182] The third conductive layer may include at least one metal selected from molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu). The third conductive layer may have a single-layer or multi-layer structure.

[0183] The fourth insulating layer INS4 can be disposed on the third conductive layer and can be disposed approximately on the entire surface of the base layer SUB. The fourth insulating layer INS4 can serve to insulate the third conductive layer and the fourth conductive layer, and can be an interlayer insulating layer.

[0184] Similar to the third insulating layer INS3, the fourth insulating layer INS4 may include inorganic or organic insulating materials.

[0185] The fourth conductive layer may be disposed on the fourth insulating layer INS4. The fourth conductive layer may include a first bridging pattern BRP1 and a second bridging pattern BRP2.

[0186] The first bridging pattern BRP1 may overlap with the first transistor electrode ET1 of the first transistor T1 and may be connected to the first transistor electrode ET1 exposed through a contact hole. The first bridging pattern BRP1 may connect the first transistor T1 to the first electrode ELT1 (e.g., the first electrode ELT1 of the light-emitting element layer LDL), which will be described later.

[0187] The second bridging pattern BRP2 may overlap with the second sub-power line PL2_2 and may be connected to the second sub-power line PL2_2 exposed through the contact hole. The second bridging pattern BRP2 may connect the second sub-power line PL2_2 to the second electrode ELT2 (i.e., the second electrode ELT2 of the light-emitting element layer LDL), which will be described later.

[0188] The protective layer PSV can be disposed on the fourth conductive layer and the fourth insulating layer INS4. The protective layer PSV can be disposed in the form of an organic insulating layer, an inorganic insulating layer, or an organic insulating layer disposed on an inorganic insulating layer.

[0189] The protective layer PSV may have a first contact hole CNT1 that exposes a first bridging pattern BRP1 (e.g., for connecting the first bridging pattern BRP1 to the first electrode ELT1 of the light-emitting element layer LDL) and a second contact hole CNT2 that exposes a second bridging pattern BRP2 (e.g., for connecting the second bridging pattern BRP2 to the second electrode ELT2 of the light-emitting element layer LDL).

[0190] The light-emitting element layer LDL may include a first dam pattern PW1, a second dam pattern PW2 and a third dam pattern PW3, a first electrode ELT1, a second electrode ELT2 and a third electrode ELT3, a first passivation layer PAS1 (or a fifth insulating layer), a first light-emitting element LD1 and a second light-emitting element LD2, a second passivation layer PAS2 (or a sixth insulating layer), a third contact electrode CNE3, a third passivation layer PAS3 (or a seventh insulating layer), and a first contact electrode CNE1 and a second contact electrode CNE2, which are sequentially arranged and / or formed on the pixel circuit layer PCL.

[0191] The first dam pattern PW1, the second dam pattern PW2, and the third dam pattern PW3 can be disposed on the pixel circuit layer PCL (or the protective layer PSV). The first dam pattern PW1, the second dam pattern PW2, and the third dam pattern PW3 can be disposed in the light-emitting area EMA (see [link to illuminating area]). Figure 7 The first dam pattern PW1, the second dam pattern PW2, and the third dam pattern PW3 are separated from each other. The first dam pattern PW1, the second dam pattern PW2, and the third dam pattern PW3 may protrude in the height direction (i.e., the third direction DR3) on the pixel circuit layer PCL. In some embodiments, the first dam pattern PW1, the second dam pattern PW2, and the third dam pattern PW3 may have substantially the same height, but this disclosure is not limited thereto.

[0192] In some embodiments, the first dam pattern PW1 may be disposed between the pixel circuit layer PCL and the first electrode ELT1. The first dam pattern PW1 may be disposed adjacent to the first end EP1 of the first light-emitting element LD1. In one or more embodiments, a side surface of the first dam pattern PW1 may be positioned facing the first end EP1 of the first light-emitting element LD1 at a distance such that the side surface is adjacent to the first end EP1 of the first light-emitting element LD1.

[0193] In some embodiments, the second dam pattern PW2 may be disposed between the pixel circuit layer PCL and the second electrode ELT2. The second dam pattern PW2 may be disposed adjacent to the second end EP2 of the first light-emitting element LD1. In one or more embodiments, one side surface of the second dam pattern PW2 may be positioned facing the second end EP2 of the first light-emitting element LD1 at a distance adjacent to the second end EP2 of the first light-emitting element LD1. Furthermore, the second dam pattern PW2 may be disposed adjacent to the second end EP2 of the second light-emitting element LD2. In one or more embodiments, the other side surface of the second dam pattern PW2 may be positioned facing the second end EP2 of the second light-emitting element LD2 at a distance adjacent to the second end EP2 of the second light-emitting element LD2.

[0194] In some embodiments, the third dam pattern PW3 may be disposed between the pixel circuit layer PCL and the third electrode ELT3. The third dam pattern PW3 may be disposed adjacent to the first end EP1 of the second light-emitting element LD2. In one or more embodiments, a side surface of the third dam pattern PW3 may be positioned facing the first end EP1 of the second light-emitting element LD2 at a distance such that the side surface is adjacent to the first end EP1 of the second light-emitting element LD2.

[0195] In some embodiments, the first dike pattern PW1, the second dike pattern PW2, and the third dike pattern PW3 can have various shapes. For example... Figure 8A As shown, in the example, the first embankment pattern PW1, the second embankment pattern PW2, and the third embankment pattern PW3 may have a trapezoidal cross-sectional shape, the width of which narrows towards its top. Each of the first embankment pattern PW1, the second embankment pattern PW2, and the third embankment pattern PW3 may have an inclined surface at at least one of its side surfaces. In one or more embodiments, the first embankment pattern PW1, the second embankment pattern PW2, and the third embankment pattern PW3 may have a semi-circular or semi-elliptical cross-section, the width of which narrows towards its top. Each of the first embankment pattern PW1, the second embankment pattern PW2, and the third embankment pattern PW3 may have a curved surface at at least one of its side surfaces. For example, in this disclosure, the shapes of the first embankment pattern PW1, the second embankment pattern PW2, and the third embankment pattern PW3 are not particularly limited and can be modified in various ways known to those skilled in the art. In some embodiments, at least one of the first dike pattern PW1, the second dike pattern PW2, and the third dike pattern PW3 may be omitted, or the position of at least one of the first dike pattern PW1, the second dike pattern PW2, and the third dike pattern PW3 may be changed.

[0196] The first dam pattern PW1, the second dam pattern PW2, and the third dam pattern PW3 may include an insulating material, which may include inorganic and / or organic materials. In one or more embodiments, the first dam pattern PW1, the second dam pattern PW2, and the third dam pattern PW3 may include at least one inorganic layer, which includes various inorganic insulating materials known in the art, including silicon nitride (SiN). x ) or silicon oxide (SiO) x In one or more embodiments, the first dam pattern PW1, the second dam pattern PW2, and the third dam pattern PW3 may include at least one organic layer and / or a photoresist layer, comprising various insulating organic insulating materials known in the art, or configured with a single-layer or multi-layer insulator comprising organic / inorganic materials. That is, the materials constituting the first dam pattern PW1, the second dam pattern PW2, and the third dam pattern PW3 may be varied.

[0197] In one or more embodiments, the first dam pattern PW1, the second dam pattern PW2, and the third dam pattern PW3 can be used as reflective members. In one or more embodiments, the first dam pattern PW1, the second dam pattern PW2, and the third dam pattern PW3, together with the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 disposed on their tops, can be used as reflective members to guide light emitted from each light-emitting element LD in a desired direction, thereby improving the light efficiency of the pixel PXL.

[0198] The first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 can be respectively disposed on top of the first embankment pattern PW1, the second embankment pattern PW2, and the third embankment pattern PW3. The first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 can be disposed in the light-emitting region EMA (see [reference]). Figure 7 They are separated from each other.

[0199] In some embodiments, the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 disposed on the top of the first dam pattern PW1, the second dam pattern PW2, and the third dam pattern PW3 may have shapes corresponding to the shapes of the first dam pattern PW1, the second dam pattern PW2, and the third dam pattern PW3, respectively. For example, the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 may protrude in the height direction (or thickness direction) of the light-emitting element layer LDL, and have inclined surfaces or curved surfaces corresponding to the first dam pattern PW1, the second dam pattern PW2, and the third dam pattern PW3, respectively.

[0200] Each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 may comprise at least one conductive material. Each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 may comprise at least one material selected from metals (such as Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Ti, or any alloy thereof), conductive oxides (such as ITO, IZO, ZnO, or ITZO), and conductive polymers (such as PEDOT), but this disclosure is not limited thereto.

[0201] Furthermore, each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 may be configured as a single layer or multiple layers. In one or more embodiments, each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 may include at least one reflective electrode layer. Additionally, each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 may selectively include at least one of the following: at least one transparent electrode layer disposed on top of and / or at the bottom of the reflective electrode layer; and at least one conductive capping layer covering the top of the reflective electrode layer and / or the transparent electrode layer.

[0202] In some embodiments, the reflective electrode layer of each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 may be made of a conductive material having uniform reflectivity. In one or more embodiments, the reflective electrode layer may include at least one metal such as Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, and alloys thereof, but this disclosure is not limited thereto. For example, the reflective electrode layer may be made of various reflective conductive materials. When each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 includes a reflective electrode layer, the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 may allow light emitted from both ends (e.g., the first end EP1 and the second end EP2 of each of the first light-emitting element LD1 and the second light-emitting element LD2) to advance further in the direction of displaying the image (e.g., the forward direction). In one or more embodiments, when the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 are configured to face the first end EP1 and the second end EP2 of the light-emitting elements LD1 and LD2, respectively, having inclined or curved surfaces corresponding to the shapes of the first dam pattern PW1, the second dam pattern PW2, and the third dam pattern PW3, light emitted from the first end EP1 and the second end EP2 of each of the first and second light-emitting elements LD1 and LD2 can be reflected by the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 to further propagate in the forward direction of the display panel PNL (e.g., the upper direction of the base layer SUB). Therefore, the efficiency of light emitted from the light-emitting element LD can be improved.

[0203] In one or more embodiments, the transparent electrode layer of each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 can be made of various transparent electrode materials. In one or more embodiments, the transparent electrode layer may include ITO, IZO, or ITZO, but this disclosure is not limited thereto. In one or more embodiments, each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 can be configured as a three-layer structure having an ITO / Ag / ITO stacked structure. As described above, when each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 is configured as a multilayer comprising at least two layers, the voltage drop caused by RC delay can be minimized or reduced. Therefore, the desired voltage can be efficiently delivered to the light-emitting element LD (e.g., light-emitting elements LD1 and LD2).

[0204] In one or more embodiments, when each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 includes a transparent electrode layer and / or a conductive overlay covering the reflective electrode layer, damage to the reflective electrode layer of each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 due to defects occurring in the manufacturing process of the pixel PXL, etc., can be prevented (or suppressed). However, the conductive overlay can be optionally included in the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3. In some embodiments, the conductive overlay can be omitted. Furthermore, the conductive overlay can be considered as a component of each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3, or it can be considered as a separate component disposed on each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3.

[0205] The first passivation layer PAS1 can be disposed on a region of the first electrode ELT1, a region of the second electrode ELT2, and a region of the third electrode ELT3. For example, the first passivation layer PAS1 can be formed to cover a region of the first electrode ELT1, a region of the second electrode ELT2, and a region of the third electrode ELT3, and the first passivation layer PAS1 includes openings exposing other regions of the first electrode ELT1, openings exposing other regions of the second electrode ELT2, and openings exposing other regions of the third electrode ELT3.

[0206] In one or more embodiments, the first passivation layer PAS1 may first be formed to completely cover the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3. After the light-emitting element LD is provided and aligned on the first passivation layer PAS1, the first passivation layer PAS1 may be partially opened to expose the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 at the first contact portion and the second contact portion (e.g., at the set or predetermined first contact portion and the second contact portion, and in some embodiments at the third contact portion on the third electrode ELT3), such as... Figure 8A As shown in the figure. In one or more embodiments, after the light-emitting element LD is provided and aligned, the first passivation layer PAS1 can be patterned in the form of a separate pattern partially disposed on the bottom of the light-emitting element LD.

[0207] For example, a first passivation layer PAS1 is interposed between the first electrode ELT1 and the second electrode ELT2 and the first light-emitting element LD1, and between the second electrode ELT2 and the third electrode ELT3 and the second light-emitting element LD2, and can expose at least one region of each of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3. The first passivation layer PAS1 can be formed after the formation of the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 to cover the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3, to prevent (or suppress) damage to the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 in subsequent processes, or to prevent (or suppress) metal from being drawn out in subsequent processes. Furthermore, the first passivation layer PAS1 can stably support the light-emitting elements LD1 and LD2. In some embodiments, the first passivation layer PAS1 can be omitted.

[0208] In some implementations, a dam (see) may be provided on the first passivation layer PAS1. Figure 7 In one or more embodiments, a dam can be formed between adjacent pixels to surround the light-emitting region EMA of pixel PXL, thereby constituting a pixel defining layer defining the light-emitting region EMA of pixel PXL. In the process of providing light-emitting elements LD1 and LD2 to the light-emitting region EMA, the dam can prevent a solution in which light-emitting elements LD1 and LD2 are mixed from being introduced into the light-emitting region EMA of adjacent pixel PXL (e.g., the dam can act as a barrier between adjacent pixels to reduce the chance of a solution in which light-emitting elements LD1 and LD2 are mixed spilling into adjacent pixel PXL), or the dam can be used as a dam structure for controlling a certain amount of solution to be provided to each light-emitting region EMA.

[0209] The luminescent region EMA, in which the first passivation layer PAS1 can be disposed (see...) Figure 7 The light-emitting elements LD1 and LD2 are provided and aligned in the light-emitting region EMA by means of an inkjet process or the like, and the light-emitting elements LD1 and LD2 are aligned between the first electrode ELT1 and the second electrode ELT2 and between the second electrode ELT2 and the third electrode ELT3 by applying an alignment voltage (e.g., a set or predetermined alignment voltage or alignment signal) to the first electrode ELT1, the second electrode ELT2 and the third electrode ELT3.

[0210] The second passivation layer PAS2 can be disposed on each of the first light-emitting elements LD1 and LD2 (e.g., on top of the first light-emitting element LD1 aligned between the first electrode ELT1 and the second electrode ELT2, and on top of the second light-emitting element LD2 aligned between the second electrode ELT2 and the third electrode ELT3), and exposes the first end EP1 and the second end EP2 of each of the light-emitting elements LD1 and LD2. For example, the second passivation layer PAS2 may not cover the first end EP1 and the second end EP2 of the first light-emitting element LD1, but may be disposed only partially on top of a region of the first light-emitting element LD1. The second passivation layer PAS2 may be formed as a separate pattern, but this disclosure is not limited thereto. In one or more embodiments, when there is a separation space between the first passivation layer PAS1 and the light-emitting elements LD1 and LD2 before the formation of the second passivation layer PAS2, the space may be filled by the second passivation layer PAS2. Therefore, the light-emitting elements LD1 and LD2 can be supported more stably.

[0211] The second contact electrode CNE2 can be disposed on the second electrode ELT2 and the third electrode ELT3, the second end EP2 of the first light-emitting element LD1 and the first end EP1 of the second light-emitting element LD2. The second contact electrode CNE2 can be electrically connected to the second end EP2 of the first light-emitting element LD1 and the first end EP1 of the second light-emitting element LD2.

[0212] The second contact electrode CNE2 is disposed on the second electrode ELT2, but can be insulated from the second electrode ELT2 by the first passivation layer PAS1. Furthermore, the second contact electrode CNE2 can be disposed on the second end EP2 of the first light-emitting element LD1 adjacent to the second electrode ELT2, to contact the second end EP2 of the first light-emitting element LD1. Additionally, the second contact electrode CNE2 can be disposed on the third electrode ELT3 to contact the third electrode ELT3. In one or more embodiments, the second contact electrode CNE2 can be disposed to contact the third electrode ELT3 in a region of the third electrode ELT3 not covered by the first passivation layer PAS1. Furthermore, the second contact electrode CNE2 can be disposed on the first end EP1 of the second light-emitting element LD2 adjacent to the third electrode ELT3, to contact the first end EP1 of the second light-emitting element LD2.

[0213] The third passivation layer PAS3 can be disposed on the second contact electrode CNE2. The third passivation layer PAS3 can cover the second contact electrode CNE2.

[0214] The first contact electrode CNE1 and the third contact electrode CNE3 can be disposed on the first electrode ELT1, the second electrode ELT2, the first end EP1 of the first light-emitting element LD1, and the second end EP2 of the second light-emitting element LD2. For example... Figure 8A As shown, the first contact electrode CNE1 and the third contact electrode CNE3 may be located in the same layer. The first contact electrode CNE1 and the third contact electrode CNE3 may be formed from the same conductive material using the same process, but this disclosure is not limited thereto.

[0215] The first contact electrode CNE1 can be electrically connected to the first end EP1 of the first light-emitting element LD1 and the first electrode ELT1. The third contact electrode CNE3 can be electrically connected to the second end EP2 of the second light-emitting element LD2 and the second electrode ELT2.

[0216] For example, the first contact electrode CNE1 can be disposed on the first electrode ELT1 to contact the first electrode ELT1. In one or more embodiments, the first contact electrode CNE1 can be disposed to contact the first electrode ELT1 in a region of the first electrode ELT1 not covered by the first passivation layer PAS1. Furthermore, the first contact electrode CNE1 can be disposed on the first end EP1 of the first light-emitting element LD1 adjacent to the first electrode ELT1 to contact the first end EP1 of the first light-emitting element LD1. For example, the first contact electrode CNE1 can be disposed to cover the first end EP1 of the first light-emitting element LD1 and at least one region of the first electrode ELT1 corresponding to the first end EP1 of the first light-emitting element LD1.

[0217] Similarly, a third contact electrode CNE3 can be disposed on the second electrode ELT2 to contact the second electrode ELT2. In one or more embodiments, the third contact electrode CNE3 can be disposed on a region of the second electrode ELT2 not covered by the first passivation layer PAS1 to contact the second electrode ELT2. Furthermore, the third contact electrode CNE3 can be disposed on the second end EP2 of the second light-emitting element LD2 adjacent to the second electrode ELT2 to contact the second end EP2 of the second light-emitting element LD2. For example, the third contact electrode CNE3 can be disposed to cover the second end EP2 of the second light-emitting element LD2 and at least one region of the second electrode ELT2 corresponding to the second end EP2 of the second light-emitting element LD2.

[0218] In some embodiments, each of the first passivation layer PAS1, the second passivation layer PAS2, and the third passivation layer PAS3 may be configured as a single layer or multiple layers, and may include at least one inorganic insulating material and / or at least one organic insulating material. For example, each of the first passivation layer PAS1, the second passivation layer PAS2, and the third passivation layer PAS3 may include various organic / inorganic insulating materials currently known in the art (including silicon nitrides (SiN)). x Furthermore, the materials constituting each of the first passivation layer PAS1, the second passivation layer PAS2, and the third passivation layer PAS3 are not particularly limited. Additionally, the first passivation layer PAS1, the second passivation layer PAS2, and the third passivation layer PAS3 may comprise different insulating materials, or at least some of the first passivation layer PAS1, the second passivation layer PAS2, and the third passivation layer PAS3 may comprise the same insulating material.

[0219] In one or more embodiments, although Figure 8A The diagram shows a case where the first contact electrode CNE1 (or the third contact electrode CNE3) and the second contact electrode CNE2 are disposed in different layers and the third passivation layer PAS3 is interposed between them, but the first contact electrode CNE1, the second contact electrode CNE2 and the third contact electrode CNE3 are not limited to this.

[0220] Furthermore, despite Figure 8A The diagram shows the first contact electrode CNE1 and the second contact electrode CNE2 (or the second contact electrode CNE2 and the third contact electrode CNE3) overlapping each other, but this disclosure is not limited thereto. For example, the first contact electrode CNE1 and the second contact electrode CNE2 (or the second contact electrode CNE2 and the third contact electrode CNE3) may not overlap each other.

[0221] In some embodiments, the first contact electrode CNE1 and the second contact electrode CNE2 (or the first contact electrode CNE1, the second contact electrode CNE2 and the third contact electrode CNE3) may be located in the same layer.

[0222] Reference Figure 8B The first contact electrode CNE1, the second contact electrode CNE2, and the third contact electrode CNE3 can be disposed on the first passivation layer PAS1 (and the second passivation layer PAS2). The arrangement (or overlap) relationship between the first contact electrode CNE1, the second contact electrode CNE2, the third contact electrode CNE3, the first electrode ELT1, the second electrode ELT2, the third electrode ELT3, and the first light-emitting element LD1 and the second light-emitting element LD2 is consistent with the reference. Figure 8A The described arrangement relationships (or overlapping relationships) are basically the same or similar, and therefore, repeated descriptions are not necessary.

[0223] The first contact electrode CNE1 and the second contact electrode CNE2 can be arranged separately on the first light-emitting element LD1, and the second contact electrode CNE2 and the third contact electrode CNE3 can be arranged separately on the second light-emitting element LD2. The first contact electrode CNE1 and the second contact electrode CNE2 can not overlap each other, and the second contact electrode CNE2 and the third contact electrode CNE3 can not overlap each other.

[0224] A fourth passivation layer PAS4 may be formed and / or disposed on one surface of the base layer SUB, on which the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3, the first light-emitting element LD1 and the second light-emitting element LD2, and the first contact electrode CNE1, the second contact electrode CNE2, and the third contact electrode CNE3 are disposed, to cover the first electrode ELT1, the second electrode ELT2 and the third electrode ELT3, the first light-emitting element LD1 and the second light-emitting element LD2, and the first contact electrode CNE1, the second contact electrode CNE2, and the third contact electrode CNE3. The fourth passivation layer PAS4 may include a thin film encapsulation layer, which includes at least one inorganic layer and / or at least one organic layer, but this disclosure is not limited thereto. In some embodiments, at least one outer coating layer (e.g., a layer for planarizing the upper surface of the light-emitting element layer LDL) may be further disposed on top of the fourth passivation layer PAS4.

[0225] Figures 9A to 9C It is shown that it includes Figure 5 A plan view of another example of pixels in a display device. Figures 9A to 9C Each of them shows the relationship with Figure 7 The corresponding pixel is PXL.

[0226] Reference Figure 7 , Figure 9A , Figure 9B and Figure 9C In addition to the second electrode ELT2 or the second contact electrode CNE2_1 or CNE2_2, Figure 9A , Figure 9B and Figure 9C Each of the pixels PXL shown in the diagram can be compared with... Figure 7 The pixels PXL shown are essentially the same or similar. Therefore, repeated descriptions will not be repeated.

[0227] like Figure 9AAs shown, the length of the second electrode ELT2 can be equal to the length of the first electrode ELT1 (or the third electrode ELT3). Like the first electrode ELT1 and the third electrode ELT3, the second electrode ELT2 can be disposed within the pixel region PXA. After providing and arranging the light-emitting elements LD1 and LD2 within the pixel region PXA (or the light-emitting region EMA), the first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 can be cut (or partially removed) outside the dam bank.

[0228] In some embodiments, the second contact electrode CNE2_1 or CNE2_2 may only surround a portion of the third contact electrode CNE3 (or the second light-emitting element LD2).

[0229] like Figure 9B As shown, the second contact electrode CNE2_1 can extend from the second electrode ELT2 to the third electrode ELT3 at one end adjacent to the third contact electrode CNE3, and includes a space with an opening at the other end adjacent to the third contact electrode CNE3.

[0230] In one or more embodiments, such as Figure 9C As shown, the second contact electrode CNE2_2 can extend from the second electrode ELT2 to the third electrode ELT3 while being adjacent to the other end of the third contact electrode CNE3, and includes a space with an opening at one end adjacent to the third contact electrode CNE3. The drive current can flow along the first path PATH1_1 between the first electrode ELT1 and the second electrode ELT2.

[0231] For example, when the second contact electrode CNE2_1 or CNE2_2 includes a portion extending between the second electrode ELT2 and the third electrode ELT3, the arrangement of the extension portion can be varied.

[0232] Figure 10 This illustrates one or more embodiments of the present disclosure, including... Figure 5 A plan view of an example of pixels in a display device. Figure 10 The diagram illustrates one or more embodiments of the present disclosure. Figure 7 The corresponding pixel is PXL.

[0233] Reference Figure 7 and Figure 10 Apart from the arrangement orientation of the first electrode ELT1_1, the second electrode ELT2_1, the third electrode ELT3_1, the first light-emitting element LD1, and the second light-emitting element LD2, Figure 10 The pixel PXL shown can be with Figure 7The pixels PXL shown are essentially the same or similar. Therefore, repeated descriptions will not be repeated.

[0234] Each of the first electrode ELT1_1, the second electrode ELT2_1, and the third electrode ELT3_1 may extend in a second direction DR2 that intersects the first direction DR1, and may be configured to be spaced apart from each other along the first direction DR1.

[0235] The length of the first electrode ELT1_1 in the second direction DR2 can be longer than the lengths of each of the second electrode ELT2_1 and the third electrode ELT3_1 in the second direction DR2. For example... Figure 10 As shown, the second electrode ELT2_1 and the third electrode ELT3_1 can extend to another pixel region adjacent to pixel region PXA. Although reference will be made later... Figure 11A The description is provided, but the first electrode ELT1_1 can be connected to the reference. Figure 6A The second power supply VSS (or second power line) is described above, and the second electrode ELT2_1 can be connected to the reference. Figure 6A The first transistor M1 is described in the following description.

[0236] In the manufacturing process of a display device, to arrange the light-emitting elements LD1 and LD2, an AC voltage can be applied to the first electrode ELT1_1 and the third electrode ELT3_1, and a reference voltage (e.g., ground voltage) can be applied to the second electrode ELT2_1. Therefore, the first light-emitting element LD1 can be arranged such that its first end EP1 faces the second electrode ELT2_1 and its second end EP2 faces the first electrode ELT1_1. Similarly, the second light-emitting element LD2 can be arranged such that its first end EP1 faces the second electrode ELT2_1 and its second end EP2 faces the third electrode ELT3_1.

[0237] The first contact electrode CNE1 may be formed on at least one region of the first light-emitting element LD1 corresponding to the second end EP2 of the first light-emitting element LD1 and the first electrode ELT1_1, so as to physically connect and / or electrically connect the second end EP2 of the first light-emitting element LD1 to the first electrode ELT1_1.

[0238] The second contact electrode CNE2 can be formed on at least one region of the first end EP1 of the first light-emitting element LD1 and the second electrode ELT2_1 corresponding to the first end EP1 of the first light-emitting element LD1. Furthermore, the second contact electrode CNE2 can extend around the third contact electrode CNE3 or the second light-emitting element LD2, and can be formed on at least one region of the second end EP2 of the second light-emitting element LD2 and the third electrode ELT3_1 corresponding to the second end EP2 of the second light-emitting element LD2. The second contact electrode CNE2 can be electrically connected to the first end EP1 of the first light-emitting element LD1 and the second end EP2 of the second light-emitting element LD2.

[0239] The third contact electrode CNE3 may be formed on at least one region of the second light-emitting element LD2 corresponding to the first end EP1 of the second light-emitting element LD2 and the second electrode ELT2_1, so as to physically connect and / or electrically connect the first end EP1 of the second light-emitting element LD2 to the second electrode ELT2_1.

[0240] Therefore, the driving current used to drive pixel PXL can flow along the second path PATH2 via the second light-emitting element LD2 and the first light-emitting element LD1.

[0241] Figure 11A and Figure 11B This illustrates one or more embodiments of the present disclosure along... Figure 10 A cross-sectional view of an example of pixels captured by line II-II' shown. Figure 11A and Figure 11B The text shows the relationship between the two. Figure 8A and Figure 8B The corresponding diagram.

[0242] First, refer to Figure 8A and Figure 11A Apart from the arrangement (and connection relationship) of the first transistor T1, the first sub-power line PL2_1, and the second sub-power line PL2_2, Figure 11A The pixels shown can be compared with Figure 8A The pixels shown are essentially the same or similar. Therefore, repeated descriptions will not be repeated.

[0243] like Figure 11A As shown, the first sub-power line PL2_1 and the second sub-power line PL2_2 can be configured to overlap with the first electrode ELT1_1, and can be connected to the first electrode ELT1_1 through the second contact hole CNT2.

[0244] The first transistor T1 can be configured to overlap with the second electrode ELT2_1, and can be connected to the second electrode ELT2_1 through the first contact hole CNT1.

[0245] In one or more embodiments, although Figure 11A The diagram shows a case where the first contact electrode CNE1 (or the third contact electrode CNE3) and the second contact electrode CNE2 are disposed in different layers and the third passivation layer PAS3 is interposed between them, but the first contact electrode CNE1, the second contact electrode CNE2 and the third contact electrode CNE3 are not limited to this.

[0246] like Figure 11B As shown, for example, as referenced Figure 8B As described, the first contact electrode CNE1 and the second contact electrode CNE2 (or the first contact electrode CNE1, the second contact electrode CNE2 and the third contact electrode CNE3) may be located in the same layer.

[0247] Figure 12A and Figure 12B This illustrates one or more embodiments of the present disclosure, including... Figure 5 A plan view of another example of pixels in a display device. Figure 12A and Figure 12B Each of them shows the relationship with Figure 10 The corresponding pixel is PXL.

[0248] Reference Figure 10 , Figure 12A and Figure 12B In addition to the second contact electrode CNE2_1 or CNE2_2, Figure 12A and Figure 12B Each of the pixels PXL shown in the diagram can be compared with... Figure 10 The pixels PXL shown are essentially the same or similar. Therefore, repeated descriptions will not be repeated.

[0249] For reference Figure 9B and Figure 9C As described, the second contact electrode CNE2_1 or CNE2_2 may surround only a portion of the third contact electrode CNE3 (or the second light-emitting element LD2).

[0250] like Figure 12A As shown, the second contact electrode CNE2_1 can extend from the second electrode ELT2_1 to the third electrode ELT3_1 while being adjacent to one end of the third contact electrode CNE3, and includes a space with an opening at the other end adjacent to the third contact electrode CNE3.

[0251] In one or more embodiments, such as Figure 12BAs shown, the second contact electrode CNE2_2 can extend from the second electrode ELT2_1 to the third electrode ELT3_1 while being adjacent to the third contact electrode CNE3, and can include a space with one end open adjacent to the third contact electrode CNE3. The drive current can flow from the second electrode ELT2_1 to the first electrode ELT1_1 along the second path PATH2_1.

[0252] Figure 13 This illustrates one or more embodiments of the present disclosure, including... Figure 5 A plan view of an example of pixels in a display device. Figure 13 The text shows the relationship with... Figure 7 The corresponding pixel is PXL.

[0253] Reference Figure 7 and Figure 13 Apart from the second electrode ELT2_3 and the fourth electrode ELT4, Figure 13 The pixel PXL shown can be with Figure 7 The pixels PXL shown are essentially the same or similar. Therefore, repeated descriptions will not be repeated.

[0254] In addition to the first electrode ELT1, the second electrode ELT2_3, and the third electrode ELT3, the pixel PXL may also include a fourth electrode ELT4.

[0255] The fourth electrode ELT4 can extend along the second direction DR2 and can be positioned between the first electrode ELT1 and the second electrode ELT2_3. The length of the fourth electrode ELT4 along the second direction DR2 can be equal to or similar to the length of the first electrode ELT1 (or the third electrode ELT3) along the second direction DR2, and shorter than the length of the second electrode ELT2_3 along the second direction DR2.

[0256] The fourth electrode ELT4 may overlap with the second embankment pattern PW2. The second electrode ELT2_3 and the fourth electrode ELT4 may be arranged facing each other on the second embankment pattern PW2 and protrude in the height direction of the base layer SUB due to the second embankment pattern PW2.

[0257] In one or more embodiments, in the light-emitting region EMA (or pixel region PXA), the first linewidth W_L1 of the first electrode ELT1 (e.g., the width in the first direction DR1) may be equal to or substantially equal to the third linewidth W_L3 of the third electrode ELT3, and each of the second linewidth W_L2 of the second electrode ELT2_3 and the fourth linewidth W_L4 of the fourth electrode ELT4 may be smaller than the first linewidth W_L1 of the first electrode ELT1. For example, the sum of the second linewidth W_L2 of the second electrode ELT2_3 and the fourth linewidth W_L4 of the fourth electrode ELT4 may be equal to or substantially equal to the first linewidth W_L1 of the first electrode ELT1.

[0258] For example, refer to Figure 7 The second electrode ELT2 described can be divided into Figure 13 The second electrode ELT2_3 and the fourth electrode ELT4 shown are, in other words, two electrodes (or sub-electrodes). For example, refer to... Figure 8A When the thickness of the first passivation layer PAS1 decreases, a short circuit may occur between the second contact electrode CNE2 and the second electrode ELT2. The second light-emitting element LD2, positioned between the second electrode ELT2 and the third electrode ELT3, may not emit light. Therefore, [the following text is incomplete and requires further context: "will..."] Figure 7 The second electrode ELT2 shown is divided into Figure 13 The second electrode ELT2_3 and the fourth electrode ELT4 (i.e., two electrodes) shown are configured such that even when a short circuit occurs between the second contact electrode CNE2 and the second electrode ELT2_3, the second light-emitting element LD2 (and the first light-emitting element LD1) can still emit light normally with the desired brightness.

[0259] Before providing light-emitting elements LD1 and LD2, the second electrode ELT2_3 and the fourth electrode ELT4 can be connected to each other, and after providing and arranging light-emitting elements LD1 and LD2 in the pixel area PXA, the fourth electrode ELT4 can be separated from the second electrode ELT2_3 outside the dam BANK.

[0260] The first light-emitting element LD1 can be disposed between the first electrode ELT1 and the fourth electrode ELT4, and the second light-emitting element LD2 can be disposed between the second electrode ELT2_3 and the third electrode ELT3.

[0261] The second contact electrode CNE2 can be formed on at least one region of the second end EP2 of the first light-emitting element LD1 and the fourth electrode ELT4 corresponding to the second end EP2 of the first light-emitting element LD1. Furthermore, the second contact electrode CNE2 can extend around the third contact electrode CNE3 or the second light-emitting element LD2, and can be formed on at least one region of the first end EP1 of the second light-emitting element LD2 and the third electrode ELT3 corresponding to the first end EP1 of the second light-emitting element LD2. The second contact electrode CNE2 can be electrically connected to the second end EP2 of the first light-emitting element LD1 and the first end EP1 of the second light-emitting element LD2.

[0262] Figure 14A and Figure 14B This illustrates one or more embodiments of the present disclosure along... Figure 13 A cross-sectional view of an example of pixels captured by line III-III' shown. Figure 14A and Figure 14B The text shows the relationship between the two. Figure 8A and Figure 8B The corresponding diagram.

[0263] First, refer to Figure 8A and Figure 14A Apart from the second electrode ELT2_3 and the fourth electrode ELT4, Figure 14A The pixels shown can be compared with Figure 8A The pixels shown are essentially the same or similar. Therefore, repeated descriptions will not be repeated.

[0264] The second electrode ELT2_3 and the fourth electrode ELT4 can be disposed on the top of the second embankment pattern PW2.

[0265] The second electrode ELT2_3 may overlap with one side surface (e.g., the right side surface) of the second embankment pattern PW2 and have the same or similar shape as that side surface of the second embankment pattern PW2. Similarly, the fourth electrode ELT4 may overlap with the other side surface (e.g., the left side surface) of the second embankment pattern PW2 and have the same or similar shape as that other side surface of the second embankment pattern PW2.

[0266] Similar to the first electrode ELT1, the second electrode ELT2-3, and the third electrode ELT3, the fourth electrode ELT4 may include at least one conductive material. In one or more embodiments, the fourth electrode ELT4 may include at least one material selected from metals (such as Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Ti, or any alloy thereof), conductive oxides (such as ITO, IZO, ZnO, or ITZO), and conductive polymers (such as PEDOT), but this disclosure is not limited thereto.

[0267] Furthermore, the fourth electrode ELT4 may have a structure similar to that of the first electrode ELT1, the second electrode ELT2_3, and the third electrode ELT3. For example, the fourth electrode ELT4 may also selectively include at least one of the following: at least one transparent electrode layer disposed on the top and / or bottom of the reflective electrode layer; and at least one conductive capping layer covering the top of the reflective electrode layer and / or the transparent electrode layer.

[0268] A first passivation layer PAS1 can be disposed on a region of the first electrode ELT1, a region of the second electrode ELT2_3, a region of the third electrode ELT3, and a region of the fourth electrode ELT4. For example, the first passivation layer PAS1 can be formed to cover a region of the first electrode ELT1, a region of the second electrode ELT2_3, a region of the third electrode ELT3, and a region of the fourth electrode ELT4, and includes openings exposing other regions of the first electrode ELT1, other regions of the second electrode ELT2_3, other regions of the third electrode ELT3, and other regions of the fourth electrode ELT4. Furthermore, the first passivation layer PAS1 can cover a side surface of the second electrode ELT2_3 and a side surface of the fourth electrode ELT4 that face each other, and can be disposed between the second electrode ELT2_3 and the fourth electrode ELT4 (e.g., to provide insulation between the second electrode ELT2_3 and the fourth electrode ELT4).

[0269] The second passivation layer PAS2 can be disposed on top of each of the light-emitting elements LD1 and LD2, exposing the first end EP1 and the second end EP2 of each of the light-emitting elements LD1 and LD2. Alternatively, the second passivation layer PAS2 can be disposed on the first passivation layer PAS1 disposed between the second electrode ELT2_3 and the fourth electrode ELT4. The second passivation layer PAS2 can be disposed between the adjacent second contact electrode CNE2 and the third contact electrode CNE3, so that the second contact electrode CNE2 and the third contact electrode CNE3 are insulated from each other.

[0270] The second contact electrode CNE2 can be disposed on the third electrode ELT3, the fourth electrode ELT4, the second end EP2 of the first light-emitting element LD1, and the first end EP1 of the second light-emitting element LD2. The second contact electrode CNE2 can be electrically connected to the second end EP2 of the first light-emitting element LD1 and the first end EP1 of the second light-emitting element LD2.

[0271] The second contact electrode CNE2 can be disposed on the fourth electrode ELT4 to contact the fourth electrode ELT4. In one or more embodiments, the second contact electrode CNE2 can be disposed on a region of the fourth electrode ELT4 not covered by the first passivation layer PAS1 to contact the fourth electrode ELT4. However, this disclosure is not limited thereto, and the second contact electrode CNE2 can be insulated from the fourth electrode ELT4 by the first passivation layer PAS1. Furthermore, the second contact electrode CNE2 can be disposed on the second end EP2 of the first light-emitting element LD1 adjacent to the fourth electrode ELT4 to contact the second end EP2 of the first light-emitting element LD1. Furthermore, the second contact electrode CNE2 can be disposed on the third electrode ELT3 to contact the third electrode ELT3. In one or more embodiments, the second contact electrode CNE2 can be disposed on a region of the third electrode ELT3 not covered by the first passivation layer PAS1 to contact the third electrode ELT3. Furthermore, the second contact electrode CNE2 can be disposed on the first end EP1 of the second light-emitting element LD2 adjacent to the third electrode ELT3 to contact the first end EP1 of the second light-emitting element LD2.

[0272] The third passivation layer PAS3 can be disposed on the second contact electrode CNE2. Alternatively, the third passivation layer PAS3 can be disposed on the second passivation layer PAS2. The third passivation layer PAS3 can cover both the second contact electrode CNE2 and the second passivation layer PAS2.

[0273] The third contact electrode CNE3 can be disposed on the second electrode ELT2_3 to contact the second electrode ELT2_3. In one or more embodiments, the third contact electrode CNE3 can be disposed on a region of the second electrode ELT2_3 not covered by the first passivation layer PAS1 to contact the second electrode ELT2_3. Furthermore, the third contact electrode CNE3 can be disposed on the second end EP2 of the second light-emitting element LD2 adjacent to the second electrode ELT2_3 to contact the second end EP2 of the second light-emitting element LD2. That is, the third contact electrode CNE3 can be disposed to cover at least one region of the second electrode ELT2_3 corresponding to the second end EP2 of the second light-emitting element LD2.

[0274] In one or more embodiments, although Figure 14A The diagram shows a case where the first contact electrode CNE1 (or the third contact electrode CNE3) and the second contact electrode CNE2 are disposed in different layers and the third passivation layer PAS3 is interposed between them, but the first contact electrode CNE1, the second contact electrode CNE2 and the third contact electrode CNE3 are not limited to this.

[0275] like Figure 14B As shown, for example, as referenced Figure 8B As described, the first contact electrode CNE1 and the second contact electrode CNE2 (or the first contact electrode CNE1, the second contact electrode CNE2 and the third contact electrode CNE3) may be located in the same layer.

[0276] Figure 15 This illustrates one or more embodiments of the present disclosure, including... Figure 5 A plan view of another example of pixels in a display device. Figure 15 The text shows the relationship with... Figure 13 The corresponding pixel is PXL.

[0277] Reference Figure 13 and Figure 15 In addition to the second electrode ELT2_3, Figure 15 The pixel PXL shown can be with Figure 13 The pixels PXL shown are essentially the same or similar. Therefore, repeated descriptions will not be repeated.

[0278] like Figure 15 As shown, the length of the second electrode ELT2_3 can be equal to the length of the first electrode ELT1 (or the third electrode ELT3 or the fourth electrode ELT4). Like the first electrode ELT1, the third electrode ELT3, and the fourth electrode ELT4, the second electrode ELT2_3 can be disposed within the pixel region PXA. After providing and arranging the light-emitting elements LD1 and LD2 within the pixel region PXA (or the light-emitting region EMA), the first electrode ELT1, the second electrode ELT2_3, the third electrode ELT3, and the fourth electrode ELT4 can be cut (or partially removed) outside the dam bank.

[0279] Figure 16 It is shown that it includes Figure 5 A plan view of an example of pixels in a display device. Figure 16 The middle is based on the setting of a light-emitting element LD (or refer to Figure 6D The light-emitting element layer LDL (see the description of light-emitting units EMU1, EMU2, and EMU3) Figure 8A The diagram shows the structure of pixel PXL.

[0280] Reference Figure 16 Pixel PXL can be formed in the pixel region PXA defined on the base layer SUB.

[0281] The pixel PXL may include a first electrode ELT1, a second electrode ELT2, a third electrode ELT3, and a fourth electrode ELT4_1 arranged sequentially along the first direction DR1.

[0282] Each of the first electrode ELT1, the second electrode ELT2, the third electrode ELT3, and the fourth electrode ELT4_1 can extend in a second direction DR2 that intersects the first direction DR1, and the first electrode ELT1, the second electrode ELT2, the third electrode ELT3, and the fourth electrode ELT4_1 can be arranged to be spaced apart from each other along the first direction DR1.

[0283] The first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 are respectively connected to the reference. Figure 7 The first electrode ELT1, the second electrode ELT2, and the third electrode ELT3 are substantially the same or similar, and therefore, repeated descriptions will not be repeated. In one or more embodiments, the fourth electrode ELT4_1 is substantially the same or similar to the third electrode ELT3, except for the arrangement position of the fourth electrode ELT4_1, and therefore, repeated descriptions will not be repeated.

[0284] In some embodiments, pixel PXL may include a first dam pattern PW1 overlapping a region of the first electrode ELT1, a second dam pattern PW2 overlapping a region of the second electrode ELT2, a third dam pattern PW3 overlapping a region of the third electrode ELT3, and a fourth dam pattern PW4 overlapping a region of the fourth electrode ELT4_1. The first dam pattern PW1, the second dam pattern PW2, and the third dam pattern PW3 may be respectively aligned with a reference electrode. Figure 7 The first dam pattern PW1, the second dam pattern PW2, and the third dam pattern PW3 are substantially the same or similar. The fourth electrode ELT4_1 can be disposed on the fourth dam pattern PW4 to protrude in the height direction of the base layer SUB due to the fourth dam pattern PW4.

[0285] Pixel PXL may include a first light-emitting element LD1, a second light-emitting element LD2, and a third light-emitting element LD3. The first light-emitting element LD1 and the second light-emitting element LD2 may be respectively connected to a reference... Figure 7 The first light-emitting element LD1 and the second light-emitting element LD2 are substantially the same or similar, and except for the arrangement of the third light-emitting element LD3, the third light-emitting element LD3 may be substantially the same or similar to the first light-emitting element LD1 or the second light-emitting element LD2.

[0286] The third light-emitting element LD3 can be disposed between the third electrode ELT3 and the fourth electrode ELT4_1. The first end EP1 of the third light-emitting element LD3 can face the third electrode ELT3, and the second end EP2 of the third light-emitting element LD3 can face the fourth electrode ELT4_1. When multiple third light-emitting elements LD3 are provided, the multiple third light-emitting elements LD3 can be connected in parallel between the third electrode ELT3 and the fourth electrode ELT4_1, forming a reference. Figure 6D The second light-emitting unit described is EMU2.

[0287] In some implementations, pixel PXL may include a first contact electrode CNE1, a second contact electrode CNE2_2, a third contact electrode CNE3_2, and a fourth contact electrode CNE4.

[0288] The first contact electrode CNE1 may be formed on at least one region of the first end EP1 of the first light-emitting element LD1 and the first electrode ELT1 corresponding to the first end EP1 of the first light-emitting element LD1, so as to physically connect and / or electrically connect the first end EP1 of the first light-emitting element LD1 to the first electrode ELT1.

[0289] The second contact electrode CNE2_2 can be formed on at least one region of the second end EP2 of the first light-emitting element LD1 and the second electrode ELT2 corresponding to the second end EP2 of the first light-emitting element LD1. Furthermore, the second contact electrode CNE2_2 can extend to the third electrode ELT3 by bypassing the fourth contact electrode CNE4 or the second light-emitting element LD2, and is formed on at least one region of the third electrode ELT3 corresponding to the first end EP1 of the third light-emitting element LD3. The second contact electrode CNE2_2 can be electrically connected to the second end EP2 of the first light-emitting element LD1 and the first end EP1 of the third light-emitting element LD3.

[0290] like Figure 16 As shown, the second contact electrode CNE2_2 can extend from the second electrode ELT2 to the third electrode ELT3 while being adjacent to the lower end of the fourth contact electrode CNE4.

[0291] The third contact electrode CNE3_2 can be formed on at least one region of the third electrode ELT3 corresponding to the first end EP1 of the second light-emitting element LD2. Furthermore, the third contact electrode CNE3_2 can extend to the fourth electrode ELT4_1 by bypassing the second contact electrode CNE2_2 or the third light-emitting element LD3, and can be formed on at least one region of the fourth electrode ELT4_1 corresponding to the second end EP2 of the third light-emitting element LD3. The third contact electrode CNE3_2 can be electrically connected to the second end EP2 of the third light-emitting element LD3 and the first end EP1 of the second light-emitting element LD2.

[0292] like Figure 16As shown, the third contact electrode CNE3_2 can extend from the third electrode ELT3 to the fourth electrode ELT4_1 while being adjacent to the upper end of the second contact electrode CNE2_2 located on the third electrode ELT3.

[0293] The fourth contact electrode CNE4 can be formed on at least one region of the second end EP2 of the second light-emitting element LD2 and the second electrode ELT2 corresponding to the second end EP2 of the second light-emitting element LD2, so as to physically connect and / or electrically connect the second end EP2 of the second light-emitting element LD2 to the second electrode ELT2. Therefore, the first light-emitting element LD1, the third light-emitting element LD3 and the second light-emitting element LD2 can be connected in series between the first electrode ELT1 and the second electrode ELT2 through the first contact electrode CNE1, the second contact electrode CNE2, the third contact electrode CNE3, and the fourth contact electrode CNE4.

[0294] The light-emitting elements LD1, LD2, and LD3 gathered in the pixel region PXA can constitute the light source of the corresponding pixel PXL. In one or more embodiments, when the driving current flows along the third path PATH3, etc., in the pixel PXL during each frame period, the light-emitting elements LD1, LD2, and LD3 connected in the forward direction between the first electrode ELT1 and the second electrode ELT2 of the pixel PXL emit light, and the pixel PXL can emit light with a brightness corresponding to the driving current.

[0295] Figure 17A and Figure 17B This illustrates one or more embodiments of the present disclosure along... Figure 16 A cross-sectional view of an example of pixels captured by line IV-IV' shown. Figure 17A and Figure 17B The text shows the relationship between the two. Figure 8A and Figure 8B The corresponding diagram.

[0296] First, refer to Figure 8A and Figure 17A , Figure 17A The pixel circuit layer shown (e.g., the structure from the first insulating layer INS1 to the protective layer PSV) can be compared with the reference. Figure 8A The pixel circuit layers (PCLs) described are essentially the same or similar. Therefore, repeated descriptions will not be repeated.

[0297] The first dike pattern PW1, the second dike pattern PW2, the third dike pattern PW3, and the fourth dike pattern PW4 can be set in the pixel circuit layer (see reference). Figure 8A On the “PCL” (or protective layer PSV) in the text.

[0298] The first electrode ELT1, the second electrode ELT2, the third electrode ELT3, and the fourth electrode ELT4_1 can be respectively disposed on the top of the first embankment pattern PW1, the second embankment pattern PW2, the third embankment pattern PW3, and the fourth embankment pattern PW4.

[0299] The first passivation layer PAS1 can be disposed on a region of the first electrode ELT1, a region of the second electrode ELT2, the entire region of the third electrode ELT3, and the entire region of the fourth electrode ELT4_1. For example, the first passivation layer PAS1 can be formed to cover a region of the first electrode ELT1, a region of the second electrode ELT2, the entire region of the third electrode ELT3, and the entire region of the fourth electrode ELT4_1, and includes openings exposing other regions of the first electrode ELT1 and other regions of the second electrode ELT2. However, the present invention is not limited thereto. In one or more embodiments, the first passivation layer PAS1 can be disposed on a region of the first electrode ELT1, a region of the second electrode ELT2, a region of the third electrode ELT3, and a region of the fourth electrode ELT4_1. For example, the first passivation layer PAS1 can be formed to cover a region of the first electrode ELT1, a region of the second electrode ELT2, a region of the third electrode ELT3 and a region of the fourth electrode ELT4_1, and includes openings that expose other regions of the first electrode ELT1, other regions of the second electrode ELT2, other regions of the third electrode ELT3 and other regions of the fourth electrode ELT4_1.

[0300] In one or more embodiments, the first passivation layer PAS1 can be initially formed to completely cover the first electrode ELT1, the second electrode ELT2, the third electrode ELT3, and the fourth electrode ELT4_1. After providing and aligning the light-emitting element LD on the first passivation layer PAS1, the first passivation layer PAS1 can be partially opened to expose the first electrode ELT1 and the second electrode ELT2 at the first contact portion and the second contact portion (e.g., a set or predetermined first contact portion and second contact portion), such as... Figure 17A As shown in the diagram. If necessary, the first passivation layer PAS1 can be partially opened to expose the third electrode ELT3 and the fourth electrode ELT4_1.

[0301] For example, in one or more embodiments, the first passivation layer PAS1 is inserted between the first electrode ELT1 and the second electrode ELT2 and the first light-emitting element LD1, between the second electrode ELT2 and the third electrode ELT3 and the second light-emitting element LD2, and between the third electrode ELT3 and the fourth electrode ELT4_1 and the third light-emitting element LD3, and can expose at least one region of each of the first electrode ELT1, the second electrode ELT2, the third electrode ELT3 and the fourth electrode ELT4.

[0302] The first light-emitting element LD1, the second light-emitting element LD2, and the third light-emitting element LD3 can be respectively disposed in the region between the first electrode ELT1, the second electrode ELT2, the third electrode ELT3, and the fourth electrode ELT4_1.

[0303] The second passivation layer PAS2 may be disposed on the first light-emitting element LD1, the second light-emitting element LD2, and the third light-emitting element LD3 (e.g., on the top of the first light-emitting element LD1 aligned between the first electrode ELT1 and the second electrode ELT2, on the top of the second light-emitting element LD2 aligned between the second electrode ELT2 and the third electrode ELT3, and on the top of the third light-emitting element LD3 aligned between the third electrode ELT3 and the fourth electrode ELT4_1), and exposes the first end EP1 and the second end EP2 of each of the first light-emitting element LD1, the second light-emitting element LD2, and the third light-emitting element LD3.

[0304] The second contact electrode CNE2_2 can be disposed on the second electrode ELT2 and the third electrode ELT3, the second end EP2 of the first light-emitting element LD1 and the first end EP1 of the third light-emitting element LD3. The second contact electrode CNE2_2 can be electrically connected to the second end EP2 of the first light-emitting element LD1 and the first end EP1 of the third light-emitting element LD3.

[0305] The second contact electrode CNE2_2 is disposed on the second electrode ELT2 and can be insulated from the second electrode ELT2 through the first passivation layer PAS1. Furthermore, the second contact electrode CNE2_2 can be disposed on the second end EP2 of the first light-emitting element LD1 adjacent to the second electrode ELT2, so as to contact the second end EP2 of the first light-emitting element LD1. Furthermore, the second contact electrode CNE2_2 can be disposed on the third electrode ELT3. Furthermore, the second contact electrode CNE2_2 can be disposed on the first end EP1 of the third light-emitting element LD3 adjacent to the third electrode ELT3, so as to contact the first end EP1 of the third light-emitting element LD3.

[0306] A fourth contact electrode CNE4 can be disposed on the second electrode ELT2 to contact the second electrode ELT2. In an example, the fourth contact electrode CNE4 can be disposed on a region of the second electrode ELT2 not covered by the first passivation layer PAS1 to contact the second electrode ELT2. Furthermore, the fourth contact electrode CNE4 can be disposed on the second end EP2 of the second light-emitting element LD2 adjacent to the second electrode ELT2 to contact the second end EP2 of the second light-emitting element LD2. For example, the fourth contact electrode CNE4 can be disposed to cover at least one region of the second electrode ELT2 corresponding to the second end EP2 of the second light-emitting element LD2.

[0307] The third passivation layer PAS3 can be disposed on the second contact electrode CNE2_2 and the fourth contact electrode CNE4. The third passivation layer PAS3 can cover the second contact electrode CNE2_2 and the fourth contact electrode CNE4.

[0308] The first contact electrode CNE1 may be disposed on the first electrode ELT1 to contact the first electrode ELT1. In one or more embodiments, the first contact electrode CNE1 may be disposed on a region of the first electrode ELT1 not covered by the first passivation layer PAS1 to contact the first electrode ELT1. Furthermore, the first contact electrode CNE1 may be disposed on the first end EP1 of the first light-emitting element LD1 adjacent to the first electrode ELT1 to contact the first end EP1 of the first light-emitting element LD1. For example, the first contact electrode CNE1 may be disposed to cover the first end EP1 of the first light-emitting element LD1 and at least one region of the first electrode ELT1 corresponding to the first end EP1 of the first light-emitting element LD1.

[0309] The third contact electrode CNE3_2 can be disposed on the third electrode ELT3. Furthermore, the third contact electrode CNE3_2 can be disposed on the first end EP1 of the second light-emitting element LD2 adjacent to the third electrode ELT3, so as to contact the first end EP1 of the second light-emitting element LD2. Additionally, the third contact electrode CNE3_2 can be disposed on the fourth electrode ELT4_1, and can be disposed on the second end EP2 of the third light-emitting element LD3 adjacent to the fourth electrode ELT4_1, so as to contact the second end EP2 of the third light-emitting element LD3. For example, the third contact electrode CNE3_2 can be configured to cover the second end EP2 of the third light-emitting element LD3.

[0310] In one or more embodiments, although Figure 17AThe diagram shows a case where the second contact electrode CNE2_2 and the fourth contact electrode CNE4, as well as the first contact electrode CNE1 and the third contact electrode CNE3_2, are disposed in different layers and the third passivation layer PAS3 is interposed between them. However, the first contact electrode CNE1, the second contact electrode CNE2_2, the third contact electrode CNE3_2, and the fourth contact electrode CNE4 are not limited to this.

[0311] In some embodiments, the first contact electrode CNE1, the second contact electrode CNE2_2, the third contact electrode CNE3_2, and the fourth contact electrode CNE4 may be located in the same layer.

[0312] Reference Figure 17B The first contact electrode CNE1, the second contact electrode CNE2_2, the third contact electrode CNE3_2, and the fourth contact electrode CNE4 can be disposed on the first passivation layer PAS1 (and the second passivation layer PAS2). The arrangement (or overlap) relationship between the first contact electrode CNE1, the second contact electrode CNE2_2, the third contact electrode CNE3_2, the fourth contact electrode CNE4, the first electrode ELT1, the second electrode ELT2, the third electrode ELT3, the fourth electrode ELT4_1, and the light-emitting elements LD1, LD2, and LD3 is consistent with the reference... Figure 17A The described arrangement relationships (or overlapping relationships) are essentially the same or similar, and therefore, repeated descriptions will not be repeated.

[0313] The first contact electrode CNE1 and the second contact electrode CNE2_2 can be arranged to be spaced apart from each other on the first light-emitting element LD1, the fourth contact electrode CNE4 and the third contact electrode CNE3_2 can be arranged to be spaced apart from each other on the second light-emitting element LD2, and the second contact electrode CNE2_2 and the third contact electrode CNE3_2 can be arranged to be spaced apart from each other on the third light-emitting element LD3.

[0314] The fourth passivation layer PAS4 can be formed and / or disposed on one surface of the base layer SUB, which has the first electrode ELT1, the second electrode ELT2, the third electrode ELT3 and the fourth electrode ELT4_1, the light-emitting elements LD1, LD2 and LD3, and the first contact electrode CNE1, the second contact electrode CNE2_2, the third contact electrode CNE3_2 and the fourth contact electrode CNE4, to cover the first electrode ELT1, the second electrode ELT2, the third electrode ELT3 and the fourth electrode ELT4_1, the light-emitting elements LD1, LD2 and LD3, and the first contact electrode CNE1, the second contact electrode CNE2_2, the third contact electrode CNE3_2 and the fourth contact electrode CNE4.

[0315] Figure 18 It is shown that it includes Figure 5 A plan view of another example of pixels in a display device. Figure 18 The text shows the relationship with... Figure 16 The corresponding pixel is PXL.

[0316] Reference Figure 16 and Figure 18 Except for the arrangement orientation of the first electrode ELT1_1, the second electrode ELT2_1, the third electrode ELT3_1, and the first light-emitting element LD1, the second light-emitting element LD2, and the third light-emitting element LD3, Figure 18 The pixel PXL shown can be with Figure 16 The pixels PXL shown are essentially the same or similar. Therefore, repeated descriptions will not be repeated.

[0317] Each of the first electrode ELT1_1, the second electrode ELT2_1, the third electrode ELT3_1, and the fourth electrode ELT4_1 may extend in a second direction DR2 that intersects the first direction DR1, and may be configured to be spaced apart from each other along the first direction DR1.

[0318] The length of the first electrode ELT1_1 in the second direction DR2 can be longer than the lengths of each of the second electrode ELT2_1 and the third electrode ELT3_1 in the second direction DR2. For example... Figure 18 As shown, the first electrode ELT1_1 can extend to another pixel region adjacent to pixel region PXA. Although described later, the first electrode ELT1_1 can be connected to a reference. Figure 6A The second power supply VSS (or second power line) is described above, and the second electrode ELT2_1 can be connected to the reference. Figure 6A The first transistor M1 is described in the following description.

[0319] In the manufacturing process of a display device, to arrange the light-emitting elements LD1, LD2, and LD3, an AC voltage can be applied to the first electrode ELT1_1 and the third electrode ELT3_1, and a reference voltage (e.g., ground voltage) can be applied to the second electrode ELT2_1 and the fourth electrode ELT4_1. Therefore, the first light-emitting element LD1 can be arranged such that its first end EP1 faces the second electrode ELT2_1, and its second end EP2 faces the first electrode ELT1_1. Similarly, the second light-emitting element LD2 can be arranged such that its first end EP1 faces the second electrode ELT2_1, and its second end EP2 faces the third electrode ELT3_1. The third light-emitting element LD3 can be arranged such that its first end EP1 faces the fourth electrode ELT4_1, and its second end EP2 faces the third electrode ELT3_1.

[0320] The first contact electrode CNE1 may be formed on at least one region of the first light-emitting element LD1 corresponding to the second end EP2 of the first light-emitting element LD1 and the first electrode ELT1_1, so as to physically connect and / or electrically connect the second end EP2 of the first light-emitting element LD1 to the first electrode ELT1_1.

[0321] The second contact electrode CNE2_2 can be formed on at least one region of the first light-emitting element LD1 at its first end EP1 and on the second electrode ELT2_1 corresponding to the first end EP1 of the first light-emitting element LD1. Furthermore, the second contact electrode CNE2_2 can extend to the third electrode ELT3_1 by bypassing the fourth contact electrode CNE4 or the second light-emitting element LD2, and can be formed on at least one region of the third electrode ELT3_1 corresponding to the second end EP2 of the third light-emitting element LD3. The second contact electrode CNE2_2 can be electrically connected to the first end EP1 of the first light-emitting element LD1 and the second end EP2 of the third light-emitting element LD3.

[0322] The third contact electrode CNE3_2 can be formed on at least one region of the third electrode ELT3_1 corresponding to the second end EP2 of the second light-emitting element LD2. Furthermore, the third contact electrode CNE3_2 can extend to the fourth electrode ELT4_1 by bypassing the second contact electrode CNE2_2 or the third light-emitting element LD3, and can be formed on at least one region of the fourth electrode ELT4_1 corresponding to the first end EP1 of the third light-emitting element LD3. The third contact electrode CNE3_2 can be electrically connected to the first end EP1 of the third light-emitting element LD3 and the second end EP2 of the second light-emitting element LD2.

[0323] The fourth contact electrode CNE4 can be formed on at least one region of the second light-emitting element LD2 corresponding to the first end EP1 of the second light-emitting element LD2 and the second electrode ELT2_1, so as to physically connect and / or electrically connect the first end EP1 of the second light-emitting element LD2 to the second electrode ELT2_1. Therefore, the second light-emitting element LD2, the third light-emitting element LD3 and the first light-emitting element LD1 can be connected in series between the second electrode ELT2_1 and the first electrode ELT1_1 through the fourth contact electrode CNE4, the third contact electrode CNE3_2, the second contact electrode CNE2_2 and the first contact electrode CNE1.

[0324] Therefore, the driving current used to drive pixel PXL can flow along the fourth path PATH4 via the second light-emitting element LD2, the third light-emitting element LD3 and the first light-emitting element LD1.

[0325] Figure 19 It is shown that it includes Figure 5 A plan view of an example of pixels in a display device. Figure 19 The text shows the relationship with... Figure 16 The corresponding pixel is PXL.

[0326] Reference Figure 16 and Figure 19 In addition to the second electrode ELT2_3, the third electrode ELT3_2, the fifth electrode ELT5, and the sixth electrode ELT6, Figure 19 The pixel PXL shown can be with Figure 16 The pixels PXL shown are essentially the same or similar. Therefore, repeated descriptions will not be repeated.

[0327] The fifth electrode ELT5 can extend along the second direction DR2 and can be positioned between the first electrode ELT1 and the second electrode ELT2_3. The fifth electrode ELT5 can be aligned with a reference electrode. Figure 13The fourth electrode, ELT4, is essentially the same or similar. Therefore, a repetitive description will not be repeated.

[0328] For reference Figure 13 As described, Figure 16 The second electrode ELT2 shown is divided into Figure 19 The second electrode ELT2_3 and the fifth electrode ELT5 shown are designed so that even when a short circuit occurs between the second contact electrode CNE2_2 and the second electrode ELT2_3, the first light-emitting element LD1, the second light-emitting element LD2, and the third light-emitting element LD3 can still emit light normally with the desired brightness.

[0329] The sixth electrode, ELT6, can extend along the second direction DR2 and can be positioned between the third electrode, ELT3_2, and the fourth electrode, ELT4_1. Except for its placement, the sixth electrode, ELT6, can be substantially the same as or similar to the fifth electrode, ELT5. Therefore, a repetitive description will not be repeated.

[0330] The sixth electrode ELT6 may overlap with the third embankment pattern PW3. The sixth electrode ELT6 and the third electrode ELT3_2 may be arranged on the third embankment pattern PW3 in a manner in which the sixth electrode ELT6 and the third electrode ELT3_2 face each other, and protrude in the height direction of the base layer SUB due to the third embankment pattern PW3.

[0331] Similar to the fifth electrode ELT5, Figure 16 The third electrode ELT3_2 shown is divided into Figure 19 The third electrode ELT3_2 and the sixth electrode ELT6 shown are such that even if a short circuit occurs between the second contact electrode CNE2_2 and the sixth electrode ELT6 or between the third contact electrode CNE3_2 and the third electrode ELT3_2, the first light-emitting element LD1, the second light-emitting element LD2, and the third light-emitting element LD3 can still emit light normally with the desired brightness.

[0332] Figure 20A and Figure 20B This illustrates one or more embodiments of the present disclosure along... Figure 19 The example cross-sectional view shows a pixel intercepted by the line V-V' shown. Figure 20A and Figure 20B The text shows the relationship between the two. Figure 17A and Figure 17B The corresponding diagram.

[0333] First, refer to Figure 17A and Figure 20A In addition to the second electrode ELT2_3, the third electrode ELT3_2, the fifth electrode ELT5, and the sixth electrode ELT6, Figure 20A The pixels shown can be compared with Figure 17A The pixels shown are essentially the same or similar. Therefore, repeated descriptions will not be repeated.

[0334] The second electrode ELT2_3 and the fifth electrode ELT5 can be disposed on the top of the second embankment pattern PW2. The second electrode ELT2_3 can overlap with one side surface (e.g., the right side surface) of the second embankment pattern PW2 and has the same or similar shape as that side surface. The fifth electrode ELT5 can overlap with the other side surface (e.g., the left side surface) of the second embankment pattern PW2 and has the same or similar shape as that other side surface.

[0335] The third electrode ELT3_2 and the sixth electrode ELT6 can be disposed on top of the third embankment pattern PW3. The third electrode ELT3_2 can overlap with one side surface (e.g., the left side surface) of the third embankment pattern PW3 and has the same or similar shape as that side surface of the second embankment pattern PW2. The sixth electrode ELT6 can overlap with the other side surface (e.g., the right side surface) of the third embankment pattern PW3 and has the same or similar shape as that other side surface of the third embankment pattern PW3.

[0336] The first passivation layer PAS1 can be disposed on a region of the first electrode ELT1, a region of the second electrode ELT2_3, a region of the third electrode ELT3_2, a region of the fourth electrode ELT4_1, a region of the fifth electrode ELT5, and a region of the sixth electrode ELT6. For example, the first passivation layer PAS1 can be formed to cover a region of the first electrode ELT1, a region of the second electrode ELT2_3, a region of the third electrode ELT3_2, a region of the fourth electrode ELT4_1, a region of the fifth electrode ELT5, and a region of the sixth electrode ELT6, and can include openings exposing other regions of the first electrode ELT1, other regions of the second electrode ELT2_3, other regions of the third electrode ELT3_2, other regions of the fourth electrode ELT4_1, other regions of the fifth electrode ELT5, and other regions of the sixth electrode ELT6. Furthermore, the first passivation layer PAS1 can cover one side surface of the second electrode ELT2_3 and one side surface of the fifth electrode ELT5, and can be disposed between the second electrode ELT2_3 and the fifth electrode ELT5. Additionally, the first passivation layer PAS1 can cover one side surface of the third electrode ELT3_2 and one side surface of the sixth electrode ELT6, which face each other, and can be disposed between the third electrode ELT3_2 and the sixth electrode ELT6.

[0337] The second passivation layer PAS2 can be disposed on top of each of the light-emitting elements LD1, LD2, and LD3, and can expose the first end EP1 and the second end EP2 of each of the light-emitting elements LD1, LD2, and LD3. Furthermore, the second passivation layer PAS2 can be disposed on the first passivation layer PAS1 disposed between the second electrode ELT2_3 and the fifth electrode ELT5. The second passivation layer PAS2 can be disposed between the adjacent second contact electrode CNE2_2 and the fourth contact electrode CNE4, so that the second contact electrode CNE2_2 and the fourth contact electrode CNE4 are insulated from each other. Additionally, the second passivation layer PAS2 can also be disposed on the first passivation layer PAS1 disposed between the third electrode ELT3_2 and the sixth electrode ELT6. The second passivation layer PAS2 can be disposed between the adjacent second contact electrode CNE2_2 and the third contact electrode CNE3_2, so that the second contact electrode CNE2_2 and the third contact electrode CNE3_2 are insulated from each other.

[0338] In one or more embodiments, although Figure 20A The diagram shows a case where the second contact electrode CNE2_2 and the fourth contact electrode CNE4, as well as the first contact electrode CNE1 and the third contact electrode CNE3_2, are disposed in different layers and the third passivation layer PAS3 is interposed between them. However, the first contact electrode CNE1, the second contact electrode CNE2_2, the third contact electrode CNE3_2, and the fourth contact electrode CNE4 are not limited to this.

[0339] For example, such as Figure 20B As shown, the first contact electrode CNE1, the second contact electrode CNE2_2, the third contact electrode CNE3_2, and the fourth contact electrode CNE4 can be located in the same layer. The first contact electrode CNE1, the second contact electrode CNE2_2, the third contact electrode CNE3_2, the fourth contact electrode CNE4, and the fourth passivation layer PAS4 can be respectively applied to... Figure 17B The first contact electrode CNE1, the second contact electrode CNE2_2, the third contact electrode CNE3_2, and the fourth contact electrode CNE4, as well as the fourth passivation layer PAS4, are substantially the same or similar.

[0340] In this disclosure, the display device includes a first light-emitting element and a second light-emitting element, which are respectively disposed between a first electrode to a third electrode arranged in sequence. The first and second light-emitting elements are arranged such that the second ends of the first and second light-emitting elements face each other and a second electrode is inserted between them. The second ends of the first and second light-emitting elements are connected by contact electrodes arranged in such a way that contact electrodes surround at least a portion of the second light-emitting element. Therefore, the first and second light-emitting elements, arranged in different directions, are connected in series, which can improve the emission efficiency of the display device.

[0341] Furthermore, because the second electrode is divided into two separate sub-electrodes, the first and second light-emitting elements can still emit light at the desired brightness even when a short circuit occurs between the contact electrode and the second electrode. Therefore, display defects in the display device can be reduced.

[0342] One or more embodiments have been disclosed herein, and although specific terminology has been used, it is used and interpreted in a general and descriptive sense only and not for limiting purposes. In some instances, it will be apparent to those skilled in the art that features, characteristics, and / or elements described in connection with particular embodiments may be used alone or in combination with features, characteristics, and / or elements described in connection with other embodiments, unless otherwise specifically stated. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope of this disclosure as set forth in the appended claims.

Claims

1. A display device, including: substrate; A first electrode, a second electrode, and a third electrode are located on the substrate, and the first electrode, the second electrode, and the third electrode are arranged sequentially along a first direction; At least one first light-emitting element is located between the first electrode and the second electrode; At least one second light-emitting element is located between the second electrode and the third electrode; A first contact electrode overlaps with one end of the first electrode and the at least one first light-emitting element, and the first contact electrode is in contact with the one end of the first electrode and the at least one first light-emitting element; The second contact electrode overlaps with the other end of the at least one first light-emitting element, and the second contact electrode is in contact with the other end of the at least one first light-emitting element; as well as A third contact electrode overlaps with the second electrode and the other end of the at least one second light-emitting element, and the third contact electrode is in contact with the other end of the second electrode and the at least one second light-emitting element. The second contact electrode extends around the third contact electrode, overlaps with one end of the third electrode and one end of the at least one second light-emitting element, and contacts one end of the at least one second light-emitting element.

2. The display device according to claim 1, wherein, The other end of the at least one first light-emitting element and the other end of the at least one second light-emitting element comprise semiconductor layers of the same type and face each other, with the second electrode inserted between them.

3. The display device according to claim 1, wherein, The at least one first light-emitting element and the at least one second light-emitting element are connected in series between the first electrode and the second electrode.

4. The display device according to claim 1, wherein, On a plane, the second contact electrode is spaced apart from the third contact electrode, and the second contact electrode surrounds at least a portion of the third contact electrode.

5. The display device according to claim 4, wherein, The second contact electrode has a closed loop.

6. The display device according to claim 1, wherein, Each of the first electrode, the second electrode, and the third electrode extends in a second direction intersecting the first direction, and The length of the second electrode in the second direction is longer than the length of the first electrode in the second direction.

7. The display device of claim 6, further comprising a dam extending along the edge of the light-emitting region of the substrate, the dam defining the light-emitting region. in, The first contact electrode, the second contact electrode, and the third contact electrode are located at the light-emitting area, and The first electrode, the second electrode, and the third electrode overlap with the embankment.

8. The display device according to claim 1, further comprising: Transistors are located on the substrate; as well as Electric power lines are located on the substrate. The first electrode overlaps with the transistor and is connected to one electrode of the transistor. Wherein, the second electrode overlaps with and is connected to the electric field line, and The third electrode is insulated from the transistor and the power line.

9. The display device according to claim 8, wherein, The first contact electrode and the second contact electrode are located in different layers, and at least one insulating layer is inserted between the first contact electrode and the second contact electrode.

10. The display device according to claim 8, wherein, The first contact electrode, the second contact electrode, and the third contact electrode are located in the same layer.

11. The display device according to claim 1, further comprising: Transistors are located on the substrate; as well as Electric power lines are located on the substrate. The first electrode overlaps with and is connected to the electric field line. Wherein, the second electrode overlaps with the transistor and is connected to one electrode of the transistor, and The third electrode is insulated from the transistor and the power line.

12. The display device according to claim 1, further comprising a fourth electrode located between the first electrode and the second electrode. in, The at least one first light-emitting element is located between the first electrode and the fourth electrode, and The second contact electrode overlaps with the fourth electrode.

13. The display device according to claim 12, wherein, The width of each of the second electrode and the fourth electrode in the first direction is smaller than the width of the first electrode in the first direction.

14. The display device according to claim 12, wherein, The second contact electrode is in contact with the fourth electrode.

15. A display device, including: substrate; A first electrode, a second electrode, a third electrode, and a fourth electrode are located on the substrate, and the first electrode, the second electrode, the third electrode, and the fourth electrode are arranged sequentially along a first direction; At least one first light-emitting element is located between the first electrode and the second electrode; At least one second light-emitting element is located between the second electrode and the third electrode; At least one third light-emitting element is located between the third electrode and the fourth electrode; A first contact electrode overlaps with one end of the first electrode and the at least one first light-emitting element, and the first contact electrode is in contact with the one end of the first electrode and the at least one first light-emitting element; The second contact electrode overlaps with the other end of the at least one first light-emitting element, and the second contact electrode is in contact with the other end of the at least one first light-emitting element; A third contact electrode overlaps with the other end of the second electrode and the at least one second light-emitting element, and the third contact electrode is in contact with the other end of the second electrode and the at least one second light-emitting element; as well as A fourth contact electrode overlaps with the other end of the fourth electrode and the at least one third light-emitting element, and the fourth contact electrode is in contact with the other end of the at least one third light-emitting element. Wherein, the second contact electrode extends around the third contact electrode, overlaps with one end of the at least one third light-emitting element, and contacts the one end of the at least one third light-emitting element, and The fourth contact electrode extends around the second contact electrode, overlaps with one end of the at least one second light-emitting element, and contacts the one end of the at least one second light-emitting element.

16. The display device according to claim 15, wherein, The other ends of the at least one first light-emitting element and the other ends of the at least one second light-emitting element comprise semiconductor layers of the same type and face each other, with the second electrode interposed between them. Wherein, one end of the at least one second light-emitting element and one end of the at least one third light-emitting element comprise semiconductor layers of the same type and face each other, and the third electrode is inserted between them.

17. The display device according to claim 16, wherein, The at least one first light-emitting element, the at least one second light-emitting element, and the at least one third light-emitting element are connected in series between the first electrode and the second electrode.

18. The display device according to claim 15, wherein, The second contact electrode extends from the second electrode to the third electrode, adjacent to one end of the third contact electrode, and The fourth contact electrode extends from the third contact electrode to the third electrode while being adjacent to the other end of the third contact electrode.

19. The display device of claim 15, further comprising a fifth electrode located between the first electrode and the second electrode. in, The at least one first light-emitting element is located between the first electrode and the fifth electrode, and The second contact electrode overlaps with the fifth electrode.

20. The display device of claim 19, further comprising a sixth electrode located between the third electrode and the fourth electrode. in, The at least one third light-emitting element is located between the sixth electrode and the fourth electrode, and The second contact electrode overlaps with the sixth electrode.

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