Method of processing a wafer

Abstract

A wafer processing method is provided which forms a division starting point without deteriorating productivity and destroys circuit information related to a TEG. A method of dividing a wafer in which respective regions of a front surface divided by a plurality of division predetermined lines locally formed with intersections of a test metal pattern are formed with devices, respectively, into individual device chips includes a first modification layer forming step of irradiating laser light of a wavelength having permeability to the wafer with a focus point of the laser light positioned at a first depth to form a first modification layer along a division predetermined line, and a second modification layer forming step of irradiating the laser light with the focus point of the laser light positioned at a second depth shallower than the first depth to form a second modification layer along the same division predetermined line. In the second modification layer forming step, the focus point of the laser light is positioned so as to partially overlap the first modification layer so that the laser light irradiated later scatters at the first modification layer to destroy circuit information of the test metal pattern.

Description

Technical Field

[0001] The present invention relates to a method for processing wafers, wherein a wafer having devices formed in different regions of the front side divided by multiple intersecting predetermined dividing lines is divided into individual device chips, wherein the predetermined dividing lines are locally formed with test metal patterns. Background Technology

[0002] A wafer with multiple devices such as ICs and LSIs formed on its front side by multiple intersecting pre-defined dividing lines is divided into individual device chips by a dicing device. The resulting device chips are used in electronic devices such as mobile phones and personal computers.

[0003] Furthermore, a wafer processing method is proposed, which performs the following steps when dividing a wafer, which has a test metal pattern called TEG (Test Element Group) formed along a portion of a predetermined dividing line for inspecting the characteristics of a device, into individual device chips: a TEG removal step, in which the TEG is removed from the front side of the wafer by a cutting tool or by irradiation with a laser beam in a manner that does not leave any residual circuit information, including the wiring connecting the TEG to the device; after the TEG removal step, a process of forming a modified layer or dividing groove as the dividing starting point is performed along the predetermined dividing line by laser processing or cutting processing (for example, see Patent Documents 1 and 2).

[0004] Patent Document 1: Japanese Patent Application Publication No. 2015-72986

[0005] Patent Document 2: Japanese Patent Application Publication No. 2005-21940

[0006] When wafers are divided into individual device chips using the aforementioned existing technology, after the TEG removal process is performed, the wafers need to be re-processed to form the dicing start point or dicing groove, which results in poor productivity. Summary of the Invention

[0007] Therefore, the object of the present invention is to provide a wafer processing method that can form a dicing start point and destroy circuit information connected to the TEG without degrading productivity.

[0008] According to the present invention, a wafer processing method is provided, which divides a wafer on the front side, in which devices are formed respectively, into individual device chips in regions divided by multiple intersecting predetermined dividing lines, wherein the predetermined dividing lines are locally formed with test metal patterns for connection to circuit information. The wafer processing method includes the following steps: a wafer holding step, in which the front side of the wafer with the devices formed is held using a chuck stage, exposing the back side of the wafer; a first modifier layer forming step, in which a laser beam of a wavelength transparent to the wafer is positioned at a first depth from the back side of the wafer and irradiated with the laser beam, forming a first modifier layer along the predetermined dividing lines; and a second modifier layer forming step, in which, after performing the first modifier layer forming step, the laser beam of .... The back side of the wafer is positioned at a second depth shallower than the first depth and irradiated with the laser beam, forming a second modified layer along the predetermined dividing line; and a dividing process, after the first modified layer forming process and the second modified layer forming process are performed, an external force is applied to the wafer to divide the wafer into individual device chips starting from the first modified layer and the second modified layer formed inside the predetermined dividing line, in the second modified layer forming process, the laser beam is positioned and irradiated in such a way that a portion of the focal point of the laser beam irradiated in the second modified layer forming process overlaps with the first modified layer, so that the laser beam irradiated in the second modified layer forming process is scattered at the previously formed first modified layer and destroys the circuit information of the test metal pattern.

[0009] Preferably, in the first modified layer forming process and the second modified layer forming process, the light spot shape of the focusing point is formed into an ellipse and the major axis of the ellipse is positioned along the predetermined dividing line.

[0010] According to the present invention, the area containing circuit information, including wiring connecting test metal patterns and devices, can be destroyed while forming the modified layer as the starting point for segmentation, thus solving the problem of poor productivity. Attached Figure Description

[0011] Figure 1 This is a perspective view showing a method of attaching a protective tape to a wafer processed in this embodiment.

[0012] Figure 2 (a) is a perspective view showing the manner in which a wafer is placed on the chuck stage of a laser processing apparatus. Figure 2 (b) is a perspective view showing the method of performing the modification layer formation process on the wafer.

[0013] Figure 3 (a) is in the implementation Figure 2 The cross-sectional view shown is an enlarged view of a portion of the wafer during the formation of the first modified layer in the modified layer formation process. Figure 3 (b) is in the implementation Figure 2 The cross-sectional view shown is an enlarged view of a portion of the wafer during the formation of the second modified layer in the modified layer formation process. Figure 3 (c) is in the implementation Figure 2 The cross-sectional view shown is an enlarged view of a portion of the wafer during the formation of the third modified layer in the modified layer formation process.

[0014] Figure 4 It is a three-dimensional view of a wafer with a modified layer.

[0015] Figure 5 (a) is a perspective view showing the manner in which a wafer is placed on the chuck table of a grinding apparatus. Figure 5 (b) is a perspective view showing the manner in which the segmentation process is performed. Figure 5 (c) is a three-dimensional view showing the state of a wafer being divided into individual device chips through a dicing process.

[0016] Figure 6 This is a perspective view showing how the protective strip is peeled off from a wafer that has undergone a dicing process.

[0017] Figure 7 (a) is a perspective view illustrating how the protective tape is peeled off from the wafer in other embodiments of the dicing process. Figure 7 (b) is a perspective view showing how the wafer is divided into individual device chips by extending the adhesive tape holding the wafer.

[0018] Label Explanation

[0019] 10: Wafer; 10a: Front side; 10b: Back side; 12: Device; 14: Pre-cut dividing line; 16: TEG; 20: Protective strip; 30: Laser processing device; 32: Chuck stage; 34: Laser beam irradiation unit; 100: Modified layer; 100a: First modified layer; 100b: Second modified layer; 100c: Third modified layer; LB: Laser beam; LB1, LB2: Scattered light; Q1, Q2: Circuit information. Detailed Implementation

[0020] Hereinafter, a wafer processing method according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

[0021] The workpiece processed in the wafer processing method of this embodiment is, for example, such as... Figure 1The wafer 10 shown is divided by multiple intersecting pre-defined dividing lines 14, on which a plurality of devices 12 are formed. The wafer 10 is, for example, a silicon (Si) wafer with a diameter of 300 mm and a thickness of 780 μm. As shown in the right-hand view, a portion of the pre-defined dividing lines 14 on the front side 10a of the wafer 10 is enlarged, a test element group (hereinafter referred to as "TEG") 16, which serves as a test metal pattern, is formed on the pre-defined dividing lines 14. The TEG 16 is an electrode used to inspect the characteristics of the devices 12. The TEG 16 and the devices 12 are electrically connected internally near the front side 10a of the wafer 10 to form circuit information.

[0022] In this embodiment, when the wafer 10 is divided into individual device chips, a modification layer formation process is performed as follows: a modification layer is formed inside the wafer 10 along the predetermined dividing line 14.

[0023] During the modification layer formation process, a protective tape 20 is prepared, for example, with the same outer diameter as the wafer 10 and with an adhesive attached to its surface. The protective tape 20 is made of, for example, PVC, PET, etc. The protective tape 20 is then bonded to the front side 10a of the wafer 10 for integration. Furthermore, the method of protecting the front side 10a of the wafer 10 with the protective tape 20 is not limited to... Figure 1 In the described embodiments, for example, the wafer 10 may be positioned in the opening of an annular frame, and the frame may hold the wafer 10 by means of a protective strip of a size that can be attached to the frame.

[0024] As described above, the chip 10, which is integrated with the protective band 20, is transported to... Figure 2 In the laser processing apparatus 30 shown (only a portion is shown), such as Figure 2 As shown in (a), the wafer 10 is placed and held on the holding surface 32a of the chuck stage 32 with the back side 10b of the wafer 10 facing upwards and the protective strip 20 side facing downwards. Figure 2 As shown in (b), a laser beam irradiation unit 34 is provided in the laser processing apparatus 30. The laser beam irradiation unit 34 has an optical system including a laser oscillator (not shown) and is capable of irradiating a laser beam LB with a wavelength (e.g., 1342 nm) that is transparent to the silicon (Si) constituting the wafer 10. Furthermore, the chuck stage 32 can be moved in the X-axis direction indicated by arrow X and the Y-axis direction indicated by arrow Y via a moving mechanism (not shown), and the chuck stage 32 can also be rotated.

[0025] After holding the wafer 10 on the chuck stage 32, an alignment process is performed using an imaging unit (not shown) to detect the pre-defined dividing lines 14 formed on the front side 10a from the back side 10b of the wafer 10. This imaging unit, for example, includes an infrared illumination unit and an infrared CCD, and is capable of capturing images from the back side 10b through the front side 10a of the wafer 10.

[0026] Based on the position of the pre-defined dividing line 14 detected by the alignment process, the chuck stage 32 is moved directly below the laser beam irradiation unit 34, positioning the pre-defined dividing line 14 of the wafer 10 at a predetermined position along the X-axis. Next, the focusing point of the laser beam LB irradiated from the laser beam irradiation unit 34 is positioned inside the predetermined dividing line 14 for irradiation, and the chuck stage 32 is moved along the X-axis to form a modified layer 100 along the pre-defined dividing line 14. The laser processing for forming the modified layer 100 described above will be detailed below.

[0027] When forming the modified layer 100 in the modified layer forming process, firstly, as follows: Figure 3 As shown in (a), the center of the focusing point P1 is positioned inside the predetermined dividing line 14 and near the front side 10a of the wafer 10 where the TEG 16 is formed, at a depth of, for example, 700 μm when viewed from the back side 10b. Next, the laser beam irradiation unit 34 is activated to irradiate a laser beam LB of a wavelength that is transparent to the wafer 10 made of silicon (Si), and the chuck stage 32 is moved along... Figure 2 The direction of arrow X shown in (b) is (in contrast to) Figure 3 The first modified layer 100a is formed by moving the image (a) perpendicular to the plane of the image. Since the focusing point of the laser beam LB irradiated from the laser beam irradiation unit 34 extends in the thickness direction (depth direction) of the wafer 10 due to the spherical aberration of the optical system constituting the laser beam irradiation unit 34, a first modified layer 100a with a certain length along the thickness direction is formed inside the wafer 10. Furthermore, as... Figure 3 As shown in (a), circuit information Q1 and Q2 are formed inside near the front side 10a of the wafer 10. The circuit information Q1 and Q2 includes wiring that connects the TEG 16, which is arranged along the partition line 14, to the device 12.

[0028] The shape of the spot S of the laser beam LB irradiated by the laser beam irradiation unit 34 in this embodiment is as follows: Figure 2As shown in the enlarged view at the upper right of (b), it is formed into an elliptical shape with its major axis positioned along the predetermined dividing line 14. In such a case where the spot S at the focusing point of the laser beam LB is elliptical, this can be achieved, for example, by equipping the optical system transmitting the laser beam LB with a beam expander and an ellipse trimmer (both omitted from the diagram). The beam expander expands the small circular spot formed when the laser beam LB is focused at the focusing point into a large circular spot, and the ellipse trimmer deforms this expanded circular spot into an elliptical spot S.

[0029] Furthermore, the laser processing conditions in the modified layer formation process implemented in this embodiment are as follows, for example.

[0030] Wavelength: 1342nm

[0031] Repetition frequency: 60kHz

[0032] Average output: 1.6W

[0033] Machining feed rate: 300 mm / s

[0034] Focusing point positions (depth): 700μm (P1), 500μm (P2), 300μm (P3)

[0035] After the first modified layer 100a is formed as described above, as Figure 3 As shown in (b), the center of the focusing point P2 is positioned inside and close to the first modified layer 100a along the predetermined dividing line 14 where the first modified layer 100a was first formed, for example, at a depth of 500 μm when viewed from the back side 10b. At this time, irradiation is performed such that a portion of the focusing point P2 of the laser beam LB overlaps with the first modified layer 100a, and the chuck stage 32 is moved along... Figure 2 The direction of arrow X shown in (b) is (in contrast to) Figure 3 The laser beam LB is moved in the direction perpendicular to the plane of (b) to form the second modified layer 100b. When the laser beam LB is irradiated in such a way that a portion of the focusing point P2 overlaps with the previously formed first modified layer 100a in the vertical direction, the laser beam LB is scattered by the first modified layer 100a, as shown below. Figure 3As shown in (b), scattered light LB1 is formed in the outward direction of the first modified layer 100a. This scattered light LB1 irradiates circuit information Q1 and Q2, including the wiring connecting TEG 16 and device 12, thereby destroying the circuit information Q1 and Q2. In addition, the average output range of the irradiated laser light LB is set such that the second modified layer 100b is formed inside the wafer 10 along the predetermined dividing line 14, while the circuit information Q1 and Q2 are destroyed by the scattered light LB1, and the destroyed area remains inside along the predetermined dividing line 14, and the destruction does not affect device 12.

[0036] After the second modified layer 100b is formed as described above, as Figure 3 As shown in (c), the focusing point P3 is positioned inside the predetermined dividing line 14 along which the first modified layer 100a and the second modified layer 100b are formed, and close to the position of the first formed second modified layer 100b, at a depth of 300 μm as viewed from the back side 10b. Then, irradiation is performed such that a portion of the focusing point P3 of the laser beam LB overlaps with the second modified layer 100b, and the chuck stage 32 is moved along... Figure 2 The direction of arrow X shown in (b) is (in contrast to) Figure 3 The laser beam LB moves in the direction perpendicular to the plane of (c) to form the third modified layer 100c. By irradiating the second modified layer 100b in such a way that a portion of the focusing point P3 overlaps with the previously formed second modified layer 100b in the vertical direction, the laser beam LB is scattered by the second modified layer 100b to form scattered light LB2 directed outwards from the second modified layer 100b. This scattered light LB2 also reaches the circuit information Q1 and Q2, including the wiring connecting TEG 16 and device 12, further disrupting the circuit information Q1 and Q2. The average output range of the irradiated laser beam LB is set such that the circuit information Q1 and Q2 are disrupted while the third modified layer 100c is being formed; this disruption remains within the predetermined dividing line 14, affecting devices 12 but not directly.

[0037] As described above, by performing a modification layer forming process in which a modification layer 100, including a first modification layer 100a, a second modification layer 100b, and a third modification layer 100c, is formed inside along a predetermined dividing line 14, circuit information Q1 and Q2, including the wiring connecting the TEG 16 formed along the predetermined dividing line 14 to the device 12, is destroyed. After the modification layer 100 is formed relative to the predetermined dividing line 14, by moving the chuck stage 32, the irradiation position of the laser beam LB is... Figure 2In (b), the wafer is moved along the Y-axis direction (indexing feed) as indicated by arrow Y. A modified layer 100 is formed on the unprocessed pre-division lines 14 adjacent to the predetermined division line 14, as described above, and the circuit information Q1 and Q2 related to the TEG 16 formed along the division line 14 is destroyed. Then, after forming the modified layer 100 along all the division lines 14 parallel to the predetermined division line 14 and destroying the circuit information Q1 and Q2, the wafer 10 is rotated 90 degrees together with the chuck stage 32. The same laser processing is performed on all the division lines 14 in the direction perpendicular to the predetermined division line 14, forming the modified layer 100 and destroying the circuit information Q1 and Q2 related to the TEG 16 formed along the division line 14 (see reference). Figure 4 The above completes the process of forming the modified layer.

[0038] Furthermore, in the modified layer formation process of the above embodiment, the modified layer 100 is formed by the first modified layer 100a, the second modified layer 100b, and the third modified layer 100c, but the present invention is not limited thereto. For example, if the circuit information Q1 and Q2 can be sufficiently destroyed by the first modified layer 100a and the second modified layer 100b, and the segmentation process described later can be performed with the modified layer 100 as the segmentation starting point, the modified layer 100 can be formed by only the first modified layer 100a and the second modified layer 100b. In addition, modified layers can be further formed on the basis of the first modified layer 100a, the second modified layer 100b, and the third modified layer 100c.

[0039] After performing the above-described modification layer formation process, a dicing process is performed as follows: an external force is applied to the wafer 10, and the wafer 10 is diced into individual device chips, starting from the modification layer 100 formed inside the dicing predetermined line 14. The implementation method of the dicing process will be described below.

[0040] like Figure 5 As shown in (a), a wafer 10 with a modified layer 100 is transported to a grinding apparatus 40 (only a portion is shown) that functions as an external force application unit, with the back surface 10b of the wafer 10 facing upward and the protective band 20 side facing downward, so that the wafer 10 is placed and attracted and held on the holding surface 42a of the chuck stage 42 provided in the grinding apparatus 40.

[0041] like Figure 5As shown in (b), the grinding apparatus 40 includes a grinding unit 44. The grinding unit 44 includes a rotatably mounted spindle 44a and a servo motor (not shown) serving as the drive source for rotating the spindle 44a. A disc-shaped mounting base 44b is provided at the lower end of the spindle 44a, and a grinding wheel 44c is mounted on the lower surface of the mounting base 44b. Furthermore, a plurality of grinding tools 44d are arranged in a ring on the lower surface of the grinding wheel 44c.

[0042] When implementing the segmentation process of this embodiment, such as Figure 5 As shown in (b), the wafer 10, held in the chuck stage 42, is positioned below the grinding unit 44. Next, the chuck stage 42 is rotated in the direction indicated by arrow R1 at a speed of, for example, 300 rpm, and the spindle 44a is rotated in the direction indicated by arrow R2 at a speed of, for example, 6000 rpm. Then, a grinding feed unit (not shown) is activated, causing the grinding unit 44 to descend in the direction indicated by arrow R3 and come into contact with the back surface 10b of the wafer 10. The grinding feed rate when the grinding wheel 44d of the grinding unit 44 comes into contact with the back surface 10b of the wafer 10 and grinds the back surface 10b is set to, for example, 0.1 μm / s. By performing the grinding process in this way, as... Figure 5 As shown in (c), the back side 10b of the wafer 10 is ground and an external force is applied to the wafer 10. The wafer 10 is divided into individual device chips 12' along the predetermined dividing line 14 with the modified layer 100 as the dividing starting point, and the dividing process is completed.

[0043] After the dicing process described above, a tape replacement process is performed as needed: the protective tape 20 adhered to the front side 10a of the wafer 10 is peeled off, and the back side 10b is held in place by the adhesive tape T. During the tape replacement process, as follows... Figure 6 As shown, a ring-shaped frame F with an opening for receiving a wafer 10 is prepared. The wafer 10 is positioned in the opening of the frame F with the side to which the protective tape 20 is attached facing upwards. The frame F holds the wafer 10 in place using an adhesive tape T. After attaching the back side 10b of the wafer 10 to the adhesive tape T, the protective tape 20 is peeled off from the front side 10a of the wafer 10. The wafer 10, held by the frame F and with the protective tape 20 removed, is either stored in a storage unit (e.g., a cassette) (not shown) or directly transported to the next process (e.g., a pick-up process).

[0044] The dicing process of applying external force to the wafer 10 and dividing the wafer 10 into individual device chips with the modified layer 100 formed inside the dicing predetermined line 14 as the dicing starting point is not limited to the above embodiment, and can also be implemented by other embodiments shown below.

[0045] In other implementations of the segmentation process, such as Figure 7 As shown in (a), an annular frame F with an opening capable of receiving the wafer 10 is prepared. The wafer 10 is positioned in the opening of the frame F with the side to which the protective tape 20 is attached facing upwards, and the frame F holds the wafer 10 in place by means of an adhesive tape T. Next, the protective tape 20 is peeled off, and then the adhesive tape T is extended in the direction indicated by arrow R4 to divide the wafer 10 into individual device chips 12' starting from the modified layer 100 formed along the predetermined dividing line 14. The dividing process is then completed, and the wafer 10 divided into individual device chips 12' is stored in a storage unit (e.g., a cassette) (not shown) or transported to the next process (e.g., a pick-up process).

[0046] According to this embodiment, a modified layer 100 that serves as the starting point for segmentation can be formed, and circuit information Q1 and Q2, including wiring connecting TEG16 and device 12, can be destroyed, thus solving the problem of poor productivity.

Claims

1. A method for processing a wafer, comprising dividing the wafer into individual device chips, wherein multiple devices are formed on the front side of the wafer by dividing predetermined lines, the dividing predetermined lines having a test metal pattern, and circuit information for electrically connecting the test metal pattern and adjacent devices near the front side of the wafer being formed inside the dividing predetermined lines, wherein... The wafer fabrication method includes at least the following steps: In the modified layer formation process, a focal point of laser light of a wavelength transparent to the wafer is positioned at a predetermined depth on the back side of the wafer and irradiated, thereby forming multiple modified layers overlapping in the vertical direction along a predetermined dividing line; and The dicing process involves applying external force to the wafer to divide it into individual device chips, starting from the modified layer formed inside the predetermined dicing lines. In the modification layer formation process, the focal point of the laser beam irradiated afterward is positioned to partially overlap with the previously formed modification layer in the vertical direction. The average output range of the laser beam during irradiation is set such that while the modification layer is formed at the focal point, the laser beam irradiated afterward is scattered by the modification layer previously formed along the predetermined dividing line to form scattered light. The scattered light destroys the circuit information connecting the test metal pattern and the device formed near the front side of the wafer, and does not damage the device adjacent to the irradiation position of the laser beam. Thus, while forming the modification layer as the dividing starting point, the scattered light destroys the area containing the circuit information including the wiring connecting the test metal pattern and the device.

2. The wafer processing method according to claim 1, wherein, The spot shape of the laser beam irradiated during the modified layer formation process is elliptical, and the major axis of the ellipse is positioned along the predetermined dividing line.

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