Defect Classification and Source Analysis of Semiconductor Devices

Abstract

Defects on a substrate containing electronic components may be classified using a computational defect analysis system, which may be implemented in multiple stages. For example, a first stage classification engine may process metrology data to produce an initial classification of defects. A second stage classification engine may utilize the initial classification, as well as manufacturing information and / or prior defect knowledge, to output a probability of the defect being caused by one or more potential sources.

Description

[0001] Incorporated by Reference

[0002] The PCT application form is filed concurrently with this specification as a part of this application. Each application to which this application claims the benefit or priority as identified in the concurrently filed PCT application form is incorporated herein by reference in its entirety and for all purposes. Background Art

[0003] Particles and metal contamination on process wafers are the leading cause of product failures. Driven by smaller and smaller technology nodes, semiconductor device processing systems continue to evolve. New process systems require new hardware components, increasingly complex assemblies, new manufacturing methods, and tight control of cleaning and handling techniques. The introduction of new components can be a major source of particles on the wafer. In addition, changes in existing process conditions can lead to particle generation. Particles can cause device defects, which reduce yield and require analysis and resources (which can be better used elsewhere).

[0004] The descriptions of background and context contained herein are provided only for the purpose of presenting the context of the disclosure as a whole. Many of the present inventions are the work of the inventors, and simply because such work is described in the background section or presented as context elsewhere in this article, it does not mean that it is considered to be prior art. Summary of the invention

[0005] Disclosed herein are defect classification methods and systems that use machine learning, deep learning, and / or other computational techniques to analyze defect composition, morphology, wafer pattern spectra, etc., and selectively combine the resulting analysis with: prior knowledge of defect distribution at the room and / or fleet level, and other information, such as component manufacturing data, component composition data, material and manufacturing information, and other tool or platform level data. By combining different inputs and analyzing the prior distribution, a refined and accurate posterior distribution can be predicted. This analysis can be performed at multiple levels or stages. After each level of analysis, the defect classification accuracy can be significantly improved.

[0006] In one aspect of the embodiments herein, a defect analysis computing system is provided, the system having the following features: (a) one or more processors; and (b) program instructions for execution on the one or more processors, such program instructions comprising: one or more first-stage defect classification engines configured to: receive metrology data obtained for defects on a substrate containing an electronic device or a partially processed electronic device, and generate a first-stage defect classification based on the metrology data; and a second-stage defect classification engine configured to: receive the first-stage defect classification generated by the one or more first-stage defect classification engines, receive manufacturing information, use the first-stage defect classification and the manufacturing information to determine one or more sources of defects on the substrate, and output the possibility of the defect being caused by the first source, the first source being associated with the manufacturing equipment, one or more materials on the substrate, and / or the processing technology. In some embodiments, the manufacturing information includes data regarding: (i) manufacturing equipment that performs a processing on the substrate and generates defects on the substrate, (ii) the processing, (iii) one or more materials on the substrate, and / or (iv) a priori defect classifications of the manufacturing equipment and / or processing.

[0007] In various embodiments, the metrology data includes images, composition data, and / or wafer spectra. In some such cases, the metrology data also includes metadata related to the inspection tool used to obtain the metrology data.

[0008] In some embodiments, the first stage defect classification comprises morphological, compositional, or wafer spectrum classification of defects on the substrate. In some cases, the first stage defect classification engine comprises one or more neural networks.

[0009] Examples of the manufacturing equipment include a dry etching reactor, a chemical vapor deposition reactor, an atomic layer deposition reactor, a physical vapor deposition reactor, or an electroplating reactor.

[0010] In various embodiments, the second stage defect classification engine is additionally configured to further classify the defects on the substrate and / or provide suggested corrective actions to reduce defect generation on the substrate and / or reduce the chance of defects occurring on future processed substrates. In further embodiments, the second stage defect classification engine is configured to determine the one or more sources of the defects on the substrate using Bayesian analysis.

[0011] In some embodiments, the metrology data is obtained in situ during the fabrication process. In certain embodiments, the one or more first stage defect classification engines are configured to receive sensor data comprising environmental conditions of the fabrication process, mass changes of the substrate during the fabrication process, mechanical forces experienced during the fabrication process, and combinations thereof, and the second stage defect classification engine utilizes the sensor data to determine the one or more sources of defects on the substrate.

[0012] In another aspect of the embodiments herein, a computational method for analyzing defects is provided, the method comprising: receiving metrology data obtained for defects on a substrate, the substrate comprising an electronic device or a partially processed electronic device, wherein the metrology data comprises an image, composition data, and / or a wafer spectrum; generating a first-stage defect classification based on the metrology data; receiving manufacturing information, the manufacturing information comprising data regarding: (i) manufacturing equipment that performs a processing on the substrate and generates defects on the substrate, (ii) the processing, (iii) one or more materials on the substrate, and / or (iv) a priori defect classifications of the manufacturing equipment and / or processing; utilizing the first-stage defect classification and the manufacturing information to determine one or more possible sources of defects on the substrate; and outputting a likelihood that the defect is caused by a first source, the first source being associated with the manufacturing equipment, one or more materials on the substrate, and / or the processing.

[0013] In various embodiments, the metrology data includes images, composition data, and / or wafer spectra. In some such cases, the metrology data also includes metadata related to the inspection tool used to obtain the metrology data.

[0014] In some embodiments, the first stage defect classification comprises morphological, compositional, or wafer spectrum classification of defects on the substrate. In some cases, one or more neural networks generate the first stage defect classification based on the metrology data.

[0015] In certain embodiments, the fabrication equipment is a dry etching reactor, a chemical vapor deposition reactor, an atomic layer deposition reactor, a physical vapor deposition reactor, or an electroplating reactor.

[0016] In many embodiments, the method further includes utilizing the first stage defect classification and the manufacturing information to further classify defects on the substrate and / or provide suggested corrective actions to reduce defect generation on the substrate and / or reduce the occurrence of defects on future processed substrates.

[0017] In various embodiments, the step of determining one or more possible sources of defects on the substrate comprises performing a Bayesian analysis.

[0018] In some embodiments, the metrology data is obtained in situ during the process. In certain embodiments, the method further comprises receiving sensor data comprising environmental conditions of the process, changes in mass of the substrate during the process, mechanical forces experienced during the process, and combinations thereof; and utilizing the sensor data to determine the one or more possible sources of defects on the substrate.

[0019] In another aspect of the embodiments herein, a computer program product for analyzing defects is provided, the product comprising a non-transitory computer-readable medium on which computer-executable instructions for the following operations are provided: receiving metrology data obtained for defects on a substrate, the substrate comprising an electronic device or a partially processed electronic device, wherein the metrology data comprises an image, composition data, and / or a wafer spectrum; generating a first-stage defect classification based on the metrology data; receiving manufacturing information, the manufacturing information comprising data regarding: (i) a manufacturing equipment that performs a processing on the substrate and generates defects on the substrate, (ii) the processing, (iii) one or more materials on the substrate, and / or (iv) a priori defect classifications of the manufacturing equipment and / or processing; utilizing the first-stage defect classification and the manufacturing information to determine one or more possible sources of defects on the substrate; and outputting a likelihood that the defect is caused by a first source, the first source being associated with the manufacturing equipment, one or more materials on the substrate, and / or the processing.

[0020] In various embodiments, the metrology data includes images, composition data, and / or wafer spectra. In some such cases, the metrology data also includes metadata related to the inspection tool used to obtain the metrology data.

[0021] In some embodiments, the first stage defect classification comprises morphological, compositional, or wafer atlas classification of defects on the substrate. In some cases, the instructions for generating the first stage defect classification based on the metrology data comprise: instructions for processing the metrology data on one or more neural networks.

[0022] In some embodiments, the fabrication equipment is a dry etching reactor, a chemical vapor deposition reactor, an atomic layer deposition reactor, a physical vapor deposition reactor, or an electroplating reactor.

[0023] In various embodiments, the computer executable instructions for determining the one or more possible sources of defects on the substrate include: computer executable instructions for further classifying the defects on the substrate beyond the first stage defect classification. In certain embodiments, the computer executable instructions provide suggested corrective actions to reduce defect generation on the substrate and / or reduce the occurrence of defects on future processed substrates.

[0024] In some embodiments, the one or more possible sources of defects on the substrate include computer executable instructions for performing a Bayesian analysis.

[0025] In some embodiments, the metrology data is obtained in situ during the process. In some embodiments, the computer executable instructions for generating the first stage defect classification include computer executable instructions for receiving sensor data of environmental conditions of the process, changes in mass of the substrate during the process, mechanical forces experienced during the process, and combinations thereof, and the computer executable instructions for determining the one or more possible sources of defects on the substrate include instructions for utilizing the sensor data.

[0026] In various embodiments, the computer executable instructions further include instructions for utilizing the likelihood of a defect being caused by a first source associated with the manufacturing equipment and / or process to generate a digital map of the manufacturing equipment and / or process.

[0027] These and other features of the disclosed embodiments are described in detail below with reference to the associated drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1A and 1B An exemplary architecture of a defect analysis system is presented.

[0029] Figure 2 A flow chart of the operation of a processor of an exemplary embodiment is presented.

[0030] Figure 3 A block diagram of an exemplary embodiment is presented.

[0031] Figure 4 A block diagram of a second exemplary embodiment is presented.

[0032] Figure 5 Examples of defects and sources of defects are presented.

[0033] Figure 6 Examples of defects caused by wafer clamps on wafer maps are presented.

[0034] Fig. 7A and7B An example of classifying defects using image data is presented.

[0035] Figure 8 An exemplary computer system is presented that can be used to implement certain embodiments described herein. Specific implementation plan

[0036] the term

[0037] The following terms are used throughout this manual:

[0038] In the present disclosure, the terms "semiconductor wafer", "wafer", "substrate", "wafer substrate", and "partially processed integrated circuit" are used interchangeably. Those skilled in the art will understand that the term "partially processed integrated circuit" can refer to a semiconductor wafer during any of many stages of processing of an integrated circuit thereon. Wafers or substrates used in the semiconductor device industry typically have a diameter of 200 mm, or 300 mm, or 450 mm. The embodiment description assumes that the embodiment is implemented on a wafer. However, the present invention is not limited to this. The workpiece can be of various shapes, sizes, and materials. In addition to semiconductor wafers, other workpieces that can utilize the present invention include various objects, such as printed circuit boards.

[0039] As used herein, "semiconductor device processing operations" are operations performed during the processing of a semiconductor device. Typically, an overall processing sequence includes multiple semiconductor device processing operations, each of which is performed in its own semiconductor processing tool (e.g., a plasma reactor, an electroplating tank, a chemical mechanical planarization tool, a wet etching tool, etc.). The range of semiconductor device processing operations includes subtractive processing (e.g., etching processing and planarization processing) and material additive processing (e.g., deposition processing, such as physical vapor deposition, chemical vapor deposition, atomic layer deposition, electrochemical deposition, electroless deposition). In the context of an etching process, a substrate etching process includes a process of etching a mask layer, or more generally, includes a process of etching any material layer previously deposited on and / or present on the surface of a substrate. Such an etching process can etch a film layer stack in a substrate.

[0040] "Fabrication equipment" or "processing tool" refers to equipment in which a fabrication process is performed that may produce defects in a semiconductor substrate or other workpiece. Fabrication equipment typically has a processing chamber in which the workpiece resides during processing. Typically, when used, the fabrication equipment performs one or more semiconductor device processing operations. Examples of fabrication equipment used for semiconductor device processing include deposition reactors (e.g., plating tanks, physical vapor deposition reactors, chemical vapor deposition reactors, and atomic layer deposition reactors), and subtractive processing reactors (e.g., dry etch reactors (such as chemical and / or physical etch reactors), wet etch reactors, and ashers).

[0041] As used herein, "defects" are deviations from the proper function of a process, film, or product. Defects may be random or systematic. A process defect is a deviation from the intended process that may cause the device or product being processed to fail. An example of a process defect is scumming, where residues from a photoresist remain on the wafer after the photoresist is removed. Another example is an undesired bridge between components in a device, which may cause a short circuit. Particle defects may be classified by characteristics such as composition, shape (or morphology), size, and location on the wafer. Defects on semiconductor substrates may originate from one or more sources, which are typically in a substrate processing chamber. Processing chamber components (e.g., showerheads, chamber walls, seals, and windows) may drop material in the form of particles, which may produce wafer defects. In addition, certain processing processes (e.g., etching processes) may cause redepositions or residues to remain on the substrate, resulting in defects. Additionally, defects may be caused by the movement of material on the substrate, such as material reflow during thermal processing, or unintended particle deposition on the bottom or sides of the wafer that subsequently move and redeposit on the top of the wafer.

[0042] As used herein, "metrology data" refers to data generated at least in part by measuring the characteristics of a processed substrate or a reaction chamber in which the substrate is processed. The measurements may be performed while or after a semiconductor device processing operation is performed in a reaction chamber. In certain embodiments, metrology data is generated by a metrology system that performs the following on an etched substrate: microscopy (e.g., scanning electron microscopy (SEM), transmission electron microscopy (TEM), scanning transmission electron microscopy (STEM), reflection electron microscopy (REM), atomic force microscopy (AFM)), or optical metrology. When optical metrology is used, the metrology system can obtain information about the defect location, shape, and / or size by calculating the defect location, shape, and / or size based on the measured optical metrology signal. In certain embodiments, metrology data is generated by performing reflection measurement, dome scatterometry, angle-resolved scatterometry, small-angle X-ray scatterometry, and / or ellipsometry on the processed substrate. In certain embodiments, metrology data includes spectral data from, for example, energy dispersive X-ray spectroscopy (EDX). When spectroscopy is used, the metrology system can obtain information about the composition of the defects.Other examples of metrology data include sensor data such as temperature, environmental conditions in the chamber, mass changes of substrates or reactor components, mechanical forces, etc.

[0043] In some embodiments, the metering data includes "metadata" related to the conditions of the metering system used to obtain the metering data. Metadata can be considered as a set of tags that describe and / or characterize the data. A non-exclusive list of metadata attributes includes:

[0044] Process tool design and operation information, such as platform information, robot design, tool material details, part information, process recipe information, etc. Image capture details, such as contrast, magnification, blur, noise, brightness, etc. Spectrum generation details, such as x-ray landing energy, wavelength, exposure / sampling time, chemical spectrum, detector type, etc. Metrology tool details, such as defect size, location, class identification, acquisition time, rotation speed, laser wavelength, edge exclusion, bright field, dark field, tilt, normal incidence, recipe information, etc. Sensor data from the machining process (which can be in situ or ex situ): spectral range of the captured data, energy, power, process endpoint details, detection frequency, temperature, other environmental conditions, etc.

[0045] Machine learning model: A machine learning model is a trained computational model that takes metrology data extracted from defects on a substrate and classifies the defects by, for example, composition, shape, size, location, etc. Examples of machine learning models include random forest models (including deep random forests), neural networks (including recurrent neural networks and convolutional neural networks), restricted Boltzmann machines, recurrent tensor networks, and gradient boosted trees. The term "classifier" (or classification model) is sometimes used to describe all forms of classification models, including deep learning models (e.g., neural networks with many layers), and random forest models.

[0046] In this field, some machine learning models are characterized as "deep learning" models. Unless otherwise specified, any reference to "machine learning" in this article includes implementations of deep learning. Deep learning models can be implemented in various forms, such as through neural networks (such as convolutional neural networks), etc. Generally speaking (although not necessarily), it includes multiple layers. Each such layer includes multiple processing nodes, and these layers are processed in sequence, where the nodes of the layer closer to the model input are processed before the nodes of the layer closer to the model output. In many embodiments, one layer feeds the next layer, and so on. The output layer may include nodes representing various defect classifications (such as location on the wafer (such as edge, center, or random), composition (including, for example, tungsten, aluminum oxide, and copper oxide), and morphology (such as clusters, flakes, and spheres, etc.). In some embodiments, a deep learning model is a model that requires very little preprocessing of the data and outputs defect classifications.

[0047] In various embodiments, the deep learning model has great depth and can classify defects in large or heterogeneous arrays. In certain embodiments, the model has more than two (or more than three or more than four or more than five) layers of processing nodes that receive values ​​from the previous layer (or are direct inputs) and output values ​​to the next layer (or final output). The internal nodes are usually "hidden" because their input and output values ​​are not visible outside the model. In many embodiments, during operation, the operation of the hidden nodes is not monitored or recorded.

[0048] The nodes and connections of the deep learning model can be trained and retrained without redesigning their number, configuration, interface with image input, etc., and can still classify a wide range of heterogeneous cellular artifacts.

[0049] As noted, in many embodiments, layers of nodes may collectively form a neural network, but many deep learning models have other structures and forms. Many embodiments of deep learning models do not have a hierarchical structure, in which case the above characterization of "deep" as having many layers is not relevant.

[0050] "Bayesian analysis" refers to a statistical paradigm that uses available evidence to evaluate prior probabilities to determine posterior probabilities. A prior probability is a probability distribution that reflects current knowledge or subjective choices about one or more parameters to be detected. For example, a prior probability may include a distribution of defect counts or defect types based on different categories of a given tool. A prior probability may also include a coefficient of variance or reporting limit for stored measurement results. Evidence is new data that has been collected or sampled that affects the probability distribution of the prior probability. Using Bayesian theory or a variation thereof (which is well known to those skilled in the art), the prior probability is combined with the evidence to produce an updated probability distribution, which is called a posterior probability. In certain embodiments, the posterior probability can be used as a new prior probability and combined with new evidence to repeat the Bayesian analysis multiple times.

[0051] A "digital twin" is a mathematical model of a chamber or other component or tool that is used as a reference for comparisons to usage history, component / tool ​​specifications, and / or metrology data collected from various networked sensors that collect data from the component or tool. The digital twin represents the functionality of the tool, component, and / or process. In certain embodiments, the digital twin is constructed based on metrology data. Sensors are positioned throughout the chamber to continuously collect data during the process. The collected data is then organized into a digital representation of the processing chamber at any given point during the process. In certain embodiments, the digital twin is modeled using metrology data. In certain embodiments, historical information and / or specifications about the tool, component, or process are used to construct the digital twin. Examples of such information include expected or observed useful life of consumable parts, maintenance schedules, and the like.

[0052] The digital map can be used as a reference system for the tool or component it models. During operation of the chamber, data collected from various sensors in the chamber can be compared to the information contained in the digital map. Differences between the collected data and the data of the digital map can indicate that unacceptable defects may occur in the processing process or the substrate.

[0053] Over time, the digital map can be refined using information from the actual tool or process in operation. For example, as the machining process continues and defect analysis is performed, the digital map can update its data to reflect the appropriate range of values ​​collected by the various sensors in the chamber. Over time, the digital map can learn which sensor value deviations can be classified as defects.

[0054] Digital mapping can be implemented as a machine learning model (e.g., a deep learning model). However, typically, digital mapping is implemented as a computationally simple statistical or classification model for a tool, component, or process. And, even if it is implemented as a neural network or other complex machine learning algorithm, it can still be relatively simple (e.g., it requires relatively few layers in the neural network). Of course, more computationally intensive defect classification algorithms (e.g., the defect classification and source identification algorithms described herein) can be used to produce such a relatively simple digital mapping. In many embodiments, sensor data is provided to digital mapping and defect classification models of the type described herein. Digital mapping can use such data to quickly determine (sometimes in real time) whether maintenance or certain remedial measures are required during the processing process. Defect classification algorithms can use such data to determine whether defects do exist, determine the possible sources of such defects, and / or recommend remedial measures. For example, digital mapping can identify defects in the processing process before the defects become irreversible, so that adjustments to the processing process can remedy defects on the substrate being inspected, thereby improving the substrate yield.

[0055] A "defect analysis system" is a computing system that receives as input metrology data and provides as output a defect classification. The metrology data contains information about one or more defects on a substrate. The defect analysis system may also receive as input information related to the specific manufacturing equipment and / or processing technology used to perform the operation that produced the defect. In addition to providing the defect classification, the defect analysis system may also provide as output the source or root cause of the defect. And, in some embodiments, the defect analysis system may also provide recommended remedial actions to reduce or prevent certain types of defects from occurring in future operations of a piece of manufacturing equipment. The recommended remedial actions may include modifications to process conditions used in the manufacturing equipment, or modifications to the equipment itself.

[0056] In certain embodiments, the defect analysis system includes one or more logic engines or modules that handle different functions of the defect analysis system. For example, one engine receives metrology data and provides an initial classification of defects, while a second engine receives the initial classification and information about the manufacturing equipment and / or the processing performed on the equipment that caused the defect. The second engine can provide refined defect classification, root cause identification, and / or suggested remedial actions. The engines can be implemented as software or other computer instructions.

[0057] The "first stage defect classification engine" takes as input metrology data such as defect images, defect (and surrounding) spectra, and / or wafer spectra. The first stage defect classification engine can be implemented by any of a variety of classification algorithms, which can be machine learning models. Examples include convolutional neural networks, recurrent convolutional neural networks, generative adversarial networks, autoencoders, etc. The first stage classification engine outputs defect classification, such as defect composition, shape, size, and / or distribution on the wafer.

[0058] The defect analysis system may have one or more first stage classification engines, each of which is configured to process input from one or more metrology sources. For example, one first stage defect classification engine may process wafer spectra, another may process spectral data, and a third may process images. In certain embodiments, a single first stage defect classification engine processes two or more different types of metrology data (e.g., spectral and image data) obtained from a defect location. Each of the one or more first stage defect classification engines may have one or more different classification algorithms.

[0059] A "second stage defect classification engine" takes as input the defect classification from at least one first stage classification engine and operates upon it. Such input may include defect composition, shape, size, and / or distribution on the wafer. The second stage engine outputs a refined defect classification, root cause determination, and / or suggested remedial actions. In certain embodiments, the second stage defect classification engine additionally receives information about the manufacturing tool and / or process that generated the defect under consideration.

[0060] The second stage defect classification engine can be implemented by any of a variety of classification algorithms, which can be a machine learning model. In some cases, the second stage defect classification engine is configured to perform Bayesian analysis. In some cases, the second stage defect classification engine is configured to perform a decision tree.

[0061] The "defect source" or "root cause" of a defect is a process operation and / or equipment component that produces particles or other conditions that cause defects on a semiconductor substrate. Examples of equipment components that may be defect sources include showerheads, rings, dielectric windows, process chamber walls, gas lines, elastomeric coatings, mechanical wear, wafer transfer systems, and fluid delivery systems. In some cases, all process components exposed to process chemicals are potential sources of defects. Examples of process parameters include deposition precursors, chemical etchants, plasma conditions (such as plasma power, plasma frequency, substrate bias, ion direction, etc.), gas flow rates and pressures, base temperature, process timing, chamber adjustments, valve sequences, or substrate quality. Other conditions may include one or more materials on the substrate that cause defects. Defects caused by any of these sources may be particles, scumming, bridging, pinholes, etc. The root cause or source may also specify specific conditions associated with the equipment component that produces the defect. Examples include deposits on chamber walls, showerheads, or bases, cracks in components, wear, etc.

[0062] The term "manufacturing information" refers to information related to the processing tool that caused the defect to be generated. The manufacturing information may include information about the history of the tool (including information about previously generated defects, processes previously performed on the tool, and the history of other similar tools), one or more materials deposited on or etched from the substrate in the tool, etc. The manufacturing information may also include information about other tools that have certain identical components or perform similar operations.

[0063] Overview

[0064] Defects are a top priority for semiconductor device manufacturers and processing equipment suppliers because they have a direct impact on process quality and wafer yield. Defect classification, identification of defect sources, and identification of corrective actions to eliminate defect sources require a continuous investment of time and resources, not only during process development, but also during process optimization and hardware upgrades.

[0065] During defect analysis, engineers are asked to solve a series of problems, including identifying the morphology of defects on the wafer, and classifying defects based on composition, size, shape, etc. Ultimately, in order to fully resolve the defect problem, engineers must identify the source of the defect and implement corrective measures.

[0066] Conventionally, defects are classified based on chemical spectra and / or morphology and attributed to known sources on a manually done system. Sometimes, defects can also be identified based on the location of the particle distribution on the wafer spectrum and / or based on their size distribution at a given location on a well-known tool. However, this approach is also primarily manual.

[0067] Even with some degree of automation, engineers routinely spend a lot of time manually triaging defects. This is followed by root cause analysis, such as fishbone analysis and / or other methods. Finally, once a hypothesis for the root cause is developed, the engineering team must not only implement corrective actions, but must then repeatedly test the correctness of the hypothesis. This is very manual and labor intensive. It is estimated that engineers spend 23%-34% of their effort each year on non-value-added triage and reporting work.

[0068] The disclosed methods and systems can provide accurate and rapid defect classification, root cause analysis (to identify the source of the defect), and / or suggested corrective actions. The methods and systems disclosed herein can provide automated defect analysis methods. In certain embodiments, adaptive classification techniques (e.g., continuous machine learning) are used and can be applied to multiple tools, multiple system upgrades, etc. In certain embodiments, machine learning (e.g., deep learning) techniques such as neural systems (e.g., convolutional neural networks, recurrent neural networks, recurrent convolutional neural networks, generative adversarial neural networks, autoencoders, etc.) are combined with the use of prior knowledge of tool data (manufacturing equipment information, component-level data, platform information, recipe information, room configuration, etc.). The disclosed methods can also use subject matter expertise in the form of mathematical likelihood (using Bayesian and / or other methods).

[0069] Computational Defect Analysis System

[0070] Aspects of the present disclosure relate to computational tools for classifying defects, and in some cases to computational tools for identifying sources of defects in semiconductor processing chambers or processes. And, in some cases even beyond this scope, the computational tool may suggest corrective measures for solving the root cause of the problem. In some embodiments, the computational tool is pipelined, for example because the first stage defect classification engine operates on raw or relatively unprocessed data (e.g., data from one or more metrology tools) and provides an output that is fed to the second stage defect classification engine, which provides overall defect classification and / or defect source identification. In some cases, the second stage defect classification engine provides a recommended procedure for reducing defects. A general pipeline may include inputs from one or more (e.g., three or more) sources, and multiple branches fed to a central classification engine (e.g., a second stage defect classification engine). The source of the input may include metrology tool data, processing tool and / or process information, manufacturing information, and / or prior information about classification, source, and / or solution.

[0071] Figure 1AA schematic diagram of an exemplary defect analysis system is shown, the defect analysis system having multiple first stage defect classification engines 101, 102, and 103 and a second stage defect classification engine 130. Metrology data 105 is fed into each of the first stage defect classification engines to generate first stage defect classifications 124, 126, and 128, respectively. For example, a wafer spectrum 106 is fed into the first stage defect classification engine 101, which generates the first stage defect classification 124. Morphological data 107 (e.g., an image of a defect) is fed into the first stage defect classification engine 102, which generates the first stage defect classification 126. Composition data 108 is fed into the first stage defect classification engine 103, which generates the first stage defect classification 128. However, it should be noted that in some embodiments, more or less than three first stage defect classification engines are used to provide the first stage defect classification. Metrology data 105 can be processed by a single first stage defect classification engine or multiple first stage defect classification engines. The metrology data 105 may also be separated into different categories of data and fed exclusively into a first stage defect classification engine (as shown here), or fed into multiple first stage defect classification engines.

[0072] In the depicted embodiment, the metrology data 105 may include a wafer spectrum 106, morphology data 107, and / or composition data 108. A wafer spectrum is a representation of a substrate obtained during or after a processing process by a metrology tool that detects anomalies on the substrate. A wafer spectrum (e.g., a Klarf spectrum) visualizes defects and defect densities and can be used to classify defects based on pattern (e.g., lines, curves, or clusters) and location (e.g., edge, center, or relative location on the substrate). A wafer spectrum may display patterns corresponding to defects produced by a particular processing process or manufacturing equipment, such as lines that match a nozzle, or rings that match rings of a manufacturing equipment at the edge. In this way, a wafer spectrum can be used to determine the source of a defect based on matching the defect pattern with a potential defect source. A wafer spectrum may also suggest information about remedial measures, such as replacing a component that has flaked particles onto a wafer. Of course, the association between a wafer spectrum and a particular defect source may be much more complex and not easy to detect and / or even difficult to understand by a very capable engineer.

[0073] Figure 5 and Figure 6Two exemplary wafer spectra are shown: wafer spectra 500 and wafer spectra 600. In analyzing wafer spectra 500, the first stage defect classification engine may generate classifications for two potential sources of defects, one being large particle defects 502 and the other being small particle defects 501. In analyzing wafer spectra 600, the first stage defect classification engine may generate classifications based on the location of defects near the edge and may additionally generate classifications based on the source of the defects. For wafer spectra 600, it may be assumed that wafer clamp 601 causes certain defects. The first stage defect classification may classify the defects as being at the edge, while the second stage defect classification engine may determine the possible source of the defects as the contact point of wafer clamp 601. Again, these simple examples illustrate the information that the defect analysis system may use and the relationship between the data and sources that it may consider. It will be trained to handle far more complex situations and provide quantitative guidance.

[0074] The morphological data may include images of specific defects and may be used to classify the size and / or shape of the defects. The images may be obtained using electron microscopy, atomic force microscopy, or other imaging techniques. Defects larger or smaller than certain values ​​may only be caused by specific sources. Defects of a specific shape or size may also be associated with composition or microstructure and thus facilitate source identification.

[0075] Figure 5 Morphological data for a small particle defect 501 and a large particle defect 502 are shown. In an exemplary embodiment, the first stage defect classification engine processes all ten images to generate one or more first stage defect classifications. In general, the first stage defect classification engine may process each image of a defect, which may be a single image or multiple images. There may also be multiple sources of defects, in which case the first stage defect classification engine may generate a single classification for all defects, multiple classifications for all defects, and / or multiple classifications for different defect groupings. The first stage defect classification may account for the size and / or shape of the defect.

[0076] The composition data may include spectral information, which is associated with the defect composition and the surrounding environment. Examples of techniques that generate spectral information include X-ray spectroscopy (eg, EDS), Auger electron spectroscopy, wavelength dispersive X-ray spectroscopy, and X-ray diffraction (XRD).

[0077] The metrology data may also include metadata associated with one or more of the metrology tools used to collect the metrology data from the wafer. This may include operating settings on a given tool or a priori metrology data received by the tool. In certain embodiments, the metrology data includes the specific metrology tool used to collect the metrology data, its construction and design, its manufacturer, and the conditions under which it operated during use.

[0078] Back to Figure 1A , the wafer spectrum 106, morphology data 107, and composition data 108 are fed into the first stage classification engines 101, 102, and 103, respectively, to produce first stage defect classifications 124, 126, and 128, respectively (e.g., the output of the machine learning model). In some embodiments, metrology data related to morphology (e.g., image) and composition (e.g., spectrum) are fed into a single first stage defect classification engine, while in other embodiments, all metrology data are fed into a single first stage defect classification engine and there is only one first stage defect classification. In machine learning embodiments, the options for the first stage defect classification (e.g., flakes vs. clusters, or tungsten vs. yttrium oxide) are defined by the user, who creates a training set to train the first stage defect classification engines 101, 102, and 103.

[0079] exist Figure 1A In the embodiment depicted in , the first stage defect classification engines 101, 102, and 103 are machine learning models. However, it should be noted that in other embodiments, the first stage defect classification engine can be a different classification algorithm, such as a classification tree. The machine learning model uses raw data from a metrology tool to classify defects on a wafer. In certain embodiments, a convolutional neural network is used to process image data (such as wafer spectra or morphological data) from a metrology tool, while spectral data is processed by different machine learning models using different algorithms. In other embodiments, a single first stage defect classification engine is used to process multiple types of metrology data. For example, morphological data and spectral data can be processed by the same first stage defect classification engine. In many embodiments, a single machine learning model (such as a convolutional neural network) is used to process morphological data and spectral data, wherein the morphological data passes through one or more convolutional layers, and the spectral data is provided to the first fully connected layer of the convolutional neural network. The output of one or more convolutional layers is also provided to the first fully connected layer. In certain embodiments, a machine learning model (such as any of the above models) is configured to generate one or more inferred classifications of defects or defect groups.

[0080] exist Figure 1AIn the embodiment depicted in , the first stage defect classifications 124, 126, and 128 are fed into a second stage defect classification engine 130 having a data store 132. The data store 132 may store manufacturing information about processing tools or information about semiconductor device processing operations. The data store 132 may also store information about previous defects, including classifications, root causes, and corrective actions to prevent similar defects from occurring in the future. The data store 132 may also store information about similar tools that use similar components. The information in the data store 132 may also include information from process engineers and operators who address defects and identify the source or root cause of the defects and corrective actions that were effective or ineffective in reducing or eliminating the defects.

[0081] In the depicted embodiment, the second stage defect classification engine 130 is configured to utilize information from the data store 132 (including the output from the first stage defect classification engine) and the prior probabilities 134a for analysis. The data store 132 may contain information about the following: modules (e.g., materials of construction, wear rates, etc.), platform information (e.g., materials of construction, manipulators, mechanical contacts, load gates, etc.), recipe information, and manufacturing information. The prior probabilities 134a contain the results from the prior analysis, including the distribution of defect counts, defect types of different categories, and defect categories associated with various tools. The results of this analysis (which is the output of the second stage classification engine 130) can be a more refined classification of defects (sometimes referred to as the second stage defect classification 138a), and / or other information as described below. In some embodiments, Bayesian analysis is used to complete the analysis, but in other embodiments, different statistical analyses are used to generate the second stage defect classification 138a. In some embodiments, a classification tree is used. In some embodiments, a machine learning model is used.

[0082] Bayesian analysis requires a priori probabilities, which can be the initial probability distribution for classifying defects, sources of defects, and / or remedial measures for preventing defects from occurring. Next, available evidence is used to evaluate the prior probabilities and determine the posterior probabilities, which are the second-stage defect classifications, sources of defects, and / or remedial measures. The first-stage defect classification is part of the evidence used to evaluate the prior probabilities. In other words, the first-stage classification engine can provide results related to the defects being observed. The prior analysis is based on data from past results. The results of the i-th step of the first-stage defect classification can be used as the i+1-th step during the second-stage analysis. The information in the data store can be used as part of the generation of the prior probabilities, fed into the analysis as evidence for evaluating the prior probabilities, or both. The prior probabilities also include the posterior probabilities from previous defect analyses.

[0083] The form of the second stage defect classification 138a may depend on the form of the particular method or algorithm used to generate it. In some cases, the second stage defect classification 138a includes multiple classifications, each classification having an associated probability or likelihood value attributed to it. In addition, the second stage defect classification 138a may include one or more sources or root causes of the defect, and the probability or likelihood value attributed to each of them. Still further, the second stage defect classification 138a may include one or more corrective measures, and the associated probability that the corrective measures successfully reduce or remove the defect.

[0084] Corrective actions may include component replacement (e.g., corroded gas lines, filter failure, O-ring failure, other component failure, pump failure, component wear, component / orifice blockage, etc.), component cleaning (e.g., poor showerhead cleaning resulting in showerhead pattern, dirty viewing port, dirty mixing bowl, gas line dust / contamination, ESC contamination, etc.), component redesign (e.g., mechanical scratches caused by robotic arms and / or other contact points in the tool, damaged tubing from aggressive plasma cleaning, PM door friction / contact, poor RF grounding, edge ring height, etc.), chemical residue inspection / correction (e.g., vapor phase condensation, insufficient chamber cleaning, etc.), operator behavior (e.g., wafer handling, incorrect process and / or metering recipes, etc.), process adjustments (e.g., coating stripping, insufficient chamber conditioning, insufficient undercoating, pre-coating and cleaning, in-film defects (e.g., volcanoes / pits), unstable plasma mode, etc.), or a combination thereof.

[0085] Figure 1B Another schematic diagram of an exemplary defect analysis system is shown, where metrology data 105 is fed to two first stage defect classification engines 111 and 112 and a second stage defect classification engine 130. In this figure, the first stage defect classification engine 111 operates on in-situ metrology data 109 to output a first stage defect classification 121. The in-situ metrology data is collected in the chamber and can be collected before, during, or after the processing process. The in-situ metrology data 109 includes data from, for example, scatterometry, reflectometry, ellipsometry, spectroscopy, substrate quality, or other sensor data. The in-situ metrology data 109 can be used to classify defects during processing. In certain embodiments, the in-situ metrology data can be used to suggest corrective measures that remedy defects on the substrate from which the in-situ metrology data was collected. For example, a bridging defect can be corrected by etching the substrate to remove the bridging material before the next processing process. This can improve the yield of the substrate by identifying and remedying defects in real time.

[0086] In certain embodiments, the first stage defect classification engine 112 operates on ex-situ metrology data 110. The ex-situ metrology data is collected outside of the chamber, and is typically collected after a process. The ex-situ metrology data 110 is used by the first stage defect classification engine 112 to output a first stage defect classification 122.

[0087] exist Figure 1B In the embodiment depicted in FIG. 1 , the first stage defect classifications 121 and 122 are fed into the second stage classification engine 130. Figure 1A Similar to the embodiment of the present invention, the second stage classification engine 130 utilizes the data store 132 (including the output from the first stage defect classification engine) and the prior analysis 134b to perform the analysis. The result of the analysis (which is the output of the second stage defect classification engine 130) can be a more refined classification of defects, which is sometimes referred to as the second stage defect classification 138b.

[0088] In order to collect various data that can be used in computational defect analysis, various sensors in addition to the defect classification sensors described above can be used. Such additional sensors can be configured for in-situ and / or ex-situ data collection. As indicated, such sensors can include sensors for the environmental conditions of the process (e.g., temperature, pressure, flow rate, plasma conditions, etc.), mass changes during the process, mechanical forces experienced during the process, and combinations thereof. Such data can be fed to the first stage and / or second stage defect classification engine.

[0089] In some embodiments, a digital map is used to mimic some or all of the behavior of the first stage defect classification engine 111 or 112 and / or the second stage defect classification engine. In certain embodiments, such a digital map accepts some or all of the inputs used by the first and / or second stage defect classification engines. As indicated, the digital map can be a mathematical model of a chamber, component, and / or substrate that is used as a reference for comparison with the collected metrology data. In certain embodiments, the digital map can more quickly classify certain defects based on the collected metrology data and / or other sensor data.

[0090] In some embodiments, a digital map is generated by various networked sensors integrated with multiple chambers, which implements Industry 4.0. Similar sensors are used with a large number of chambers, tools, or platforms to collect data about similar processes performed in each chamber, tool, or platform. The digital map is then used to detect differences between a large number of chambers, tools, or platforms. The combination of networked sensors and equipment can then be used to analyze defects throughout the chamber, tool, or platform to determine the root cause common to multiple pieces of equipment.

[0091] Figure 2 1 is a program flow diagram showing operations performed in a method according to certain disclosed embodiments. The disclosed operations may be performed on any suitable system, whether or not they are pipelined as shown in the system of FIG. 1 . In operation 201 , metrology data is collected. As illustrated, the metrology data may include a wafer spectrum, morphological data indicating the size and shape of a defect (or defects), compositional data including a spectrum, and / or other data about the defects.

[0092] In operation 202, the metrology data is analyzed to generate one or more first stage defect classifications. In certain embodiments, a machine learning model is used to classify the defects into a number of classifications.

[0093] In operation 203, manufacturing information is obtained or collected. Manufacturing information includes information about manufacturing equipment (e.g., materials present in the manufacturing equipment), the design of its components, and its configuration. Manufacturing information may also include information about the processing technology, including process recipe information. Manufacturing information may also include information about the materials on the substrate, such as its composition, size, or shape. Manufacturing information may also include previous defect classification information based on the manufacturing equipment, processing technology, or materials on the substrate.

[0094] In operation 204, the manufacturing information is analyzed along with the first stage defect classification from operation 202. Various statistical methods can be utilized to perform this analysis. In one embodiment, Bayesian analysis is used to generate one or more possible sources of defects. In another embodiment, a machine learning model is used. In many embodiments, classification trees are used. In certain embodiments, clustering algorithms are used. In some embodiments, dimensionality reduction techniques such as principal component analysis (PCA) are used.

[0095] In operation 205, one or more possible sources of defects are provided. In some embodiments, there may be further classification of the defects or suggested remedial measures to reduce the chance of the defects appearing on future substrates. Remedial measures may include changes in manufacturing equipment or processing techniques, cleaning or replacement of various components, or changes in materials used in the process.

[0096] Figure 33 is a block diagram showing an exemplary process for identifying defects on a wafer as aluminum oxide. As shown, morphological data 304 and spectral data 306 are fed into a convolutional neural network 314, which produces first stage defect classifications 322 and 324. In certain embodiments, the morphological data is an image, which is processed through the convolutional layers of the convolutional neural network. The output of the convolution can then be fed into a fully connected layer along with the spectral data. The first stage defect classifications 322 and 324 can then include classifications regarding the composition of the defect, and classify the size and shape of the defect.

[0097] In this example, wafer spectrum data 308 is fed to a separate convolutional neural network 316 to produce first stage defect classifications 326 and 328. These classifications are different from classifications 322 and 324, but both first stage defect classifications 324 and 328 can indicate the potential composition of the defect. It should be noted that neural network 316 has been trained to output not only a classification of the location / distribution of the defect (classification 326), but also a possible classification of the composition of the defect (classification 328). While first stage defect classification 324 indicates that the probability of the defect containing tungsten is high, first stage defect classification 328 indicates that the probability of the defect containing tungsten is relatively low, and instead indicates that the probability of the defect containing aluminum oxide is high.

[0098] Next, a Bayesian analysis engine 336 is used to analyze the first stage defect classification along with information from the data store 332 and the prior analysis 334. In this example, the Bayesian analysis engine 336 may be considered the sole or primary component of the second stage defect classification engine. As described above, a data store such as the data store 332 may include manufacturing information 330, such as information about the machining process, recipe information, what materials have been deposited or removed by the process, and historical data for a particular tool.

[0099] The second stage defect classification 338 is the result of the Bayesian analysis. This is a refined defect classification because it provides a classification that is more likely to be correct than any of the first stage defect classifications. In this example, the probability that aluminum oxide is the primary component of the defect is very large, while the probability that tungsten is the primary component is much lower. In certain embodiments, the second stage defect classification also outputs potential sources of the defect and / or possible remedial measures to prevent the defect from occurring in the future.

[0100] Figure 4A block diagram of an exemplary process is shown for identifying defects on a wafer as tungsten balls. As shown, morphological data 404 and spectral data 406 are fed into a convolutional neural network 414, which produces first stage defect classifications 422 and 424. In certain embodiments, the morphological data is an image, which is processed through the convolutional layers of the convolutional neural network. The output of the convolution can then be fed into a fully connected layer along with the spectral data. The first stage defect classifications 422 and 424 can then include classifications regarding the composition of the defect, and classify the size and shape of the defect.

[0101] In this example, wafer spectrum data 408 is fed to a separate convolutional neural network 416 to produce first stage defect classifications 426 and 428. These classifications are different from classifications 422 and 424, although both first stage defect classifications 424 and 428 can indicate the potential composition of the defect. It should be noted that neural network 416 has been trained to output not only a classification of the location / distribution of the defect (classification 426), but also a possible classification of the composition of the defect (classification 428). Both first stage defect classification 424 and first stage defect classification 428 indicate that the probability of the defect containing tungsten is high, while the probability of the defect containing a different molecule is relatively low.

[0102] Next, a Bayesian analysis engine 436 is used to analyze the first stage defect classification along with information from the data store 432 and the prior analysis 434. In this example, the Bayesian analysis engine 436 may be considered the sole or primary component of the second stage defect classification engine. As described above, a data store such as the data store 432 may contain manufacturing information 430, such as information about the machining process, recipe information, what materials have been deposited or removed by the process, and historical data for a particular tool.

[0103] The second stage defect classification 438 is the result of the Bayesian analysis. This is a refined defect classification because it provides a classification that is more likely to be correct than any of the first stage defect classifications. In this example, the probability that tungsten is the main component of the defect is very large. In some embodiments, the second stage defect classification also outputs potential sources of the defect and / or possible remedial measures to prevent the defect from occurring in the future, such as adjusting the cleaning process after the plasma etching process to completely remove the chemical.

[0104] Figure 5505 is an exemplary illustration of metrology data that may be processed by the first and / or second stage defect classification engines. Wafer spectrum 500 shows the location of defects on the substrate. Small particle defects 501 and large particle defects 502 are examples of morphological data that may be collected and processed by the first stage defect classification engine to generate classifications based on size and shape. As shown in graph 505, more than 50% of the particle defects are smaller than 0.0985 microns, and at least 25% of the particle defects are very large. The second stage defect classification engine may then process this data to further classify the defects or generate one or more possible sources of the defects (e.g., wafer chuck or showerhead).

[0105] Figure 6 FIG. 6 is an exemplary illustration of associating defects on a substrate with possible sources of the defects. The wafer spectrum 600 has a defect pattern 602 that matches the contact points of a wafer clamp 601. The first stage defect classification engine may classify the defect pattern 602 as an edge defect on a specific portion of the wafer, while the second stage defect classification engine may further classify and generate the possible source of the defect as the wafer clamp 601.

[0106] Fig. 7A and 7B The following is an exemplary diagram illustrating the classification of defects using only morphological data or using a combination of morphological data and compositional data. Fig. 7A , images 701 and 711 are processed together with spectral data 703 and spectral data 713 via a convolutional neural network (not shown) to produce first stage defect classifications 705 and 715, respectively.

[0107] exist Figure 7B , images 721 and 731 are processed separately via convolutional neural networks (not shown) to produce first stage defect classifications 725 and 735, which provide probabilities of defect composition. Interestingly, using only images as input data, the machine learning model is able to output a composition-based classification with a 99.9% probability. Spectra 723 and 733 generated by EDS confirm the first stage defect classifications 725 and 735, respectively. Defect analysis using only image data without collecting spectral data is advantageous because it may be easier and less expensive to collect image data than to collect spectral data. Noise or signal overlap in the spectrum may reduce its utility for defect classification.

[0108] Image data can be difficult to process manually, especially for its use in classifying defects based on their composition. A highly trained engineer can learn to classify defect composition based solely on the morphology of the defect, but it takes years to develop such experience. On the other hand, a defect analysis system can be trained to classify defects as well as an engineer, or even better and with increased efficiency.

[0109] application

[0110] The defect analysis system described herein can save time in classifying defects, identifying the source of the defects, and implementing appropriate remedial actions. The defect analysis system can also provide insight into the source of defects and remedial actions across multiple tools or groups of tools. For example, the defect analysis system can determine that one cleaning procedure is more effective than another cleaning procedure for aluminum oxide components.

[0111] As mentioned above, engineers may spend 23%-34% of their time each year triaging defects, testing remediation measures, and writing reports. A defect analysis system can reduce the time spent on this work by up to 70%, which improves the time efficiency of engineers exploring defects.

[0112] Defect analysis systems can also be used to recommend preventive maintenance. Components wear and deteriorate over time or through repeated use, resulting in particles causing defects on the substrate. The defect analysis system can determine that a particular defect is more likely to occur after a precondition is met (such as heavy use or a different combination of use), so once such a precondition is met, preventive maintenance is recommended. Preventive maintenance can include replacing components or adjusting the processing process to eliminate or reduce the number of defects.

[0113] The methods and systems of the present invention can save time and costs by reducing the time spent collecting metrology data, reducing the number of defective wafers produced before defects are corrected, classifying defects more quickly, identifying root causes and remedial actions more quickly, suggesting solutions across different products with similar components and / or defects, maintaining knowledge in a central data store, etc.

[0114] Compared with traditional methods for solving defect problems on semiconductor process equipment, the method proposed in the present invention has significant advantages. The method can not only improve the speed of analysis (which is important for identifying root causes and solving problems), but also utilize the prior knowledge of tools, platforms, and manufactured components to improve its accuracy.

[0115] Background of the Disclosed Computing Implementations

[0116] Certain embodiments disclosed herein relate to computing systems for generating and / or using machine learning models. Certain embodiments disclosed herein relate to methods for generating and / or using machine learning models implemented on these systems. A system for generating a machine learning model may be provided to analyze data for correcting or optimizing a representation or relationship for representing a classification, source, or remedy of defects on a substrate. A system for generating a machine learning model may also be provided to receive data and instructions such as program codes representing physical processes occurring during semiconductor device manufacturing operations. In this way, a machine learning model is generated or programmed on such a system. A programmed system for using a machine learning model may be provided to (i) receive inputs such as metrology data of defects on a substrate, and (ii) execute instructions for determining a classification, source, or remedy of defects on a substrate.

[0117] Many types of computing systems having any of a variety of computer architectures can be implemented as the disclosed system for implementing machine learning models; and algorithms for generating and / or optimizing such models. For example, the system may include software components that execute on one or more general-purpose processors or specially designed processors (such as application-specific integrated circuits (ASICs) or programmable logic devices (such as field programmable gate arrays (FPGAs)). In addition, the system can be implemented on a single device or distributed across multiple devices. The functions of the computing components can be merged with each other or further divided into multiple sub-modules.

[0118] In certain embodiments, the program code executed during the generation or execution of a machine learning model on a suitably programmed system may be implemented in the form of a software component that may be stored in a non-volatile storage medium (such as a CD, a flash memory device, a removable hard drive, etc.) and contains a large amount of instructions for making a computer device (such as a personal computer, a server, a network device, etc.).

[0119] At one level, software components are implemented as groups of instructions prepared by programmers / developers. However, modular software that can be executed by computer hardware is an executable program code submitted to the memory using "machine code", which is selected from a specific machine language instruction set or "native instruction" designed in the hardware processor. The machine language instruction set, or native instruction set, is known to the hardware processor and is basically built into it. This is the "language" that the system and application software communicate with the hardware processor. Each native instruction is a discrete code that is recognized by the processing architecture and can specify a specific register for arithmetic, addressing, or control functions; a specific memory location or offset; and a specific addressing mode for interpreting operands. More complex operations are constructed by combining these simple native instructions, which are executed in sequence or in other ways as indicated by control flow instructions.

[0120] The relationship between executable software instructions and hardware processors is structural. In other words, the instructions themselves are a series of symbols or values. They do not convey any information per se. It is the processor that is pre-configured by design to interpret the symbols / values ​​to give meaning to the instructions.

[0121] The models used herein can be configured to execute on a single machine at a single location, on multiple machines at a single location, or on multiple machines at multiple locations. When multiple machines are used, each machine can be customized for its specific task. For example, operations requiring large code blocks and / or significant processing power can be implemented on large and / or fixed machines.

[0122] In addition, certain embodiments are related to tangible and / or non-transitory computer-readable media or computer program products, which include program instructions and / or data (including data structures) for performing various computer-implemented operations. Examples of computer-readable media include, but are not limited to: semiconductor memory devices; phase change devices; magnetic media such as hard disks, magnetic tapes; optical media such as CDs, magneto-optical media; and hardware devices specially configured to store and execute program instructions, such as read-only memory (ROM) and random access memory (RAM). Computer-readable media can be directly controlled by an end user, or the media can be indirectly controlled by an end user. Examples of directly controlled media include media located at the user's plant and / or media that is not shared with other entities. Examples of indirectly controlled media include media that can be indirectly accessed by a user via an external network and / or via a service that provides shared resources such as the "cloud". Examples of program instructions include both machine program code (e.g., produced by a compiler) and files containing higher-level program code that can be executed by a computer using an interpreter.

[0123] In various embodiments, data or information used in the disclosed methods and apparatus are provided in electronic format. Such data or information may include: design layouts, fixed parameter values, floating parameter values, feature profiles, test results, and the like. As used herein, data or other information provided in electronic format may be stored on a machine and transmitted between machines. Conventionally, data in electronic format is provided in digital form and may be stored as bits and / or bytes in various data structures, lists, databases, and the like. Data may be implemented electronically, optically, and the like.

[0124] In some embodiments, machine learning models can each be viewed as a form of application software that interfaces with the user and with system software. System software is generally interfaced with computer hardware and associated memory. In some embodiments, system software includes: operating system software and / or firmware, and any middleware and drivers installed in the system. System software provides the basic non-task specific functions of the computer. In contrast, modules and other application software are used to perform specific tasks. Each native instruction for a module is stored in a memory device and represented by a numerical value.

[0125] An exemplary computer system 800 is depicted in Figure 8 As shown, computer system 800 includes an input / output subsystem 802, which can implement an interface for interacting with a human user and / or other computer systems, depending on the application. Embodiments of the present invention can be implemented in program code on system 800, which has an I / O subsystem 802 for receiving input program statements and / or data (e.g., via a GUI or keyboard) from a human user and displaying them to the user. I / O subsystem 802 can include, for example: a keyboard, a mouse, a graphical user interface, a touch screen, or other input interface; and, for example: an LED or other flat screen display, or other output interface. Other components of embodiments of the present invention can be implemented using a computer system similar to computer system 800, but may not have I / O.

[0126] The program code may be stored in a non-transitory medium, such as a persistent storage 810 or a main memory 808, or both. One or more processors 804 read the program code from the one or more non-transitory media and execute the program code to enable the computer system to perform the methods performed by the embodiments herein, for example, those involving the generation or use of process simulation models as described herein. It should be understood by those skilled in the art that the processor may accept source code such as statements for performing training and / or modeling operations, and interpret or compile the source code into machine code understandable at the hardware gate level of the processor. The bus 805 couples the I / O subsystem 802, the processor 804, the peripheral device 806, the communication interface 807, the main memory 808, and the persistent storage 810.

[0127] in conclusion

[0128] In the above description, a large number of specific details are described to provide a thorough understanding of the proposed embodiments. The disclosed embodiments can be practiced without requiring some or all of these specific details. In other examples, conventional processing operations are not described in detail in order not to obscure the disclosed embodiments. Although the disclosed embodiments are described together with specific embodiments, it should be understood that it is not intended to limit the disclosed embodiments.

[0129] Unless otherwise indicated, method operations and device characteristics described herein involve techniques and equipment commonly used in metrology, semiconductor device processing technology, software design and programming, and statistics, which are within the skill of the art.

[0130] Unless otherwise defined herein, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art. Various scientific dictionaries containing the terms contained herein are well known and available to those skilled in the art. Although any methods and materials similar or equivalent to those described herein can be used in the practice or testing of the embodiments described herein, certain methods and materials are described.

[0131] Numerical ranges include numbers that define ranges. Each maximum numerical limit provided in various places of this specification is intended to include each lower numerical limit, as if these lower numerical limits are clearly written in this article. Each minimum numerical limit provided in various places of this specification will include each higher numerical limit, as if these higher numerical limits are clearly written in this article. Each numerical range provided in various places of this specification will include each narrower numerical range that falls within a wider numerical range, as if such narrower numerical ranges are clearly written in this article.

[0132] The headings provided herein are not intended to limit the invention.

[0133] As used herein, the singular terms "a", "an", and "the" include plural references unless the context clearly dictates otherwise. As used herein, the term "or" refers to a non-exclusive "or" unless otherwise indicated.

Claims

1. A defect analysis computing system, comprising: (a) one or more processors; (b) program instructions for execution on the one or more processors, the program instructions defining: One or more first stage defect classification engines configured to: receiving metrology data obtained for defects on a substrate comprising an electronic device or a partially processed electronic device, wherein the metrology data comprises an image, composition data, and / or a wafer spectrum, and wherein the metrology data further comprises metadata related to an inspection tool used to obtain the metrology data, and generating a first stage defect classification based on the metrology data; and The second stage defect classification engine is configured to: receiving the first stage defect classification generated by the one or more first stage defect classification engines, receiving manufacturing information including data regarding (i) a manufacturing device that performs a process on the substrate and generates a defect on the substrate, (ii) the process, (iii) one or more materials on the substrate, and / or (iv) a priori defect classifications of the manufacturing device and / or the process, utilizing the first stage defect classification and the manufacturing information to determine one or more sources of defects on the substrate, and A probability of a defect being caused by a first source is output, the first source being associated with the manufacturing equipment, one or more materials on the substrate, and / or a processing technique.

2. The defect analysis computing system of claim 1, wherein the metrology data comprises the image, the composition data, and the wafer spectrum.

3. The defect analysis computing system according to any one of claims 1-2, wherein the first stage defect classification includes morphological classification of defects on the substrate.

4. The defect analysis computing system according to any one of claims 1-2, wherein the first stage defect classification comprises a composition classification of defects on the substrate.

5. The defect analysis computing system according to any one of claims 1-2, wherein the first stage defect classification comprises wafer spectrum classification of defects on the substrate.

6. The defect analysis computing system of any one of claims 1-2, wherein the first stage defect classification engine comprises one or more neural networks.

7. The defect analysis computing system according to any one of claims 1-2, wherein the manufacturing equipment is a dry etching reactor, a chemical vapor deposition reactor, an atomic layer deposition reactor, a physical vapor deposition reactor, or an electroplating reactor.

8. The defect analysis computing system of any one of claims 1-2, wherein the second stage defect classification engine is additionally configured to further classify the defects on the substrate.

9. The defect analysis computing system of any one of claims 1-2, wherein the second stage defect classification engine is additionally configured to provide suggested corrective actions to reduce defect generation on the substrate and / or reduce the occurrence of defects on future processed substrates.

10. The defect analysis computing system of any one of claims 1-2, wherein the second stage defect classification engine is configured to determine the one or more sources of defects on the substrate by utilizing Bayesian analysis.

11. The defect analysis calculation system according to any one of claims 1 to 2, wherein: The metrology data is obtained in-situ during the machining process.

12. A defect analysis computing system according to any one of claims 1-2, wherein the one or more first-stage defect classification engines are further configured to receive sensor data selected from a group consisting of: environmental conditions of the processing process, changes in mass of the substrate during the processing process, mechanical forces experienced during the processing process, and combinations thereof, and wherein the second-stage defect classification engine is further configured to utilize the sensor data to determine the one or more sources of defects on the substrate.

13. A calculation method for analyzing defects, the calculation method comprising: receiving metrology data obtained for defects on a substrate comprising an electronic device or a partially processed electronic device, wherein the metrology data comprises an image, composition data, and / or a wafer spectrum and the metrology data further comprises metadata related to an inspection tool used to obtain the metrology data; generating a first stage defect classification based on the metrology data; receiving manufacturing information including data regarding (i) a manufacturing device that performs a process on the substrate and generates a defect on the substrate, (ii) the process, (iii) one or more materials on the substrate, and / or (iv) a priori defect classifications of the manufacturing device and / or the process, utilizing the first stage defect classification and the manufacturing information to determine one or more possible sources of defects on the substrate, and A probability of a defect being caused by a first source is output, the first source being associated with the manufacturing equipment, one or more materials on the substrate, and / or a processing technique.

14. A computer program product for analyzing defects, the computer program product comprising a non-transitory computer readable medium on which are provided computer executable instructions for: receiving metrology data obtained for defects on a substrate comprising an electronic device or a partially processed electronic device, wherein the metrology data comprises an image, composition data, and / or a wafer spectrum and the metrology data further comprises metadata related to an inspection tool used to obtain the metrology data; generating a first stage defect classification based on the metrology data; receiving manufacturing information including data regarding (i) a manufacturing device that performs a process on the substrate and generates a defect on the substrate, (ii) the process, (iii) one or more materials on the substrate, and / or (iv) a priori defect classifications of the manufacturing device and / or the process, utilizing the first stage defect classification and the manufacturing information to determine one or more possible sources of defects on the substrate, and A probability of a defect being caused by a first source is output, the first source being associated with the manufacturing equipment, one or more materials on the substrate, and / or a processing technique.

15. The computer program product of claim 14, wherein the metrology data comprises the image, the composition data, and the wafer spectrum.

16. The computer program product of any of claims 14-15, wherein the first stage defect classification comprises a morphological classification of defects on the substrate.

17. The computer program product of any of claims 14-15, wherein the first stage defect classification comprises a composition classification of defects on the substrate.

18. The computer program product of any one of claims 14-15, wherein the first stage defect classification comprises a wafer spectrum classification of defects on the substrate.

19. The computer program product of any one of claims 14-15, wherein the computer executable instructions for generating a first stage defect classification based on the metrology data include: computer executable instructions for processing the metrology data on one or more neural networks.

20. The computer program product of any one of claims 14-15, wherein the fabrication equipment is a dry etching reactor, a chemical vapor deposition reactor, an atomic layer deposition reactor, a physical vapor deposition reactor, or an electroplating reactor.

21. The computer program product according to any one of claims 14-15, wherein: The computer executable instructions for determining one or more possible sources of defects on the substrate include instructions for further classifying defects on the substrate beyond the first stage defect classification.

22. The computer program product of any of claims 14-15, further comprising computer executable instructions for providing suggested corrective actions to reduce defect generation on the substrate and / or reduce the occurrence of defects on future processed substrates.

23. The computer program product of any of claims 14-15, wherein the computer executable instructions for determining one or more possible sources of defects on the substrate comprise computer executable instructions for performing a Bayesian analysis.

24. The computer program product according to any one of claims 14-15, wherein: The metrology data is obtained in-situ during the machining process.

25. A computer program product according to any one of claims 14-15, wherein the computer executable instructions for generating a first stage defect classification include: computer executable instructions for receiving sensor data selected from the group consisting of: environmental conditions of the processing process, changes in mass of the substrate during the processing process, mechanical forces experienced during the processing process, and combinations thereof, and wherein the instructions for determining one or more possible sources of defects on the substrate include instructions for utilizing the sensor data.

26. The computer program product of any one of claims 14-15, further comprising instructions for utilizing the likelihood of a defect being caused by a first source associated with the manufacturing equipment and / or process to generate a digital mapping of the manufacturing equipment and / or process.

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