Light emitting device, optical device and information processing device

Abstract

The present invention provides a light-emitting device, an optical device and an information processing device. The light-emitting device comprises: an insulating substrate with a thermal conductivity of 10 W / m·K or more; a light-emitting element arranged on the surface side of the substrate; a first back wiring arranged on the back side of the substrate and connected to one of a cathode electrode and an anode electrode of the light-emitting element; a second back wiring arranged on the back side of the substrate and connected to the other of the cathode electrode and the anode electrode; and a reference potential wiring arranged on the back side of the substrate and connected to an external reference potential.

Description

Technical Field

[0001] The present disclosure relates to a light emitting device, an optical device, and an information processing device. Background Art

[0002] Japanese Patent Publication No. 2008-252129 describes a light-emitting device comprising: a light-transmitting ceramic substrate; a light-emitting element mounted on a surface of the ceramic substrate; a wiring pattern for supplying power to the light-emitting element; and a metallization layer including a light-reflecting metal, the metallization layer being formed inside the ceramic substrate in a manner that reflects light emitted from the light-emitting element. Summary of the invention

[0003] Provided is a light-emitting device having the following structure, i.e., a light-emitting element is provided on the surface side of a heat-dissipating substrate, and compared with a structure in which only wiring connected to a cathode electrode of the light-emitting element and wiring connected to an anode electrode are provided, when the light-emitting element is driven at a low side, it is easy to dissipate the heat of the light-emitting element to the outside from the back side of the heat-dissipating substrate.

[0004] According to a first embodiment of the present disclosure, there is provided a light-emitting device, comprising: an insulating substrate having a thermal conductivity of 10 W / m·K or more; a light-emitting element disposed on the surface side of the substrate; a first back wiring disposed on the back side of the substrate and connected to one of a cathode electrode and an anode electrode of the light-emitting element; a second back wiring disposed on the back side of the substrate and connected to the other of the cathode electrode and the anode electrode; and a reference potential wiring disposed on the back side of the substrate and connected to an external reference potential.

[0005] According to a second embodiment of the present disclosure, the light-emitting device has a first surface wiring, which is arranged on the surface side of the substrate and connected to the first back wiring. The light-emitting element is arranged on the first surface wiring, and the reference potential wiring overlaps with at least a portion of the first surface wiring when viewed from above.

[0006] According to a third embodiment of the present disclosure, the light-emitting device comprises: a first surface wiring, which is arranged on the surface side of the substrate and connected to the first back wiring; and a second surface wiring, which is arranged on the surface side of the substrate and connected to the second back wiring, and the reference potential wiring overlaps with at least a portion of the first surface wiring or the second surface wiring when viewed from above.

[0007] According to the fourth aspect of the present disclosure, the reference potential wiring overlaps at least a portion of each of the first surface wiring and the second surface wiring in a plan view.

[0008] According to the fifth aspect of the present disclosure, the reference potential wiring overlaps with at least a portion of the light emitting element in a plan view.

[0009] According to the sixth aspect of the present disclosure, the area of ​​the reference potential wiring is larger than at least one of the area of ​​the first back surface wiring and the area of ​​the second back surface wiring.

[0010] According to the seventh aspect of the present disclosure, the area of ​​the reference potential wiring is larger than the area of ​​the first back surface wiring and the area of ​​the second back surface wiring.

[0011] According to an eighth aspect of the present disclosure, the substrate entirely comprises a ceramic material.

[0012] According to a ninth aspect of the present disclosure, the light emitting element is a vertical cavity surface emitting laser element.

[0013] According to a tenth aspect of the present disclosure, the light emitting element is a light emitting element array including a plurality of light emitting elements.

[0014] According to an eleventh aspect of the present disclosure, the light emitting device includes a diffusion member that diffuses the light emitted from the light emitting element and irradiates the light to the outside.

[0015] According to a twelfth aspect of the present disclosure, the light emitting device includes a driving unit connected to the light emitting element to perform low-side driving on the light emitting element.

[0016] According to the thirteenth embodiment of the present disclosure, there is provided an optical device, comprising: the light-emitting device; and a light-receiving unit, receiving reflected light emitted from the light-emitting element included in the light-emitting device and reflected by the object to be measured, the light-receiving unit outputting a signal, the signal being equivalent to the time from the light being emitted from the light-emitting element to the light being received by the light-receiving unit.

[0017] According to the fourteenth embodiment of the present disclosure, there is provided an information processing device, comprising: the optical device; and a shape determination unit, which determines the three-dimensional shape of the object to be measured based on reflected light emitted from a light source included in the optical device, reflected by the object to be measured, and received by a light receiving unit included in the optical device.

[0018] According to a fifteenth aspect of the present disclosure, the information processing apparatus includes an authentication processing section that performs authentication processing related to use of the information processing apparatus based on a determination result in the shape determination section.

[0019] According to the sixteenth embodiment of the present disclosure, there is provided a light-emitting device, comprising: an insulating first substrate; a light-emitting element having a cathode electrode and an anode electrode and arranged on the surface side of the substrate; a first back wiring arranged on the back side of the substrate and connected to one of the cathode electrode and the anode electrode; a second back wiring arranged on the back side of the substrate and connected to the other of the cathode electrode and the anode electrode; a third back wiring arranged on the back side of the substrate; and a wiring substrate, comprising an insulating second substrate having a thermal conductivity lower than that of the first substrate and carrying the first substrate, the third back wiring being connected to the wiring with the largest area among a plurality of wirings insulated from each other contained in the wiring substrate.

[0020] (Effect)

[0021] According to the first or sixteenth scheme, compared with a structure in which only wiring connected to the cathode electrode of the light-emitting element and wiring connected to the anode electrode are provided on the back side of the substrate, when the light-emitting element is driven at the low side, the heat of the light-emitting element can be easily dissipated to the outside from the back side of the substrate.

[0022] According to the second aspect, compared with a case where the reference potential wiring does not overlap at least a portion of the first surface wiring, it is easier to dissipate heat of the light emitting element from the back surface side of the substrate to the outside.

[0023] According to the third aspect, the area of ​​the reference potential wiring can be increased compared to a case where the reference potential wiring does not overlap with either the first surface wiring or the second surface wiring.

[0024] According to the fourth aspect, the area of ​​the reference potential wiring can be increased compared to the case where the reference potential wiring overlaps with only one of the first surface wiring and the second surface wiring.

[0025] According to the fifth aspect, compared with a case where the reference potential wiring does not overlap with the light emitting element in a plan view, it is easier to further dissipate the heat of the light emitting element from the back side of the substrate to the outside.

[0026] According to the sixth aspect, compared with a case where the area of ​​the reference potential wiring is smaller than the area of ​​the first back surface wiring and the area of ​​the second back surface wiring, it is easier to dissipate the heat of the light emitting element from the back surface side of the substrate to the outside.

[0027] According to the seventh aspect, compared with a case where only one of the area of ​​the first back surface wiring and the area of ​​the second back surface wiring is larger than the area of ​​the reference potential wiring, it is easier to dissipate heat of the light emitting element from the back surface side of the substrate to the outside.

[0028] According to the eighth aspect, compared with the case of using a substrate having a lower thermal conductivity than a substrate entirely made of a ceramic material, it is easier to dissipate the heat of the light emitting element to the outside from the back side of the substrate.

[0029] According to the ninth aspect, compared with the case where the light emitting element is a light emitting diode (LED) element, light with a narrower spread angle can be emitted.

[0030] According to the tenth aspect, it is easy to increase the amount of emitted light compared to a case where only a single light emitting element is used.

[0031] According to the eleventh aspect, compared with a case where no light diffusion member is provided, light emitted from the light source can be irradiated to a wider range.

[0032] According to the twelfth aspect, the light emitting element can be driven more easily than when the light emitting element is driven on the high side.

[0033] According to the thirteenth aspect, an optical device capable of three-dimensional measurement can be provided.

[0034] According to the fourteenth aspect, an information processing device capable of measuring a three-dimensional shape can be provided.

[0035] According to the fifteenth aspect, it is possible to provide an information processing device equipped with an authentication process based on a three-dimensional shape. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 This is a diagram showing an example of an information processing device.

[0037] Figure 2 It is a block diagram illustrating the structure of an information processing device.

[0038] Figure 3 is the plan view of the light source.

[0039] Figure 4 The figure is a diagram for explaining the cross-sectional structure of a vertical cavity surface emitting laser (VCSEL) element in a light source.

[0040] Figure 5 (a) and Figure 5 (b) is a diagram illustrating an example of a light diffusion member. Figure 5 (a) is a plane diagram, Figure 5 (b) is Figure 5 (a) Cross-sectional view at line VB-VB.

[0041] Figure 6This is a diagram showing an example of an equivalent circuit when a light source is driven by low-side driving.

[0042] Figure 7 (a) and Figure 7 (b) is a diagram for explaining a light emitting device to which the first embodiment is applied. Figure 7 (a) is a plane diagram, Figure 7 (b) is Figure 7 (a) is a cross-sectional view taken along line VIIB-VIIB.

[0043] Figure 8 (a) to Figure 8 (c) is a diagram for explaining wiring provided on a wiring substrate and wiring provided on a heat dissipation base material. Figure 8 (a) is a wiring provided on a wiring substrate, Figure 8 (b) is a wiring provided on the surface side of the heat dissipation substrate, Figure 8 (c) is a wiring provided on the back side of the heat dissipation substrate.

[0044] Fig. 9 It is a diagram for further explaining the light emitting device to which the first embodiment is applied.

[0045] Fig.10 (a) and Fig.10 (b) is a diagram for explaining a light emitting device to which the first embodiment is not applied. Fig.10 (a) is a plane diagram, Fig.10 (b) is Fig.10 (a) is a cross-sectional view taken along the XB-XB line.

[0046] Fig.11 (a) to Fig.11 (c) is a diagram for explaining wiring provided on a wiring board and wiring provided on a heat dissipation substrate in a light emitting device to which the first embodiment is not applied. Fig.11 (a) is a wiring provided on a wiring substrate, Fig.11 (b) is a wiring provided on the surface side of the heat dissipation substrate, Fig.11 (c) is a wiring provided on the back side of the heat dissipation substrate.

[0047] Fig.12 This is a diagram further illustrating a light emitting device to which the first embodiment is not applied.

[0048] Fig.13 (a) and Fig.13 (b) is a diagram illustrating a light-emitting device to which the second embodiment is applied. Fig.13 (a) is a plane diagram, Fig.13 (b) is Fig.13 (a) is a cross-sectional view taken along line XIIIB-XIIIB.

[0049] Fig.14 (a) to Fig.14 (c) is a diagram for explaining wiring provided on a wiring board and wiring provided on a heat dissipation substrate in a light emitting device to which the second embodiment is applied. Fig.14 (a) is a wiring provided on a wiring substrate, Fig.14 (b) is a wiring provided on the surface side of the heat dissipation substrate, Fig.14 (c) is a wiring provided on the back side of the heat dissipation substrate.

[0050] Fig.15 It is a figure which further illustrates the light emitting device to which the second embodiment is applied. DETAILED DESCRIPTION

[0051] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0052] The information processing device will often identify whether the user who is allowed to access the information processing device is allowed to access, and only when the user is authenticated as a user who is allowed to access, the user is allowed to use the device (information processing device). So far, methods of authenticating users by passwords, fingerprints, irises, etc. have been used. Recently, a more secure authentication method is being sought. As one of such methods, authentication is performed based on a three-dimensional image such as the user's facial shape.

[0053] Here, the information processing device is described as a mobile information processing terminal as an example, and the user is authenticated by recognizing the facial shape captured as a three-dimensional image. In addition, the information processing device can be applied to information processing devices such as personal computers (PCs) other than mobile information processing terminals.

[0054] Furthermore, the structure, function, method, etc. described in this embodiment can also be applied to the recognition of three-dimensional images other than faces. That is, it can also be applied to the following case, that is, a three-dimensional image of the shape of an object other than a face is obtained and recognized. Here, the object whose three-dimensional image is obtained and recognized is called the object to be measured. The object to be measured also includes a face. Moreover, the distance to the object to be measured is irrelevant.

[0055] [First embodiment]

[0056] (Information Processing Device 1)

[0057] Figure 1 1 is a diagram showing an example of the information processing device 1. As described above, the information processing device 1 is, as an example, a mobile information processing terminal.

[0058] The information processing device 1 includes a user interface unit (hereinafter referred to as a UI (User Interface) unit) 2 and an optical device 3 for acquiring a three-dimensional image. The UI unit 2 is, for example, an integrated display device that displays information to a user and an input device that inputs instructions for information processing through user operations. The display device is, for example, a liquid crystal display or an organic electroluminescence (EL) display, and the input device is, for example, a touch panel.

[0059] The optical device 3 includes a light emitting device 4 and a three-dimensional sensor (hereinafter referred to as a 3D sensor) 5. The light emitting device 4 irradiates light toward a measured object, which is an object for obtaining a three-dimensional image, and in the example described here, is a face. The 3D sensor 5 obtains the light irradiated by the light emitting device 4 and reflected by the face and returned. Here, a three-dimensional image of the face is obtained based on the so-called time of flight (ToF) method using the flight time of light. As described above, three-dimensional images other than the face can also be obtained. Sometimes obtaining a three-dimensional image is referred to as 3D perception. Moreover, sometimes a three-dimensional image is referred to as a three-dimensional shape. Moreover, sometimes obtaining a three-dimensional image or obtaining a three-dimensional shape is referred to as measuring a three-dimensional image or measuring a three-dimensional shape. The 3D sensor 5 is an example of a light receiving unit.

[0060] The information processing device 1 is configured as a computer including a central processing unit (CPU), a read only memory (ROM), a random access memory (RAM), etc. In addition, the ROM includes a non-volatile rewritable memory, such as a flash memory. And, by expanding the program or constant stored in the ROM in the RAM and executing the program by the CPU, the information processing device 1 operates to perform various information processing.

[0061] Figure 2 It is a block diagram illustrating the structure of the information processing device 1.

[0062] The information processing device 1 includes the optical device 3, an optical device control unit 8, and a system control unit 9. The optical device control unit 8 controls the optical device 3. In addition, the optical device control unit 8 includes a shape determination unit 81. The system control unit 9 controls the information processing device 1 as a system. In addition, the system control unit 9 includes an authentication processing unit 91. In addition, the UI unit 2, a speaker 92, a two-dimensional camera ( Figure 2 Referred to as 2D camera)93, etc.

[0063] The following is an explanation in order.

[0064] The light emitting device 4 included in the optical device 3 includes a wiring substrate 10, a heat dissipation substrate 100, a light source 20, a light diffusion member 30, a driving unit 50, a holding unit 60, and a capacitor 70. Furthermore, the light emitting device 4 includes passive components such as a resistor element 6 and a capacitor 7 in order to operate the driving unit 50. Here, two capacitors 70 are shown. The two capacitors 70 are referred to as capacitors 70A and capacitors 70B. In addition, when the capacitors 70A and 70B are not distinguished, they are referred to as capacitors 70. The heat dissipation substrate 100 is an example of a substrate.

[0065] The capacitor 70 may be one or more than two. Furthermore, the resistor element 6 and the capacitor 7 may be one or more. Here, sometimes, the electronic components other than the light source 20, the drive unit 50 and the capacitor 70, such as the 3D sensor 5, the resistor element 6, and the capacitor 7, are not distinguished and are referred to as circuit components. The capacitor is sometimes referred to as a capacitor or a capacitor element. The capacitor 70, that is, the capacitor 70A and the capacitor 70B here, are examples of capacitor elements.

[0066] The heat dissipation substrate 100, the driving unit 50, the capacitor 70A, the capacitor 70B, the resistor 6, and the capacitor 7 of the light emitting device 4 are provided on the surface side of the wiring substrate 10. In addition, the 3D sensor 5 may also be provided on the surface of the wiring substrate 10. The light source 20, the capacitor 70A, the capacitor 70B, and the holding unit 60 may also be provided on the surface of the heat dissipation substrate 100. Furthermore, the light diffusion member 30 is provided on the holding unit 60. Here, the outer shape of the heat dissipation substrate 100 is assumed to be the same as the outer shape of the light diffusion member 30. These structures will be described later. Figure 7 (a) Figure 7 (b) to Fig. 9 Here, the surface refers to Figure 2 More specifically, in the wiring substrate 10, the place where the heat dissipation substrate 100 is provided is referred to as the surface, the surface side, or the surface side. Also, in the heat dissipation substrate 100, the place where the light source 20 is provided is referred to as the surface, the surface side, or the surface side.

[0067] The light source 20 is configured as a light emitting element array in which a plurality of light emitting elements are arranged two-dimensionally (see the following description). Figure 3). As an example, the light emitting element is a vertical cavity surface emitting laser element (Vertical Cavity Surface Emitting Laser, VCSEL). In the following, the light emitting element is assumed to be a vertical cavity surface emitting laser element VCSEL for explanation. And, the vertical cavity surface emitting laser element VCSEL is referred to as VCSEL. The light source 20 is arranged on the surface of the heat dissipation substrate 100, so the light source 20 emits light perpendicularly to the surface of the heat dissipation substrate 100 in a direction away from the heat dissipation substrate 100. In addition, as described later, sometimes the surface of the light source 20 where the multiple light emitting elements in the light source 20 are arranged in two dimensions and emit light is called the emission surface.

[0068] The light diffusion member 30 is a member that diffuses the incident light and emits it. The light diffusion member 30 is provided in a manner that covers the light source 20 and the capacitor 70A and the capacitor 70B. That is, the light diffusion member 30 is provided at a predetermined distance from the light source 20 and the capacitor 70A and the capacitor 70B provided on the heat dissipation substrate 100 by the holding portion 60 provided on the surface of the heat dissipation substrate 100. Therefore, the light emitted by the light source 20 is diffused by the light diffusion member 30 and irradiated to the object to be measured.

[0069] In the case of three-dimensional perception by the ToF method, the light source 20 is required to emit a pulse light (hereinafter referred to as the emitted light pulse) of, for example, more than 100 MHz and a rise time of less than 1 ns through the driving unit 50. Moreover, in the case of facial authentication, the distance of the irradiated light is about 10 cm to about 1 m. And the range of the irradiated light is about 1 m square. Therefore, the light source 20 is required to have a large output and to efficiently dissipate the heat generated by the light source 20. In addition, the distance of the irradiated light is referred to as the measurement distance, and the range of the irradiated light is referred to as the irradiation range or the measurement range. Moreover, the surface that is hypothetically set in the irradiation range or the measurement range is referred to as the irradiation surface.

[0070] The 3D sensor 5 includes a plurality of light receiving cells. For example, each light receiving cell receives a pulsed reflected light (hereinafter referred to as a light receiving pulse) from the object to be measured relative to the outgoing light pulse from the light source 20, and stores a charge corresponding to the time until the light is received in each light receiving cell. The 3D sensor 5 is configured as a device of a complementary metal oxide semiconductor (CMOS) structure in which each light receiving cell includes two gates and a charge storage unit corresponding to them. Furthermore, by alternately applying pulses to the two gates, the generated photoelectrons are transmitted to either of the two charge storage units at high speed. In the two charge storage units, charges corresponding to the phase difference between the outgoing light pulse and the light receiving pulse are stored. Furthermore, the 3D sensor 5 outputs a digital value corresponding to the phase difference between the outgoing light pulse and the light receiving pulse as a signal corresponding to each light receiving cell via an analog digital (AD) converter. That is, the 3D sensor 5 outputs a signal corresponding to the time from when light is emitted from the light source 20 to when light is received by the 3D sensor 5. The AD converter may be included in the 3D sensor 5 or may be provided outside the 3D sensor 5.

[0071] When the 3D sensor 5 is a device of the aforementioned CMOS structure, for example, the shape determination unit 81 of the optical device control unit 8 obtains the digital value obtained for each light receiving cell, and calculates the distance to the object to be measured for each light receiving cell. Then, the three-dimensional image of the object to be measured is determined based on the calculated distance, and the determination result is output.

[0072] The authentication processing unit 91 of the system control unit 9 obtains the determination result determined by the shape determination unit 81, and if the three-dimensional image of the object to be measured as the determination result is consistent with the three-dimensional image stored in advance in the ROM or the like, the authentication processing related to the use of the information processing device 1 is performed. In addition, the so-called authentication processing related to the use of the information processing device 1 is, as an example, a process of whether to allow the use of the own device, that is, the information processing device 1. For example, if it is determined that the three-dimensional image of the object to be measured is consistent with the three-dimensional image of the face stored in the storage member such as the ROM, the use of the information processing device 1 including various applications provided by the information processing device 1 is allowed.

[0073] As an example, the shape determination unit 81 and the authentication processing unit 91 include a program. In addition, they may include an integrated circuit such as an Application Specific Integrated Circuit (ASIC) or a Field Programmable Gate Array (FPGA). Furthermore, they may include software such as a program and an integrated circuit such as an ASIC.

[0074] As described above, in the case of facial recognition, the light source 20 is required to irradiate light to an irradiation range of about 1m square at a distance of about 10cm to about 1m. In addition, the 3D sensor 5 receives reflected light from the object to be measured, thereby measuring the three-dimensional image of the object to be measured. Therefore, the light source 20 is required to have a large output. Therefore, it is required to dissipate heat efficiently from the light source 20.

[0075] Figure 2 , the optical device 3, the optical device control unit 8, and the system control unit 9 are separately shown, but the system control unit 9 may include the optical device control unit 8. Furthermore, the optical device control unit 8 may be included in the optical device 3. Furthermore, the optical device 3, the optical device control unit 8, and the system control unit 9 may be integrally configured.

[0076] Next, the light source 20 , the light diffusion member 30 , the drive unit 50 , and the capacitor 70A and the capacitor 70B constituting the light emitting device 4 will be described.

[0077] (Structure of Light Source 20)

[0078] Figure 3 It is a plan view of the light source 20. The light source 20 is composed of a plurality of VCSELs arranged in a two-dimensional array. That is, the light source 20 is configured as a light-emitting element array using VCSELs as light-emitting elements. The right direction of the paper is set as the x direction, and the upper direction of the paper is set as the y direction. The direction perpendicular to the x direction and the y direction around the counterclockwise direction is set as the z direction. In addition, the so-called surface of the light source 20 refers to the surface on the surface side of the paper, that is, the +z direction side, and the so-called back side of the light source 20 refers to the back side of the paper, that is, the -z direction side. The so-called plan view of the light source 20 refers to a view of the light source 20 observed from the surface side. To further explain, in the light source 20, the place where an epitaxial layer that functions as a light-emitting layer (active region 206 described later) is formed is referred to as the surface, surface side or surface side of the light source 20.

[0079] The VCSEL is a light emitting element as described below, that is, a light emitting element is stacked on a semiconductor substrate 200 (see Figure 4) is provided between the lower multilayer film reflector and the upper multilayer film reflector on the surface of the laser diode, so that the laser light is emitted in a direction perpendicular to the surface. As a result, VCSEL is easier to be arrayed in two dimensions than when an end-emitting laser is used. As an example, the number of VCSELs included in the light source 20 is 100 to 1000. In addition, a plurality of VCSELs are connected in parallel to each other and driven in parallel. The number of VCSELs is an example and can be set according to the measurement distance or measurement range.

[0080] On the surface of the light source 20, an anode electrode 218 common to a plurality of VCSELs is provided (see the following description). Figure 4 On the back of the light source 20, a cathode electrode 214 is provided (see Figure 4 ). That is, a plurality of VCSELs are connected in parallel. By connecting a plurality of VCSELs in parallel and driving them, it is possible to emit light with a higher intensity and irradiate the object to be measured compared to the case where the VCSELs are driven independently.

[0081] Here, the shape of the light source 20 observed from the surface side (sometimes referred to as a planar shape) is a quadrilateral. Also, the side surface on the +y direction side is referred to as the side surface 21A, the side surface on the -y direction side is referred to as the side surface 21B, the side surface on the -x direction side is referred to as the side surface 22A, and the side surface on the +x direction side is referred to as the side surface 22B. The side surface 21A and the side surface 21B face each other. The side surface 22A and the side surface 22B connect the side surface 21A and the side surface 21B, respectively, and face each other.

[0082] (VCSEL structure)

[0083] Figure 4 1 is a diagram for explaining the cross-sectional structure of one VCSEL in the light source 20. The VCSEL is a VCSEL of a λ resonance structure. The upper direction on the paper is referred to as the z direction, the +z direction is referred to as the upper side, and the -z direction is referred to as the lower side.

[0084] The VCSEL is composed of an n-type lower distributed Bragg reflector (DBR) 202, an active region 206, and a p-type upper distributed Bragg reflector 208 stacked in sequence on an n-type GaAs or other semiconductor substrate 200. The n-type lower distributed Bragg reflector 202 is formed by alternately stacking AlGaAs layers with different Al components, the active region 206 includes a quantum well layer sandwiched by an upper diaphragm layer and a lower diaphragm layer, and the p-type upper distributed Bragg reflector 208 is formed by alternately stacking AlGaAs layers with different Al components. Hereinafter, the distributed Bragg reflector is referred to as DBR.

[0085] The n-type lower DBR 202 is configured so that Al 0.9 Ga 0.1 The thickness of each layer of the lower DBR 202 is λ / 4n. r (where λ is the oscillation wavelength, n r is the refractive index of the medium), and 40 periods are alternately stacked. As a carrier, silicon is doped as an n-type impurity. The carrier concentration is, for example, 3×10 18 cm -3 .

[0086] The active region 206 is composed of a lower diaphragm layer, a quantum well active layer, and an upper diaphragm layer stacked together. For example, the lower diaphragm layer is undoped Al 0.6 Ga 0.4 As layer, the quantum well active layer is a non-doped InGaAs quantum well layer and a non-doped GaAs barrier layer, and the upper diaphragm layer is a non-doped Al 0.6 Ga 0.4 As layer.

[0087] The p-type upper DBR 208 is configured so that the p-type Al 0.9 Ga 0.1 The thickness of each layer of the upper DBR 208 is λ / 4n. r , and 29 cycles are alternately stacked. As a carrier, carbon is doped as a p-type impurity. The carrier concentration is, for example, 3×10 18 cm -3 Preferably, a contact layer including p-type GaAs is formed at the uppermost layer of the upper DBR 208 , and a current constriction layer 210 including p-type AlAs is formed at the lowermost layer of the upper DBR 208 or inside thereof.

[0088] By etching the semiconductor layer stacked from the upper DBR 208 to the lower DBR 202, a cylindrical mesa M is formed on the semiconductor substrate 200. As a result, the current constriction layer 210 is exposed on the side of the mesa M. Through the oxidation process, an oxidized region 210A oxidized from the side of the mesa M and a conductive region 210B surrounded by the oxidized region 210A are formed in the current constriction layer 210. In addition, in the oxidation process, the oxidation rate of the AlAs layer is faster than that of the AlGaAs layer, and the oxidized region 210A is oxidized at a substantially constant rate from the side of the mesa M toward the inside, so the cross-sectional shape of the conductive region 210B becomes a shape reflecting the outer shape of the mesa M, that is, a circular shape, and its center is substantially consistent with the axis of the mesa M shown by the dotted line. In this embodiment, the mesa M has a columnar structure.

[0089] On the uppermost layer of the mesa M, a metal annular p-side electrode 212 formed by stacking Ti / Au and the like is formed. The p-side electrode 212 is in ohmic contact with a contact layer provided in the upper DBR 208. The inner side of the annular p-side electrode 212 becomes a light exit port 212A from which laser light is emitted to the outside. That is, the VCSEL emits light in a direction perpendicular to the surface (the surface on the +z direction side) of the semiconductor substrate 200. And, the axis of the mesa M becomes the optical axis. Furthermore, on the back side of the semiconductor substrate 200, a cathode electrode 214 is formed as an n-side electrode. In addition, the surface (the surface on the +z direction side) of the upper DBR 208 on the inner side of the p-side electrode 212 is a light exit surface. That is, the optical axis direction of the VCSEL becomes the light exit direction.

[0090] In addition, an insulating layer 216 is provided so as to cover the surface of the mesa M except for the portion of the p-side electrode 212 connected to the anode electrode 218 and the light exit port 212A. In addition, the anode electrode 218 is provided so as to be in ohmic contact with the p-side electrode 212 except for the light exit port 212A. In addition, the anode electrode 218 is provided in common to a plurality of VCSELs. That is, the p-side electrodes 212 of the plurality of VCSELs constituting the light source 20 are connected in parallel via the anode electrode 218.

[0091] Figure 4 In the figure, the portion of the anode electrode 218 is marked as [A] indicating that it is an anode, and the portion of the cathode electrode 214 is marked as [K] indicating that it is a cathode.

[0092] VCSEL can oscillate in either single transverse mode or multiple transverse modes. For example, the light output of one VCSEL is 4mW to 8mW. Therefore, when the light source 20 includes 500 VCSELs, the light output of the light source 20 is 2W to 4W. Such a high-output light source 20 generates a lot of heat. Therefore, it is required to efficiently and fully dissipate heat from the light source 20.

[0093] (Structure of the Light Diffusing Member 30)

[0094] Figure 5 (a) and Figure 5 (b) is a diagram illustrating an example of the light diffusion member 30 . Figure 5 (a) is a plane diagram, Figure 5 (b) is Figure 5 (a) Cross-sectional view at line VB-VB. Figure 5 In (a), the right direction of the paper is set as the x direction, and the upward direction of the paper is set as the y direction. The direction orthogonal to the x direction and the y direction in the counterclockwise direction is set as the z direction. In addition, the +z direction side of the light diffusion member 30 is called the surface or the surface side, and the -z direction side is called the back side or the back side. Therefore, Figure 5In (b), the right direction of the paper is the x direction, the back direction of the paper is the y direction, and the upper direction of the paper is the z direction.

[0095] like Figure 5 As shown in (b), the light diffusion member 30 includes, for example, a resin layer 32, which is a layer having concave and convex portions for diffusing light formed on the back side (-z direction) of a glass substrate 31 whose two surfaces are parallel and flat. The light diffusion member 30 expands the spread angle of light incident from the VCSEL of the light source 20 and emits it. That is, the concave and convex portions formed on the resin layer 32 of the light diffusion member 30 refract or scatter the light, so that the incident light becomes light with a wider spread angle and is emitted. That is, as Figure 5 As shown in (a) and (b), the light diffusion member 30 makes the light with a spread angle θ incident from the back side (-z direction side) and emitted from the VCSEL become a spread angle larger than θ from the surface (+z direction side). The light emitted Therefore, when the light diffusion member 30 is used, the area of ​​the irradiated surface irradiated by the light emitted from the light source 20 is expanded compared to the case where the light diffusion member 30 is not used. It is the half-peak width (Full Width Half Maximum, FWHM).

[0096] The light diffusion member 30 has a planar shape of, for example, a quadrilateral, and a width Wd in the x direction of x and the width Wd in the y direction y 1mm~30mm, thickness t in z direction d If the light diffusion member 30 has such a size and shape, a light diffusion member particularly suitable for face authentication of a mobile information processing terminal or for measuring a three-dimensional image of a measured object at a relatively close distance of about several meters at most can be provided. In addition, the plane shape of the light diffusion member 30 may also be other shapes such as a polygon or a circle.

[0097] (Driver 50 and Capacitor 70A, Capacitor 70B)

[0098] When the light source 20 is to be driven at a higher speed, low-side driving can be performed. The so-called low-side driving refers to a structure in which a driving element such as a MOS transistor is located on the downstream side of a current path relative to a driving object such as a VCSEL. On the contrary, a structure in which a driving element is located on the upstream side is called a high-side driving.

[0099] Figure 6 1 is a diagram showing an example of an equivalent circuit when the light source 20 is driven by low-side driving. Figure 62 shows the VCSEL of the light source 20, the driving unit 50, the capacitor 70A, the capacitor 70B and the power supply 82. In addition, the power supply 82 is provided at Figure 2 The optical device control unit 8 shown in FIG. 8 is a power supply 82 that generates a DC voltage with the + side being the power supply potential and the - side being the reference potential. The power supply potential is supplied to the power supply line 83, and the reference potential is supplied to the reference line 84. In addition, the reference potential may be a ground potential (sometimes referred to as GND, Figure 6 marked with [G]).

[0100] As described above, the light source 20 is composed of a plurality of VCSELs connected in parallel. Figure 4 , Figure 6 Marked as [A] in the figure) is connected to the power line 83.

[0101] The driving unit 50 includes an n-channel MOS transistor 51 and a signal generating circuit 52 for turning the MOS transistor 51 on and off. Figure 6 The cathode electrode 214 (see Figure 4 , Figure 6 The source of MOS transistor 51 ( Figure 6 The gate of the MOS transistor 51 is connected to the signal generating circuit 52. That is, the MOS transistor 51 of the VCSEL and driving unit 50 is connected in series between the power supply line 83 and the reference line 84. The signal generating circuit 52 generates an "H level" signal for turning on the MOS transistor 51 and an "L level" signal for turning off the MOS transistor 51 under the control of the optical device control unit 8.

[0102] One terminal of the capacitor 70A and the capacitor 70B is connected to the power supply line 83, and the other terminal is connected to the reference line 84. Here, if there are a plurality of capacitors 70, the plurality of capacitors 70 are connected in parallel. That is, Figure 6 In the embodiment, the capacitor 70 is two capacitors 70A and 70B. The capacitor 70 is, for example, an electrolytic capacitor or a ceramic capacitor.

[0103] Next, a method of driving the light source 20 by low-side driving will be described.

[0104] First, assume that the signal generated by the signal generating circuit 52 in the driving unit 50 is at an "L level". At this time, the MOS transistor 51 is in an off state. That is, at the source ( Figure 6 [S])-Drain( Figure 6Therefore, no current flows in the VCSEL connected in series with the MOS transistor 51. That is, the VCSEL does not emit light.

[0105] At this time, capacitors 70A and 70B are connected to power supply 82, one terminal of capacitors 70A and 70B connected to power supply line 83 becomes a power supply potential, and the other terminal connected to reference line 84 becomes a reference potential. Therefore, capacitors 70A and 70B are supplied with electric charge from power supply 82 and are charged.

[0106] Next, when the signal generated by the signal generating circuit 52 in the driving unit 50 becomes "H level", the MOS transistor 51 changes from the off state to the on state. Then, the capacitor 70A, the capacitor 70B, the MOS transistor 51 connected in series, and the VCSEL form a closed loop, and the charge stored in the capacitor 70A and the capacitor 70B is supplied to the MOS transistor 51 and the VCSEL connected in series. That is, current flows in the VCSEL, and the VCSEL emits light.

[0107] Then, when the signal generated by the signal generating circuit 52 in the driving unit 50 becomes "L level" again, the MOS transistor 51 changes from the on state to the off state. As a result, the closed loop of the capacitor 70A, the capacitor 70B, the MOS transistor 51 connected in series, and the VCSEL becomes an open loop, and no current flows to the VCSEL. As a result, the VCSEL stops emitting light. Then, the capacitor 70A and the capacitor 70B are charged by the charge supplied from the power supply 82.

[0108] As described above, every time the signal outputted from the signal generating circuit 52 changes to "H level" and "L level", the MOS transistor 51 repeatedly turns on and off, and the VCSEL repeatedly emits light and does not emit light. The on and off repetition of the MOS transistor 51 is sometimes called switching.

[0109] As described above, when the MOS transistor 51 is changed from the off state to the on state, the charge stored in the capacitor 70A and the capacitor 70B is discharged at once and supplied to the VCSEL, thereby causing the VCSEL to emit light with a short rise time of, for example, less than 1 ns. In addition, after the light emission of the VCSEL stops, the capacitor 70A and the capacitor 70B can be supplied from the power supply 82 for a time longer than the rise time. It is also possible to not provide the capacitor 70, and directly supply the charge (current) to the VCSEL from the power supply 82, but the rise time of the light emission of the VCSEL will be longer. That is, the low-side drive provided with the capacitor 70A and the capacitor 70B supplies the current to the VCSEL at once, thereby shortening the rise time of the light emission of the VCSEL. To shorten the rise time of the light emission of the VCSEL, it is better that the inductance (hereinafter referred to as the circuit inductance) of the closed loop including the capacitor 70A, the capacitor 70B, the MOS transistor 51 connected in series, and the VCSEL is small. If the circuit inductance is large, the flow of the charge will be delayed, resulting in a longer rise time of the light emission of the VCSEL. That is, it is required to reduce the circuit inductance.

[0110] (Light emitting device 4)

[0111] Next, the light emitting device 4 will be described in detail.

[0112] Figure 7 (a) and Figure 7 (b) is a diagram for explaining a light emitting device 4 to which the first embodiment is applied. Figure 7 (a) is a plane diagram, Figure 7 (b) is Figure 7 The cross-sectional view at line VIIB-VIIB of (a). In addition, Figure 7 (a) is a view observed through the light diffusion member 30. Here, Figure 7 In (a), the right direction of the paper is set as the x direction, and the upper direction of the paper is set as the y direction. The direction perpendicular to the x direction and the y direction around the counterclockwise direction (the surface direction of the paper) is set as the z direction. In addition, with respect to each component described below (wiring substrate 10, heat dissipation substrate 100, light diffusion component 30, etc.), the surface direction of the paper (+z direction) is called the surface or the surface side, and the back direction of the paper (-z direction) is called the back side or the back side. In addition, observing the surface side through each component is called a top view. In addition, Figure 7 In (b), the right direction of the paper is the x direction, the back direction of the paper is the y direction, and the upper direction of the paper is the z direction.

[0113] like Figure 7 (a) and Figure 7As shown in (b), a heat dissipation substrate 100, a driving unit 50, a resistor 6, and a capacitor 7 are provided on the surface of the wiring substrate 10. In addition, a light source 20, a capacitor 70A, a capacitor 70B, and a holding unit 60 are provided on the surface of the heat dissipation substrate 100. In addition, a light diffusion member 30 is provided on the holding unit 60. Figure 7 As shown in (a) of FIG. 4 , in the light emitting device 4 , the heat dissipation substrate 100 and the driving unit 50 are arranged in the x direction. Also, on the surface of the heat dissipation substrate 100 , the capacitors 70A and 70B are arranged in the y direction with the light source 20 interposed therebetween.

[0114] like Figure 7 As shown in (a), the holding portion 60 includes a wall 61A, a wall 61B, a wall 62A, and a wall 62B which are arranged in a manner to surround the light source 20 and the capacitor 70A and the capacitor 70B. Furthermore, the holding portion 60 holds the light diffusion component 30 through the walls 61A, the wall 61B, the wall 62A, and the wall 62B. That is, the light diffusion component 30 is arranged at a predetermined distance from the light source 20 and the capacitor 70A and the capacitor 70B arranged on the heat dissipation substrate 100 through the holding portion 60. Furthermore, the light diffusion component 30 is arranged in a manner to cover the light source 20 and the capacitor 70A and the capacitor 70B. Here, the so-called light diffusion component 30 covering the light source 20 means that the light diffusion component 30 is arranged on the emission path of the light emitted by the light source 20, and the light emitted by the light source 20 is transmitted through the light diffusion component 30. As described later, it refers to a state in which, when the light source 20 is observed through the light diffuser 30 from the surface side of the light diffuser 30, that is, when viewed from above, the light source 20 overlaps with the light diffuser 30. In addition, the so-called top view refers to observing the light source 20 through the light diffuser 30 from the upper surface side of the light diffuser 30. The same applies to other situations.

[0115] The holding portion 60 is, for example, a resin molded member. Furthermore, the holding portion 60 may be colored, for example, black to absorb the light emitted by the light source 20. Thus, the light emitted by the light source 20 that is irradiated to the holding portion 60 is absorbed, and the light that is transmitted through the holding portion 60 or reflected by the holding portion 60 and irradiates the object is suppressed.

[0116] Here, the outer shape of the heat dissipation substrate 100, the outer shape of the light diffusion member 30, and the outer shape of the holding portion 60 are assumed to be the same. Therefore, the outer edges of the heat dissipation substrate 100, the light diffusion member 30, and the holding portion 60 overlap. In addition, the outer edge of the heat dissipation substrate 100 may be larger than the outer edge of the light diffusion member 30 or the outer edge of the holding portion 60. Conversely, the outer edge of the heat dissipation substrate 100 may be smaller than the outer edge of the light diffusion member 30 or the outer edge of the holding portion 60. In this case, the holding portion 60 only needs to be provided on the surface of the wiring substrate 10.

[0117] Furthermore, the light diffusion member 30 may be provided so as to cover only the light source 20 .

[0118] The wiring substrate 10 and the heat dissipation substrate 100 are provided with a plurality of wirings on the front and back sides thereof. Figure 8 (a) to Figure 8 (c) Fig. 9 The wiring refers to a conductor pattern that connects an electric circuit, and the shape is not limited.

[0119] As described above, the light source 20 is provided on the surface of the heat dissipation substrate 100. Furthermore, the heat dissipation substrate 100 is provided on the surface of the wiring substrate 10. Thus, the heat generated from the light source 20 is efficiently dissipated. As described below, since the thermal conductivity of the substrate constituting the wiring substrate 10 is small, the light source 20 is provided on the surface of the heat dissipation substrate 100 having a larger thermal conductivity than the wiring substrate 10.

[0120] The wiring substrate 10 is composed of, for example, a wiring layer provided on an insulating substrate such as glass epoxy resin, and the wiring layer forms wirings of metals such as copper (Cu) foil. Here, the wiring substrate 10 is described as a double-layer printed circuit board having wiring layers provided on the surface side and the back side of the substrate. For such a substrate using glass epoxy resin as a substrate, as an example, there is a substrate called FR-4. The thickness of the substrate is about 100 μm. In addition, the thermal conductivity of the substrate is about 0.4 W / m·K. In addition, the thermal conductivity of copper (Cu) is about 360 W / m·K. Unless otherwise specified, the thermal conductivity shown here is a value at 25°C. The substrate of the wiring substrate 10 is an example of a second substrate.

[0121] The heat dissipation substrate 100 is a component with a higher thermal conductivity than the wiring substrate 10, and includes an insulating substrate. For example, the heat dissipation substrate 100 is preferably a substrate with a thermal conductivity of 10 W / m·K or more, and further preferably a substrate with a thermal conductivity of 50 W / m·K or more. Moreover, a substrate with a thermal conductivity of 100 W / m·K or more is more preferred. As a substrate with a thermal conductivity of 10 W / m·K or more, aluminum oxide (Al2O3) with a thermal conductivity of 20 W / m·K to 30 W / m·K can be listed. Moreover, as a substrate with a thermal conductivity of 50 W / m·K or more, silicon nitride (Si3N4) with a thermal conductivity of about 85 W / m·K can be listed. Furthermore, as a substrate with a thermal conductivity of 100 W / m·K or more, aluminum nitride (AlN) with a thermal conductivity of 150 W / m·K to 250 W / m·K can be listed. They are sometimes referred to as ceramic materials. That is, the heat dissipation substrate 100 may include ceramic materials as a whole. The heat dissipation substrate 100 may be made of any insulating material having a high thermal conductivity, such as silicon (Si) not doped with impurities. The heat dissipation substrate 100 is an example of a first substrate.

[0122] The planar shape of the heat dissipation substrate 100 is a quadrilateral, and the width Ws in the x direction is x and the width Ws in the y direction y 1mm~30mm (refer to the following Figure 8 (a) to Figure 8 (c)). The thickness of the heat dissipation substrate 100 is 100 μm to 500 μm. Here, the outer shape of the heat dissipation substrate 100 is the same as that of the light diffusion member 30 described above.

[0123] Figure 8 (a) to Figure 8 (c) is a diagram for explaining wiring provided on the wiring board 10 and wiring provided on the heat dissipation substrate 100 . Figure 8 (a) is a wiring provided on the wiring substrate 10, Figure 8 (b) is a wiring provided on the surface side of the heat dissipation substrate 100, Figure 8 (c) is a wiring provided on the back side of the heat dissipation substrate 100. Figure 8 (a) Figure 8 (b) and Figure 8 The xyz direction shown in (c) is Figure 7 The xyz directions shown in (a) and (b) are the same. Therefore, Figure 8 The wiring provided on the back side of the heat dissipation substrate 100 shown in (c) is shown as viewed from the front side of the heat dissipation substrate 100, and the Figure 8 (b) shows the state of the wiring provided on the surface of the heat dissipation substrate 100 and the heat dissipation substrate 100. In addition, the portion of the light source 20 connected to the cathode electrode 214 is marked as [K], the portion connected to the anode electrode 218 is marked as [A], and the portion supplied with the reference potential is marked as [G].

[0124] First of all, Figure 8 The wiring provided on the wiring substrate 10 shown in (a) will be described. Figure 8 In (a) of FIG. 1 , the outer shape of the heat dissipation substrate 100 is indicated by a dashed line.

[0125] Figure 8 In (a), the solid lines represent the wiring provided on the surface side of the wiring substrate 10, and the dotted lines represent the wiring provided on the back side of the wiring substrate 10. That is, on the surface side of the wiring substrate 10, the cathode wiring 11, the anode wiring 12 and the reference potential wiring 13F which are insulated from each other are provided.

[0126] The cathode wiring 11 has a rectangular planar shape, with the end on the +x direction side connected to the drive unit 50, and the end on the -x direction side connected to the cathode electrode 214 of the light source 20 via the heat dissipation substrate 100 (see Figure 7 (a) and Figure 7 (b)).

[0127] The anode wiring 12 has a rectangular planar shape, and the end portion on the +x direction side is connected to the anode electrode 218 of the light source 20 via the heat dissipation substrate 100, and the end portion on the -x direction side is connected to the + side of the power supply 82. In addition, the anode wiring 12, the reference potential wiring 13, and the cathode wiring 11 are arranged along the x direction. In addition, the reference potential wiring 13 is provided in a manner extending from the cathode wiring 11 and the anode wiring 12 in the ±y direction, and the extended portion is extended in the ±x direction.

[0128] A reference potential wiring 13B is provided on the back side of the wiring substrate 10. The reference potential wiring 13F provided on the front side of the wiring substrate 10 is connected to the reference potential wiring 13B provided on the back side via a conductive through conductor 13V (see Figure 7 (b)) is electrically connected. And, a reference potential is supplied to the reference potential wiring 13B provided on the back side. That is, the reference potential wiring 13F provided on the surface is supplied with a reference potential from the reference potential wiring 13B provided on the back side. Here, the reference potential wiring 13B is provided over the entire back side of the wiring substrate 10. And, the area of ​​the reference potential wiring 13B is set to be larger than the areas of other cathode wirings 11 and anode wirings 12. Generally speaking, in order to stabilize the potential of the wiring provided on the surface, the reference wiring provided on the back side of the wiring substrate 10 is often provided over a large area on the back side. In addition, Figure 8 In (a), the through conductor 13V is omitted. The through conductor 13V is made of metal such as copper (Cu), and therefore has a high thermal conductivity. The same applies to the through conductor provided in the heat dissipation substrate 100 described later. In addition, the through conductor is sometimes called a through hole.

[0129] Next, Figure 8 (b) and Figure 8 The wiring provided on the heat dissipation substrate 100 shown in (c) will be described.

[0130] like Figure 8 As shown in (b), a cathode wiring 111F, an anode wiring 112F and two reference potential wirings 113F which are insulated from each other are provided on the surface side of the heat dissipation substrate 100. On the surface of the cathode wiring 111F, the cathode electrode 214 side of the light source 20 is mounted (see Figure 7 (b)). The anode wiring 112F is provided so as to surround the three sides (-x direction side and ±y direction side) of the cathode wiring 111F. The anode wiring 112F is connected to the side 21A and the side 21B (±y direction side) of the light source 20 by the bonding wire 23A and the bonding wire 23B (refer to Figure 7(a)). In addition, two reference potential wirings 113F are provided on the ±y direction sides of the anode wiring 112F. The cathode wiring 111F is an example of a first surface wiring, and the anode wiring 112F is an example of a second surface wiring.

[0131] like Figure 8 As shown in (c), a cathode wiring 111B, an anode wiring 112B, and a reference potential wiring 113B are provided on the back side of the heat dissipation substrate 100 and are insulated from each other. Figure 8 In (c), the dashed line indicates Figure 8 The cathode wiring 111F shown in (a) of FIG. 1 is an example of a first back surface wiring, the anode wiring 112B is an example of a second back surface wiring, and the reference potential wiring 113B is an example of a reference potential wiring and a third back surface wiring.

[0132] The cathode wiring 111B is provided at a position facing the cathode wiring 111F provided on the surface side of the heat dissipation substrate 100, sandwiching the heat dissipation substrate 100. However, the area of ​​the cathode wiring 111B is set to be smaller than the area of ​​the cathode wiring 111F. Furthermore, the cathode wiring 111F and the cathode wiring 111B are connected via the through conductor 111V. The anode wiring 112B is provided at a position facing a part of the end portion on the x direction side of the anode wiring 112F provided on the surface side of the heat dissipation substrate 100, sandwiching the heat dissipation substrate 100. That is, the area of ​​the anode wiring 112B is smaller than the area of ​​the anode wiring 112F. Furthermore, the anode wiring 112F and the anode wiring 112B are electrically connected via the through conductor 112V.

[0133] The reference potential wiring 113B is provided between the cathode wiring 111B and the anode wiring 112B, and is provided so as to extend from the cathode wiring 111B and the anode wiring 112B in the ±y direction. In addition, the end side of the reference potential wiring 113B in the ±y direction is provided at a position facing two reference potential wirings 113F provided on the surface side of the heat dissipation substrate 100 across the heat dissipation substrate 100. In addition, the reference potential wiring 113F and the reference potential wiring 113B are electrically connected by the through conductor 113V.

[0134] As described above, the cathode wiring 111F and cathode wiring 111B, the anode wiring 112F and anode wiring 112B, and the reference potential wiring 113F and reference potential wiring 113B, which are provided on the front side and the back side of the heat dissipation substrate 100 and are electrically connected to each other, have different shapes. Figure 8As shown in (c), when viewed from above, the edge portions of the reference potential wiring 113B and the cathode wiring 111F shown by the dotted line overlap on the ±y direction side and the -x direction side. Here, the overlap between the cathode wiring 111F and the reference potential wiring 113B is the overlap width W1o. The edge portions of the reference potential wiring 113B and the light source 20 shown by the dotted line also overlap on the ±y direction side and the -x direction side. Here, the overlap between the cathode wiring 111F and the light source 20 is the overlap width W2o. The overlap width W1o and the overlap width W2o are the same on the ±y direction side and the -x direction side. In addition, overlap is sometimes referred to as overlap.

[0135] Furthermore, the area of ​​the reference potential wiring 113B provided on the back side of the heat dissipation substrate 100 is set to be larger than the area of ​​either the cathode wiring 111F or the anode wiring 112F provided on the front side of the heat dissipation substrate 100. Furthermore, the area of ​​the reference potential wiring 113B is set to be large enough to include the capacitor 70A and the capacitor 70B. That is, in a plan view, the capacitor 70A and the capacitor 70B are included in the reference potential wiring 113F. In addition, the area of ​​the reference potential wiring 113B provided on the back side of the heat dissipation substrate 100 may also be set to be larger than the area of ​​either the cathode wiring 111F or the anode wiring 112F provided on the front side of the heat dissipation substrate 100.

[0136] Fig. 9 It is a figure which further explains the light emitting device 4 to which the first embodiment is applied. Fig. 9 yes Figure 7 (a) is a cross-sectional view of the light emitting device 4 taken along line IX-IX.

[0137] pass Figure 7 (a) Figure 7 (b) Figure 8 (a) to Figure 8 (c) and Fig. 9 The electrical connection relationship in the light emitting device 4 will be described.

[0138] As described above, the heat dissipation substrate 100 is provided on the surface of the wiring board 10 , and the light source 20 and the capacitors 70A and 70B are provided on the surface of the heat dissipation substrate 100 .

[0139] The cathode wiring 11 provided on the surface side of the wiring substrate 10 is connected to the driving unit 50 (see Figure 7 (a) and Figure 7(b)). The cathode wiring 11 is connected to the cathode wiring 111B provided on the back side of the heat dissipation substrate 100 by solder or the like. The cathode wiring 111B is connected to the cathode wiring 111F provided on the front side of the heat dissipation substrate 100 via the through conductor 111V provided on the heat dissipation substrate 100. In addition, the light source 20 is mounted on the cathode wiring 111F and is connected to the cathode electrode 214 of the light source 20 (see Figure 7 (b) Fig. 9 ).

[0140] The anode wiring 12 provided on the front side of the wiring substrate 10 is connected to the anode wiring 112B provided on the back side of the heat dissipation substrate 100 by solder or the like. The anode wiring 112B is connected to the anode wiring 112F provided on the front side of the heat dissipation substrate 100 via the through conductor 112V provided on the heat dissipation substrate 100. Furthermore, the anode wiring 112F is connected to the anode electrode 218 of the light source 20 via the bonding wire 23A and the bonding wire 23B (see Figure 7 (a) Fig. 9 ).

[0141] The reference potential wiring 13F provided on the front surface side of the wiring substrate 10 is connected to the reference potential wiring 13B provided on the back surface side of the wiring substrate 10 via the through conductor 13V (see Figure 7 (b) Fig. 9 The reference potential wiring 13F is connected to the reference potential wiring 113B provided on the back surface of the heat dissipation substrate 100 by solder or the like (see Figure 7 (a) Fig. 9 ). The reference potential wiring 113B is connected to two reference potential wirings 113F provided on the surface side of the heat dissipation substrate 100 via a through conductor 113V provided on the heat dissipation substrate 100. Furthermore, the capacitor 70A and the capacitor 70B are arranged between the reference potential wiring 113F and the anode wiring 112F. That is, within the two reference potential wirings 113F, the capacitor 70A is provided between the reference potential wiring 113F on the -y side and the anode wiring 112F and is electrically connected. Similarly, within the two reference potential wirings 113F, the capacitor 70B is provided between the reference potential wiring 113F on the +y side and is electrically connected to the anode wiring 112F (refer to Figure 7 (a) Fig. 9 ).

[0142] The anode wiring 112B provided on the back side of the heat dissipation substrate 100 has a smaller area than the reference potential wiring 113B. Figure 6 ) is supplied with electric charge to charge capacitor 70A and capacitor 70B. Therefore, anode wiring 112B only needs to connect anode wiring 12 provided on the surface of wiring substrate 10 with anode wiring 112F provided on the surface of heat dissipation substrate 100 by direct current.

[0143] Next, through Fig. 9 A description will be given of a dissipation path of heat generated by the light source 20 in the light emitting device 4 to which the first embodiment is applied.

[0144] As mentioned above, the heat generated by the light source 20 is large. Therefore, it is required that the heat generated by the light source 20 is easily dissipated. As mentioned above, the thermal conductivity of metals such as copper (Cu) used as wiring materials is large. For example, copper (Cu) is about 360W / m·K, which is much larger than the 0.4W / m·K of the substrate used for the wiring substrate 10. Therefore, it is preferable that the heat generated by the light source 20 is dissipated from the frame or the like to the outside via the reference potential wiring 13B provided on the back side of the wiring substrate 10. In particular, the area of ​​the reference potential wiring 13B is larger than the area of ​​the cathode wiring 11 and the anode wiring 12 provided on the surface side of the wiring substrate 10. Therefore, by conducting the heat to the reference potential wiring 13B, it is easy to dissipate the heat. That is, it is preferable to set a path to dissipate the heat generated by the light source 20 to the reference potential wiring 13B provided on the back side of the wiring substrate 10 over a short distance.

[0145] like Fig. 9 As shown, the cathode electrode 214 of the light source 20 is provided on the cathode wiring 111F provided on the surface side of the heat dissipation substrate 100. On the other hand, the anode electrode 218 of the light source 20 is connected to the anode wiring 112F provided on the surface side of the heat dissipation substrate 100 by means of bonding wires 23A and 23B. Therefore, the heat generated by the light source 20 (hereinafter referred to as heat) has a path for conducting from the cathode electrode 214 to the cathode wiring 111F, a path for conducting from the anode electrode 218 to the anode wiring 112F via the bonding wires 23A and 23B, and a path for conducting to the surrounding space (air) of the light source 20. However, it is difficult to conduct heat in the path for conducting to the bonding wires 23A and 23B and the path for conducting to the surrounding space (air) of the light source 20. Therefore, the heat generated by the light source 20 is conducted by means of the path from the cathode electrode 214 to the cathode wiring 111F.

[0146] As described above, the thermal conductivity of the heat dissipation substrate 100 is 10 W / m·K or more, which is greater than the 0.4 W / m·K of the substrate used for the wiring substrate 10. Therefore, heat is conducted from the anode wiring 112F via the heat dissipation substrate 100 to the cathode wiring 111B, the anode wiring 112B, and the reference potential wiring 113B provided on the back side of the heat dissipation substrate 100. However, the cathode wiring 111B and the anode wiring 112B are respectively connected to the cathode wiring 11 and the anode wiring 12 of the wiring substrate 10. Moreover, neither the cathode wiring 11 nor the anode wiring 12 is connected to the reference potential wiring 13B. On the other hand, the reference potential wiring 113F is connected to the reference potential wiring 13F provided on the surface side of the wiring substrate 10, and the reference potential wiring 13F is connected to the reference potential wiring 13B provided on the back side of the wiring substrate 10 via the through conductor 13V. Therefore, the heat conducted to the reference potential wiring 113B provided on the back side of the heat dissipation substrate 100 is conducted to the reference potential wiring 13B ( Fig. 9 The path α is shown.

[0147] As described above, in the light-emitting device 4 applicable to the first embodiment, the heat generated by the light source 20 is dissipated using the following path, namely, in sequence through the cathode wiring 111F arranged on the surface side of the heat dissipation substrate 100, the heat dissipation substrate 100, the reference potential wiring 113B arranged on the back side of the heat dissipation substrate 100, the reference potential wiring 13F arranged on the surface of the wiring substrate 10, the through conductor 13V, and then through the reference potential wiring 13B arranged on the back side of the wiring substrate 10.

[0148] Here, the reference potential wiring 113B provided on the back side of the heat dissipation substrate 100 and the cathode wiring 111F provided on the surface side of the heat dissipation substrate 100 are provided in such a manner that they overlap with the overlap width W1o when viewed from above. Therefore, the path for heat conduction from the cathode wiring 111F to the reference potential wiring 113B becomes shorter. Furthermore, the reference potential wiring 113B provided on the back side of the heat dissipation substrate 100 and the light source 20 are provided in such a manner that they overlap with the overlap width W2o when viewed from above. Therefore, the path for heat conduction from the light source 20 to the reference potential wiring 113B becomes further shortened. Through them, the heat generated by the light source 20 becomes easy to dissipate. Therefore, the area of ​​the cathode wiring 111B provided on the back side of the heat dissipation substrate 100 is made smaller than the area of ​​the cathode wiring 111F provided on the surface side of the heat dissipation substrate 100.

[0149] If the cathode wiring 111F is provided on the front side of the heat dissipation substrate 100 and the reference potential wiring 113B is provided on the back side, heat is conducted from the cathode wiring 111F to the reference potential wiring 113B via the heat dissipation substrate 100 having a low thermal conductivity. Therefore, the reference potential wiring 113F and the cathode wiring 111F do not necessarily need to overlap when viewed from above. Similarly, the reference potential wiring 113F and the light source 20 do not necessarily need to overlap when viewed from above.

[0150] As described above, the heat generated by the light source 20 is dissipated to the reference potential wiring 13B provided on the back side of the wiring substrate 10 via the heat dissipation substrate 100 having a high thermal conductivity. Therefore, the heat generated by the light source 20 is easily dissipated compared to the case where the heat is dissipated via the wiring substrate 10 having a lower thermal conductivity than the heat dissipation substrate 100.

[0151] Next, a path through which a current (charge) that causes the VCSEL (light source 20 ) to emit light flows (hereinafter referred to as a current path) will be described.

[0152] The current (charge) flows from the capacitor 70A through the anode wiring 112F of the heat dissipation substrate 100 and the bonding wire 23A to the VCSEL (light source 20). Furthermore, the current (charge) flows from the VCSEL (light source 20) through the cathode wiring 111F of the heat dissipation substrate 100, the through conductor 111V, the cathode wiring 111B, and the cathode wiring 11 of the wiring substrate 10 to the MOS transistor 51 of the driving unit 50 (see Figure 6 ). Next, the current (charge) returns to the capacitor 70A from the MOS transistor 51 of the driving unit 50 via the reference potential wiring 13B, the through conductor 13V, the reference potential wiring 13F of the wiring substrate 10, the reference potential wiring 113B, the through conductor 113V, and the reference potential wiring 113F of the heat dissipation substrate 100. The same is true for the capacitor 70B.

[0153] Here, the shorter the distance between the capacitor 70A, the capacitor 70B and the VCSEL (light source 20), the shorter the current path. That is, the circuit inductance becomes smaller, and the rise time of the light emission of the VCSEL becomes shorter. In the light emitting device 4 to which the first embodiment is applied, the light source 20 and the capacitor 70A, the capacitor 70B are provided on the surface of the heat dissipation substrate 100, so the distance between the capacitor 70A, the capacitor 70B and the light source 20 is set short.

[0154] Next, for comparison, a light emitting device 4 ′ to which the first embodiment is not applied will be described.

[0155] Fig.10 (a) and Fig.10 (b) is a diagram for explaining a light emitting device 4' to which the first embodiment is not applied. Fig.10 (a) is a plane diagram, Fig.10 (b) is Fig.10 4 ′ is a cross-sectional view taken along the line XB-XB of (a). In the light emitting device 4 ′, components having the same functions as those of the light emitting device 4 are denoted by the same reference numerals even when they are different in shape. Hereinafter, descriptions of the same parts as those of the light emitting device 4 will be omitted, and descriptions of the different parts will be given.

[0156] like Fig.10 As shown in (a), the light emitting device 4' is provided with a capacitor 70A and a capacitor 70B on a wiring substrate 10, and a light source 20 is provided on the surface of a heat dissipation substrate 100. In addition, a holding portion 60 is provided on the surface of the heat dissipation substrate 100. That is, the light diffusion member 30 provided on the holding portion 60 covers the light source 20, but does not cover the capacitor 70A and the capacitor 70B.

[0157] Fig.11 (a) to Fig.11 (c) is a diagram for explaining wiring provided on the wiring board 10 and wiring provided on the heat dissipation substrate 100 in the light emitting device 4 ′ to which the first embodiment is not applied. Fig.11 (a) is a wiring provided on the wiring substrate 10, Fig.11 (b) is a wiring provided on the surface of the heat dissipation substrate 100, Fig.11 (c) is a wiring provided on the back side of the heat dissipation substrate 100 .

[0158] First of all, Fig.11 The wiring provided on the wiring substrate 10 shown in (a) will be described. Fig.11 In (a) of FIG. 1 , the outer shape of the heat dissipation substrate 100 is indicated by a dashed line.

[0159] Fig.11 In (a), the wiring provided on the front surface side of the wiring substrate 10 is indicated by a solid line, and the wiring provided on the back surface side of the wiring substrate 10 is indicated by a dotted line.

[0160] On the surface side of wiring substrate 10 , cathode wiring 11 , anode wiring 12 , and reference potential wiring 13F are provided which are insulated from each other.

[0161] The planar shape of the cathode wiring 11 on the -x direction side is a quadrilateral, and the end portion led out in the +x direction is connected to the drive unit 50. The quadrilateral portion on the -x direction side is connected to the cathode electrode 214 of the light source 20 via the heat dissipation substrate 100 (see Fig.10 (a) and Fig.10 (b)).

[0162] The anode wiring 12 is provided so as to surround three sides (-x direction side and ±y direction side) of the cathode wiring 11. And the portion led out in the -x direction is connected to the + side of the power supply 82. The anode wiring 12 is connected to the anode electrode 218 of the light source 20 via the heat dissipation substrate 100 and the bonding wires 23A and 23B.

[0163] The two reference potential wirings 13F have a quadrilateral planar shape and are provided in the ±y directions of the anode wiring 12 .

[0164] A reference potential wiring 13B is provided on the back side of the wiring substrate 10. In addition, two reference potential wirings 13F provided on the surface of the wiring substrate 10 are connected to the reference potential wiring 13B provided on the back side by a conductive through conductor 13V (see below). Fig.12 Here, the reference potential wiring 13B is provided over the entire back surface of the wiring substrate 10.

[0165] Next, Fig.11 (b) and Fig.11 The wiring provided on the heat dissipation substrate 100 shown in (c) will be described.

[0166] like Fig.11 As shown in (b), a cathode wiring 111F and an anode wiring 112F insulated from each other are provided on the surface side of the heat dissipation substrate 100. On the surface of the cathode wiring 111F, a cathode electrode 214 side of the light source 20 is mounted (see Fig.10 (b)). The anode wiring 112F is provided so as to surround the three sides (-x direction side and ±y direction side) of the cathode wiring 111F. The anode wiring 112F is connected to the anode electrode 218 of the light source 20 via the bonding wires 23A and 23B on the ±y direction side (see Fig.10 (a)).

[0167] like Fig.11 As shown in (c), a cathode wiring 111B and an anode wiring 112B insulated from each other are provided on the back side of the heat dissipation substrate 100. The planar shapes of the cathode wiring 111B and the anode wiring 112B are similar to Fig.11 The cathode wiring 111F and the anode wiring 112F provided on the surface side of the heat dissipation substrate 100 shown in (b) have the same planar shape.

[0168] The cathode wiring 111F and the cathode wiring 111B are connected via the through conductor 111V. The anode wiring 112F and the anode wiring 112B are electrically connected via the through conductor 112V.

[0169] As described above, the heat dissipation substrate 100 to which the light emitting device 4 ′ of the first embodiment is not applied does not include the reference potential wiring 113F and the reference potential wiring 113B provided on the heat dissipation substrate 100 of the light emitting device 4 .

[0170] Fig.12 This is a diagram for further explaining a light emitting device 4 ′ to which the first embodiment is not applied. Fig.12 yes Fig.10 1 is a cross-sectional view of the light emitting device 4' shown in (a) along the line XII-XII.

[0171] pass Fig.10 (a) Fig.10 (b) Fig.11 (a) to Fig.11 (c) and Fig.12 , to illustrate the electrical connection relationship in the light emitting device 4' to which the first embodiment is not applied.

[0172] As described above, heat dissipation substrate 100 is provided on the surface of wiring substrate 10, and light source 20 is provided on the surface of heat dissipation substrate 100. Capacitors 70A and 70B are provided on the surface of wiring substrate 10.

[0173] The cathode wiring 11 provided on the surface side of the wiring substrate 10 is connected to the driving unit 50 (see Fig.10 (a) and Fig.10 (b)). The cathode wiring 11 is connected to the cathode wiring 111B provided on the back side of the heat dissipation substrate 100 by solder or the like. The cathode wiring 111B is connected to the cathode wiring 111F provided on the surface of the heat dissipation substrate 100 via the through conductor 111V provided on the heat dissipation substrate 100. In addition, the light source 20 is mounted on the cathode wiring 111F and is connected to the cathode electrode 214 of the light source 20 (see Fig.10 (b) Fig.12 ).

[0174] The anode wiring 12 provided on the front side of the wiring substrate 10 is connected to the anode wiring 112B provided on the back side of the heat dissipation substrate 100 by solder or the like. The anode wiring 112B is connected to the anode wiring 112F provided on the front side of the heat dissipation substrate 100 via the through conductor 112V provided on the heat dissipation substrate 100. Furthermore, the anode wiring 112F is connected to the anode electrode 218 of the light source 20 via the bonding wire 23A and the bonding wire 23B (see Fig.10 (a) Fig.12 ).

[0175] The reference potential wiring 13F provided on the front surface side of the wiring substrate 10 is connected to the reference potential wiring 13B provided on the back surface side of the wiring substrate 10 via the through conductor 13V (see Fig.10 (b) Fig.12 ). In addition, on the wiring substrate 10, the capacitor 70A and the capacitor 70B are arranged between the reference potential wiring 13F and the anode wiring 12. That is, Fig.11 As shown in (a), a capacitor 70A is provided and electrically connected between the reference potential wiring 13F on the +y side of the wiring substrate 10 and the anode wiring 12. Similarly, a capacitor 70B is provided and electrically connected between the reference potential wiring 13F on the -y side of the wiring substrate 10 and the anode wiring 12. Similarly, a capacitor 70B is provided and electrically connected between the reference potential wiring 113F on the +y side of the two reference potential wirings 113F and the anode wiring 112F (see Fig.10 (a) Fig.12 ).

[0176] Next, through Fig.12 A description will be given of a dissipation path of heat generated by the light source 20 in the light emitting device 4 ′ to which the second embodiment is not applied.

[0177] As described above, the heat generated by the light source 20 is conducted using the following path, i.e., from the cathode electrode 214 of the light source 20 to the cathode wiring 111F provided on the heat dissipation substrate 100. Furthermore, the heat is conducted to the cathode wiring 111B and the anode wiring 112B provided on the back side of the heat dissipation substrate 100 through the heat dissipation substrate 100. Furthermore, the heat is conducted from the cathode wiring 111B and the anode wiring 112B to the cathode wiring 11 and the anode wiring 12 provided on the surface side of the wiring substrate 10. However, as described above, the thermal conductivity of the wiring substrate 10 is lower than that of metals such as copper (Cu). Therefore, the heat is conducted in the anode wiring 12 on the surface side of the wiring substrate 10, and is transferred to the reference potential wiring 13F ( Fig.12 The heat is then transferred from the reference potential wiring 13F to the reference potential wiring 13B ( Fig.12 Path β2 shown).

[0178] As described above, in the light emitting device 4' shown for comparison to which the first embodiment is not applied, the heat generated by the light source 20 is dissipated through the following path, namely, through the cathode wiring 111F provided on the front side of the heat dissipation substrate 100, the heat dissipation substrate 100, the anode wiring 112F provided on the back side of the heat dissipation substrate 100, the anode wiring 112B provided on the front side of the wiring substrate 10, the capacitor 70A, the capacitor 70B, the reference potential wiring 13F, the through conductor 13V, and the reference potential wiring 13B provided on the back side of the wiring substrate 10 in this order. That is, in the light emitting device 4', although the heat dissipation substrate 100 having a high thermal conductivity is used, it is difficult for the heat to be conducted to the reference potential wiring 13B provided on the back side of the wiring substrate 10. Therefore, the conduction of the heat from the light source 20 is hindered.

[0179] That is, in the light emitting device 4 to which the first embodiment is applied, by providing the reference potential wiring 113F and the reference potential wiring 113B on the heat dissipation substrate 100, a path is provided for heat generated by the light source 20 to be conducted to the reference potential wiring 13B provided on the back side of the wiring substrate 10 via the reference potential wiring 13F provided on the front side of the wiring substrate 10 and the through conductor 13V provided on the wiring substrate 10. Fig. 9 As shown, the heat generated by the light source 20 only needs to be conducted to the reference potential wiring 113B provided on the back side of the heat dissipation substrate 100 , and therefore, the reference potential wiring 113B only needs to be provided on the back side of the heat dissipation substrate 100 .

[0180] In contrast, in the light emitting device 4' not applying the first embodiment, neither the reference potential wiring 113F nor the reference potential wiring 113B is provided on the heat dissipation substrate 100. Therefore, it is difficult to form a path for conducting the heat generated by the light source 20 to the reference potential wiring 13B provided on the back side of the wiring substrate 10.

[0181] Next, in the light emitting device 4 ′ to which the first embodiment is not applied, a path (current path) through which a current (charge) for causing the VCSEL (light source 20 ) to emit light flows will be described.

[0182] The current (charge) flows from the capacitor 70A through the anode wiring 12 of the wiring substrate 10, the anode wiring 112B of the heat dissipation base 100, the through conductor 112V, the anode wiring 112F, and the bonding wire 23A to the VCSEL (light source 20). Furthermore, the current (charge) flows from the VCSEL (light source 20) through the cathode wiring 111F of the heat dissipation base 100, the through conductor 111V, the cathode wiring 111B, and the cathode wiring 11 of the wiring substrate 10 to the MOS transistor 51 of the driving unit 50 (see Figure 6). Next, the current (charge) returns from the MOS transistor 51 of the driving unit 50 to the capacitor 70A via the reference potential wiring 13B, the through conductor 13V, and the reference potential wiring 13F of the wiring substrate 10. The same is true for the capacitor 70B.

[0183] In the light emitting device 4', the capacitors 70A and 70B are provided on the surface of the wiring substrate 10, and the VCSEL (light source 20) is provided on the surface of the heat dissipation substrate 100. Therefore, the distance between the capacitors 70A and 70B and the VCSEL (light source 20) is greater than that of the light emitting device 4 to which the first embodiment is applied. Therefore, the circuit inductance of the light emitting device 4' is greater than that of the light emitting device 4, resulting in a longer rise time of the light emission of the VCSEL.

[0184] That is, in the light emitting device 4 to which the first embodiment is applied, the VCSEL (light source 20) and the capacitors 70A and 70B are provided on the surface of the heat dissipation substrate 100, so the distance between the capacitors 70A and 70B and the VCSEL (light source 20) is set short. As a result, the rise time of the light emission of the VCSEL is shortened.

[0185] [Second embodiment]

[0186] In the light emitting device 4 to which the first embodiment is applied, two capacitors 70A and 70B are used. Moreover, a portion of the edge of the cathode wiring 111F provided on the front side of the heat dissipation substrate 100 overlaps with a portion of the edge of the reference potential wiring 113B provided on the back side of the heat dissipation substrate 100 in a plan view. In the light emitting device 4 to which the second embodiment is applied, one capacitor 70 is provided, and the cathode wiring 111F provided on the front side of the heat dissipation substrate 100 and the reference potential wiring 113B provided on the back side of the heat dissipation substrate 100 do not overlap in a plan view. In addition, the same reference numerals are used for parts having the same functions in the first embodiment and the second embodiment. In addition, the description of the same parts is omitted, and the different parts are described.

[0187] Fig.13 (a) and Fig.13 (b) is a diagram for explaining a light emitting device 4 to which the second embodiment is applied. Fig.13 (a) is a plane diagram, Fig.13 (b) is Fig.13 The cross-sectional view at the line XIIIB-XIIIB of (a). In addition, Fig.13 (a) is a diagram observed through the light diffusion member 30 .

[0188] like Fig.13 (a) and Fig.13As shown in (b), on the surface of the wiring substrate 10, a heat dissipation substrate 100, a driving unit 50, a resistor 6, and a capacitor 7 are provided. Also, on the surface of the heat dissipation substrate 100, a light source 20, a capacitor 70, and a holding unit 60 are provided. Also, on the holding unit 60, a light diffusion member 30 is provided. Fig.13 As shown in (a) , the light diffusion member 30 is provided so as to cover the light source 20 but not to cover the capacitor 70 .

[0189] Fig.14 (a) to Fig.14 (c) is a diagram for explaining wiring provided on the wiring board 10 and wiring provided on the heat dissipation substrate 100 in the light emitting device 4 to which the second embodiment is applied. Fig.14 (a) is a wiring provided on the wiring substrate 10, Fig.14 (b) is a wiring provided on the surface side of the heat dissipation substrate 100, Fig.14 (c) is a wiring provided on the back side of the heat dissipation substrate 100 .

[0190] First of all, Fig.14 The wiring provided on the wiring substrate 10 shown in (a) will be described. Fig.14 In (a) of FIG. 1 , the outer shape of the heat dissipation substrate 100 is indicated by a dashed line.

[0191] Fig.14 In (a), the wiring provided on the front surface side of the wiring substrate 10 is indicated by a solid line, and the wiring provided on the back surface side of the wiring substrate 10 is indicated by a dotted line.

[0192] On the surface side of wiring substrate 10 , cathode wiring 11 , anode wiring 12 , and reference potential wiring 13F are provided which are insulated from each other.

[0193] The planar shape of the cathode wiring 11 on the -x direction side is a quadrilateral, and the end portion led out in the +x direction is connected to the drive unit 50. The quadrilateral portion on the -x direction side is connected to the cathode electrode 214 of the light source 20 via the heat dissipation substrate 100 (see Fig.13 (a) and Fig.13 (b)).

[0194] The anode wiring 12 has a quadrilateral planar shape and is provided in a manner facing the quadrilateral portion of the cathode wiring 11 in the +y direction. In addition, the anode wiring 12 has a portion extending in the -x direction, and this portion is connected to the + side of the power supply 82. The anode wiring 12 is connected to the anode electrode 218 of the light source 20 via the heat dissipation substrate 100 and the bonding wires 23A and 23B.

[0195] The reference potential wiring 13F has a quadrilateral planar shape and is provided so as to face the anode wiring 12 in the +y direction.

[0196] A reference potential wiring 13B is provided on the back side of the wiring substrate 10. The two reference potential wirings 13F provided on the front side of the wiring substrate 10 are connected to the reference potential wiring 13B provided on the back side via a conductive through conductor 13V (see below). Fig.15 Here, the reference potential wiring 13B is provided over the entire back surface of the wiring substrate 10.

[0197] Next, Fig.14 (b) and Fig.14 The wiring provided on the heat dissipation substrate 100 shown in (c) will be described.

[0198] like Fig.14 As shown in (b), a cathode wiring 111F, an anode wiring 112F and a reference potential wiring 113F which are insulated from each other are provided on the surface side of the heat dissipation substrate 100. The planar shape of the cathode wiring 111F is a quadrilateral, and the cathode electrode 214 side of the light source 20 is mounted on its surface (refer to Fig.13 (b)). The anode wiring 112F has a quadrilateral planar shape and is provided so as to face the +y side of the cathode wiring 111F. The anode wiring 112F is connected to the anode electrode 218 of the light source 20 via a bonding wire 23 (see Fig.13 (a)).

[0199] like Fig.14 As shown in (c), a cathode wiring 111B, an anode wiring 112B, and a reference potential wiring 113B are provided on the back side of the heat dissipation substrate 100. The planar shapes of the cathode wiring 111B, the anode wiring 112B, and the reference potential wiring 113B are similar to Fig.14 The cathode wiring 111F, the anode wiring 112F, and the reference potential wiring 113F provided on the surface side of the heat dissipation substrate 100 shown in (b) have the same planar shape.

[0200] The cathode wiring 111F and the cathode wiring 111B are connected via the through conductor 111V. The anode wiring 112F and the anode wiring 112B are electrically connected via the through conductor 112V. The reference potential wiring 113F and the reference potential wiring 113B are electrically connected via the through conductor 113V.

[0201] As described above, in the light emitting device 4 to which the second embodiment is applied, similarly to the light emitting device 4 to which the first embodiment is applied, the reference potential wiring 113F and the reference potential wiring 113B are provided on the heat dissipation substrate 100 .

[0202] Fig.15 It is a diagram for further explaining the light emitting device 4 to which the second embodiment is applied. Fig.15 yes Fig.13(a) is a cross-sectional view of the light emitting device 4 taken along line XV-XV.

[0203] first, Fig.13 (a) and Fig.15 In the following, the holding portion 60 and the light diffusion member 30 are described.

[0204] The holding portion 60 includes a cover 63 in addition to the wall 61A, the wall 61B, the wall 62A, and the wall 62B. The cover 63 is provided on the upper side (+z direction) of the holding portion 60 to cover a portion of the upper side of the holding portion 60 and the capacitor 70. In addition, the light diffusion member 30 is provided on the holding portion 60 where the cover 63 is not provided. Thereby, the area of ​​the light diffusion member 30, that is, the size of the light diffusion member 30 becomes smaller. Since the price of the light diffusion member 30 is expensive, the smaller the area of ​​the light diffusion member 30, the more the cost is reduced.

[0205] pass Fig.13 (a) Fig.13 (b) Fig.14 (a) to Fig.14 (c) and Fig.15 , to illustrate the electrical connection relationship in the light emitting device 4 applicable to the second embodiment.

[0206] As described above, the heat dissipation substrate 100 is provided on the surface of the wiring board 10 , and the light source 20 and the capacitor 70 are provided on the surface of the heat dissipation substrate 100 .

[0207] The cathode wiring 11 provided on the surface side of the wiring substrate 10 is connected to the driving unit 50 (see Fig.13 (a) and Fig.13 (b)). The cathode wiring 11 is connected to the cathode wiring 111B provided on the back side of the heat dissipation substrate 100 by solder or the like. The cathode wiring 111B is connected to the cathode wiring 111F provided on the front side of the heat dissipation substrate 100 via the through conductor 111V provided on the heat dissipation substrate 100. In addition, the light source 20 is mounted on the cathode wiring 111F and connected to the cathode electrode 214 of the light source 20 (see Fig.13 (b) Fig.15 ).

[0208] The anode wiring 12 provided on the surface side of the wiring substrate 10 is connected to the anode wiring 112B provided on the back side of the heat dissipation substrate 100 by solder or the like. The anode wiring 112B is connected to the anode wiring 112F provided on the surface side of the heat dissipation substrate 100 via the through conductor 112V provided on the heat dissipation substrate 100. Furthermore, the anode wiring 112F is connected to the anode electrode 218 of the light source 20 via the bonding wire 23A and the bonding wire 23B (see Fig.13 (a) Fig.15 ).

[0209] The reference potential wiring 13F provided on the front surface side of the wiring substrate 10 is connected to the reference potential wiring 13B provided on the back surface side of the wiring substrate 10 via the through conductor 13V (see Fig.15 The reference potential wiring 13F is connected to the reference potential wiring 113B provided on the back side of the heat dissipation substrate 100 by solder or the like (see Fig.13 (a) Fig.15 ). The reference potential wiring 113B is connected to the reference potential wiring 113F provided on the surface side of the heat dissipation substrate 100 via the through conductor 113V provided on the heat dissipation substrate 100. In addition, the capacitor 70 is arranged between the reference potential wiring 113F and the anode wiring 112F. That is, the capacitor 70 is provided between the reference potential wiring 113F and the anode wiring 112F and is electrically connected. (Refer to Fig.13 (a) Fig.15 ).

[0210] Next, through Fig.15 A description will be given of a dissipation path of heat generated by the light source 20 in the light emitting device 4 to which the second embodiment is applied.

[0211] As described above, the heat generated by the light source 20 is conducted using the following path, that is, from the cathode electrode 214 of the light source 20 to the cathode wiring 111F provided on the surface side of the heat dissipation substrate 100. And the heat is conducted to the cathode wiring 111B, the anode wiring 112B and the reference potential wiring 113B provided on the back side of the heat dissipation substrate 100 through the heat dissipation substrate 100. However, the cathode wiring 11 and the anode wiring 12 of the wiring substrate 10 to which the cathode wiring 111B and the anode wiring 112B are connected are not connected to the reference potential wiring 13B provided on the back side of the wiring substrate 10. Therefore, the heat is dissipated from the cathode wiring 11 and the anode wiring 12 via the wiring substrate 10 with low thermal conductivity. However, the reference potential wiring 113B is connected to the reference potential wiring 13B provided on the back side of the wiring substrate 10 via the reference potential wiring 13F and the through conductor 13V of the wiring substrate 10. Therefore, the heat is conducted. The reference potential wiring 113B is transmitted to the reference potential wiring 13F of the wiring substrate 10 and the through conductor 13V to the reference potential wiring 13B ( Fig.15 The path γ is shown.

[0212] In the light emitting device 4 to which the second embodiment is applied, the light emitting device 4 to which the first embodiment is applied (see Fig. 9), the distance from the cathode electrode 214 of the light source 20 to the reference potential wiring 113B provided on the heat dissipation substrate 100 is greater. However, if the heat conductivity of the heat dissipation substrate 100 is large, the heat generated by the light source 20 is easily conducted to the reference potential wiring 113B via the heat dissipation substrate 100. Therefore, compared with the case where the heat dissipation substrate 100 does not include the reference potential wiring 113B, the heat generated by the light source 20 is more easily dissipated.

[0213] As described above, the light-emitting device 4 applicable to the second embodiment is the same as the light-emitting device 4 applicable to the first embodiment, and the heat generated by the light source 20 is dissipated using the following path, namely, in sequence through the cathode wiring 111F provided on the surface side of the heat dissipation substrate 100, the heat dissipation substrate 100, the reference potential wiring 113B provided on the back side of the heat dissipation substrate 100, the reference potential wiring 13F provided on the surface side of the wiring substrate 10, the through conductor 13V, and through the reference potential wiring 13B provided on the back side of the wiring substrate 10.

[0214] Furthermore, the cathode wiring 111F, the anode wiring 112F, and the reference potential wiring 113F provided on the front side of the heat dissipation substrate 100 may have the same planar shape as the cathode wiring 111B, the anode wiring 112B, and the reference potential wiring 113B provided on the back side of the heat dissipation substrate 100. That is, as described with reference to the light emitting device 4 to which the first embodiment is applied, the reference potential wiring 113B and the cathode wiring 111F do not need to be provided so as to overlap when viewed from above. Similarly, the reference potential wiring 113B and the light source 20 do not need to be provided so as to overlap when viewed from above.

[0215] In the light emitting device 4 to which the second embodiment is applied, similarly to the light emitting device 4 to which the first embodiment is applied, the VCSEL (light source 20) and the capacitors 70A and 70B are provided on the surface of the heat dissipation substrate 100, so that the distance between the capacitors 70A and 70B and the VCSEL (light source 20) is set short. As a result, the rise time of the light emission of the VCSEL is shortened.

[0216] As described above, in the light emitting device 4 according to the first embodiment and the light emitting device 4 according to the second embodiment, by providing the reference potential wiring 113F and the reference potential wiring 113B on the heat dissipation substrate 100, a path is provided for heat generated by the light source 20 to be conducted to the reference potential wiring 13B provided on the back side of the wiring substrate 10 via the reference potential wiring 13F provided on the front side of the wiring substrate 10 and the through conductor 13V provided on the wiring substrate 10. In addition, Fig. 9 As shown, the heat generated by the light source 20 only needs to be conducted to the reference potential wiring 113B provided on the back side of the heat dissipation substrate 100 , and therefore, the reference potential wiring 113B only needs to be provided on the back side of the heat dissipation substrate 100 .

[0217] In the light emitting device 4 according to the first embodiment and the light emitting device 4 according to the second embodiment, the capacitor 70 is provided on the surface side of the heat dissipation substrate 100 , but other circuit elements (capacitors, resistors, etc.) may be provided.

[0218] Moreover, the parts connected to the reference potential wiring 113F and the reference potential wiring 113B provided on the heat dissipation substrate 100 may not be the capacitor 70 (70A, 70B) that supplies the charge (current) for causing the light source 20 to emit light, but may be circuit parts (capacitors, resistors, etc.) provided for other functions.

[0219] Furthermore, a structure may be adopted in which a conductive pattern not connected to circuit components (capacitors, resistors, etc.) is provided on the back side of heat dissipation substrate 100 and connected to reference potential wiring 13B of wiring board 10 .

[0220] Furthermore, in the first and second embodiments, as an example of an optical component, a light diffusion component 30 is used, and the light diffusion component 30 changes the expansion angle of the incident light in an expanded manner by diffusion and emits it. The optical component may also be a diffractive optical element (DOE) that changes the light in a direction different from the incident direction and emits it. Furthermore, the optical component may also be a transparent component such as a focusing lens, a microlens, or a protective cover.

Claims

1. A light emitting device, comprising: Insulating substrate with a thermal conductivity of 10 W / m·K or more; A light emitting element is provided on the surface side of the substrate; A first back wiring, provided on the back side of the substrate and connected to the cathode electrode of the light emitting element; A second backside wiring, provided on the backside of the substrate and connected to the anode electrode of the light emitting element; A reference potential wiring line, provided on the back side of the substrate and connected to an external reference potential; A first surface wiring is provided on the surface side of the substrate and is connected to the first backside wiring; as well as A second surface wiring is provided on the surface side of the substrate and is connected to the second back surface wiring. a capacitor provided on the surface side of the substrate, a part of the capacitor provided on the second surface wiring connected to the anode electrode, the capacitor being connected to the reference potential wiring and supplying a driving current to the light emitting element, The light emitting element is provided on the first surface wiring. In a plan view, the overlap between the reference potential wiring and the capacitor is greater than the overlap between the reference potential wiring and the light-emitting element, and the overlap between the first back wiring and the light-emitting element is greater than the overlap between the first back wiring and the capacitor.

2. The light emitting device according to claim 1, wherein The reference potential wiring overlaps with at least a portion of the first surface wiring in a plan view.

3. The light emitting device according to claim 1 or 2, wherein The reference potential wiring overlaps with at least a portion of the light emitting element in a plan view.

4. The light emitting device according to claim 1 or 2, wherein The area of ​​the reference potential wiring is larger than the area of ​​the first back surface wiring and the area of ​​the second back surface wiring. 5 . The light emitting device according to claim 1 , further comprising: a driving unit connected to the light emitting element and configured to perform low-side driving on the light emitting element.

6. An optical device comprising: The light emitting device according to any one of claims 1 to 5; as well as a light receiving unit for receiving reflected light emitted from the light emitting element included in the light emitting device and reflected by the object to be measured, The light receiving unit outputs a signal corresponding to the time from when light is emitted from the light emitting element to when light is received by the light receiving unit.

7. An information processing device, comprising: The optical device according to claim 6; as well as The shape specifying unit specifies the three-dimensional shape of the object to be measured based on reflected light emitted from the light source included in the optical device, reflected by the object to be measured, and received by the light receiving unit included in the optical device.

8. The information processing device according to claim 7, comprising: The authentication processing unit performs authentication processing related to the use of the information processing device based on the determination result of the shape determination unit.

9. A light emitting device, comprising: An insulating first substrate; A light emitting element having a cathode electrode and an anode electrode and disposed on the surface side of the first substrate; A first back wiring, provided on the back side of the first substrate and connected to the cathode electrode; A second back wiring, provided on the back side of the first substrate and connected to the anode electrode; a third back wiring, provided on the back side of the first substrate; as well as A first surface wiring is provided on the surface side of the first substrate and is connected to the first back surface wiring; A second surface wiring is provided on the surface side of the first substrate and is connected to the second back surface wiring; a capacitor provided on the surface side of the first substrate, a part of the capacitor provided on the second surface wiring connected to the anode electrode, the capacitor being connected to the third back surface wiring and supplying a driving current to the light emitting element, a wiring substrate including an insulating second substrate having a thermal conductivity lower than that of the first substrate and mounting the first substrate; The light emitting element is provided on the first surface wiring. wherein, in a plan view, the overlap between the third back wiring and the capacitor is greater than the overlap between the third back wiring and the light emitting element, and the overlap between the first back wiring and the light emitting element is greater than the overlap between the first back wiring and the capacitor, and The third back surface wiring is connected to a wiring having the largest area among a plurality of wirings insulated from each other included in the wiring substrate.

Images