Solid-state imaging element and imaging device

By introducing control transistors into solid-state imaging components, the gate-source voltage of the differential transistor is reduced, and the image quality deterioration problem caused by the increase in parasitic capacitance is solved, thereby achieving an improvement in image quality.

CN113383495BActive Publication Date: 2025-05-16SONY SEMICON SOLUTIONS CORP
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Patent Information

Application Number
CN201980091083.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-03-14
Filing Date
2019-11-26
Publication Date
2025-05-16
Estimated Expiration
2039-11-26

AI Technical Summary

Technical Problem

In the solid-state imaging element, an increase in the gate-source voltage of the differential transistor causes an increase in the parasitic capacitance, which in turn causes image quality deterioration of image data.

Method used

By introducing a control transistor into the solid-state imaging element, the gate-source voltage of the differential transistor is reduced. The specific implementation method includes the control transistor reducing the gate-source voltage when the input voltage exceeds a predetermined range.

Benefits of technology

The parasitic capacitance of the differential transistor is effectively reduced, the image quality deterioration of the image data is reduced, and the image clarity is improved.

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Abstract

The object of the present invention is to improve the image quality of image data in a solid-state imaging element provided with a comparator for comparing a reference signal with a pixel signal. A voltage divider circuit provides a voltage division of an input voltage and a predetermined reference voltage. An input-side differential transistor outputs a drain current corresponding to a gate-source voltage between the voltage division input to the gate and a predetermined source voltage. An output-side differential transistor outputs a voltage corresponding to the drain current as a comparison result between the input voltage and the reference voltage. When the input voltage is a value outside a predetermined range, a control transistor is used to reduce the gate-source voltage.
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Description

Technical Field

[0001] The present technology relates to a solid-state imaging element and an imaging device. More specifically, the present technology relates to a solid-state imaging element and an imaging device provided with a single-slope ADC. Background Art

[0002] Conventionally, a single slope type ADC (analog to digital converter) that converts an analog signal into a digital signal using a comparator and a counter has been used in a solid-state imaging element or the like because of its simple structure. For example, an ADC has been proposed in which a differential amplifier circuit and a voltage divider circuit are arranged in a comparator, the differential amplifier circuit includes a pair of differential transistors, and the voltage divider circuit is used to provide a divided voltage of a reference signal and a pixel signal to one of the pair of differential transistors (for example, see Patent Document 1).

[0003] Citation list

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Laid-Open No. 2018-148541 Summary of the invention

[0006] Problems to be solved by the present invention

[0007] In the above conventional technology, by adding a voltage divider circuit, the power supply voltage required for operation is reduced, thereby seeking to reduce power consumption. However, if the difference between the reset level and the signal level of the pixel signal is very large, the gate-source voltage of the differential transistor increases, and due to this increase, the parasitic capacitance of the differential transistor may increase. Therefore, there is a problem that due to this increase in parasitic capacitance, an error is generated in the inversion timing of the comparison result between the reference signal and the pixel signal, and due to this error, the image quality of the image data is deteriorated.

[0008] The present technology has been made in view of the above circumstances, and an object of the present technology is to improve the image quality of image data in a solid-state imaging element provided with a comparator that compares a reference signal with a pixel signal.

[0009] Technical solutions to the problem

[0010] The present technology is proposed to solve the above-mentioned problems, and the first aspect of the present technology is a solid-state imaging element as follows, which includes: a voltage divider circuit that provides a voltage divider of an input voltage and a predetermined reference voltage; an input-side differential transistor that outputs a drain current corresponding to a gate-source voltage between the voltage divider input to the gate and a predetermined source voltage; an output-side differential transistor that outputs a voltage corresponding to the drain current as a comparison result between the input voltage and the reference voltage; and a control transistor that reduces the gate-source voltage when the input voltage is a value outside a predetermined range. This scheme brings about an effect of being able to reduce the gate-source voltage of the differential transistor.

[0011] In addition, in the first aspect, the solid-state imaging element may further include: a tail current source, which is commonly connected to the source of the input side differential transistor and the source of the output side differential transistor; an input side current mirror transistor, whose drain and gate are connected to the drain of the input side differential transistor; and an output side current mirror transistor, whose drain is connected to the drain of the output side differential transistor and whose gate is connected to the gate of the input side current mirror transistor. The gate of the control transistor may be connected to the output node of the voltage divider circuit, and the source of the control transistor may be connected to the connection point of the input side differential transistor and the input side current mirror transistor. This scheme brings about the effect of being able to reduce the gate-source voltage of the differential transistor in a comparator arranged with diode-connected transistors.

[0012] In addition, in the first aspect, the solid-state imaging element may further include: a tail current source, which is commonly connected to the source of the input side differential transistor and the source of the output side differential transistor; an input side resistor, one end of which is connected to the drain of the input side differential transistor; and an output side resistor, one end of which is connected to the drain of the output side differential transistor. The gate of the control transistor can be connected to the output node of the voltage divider circuit, and the source of the control transistor can be connected to the connection point of the input side differential transistor and the input side resistor. This scheme brings about the effect of being able to reduce the gate-source voltage of the differential transistor in a comparator having only N-type or P-type transistors.

[0013] In addition, in the first aspect, the solid-state imaging element may further include: an input-side current mirror transistor whose gate is connected to the connection point between the input-side differential transistor and the input-side resistor and whose drain is connected to the other end of the input-side resistor; and an output-side current mirror transistor whose drain is connected to the other end of the output-side resistor and whose gate is connected to the gate of the input-side current mirror transistor. This scheme brings about the effect of being able to reduce power consumption.

[0014] In addition, in the first aspect, the input side differential transistor, the output side differential transistor and the control transistor may be P-type transistors, and when the input voltage is lower than a predetermined value, the control transistor may reduce the drain voltage of the input side differential transistor. This scheme brings about the following effect: when a signal level lower than a reset level is input, the gate-source voltage of the differential transistor can be reduced.

[0015] In addition, in the first aspect, the input side differential transistor, the output side differential transistor and the control transistor may be N-type transistors, and when the input voltage is higher than a predetermined value, the control transistor may increase the drain voltage of the input side differential transistor. This scheme brings about the following effect: when a signal level higher than a reset level is input, the gate-source voltage of the differential transistor can be reduced.

[0016] In addition, in the first aspect, the voltage dividing circuit can change the voltage dividing ratio between the input voltage and the reference voltage according to a control signal. This scheme brings about the effect of reducing the gate-source voltage of the differential transistor in the comparator with a variable voltage dividing ratio.

[0017] In addition, the second aspect of the present technology is a camera device as follows, which includes: a voltage divider circuit that provides a voltage divider of an input voltage and a predetermined reference voltage; an input-side differential transistor that outputs a drain current corresponding to a gate-source voltage between the voltage divider input to the gate and a predetermined source voltage; an output-side differential transistor that outputs a voltage corresponding to the drain current as a comparison result between the input voltage and the reference voltage; a control transistor that reduces the gate-source voltage when the input voltage is a value outside a predetermined range; and a counter that counts a count value based on the comparison result. This scheme brings about the effect of being able to reduce the gate-source voltage of the differential transistor and being able to improve the image quality of image data. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 : is a block diagram showing a configuration example of an image pickup device according to the first embodiment of the present technology.

[0019] Figure 2 : is a diagram showing an example of a stacked structure of the solid-state imaging element according to the first embodiment of the present technology.

[0020] Figure 3 : is a block diagram showing a configuration example of a solid-state image pickup element according to the first embodiment of the present technology.

[0021] Figure 4is a circuit diagram showing a configuration example of a pixel of the first embodiment of the present technology.

[0022] Figure 5 : is a block diagram showing a configuration example of an analog-to-digital conversion section of the first embodiment of the present technology.

[0023] Figure 6 is a circuit diagram showing a configuration example of a comparator of the first embodiment of the present technology.

[0024] Figure 7 It is a diagram for explaining the cause of streaking in the comparative example.

[0025] Figure 8 It is a graph showing an example of characteristics of a MOS (metal-oxide-semiconductor) transistor of the first embodiment of the present technology.

[0026] Fig. 9 is a timing chart showing an example of changes in the reference signal in the comparative example.

[0027] Fig.10 : is a graph showing an example of the relationship between the amplitude and the node voltage in the first embodiment of the present technology and the comparative example.

[0028] Fig.11 is a circuit diagram showing a configuration example of a comparator of the second embodiment of the present technology.

[0029] Fig.12 is a circuit diagram showing a configuration example of a comparator of a third embodiment of the present technology.

[0030] Fig.13 is a circuit diagram showing a configuration example of a voltage dividing circuit of a third embodiment of the present technology.

[0031] Fig.14 is a circuit diagram showing a configuration example of a comparator of a fourth embodiment of the present technology.

[0032] Fig.15 is a diagram showing an example of a schematic configuration of an endoscopic surgery system.

[0033] Fig.16 It is shown Fig.15 The block diagram is an example of the functional configuration of a camera and a CCU (camera control unit) shown in FIG.

[0034] Fig.17 is a block diagram showing a schematic configuration example of a vehicle control system.

[0035] Fig.18It is an explanatory diagram showing an example of the installation position of the imaging unit. DETAILED DESCRIPTION

[0036] Hereinafter, a mode for implementing the present technology (hereinafter referred to as an embodiment) will be described. The description will be given in the following order.

[0037] 1. First Embodiment (Example of Lowering the Gate-Source Voltage of the Differential Transistor)

[0038] 2. Second Embodiment (Example of Lowering the Gate-Source Voltage of a Differential Transistor Connected to a Resistor)

[0039] 3. Third Embodiment (Example in which the gate-source voltage of the differential transistor is reduced and a resistor is inserted between the differential transistor and the current mirror circuit)

[0040] 4. Fourth Embodiment (Example of Reducing the Gate-Source Voltage of an N-Type Differential Transistor)

[0041] 5. Application examples of endoscopic surgery systems

[0042] 6. Application examples for mobile objects

[0043] <1. First Embodiment>

[0044] [Configuration Example of Image Pickup Device]

[0045] Figure 1 1 is a block diagram showing an example of the configuration of the imaging device 100 of the first embodiment of the present technology. The imaging device 100 is a device for capturing image data, and the imaging device 100 includes an optical section 110, a solid-state imaging element 200, and a DSP (digital signal processing) circuit 120. In addition, the imaging device 100 also includes a display section 130, an operation section 140, a bus 150, a frame memory 160, a storage section 170, and a power supply section 180. As the imaging device 100, for example, a digital camera such as a digital camera; a smartphone or a personal computer having an imaging function; or a car-mounted camera, etc. can be used.

[0046] The optical section 110 collects light from the subject and guides the light to the solid-state imaging element 200. The solid-state imaging element 200 generates image data by photoelectric conversion in synchronization with the vertical synchronization signal VSYNC. Here, the vertical synchronization signal VSYNC is a periodic signal with a predetermined frequency indicating the timing of imaging. The solid-state imaging element 200 provides the generated image data to the DSP circuit 120 via the signal line 209.

[0047] The DSP circuit 120 performs predetermined image processing on the image data from the solid-state imaging element 200. The DSP circuit 120 outputs the processed image data to the frame memory 160 or the like via the bus 150.

[0048] The display unit 130 displays image data. For example, a liquid crystal panel or an organic electroluminescence (EL: electro luminescence) panel can be used as the display unit 130. The operation unit 140 generates an operation signal according to a user's operation.

[0049] The bus 150 is a common path for the optical section 110 , the solid-state imaging element 200 , the DSP circuit 120 , the display section 130 , the operation section 140 , the frame memory 160 , the storage section 170 , and the power supply section 180 to exchange data with each other.

[0050] The frame memory 160 holds image data. The storage section 170 stores various data such as image data. The power supply section 180 supplies power to the solid-state imaging element 200, the DSP circuit 120, the display section 130, and the like.

[0051] [Configuration Example of Solid-State Image Pickup Element]

[0052] Figure 2 1 is a diagram showing an example of a stacked structure of a solid-state imaging element 200 of the first embodiment of the present technology. The solid-state imaging element 200 includes a circuit chip 202 and a light receiving chip 201 stacked on the circuit chip 202. These chips are electrically connected through a connection portion such as a via. Note that in addition to the via, Cu-Cu bonding or bumps can also be used for connection.

[0053] Figure 3 1 is a block diagram showing a configuration example of a solid-state imaging element 200 according to a first embodiment of the present technology. The solid-state imaging element 200 includes a row selection section 211, a DAC (digital to analog converter) 212, and a pixel array section 213. In addition, the solid-state imaging element 200 also includes a timing control section 214, a constant current source section 230, an analog-to-digital conversion section 300, a horizontal transfer scanning section 215, and a signal processing section 216.

[0054] For example, the pixel array section 213 is arranged on the light receiving chip 201, and other circuits (for example, the row selection section 211, etc.) are arranged on the circuit chip 202. Note that the circuits arranged on each of the light receiving chip 201 and the circuit chip 202 are not limited to the above configuration. For example, up to the comparator in the analog-to-digital conversion section 300 may be arranged on the light receiving chip 201, and the subsequent stages may be arranged on the circuit chip 202.

[0055] In the pixel array section 213, a plurality of pixels 220 are arranged in a two-dimensional grid. Hereinafter, a group of pixels 220 arranged in the horizontal direction is referred to as a "row", and a group of pixels 220 arranged in a direction perpendicular to the row direction is referred to as a "column". Assume that the number of columns is N (N is an integer). In addition, in the pixel array section 213, vertical signal lines 229 are laid corresponding to each column. n (n is an integer from 1 to N).

[0056] The pixel 220 generates an analog pixel signal through photoelectric conversion, and transmits the analog pixel signal via the corresponding vertical signal line 229. n Provided to the analog-to-digital conversion unit 300.

[0057] The row selection section 211 sequentially selects and drives rows, and causes pixel signals to be output. The DAC 212 generates a predetermined reference signal and supplies it to the analog-to-digital conversion section 300. As the reference signal, for example, a sawtooth-shaped ramp signal is generated.

[0058] The timing control section 214 controls the operation timing of each of the row selection section 211 , the analog-to-digital conversion section 300 , and the horizontal transfer scanning section 215 in synchronization with the vertical synchronization signal VSYNC.

[0059] In the constant current source section 230, a constant current source is arranged corresponding to each column. Each constant current source is connected to a vertical signal line of a corresponding column.

[0060] The analog-to-digital converter 300 converts the pixel signal of each column into a digital signal, and outputs the digital signal of each column to the signal processing unit 216 .

[0061] The horizontal transfer scanning section 215 controls the analog-to-digital conversion section 300 and causes pixel signals in a row to be sequentially output.

[0062] The signal processing section 216 performs predetermined signal processing such as dark current correction and demosaic processing on the digital signal. The signal processing section 216 supplies image data including the processed signal to the DSP circuit 120 via the signal line 209 .

[0063] [Pixel Structure Example]

[0064] Figure 4 2 is a circuit diagram showing a configuration example of a pixel 220 of the first embodiment of the present technology. The pixel 220 includes a photoelectric conversion element 221, a transfer transistor 222, a reset transistor 223, a floating diffusion layer 224, an amplification transistor 225, and a selection transistor 226.

[0065] In addition, the constant current source section 230 is provided with a constant current source 231 corresponding to each column. The constant current source 231 supplies a constant current to the corresponding vertical signal line 229. n .

[0066] The photoelectric conversion element 221 performs photoelectric conversion on incident light and generates electric charges. The transfer transistor 222 transfers the electric charges from the photoelectric conversion element 221 to the floating diffusion layer 224 in accordance with the drive signal TRG from the row selection unit 211 .

[0067] In accordance with the drive signal RST from the row selection unit 211 , the reset transistor 223 is initialized by taking out charges from the floating diffusion layer 224 .

[0068] The floating diffusion layer 224 accumulates charges and generates a voltage corresponding to the amount of the charges. The amplifier transistor 225 amplifies the voltage of the floating diffusion layer 224 .

[0069] The selection transistor 226 outputs the amplified voltage signal as a pixel signal according to the drive signal SEL from the row selection unit 211. The pixel signal is transmitted via the corresponding vertical signal line 229. n is provided to the analog-to-digital conversion section 300 .

[0070] [Configuration Example of Analog-to-Digital Converter]

[0071] Figure 5 1 is a circuit diagram showing a configuration example of the analog-to-digital conversion section 300 of the first embodiment of the present technology. A plurality of comparators 330, a plurality of counters 310, and a plurality of latches 320 are arranged in the analog-to-digital conversion section 300. These comparators 330, counters 310, and latches 320 are arranged corresponding to each column.

[0072] The comparator 330 compares the reference signal RMP with the pixel signal Vin from the corresponding column and provides the comparison result Vout to the corresponding counter 310 .

[0073] The counter 310 counts the count value in a period until the comparison result Vout is inverted according to the control of the timing control section 214. The counter 310 outputs a digital signal indicating the count value to the corresponding latch 320 and causes the latch 320 to hold the digital signal.

[0074] The latch 320 holds the digital signal of the corresponding column and outputs the digital signal to the signal processing unit 216 under the control of the horizontal transfer scanning unit 215 .

[0075] The above-mentioned comparator 330 and counter 310 convert the analog pixel signal into a digital signal. That is, the comparator 330 and the counter 310 function as an ADC. An ADC having such a simple configuration including a comparator and a counter is called a single slope type ADC.

[0076] In addition, the analog-to-digital conversion section 300 performs CDS (correlated double sampling) processing for obtaining the difference between the reset level and the signal level for each column in addition to performing AD conversion. Here, the reset level is the level of the pixel signal when the pixel 220 is initialized, and the signal level is the level of the pixel signal when the exposure ends. For example, when converting the reset level, the counter 310 performs one of down counting and up counting, and when converting the signal level, the counter 310 performs the other of down counting and up counting, thereby realizing CDS processing. Note that the counter 310 may be configured to perform only up counting or down counting, and a circuit for performing CDS processing may be added in a subsequent stage.

[0077] [Comparator Configuration Example]

[0078] Figure 6 330 is a circuit diagram showing a configuration example of a comparator 330 of the first embodiment of the present technology. The comparator 330 includes a tail current source 331, differential transistors 332 and 333, automatic zeroing switches 334 and 335, and a control transistor 336. In addition, the comparator 330 also includes current mirror transistors 337 and 338, a capacitor 339, and a voltage divider circuit 340. As the differential transistor 332, the differential transistor 333, and the control transistor 336, for example, pMOS (p-type MOS) transistors are used. In addition, as the current mirror transistors 337 and 338, for example, nMOS (n-type MOS) transistors are used.

[0079] The voltage dividing circuit 340 divides the reference signal RMP and the pixel signal Vin and provides the divided voltage. The voltage dividing circuit 340 includes capacitors 341 and 342.

[0080] The capacitor 341 is inserted between the vertical signal line 229 for transmitting the pixel signal Vin. n and the gate of the differential transistor 332, and serves as an input capacitance of the pixel signal Vin. On the other hand, the capacitor 342 is inserted between the DAC 212 for providing the reference signal RMP and the gate of the differential transistor 332, and serves as an input capacitance of the reference signal RMP.

[0081] The voltage of the pixel signal Vin and the reference voltage of the reference signal RMP are divided by a voltage division ratio determined by the capacitance of each capacitor 341 and 342. The divided voltages of the pixel signal Vin and the reference signal RMP are provided to the gate of the differential transistor 332 and the gate of the control transistor 336 as the gate voltage V1.

[0082] The sources of the differential transistors 332 and 333 are connected to the terminal of the power supply voltage VDD via the tail current source 331. In addition, the drain of the differential transistor 332 is connected to the source of the control transistor 336 and the drain of the current mirror transistor 337. On the other hand, the drain of the differential transistor 333 is connected to the drain of the current mirror transistor 338. In addition, the voltage of the drain of the differential transistor 333 is output to the counter 310 as the comparison result Vout of the comparator 330.

[0083] Note that the differential transistor 332 is an example of an input-side differential transistor described in the claims. The differential transistor 333 is an example of an output-side differential transistor described in the claims.

[0084] The gate and drain of the current mirror transistor 337 are short-circuited. In addition, the source of the current mirror transistor 337 is connected to a terminal having a predetermined reference potential (ground potential, etc.). On the other hand, the gate of the current mirror transistor 338 is connected to the gate of the current mirror transistor 337, and the source of the current mirror transistor 338 is connected to the terminal of the reference potential. In addition, the drain of the control transistor 336 is connected to the terminal of the reference potential.

[0085] Note that the current mirror transistor 337 is an example of an input-side current mirror transistor described in the claims. The current mirror transistor 338 is an example of an output-side current mirror transistor described in the claims.

[0086] The auto-zero switch 334 short-circuits the gate and drain of the differential transistor 332 according to the control signal AZSW from the timing control section 214. The auto-zero switch 335 short-circuits the gate and drain of the differential transistor 333 according to the control signal AZSW from the timing control section 214. The capacitor 339 is inserted between the gate of the differential transistor 333 and the terminal of the reference potential, and a certain voltage VSH is applied to the gate of the differential transistor 333.

[0087] For example, the timing control section 214 controls the auto-zero switch 334 to be in a closed state at a timing before each of the transition period of the reset level and the transition period of the signal level, thereby performing the auto-zero operation.

[0088] By the above configuration, the current mirror transistors 337 and 338 constitute a current mirror circuit. In addition, a circuit including the current mirror circuit, the tail current source 331, and the differential transistors 332 and 333 constitutes a differential amplifier circuit.

[0089] In the differential amplifier circuit, the differential transistor 332 provides a drain current corresponding to the gate-source voltage between the gate voltage V1 and the source voltage Vtail. In addition, a voltage corresponding to the drain current is output from the drain of the differential transistor 333 as a comparison result Vout between the reference signal RMP and the pixel signal Vin.

[0090] In addition, it is assumed that the on-resistance of the control transistor 336 is smaller than the on-resistance of the diode-connected current mirror transistor 337. Therefore, when the control transistor 336 is turned on, the drain voltage V2 of the differential transistor 332 decreases. As the drain voltage V2 decreases, the source voltage Vtail of the differential transistor 332 also decreases. Due to the decrease in the source voltage Vtail, the gate-source voltage of the differential transistor 332 decreases.

[0091] Here, in order to explain the effect when the control transistor 336 is provided, a structure when the control transistor 336 is not provided is assumed as a comparative example.

[0092] Figure 7 This is a diagram for explaining the cause of tailing in the comparative example. When the pixel 220 accumulates electrons as charge, the higher the illuminance of the incident light, the lower the signal level of the pixel signal Vin becomes relative to the reset level of the pixel signal Vin. In other words, the higher the illuminance, the greater the amplitude when changing from the reset level to the signal level.

[0093] Assume that the amplitude of the pixel signal Vin1 in a certain column is very large and the amplitude of the pixel signal Vin2 in another column is relatively small. The column with the larger amplitude is the intruder, and the column with the smaller amplitude is the victim.

[0094] In addition, the reference signal RMP gradually increases during the AD conversion period. When the reference signal RMP is at the minimum value (i.e., when the AD conversion starts), the gate voltage V1 decreases as the amplitude increases, and as the gate voltage V1 decreases, the gate-source voltage of the differential transistor 332 increases. That is, the larger the amplitude, the larger the gate-source voltage of the differential transistor 332.

[0095] When the amplitude is very large, most of the tail current of the tail current source 331 flows to the differential transistor 332 side due to the increase in the gate-source voltage of the differential transistor 332. Therefore, although it is a differential pair, the differential transistor 332 behaves almost like a source follower. In other words, if the gate voltage V1 changes in this state, the drain voltage V2 hardly changes, and on the other hand, the source voltage Vtail is roughly linked with the gate voltage V1. Since the source voltage Vtail is roughly linked with the gate voltage V1, the charging and discharging of the parasitic capacitance between the gate and the source of the differential transistor 332 does not occur. Therefore, the effective capacitance of the differential transistor 332 observed from the DAC 212 can be regarded as the parasitic capacitance between the gate and the drain of the differential transistor 332.

[0096] Figure 8 is a graph showing an example of the characteristics of the MOS transistor in the first embodiment of the present technology. Figure 8 In the figure, the vertical axis represents capacitance and the horizontal axis represents gate-source voltage V gs .in addition, Figure 8 The solid line in the figure represents the parasitic capacitance C between the gate and drain of the MOS transistor. gd The dotted line represents the parasitic capacitance C between the gate and source of the MOS transistor. gs characteristics.

[0097] When the gate-source voltage V gs Exceeding the threshold voltage V of the MOS transistor TH When the MOS transistor changes to a state called saturation state, the parasitic capacitance C gs As the threshold voltage V TH The increase of parasitic capacitance C gs Saturation. Then, when the gate-source voltage V gs Exceeds the drain voltage V D and threshold voltage V TH When the MOS transistor changes to the state called triode state, the parasitic capacitance C gs On the other hand, the parasitic capacitance C gd Increase.

[0098] As described above, the effective capacitance of the differential transistor 332 is the parasitic capacitance C between the gate and the drain of the differential transistor 332. gd Therefore, when the amplitude of the intruder is very large and the differential transistor 332 is switched to the triode state, the effective capacitance (parasitic capacitance C gd ) increases.

[0099] Fig. 91 is a timing diagram showing an example of the variation of the reference signal RMP in the comparative example. During the reset level transition period from time T0 to time T1, the reference signal RMP gradually increases from the initial value. In addition, during the signal level transition period from time T2 to time T3, the reference signal RMP gradually increases from the initial value.

[0100] In the comparative example, when the differential transistor 332 is switched to the triode state and the capacitance observed from the DAC 212 (parasitic capacitance C gd ) increases, the time constant of the load of DAC 212 increases. As a result, Fig. 9 As shown by the dot-dash line in , the rising speed of the reference signal RMP slows down, and the time until the signal level comparison result Vout of each column is inverted becomes later. Since the inversion timing of the signal level is delayed and the inversion timing of the reset level does not change, an error occurs in the digital signal after CDS processing, and the image quality of the image data is degraded.

[0101] The delay in the inversion timing caused by the increase in parasitic capacitance generated in the intruder occurs not only in the intruder but also in the victim. Therefore, for example, in the comparative example, when the illumination is high, a white tail is generated. In order to suppress the increase in parasitic capacitance, it is sufficient to reduce the amplitude of the pixel signal, but this is not preferable because the dynamic range will be reduced.

[0102] Here, when the amplitude of the pixel signal Vin is approximately Ac -1 ·|V thp |V, the transition to the triode state occurs. Note, however, that strictly speaking, the amplitude is slightly less than this due to the rise in drain voltage V2.

[0103] The above V thp is the threshold voltage of the P-type differential transistor 332. In addition, Ac is the voltage from the vertical signal line 229 n The transfer gain (so-called auto-zero gain) to the node of the gate voltage V1. For example, when the auto-zero gain is 0 decibels (dB) and the input capacitance for the pixel signal Vin and the input capacitance for the reference signal RMP are approximately the same, the transfer gain Ac is about 0.5. In practice, since the transfer gain is slightly attenuated by other parasitic capacitances, the transfer gain Ac is considered to be reduced to about 0.4 under the above setting.

[0104] Intuitively, in order for the differential transistor 332 to transition to the triode state, the node at the gate voltage V1 only needs to receive approximately |V thp However, considering the capacitor voltage division of the voltage divider circuit 340, it is necessary to input an Ac that can compensate for the attenuation. -1 ·|Vthp |Volt (V).

[0105] Therefore, when the amplitude of the pixel signal Vin exceeds Ac -1 ·|V thp |V, tailing occurs.

[0106] Therefore, in order to suppress the generation of the tail, it is proposed to add the control transistor 336. The point is that in the auto-zero state that determines the characteristics of the comparator 330, the control transistor 336 does not operate and has no influence, and the control transistor 336 operates only when the amplitude of the pixel signal Vin is large to reduce the drain voltage V2, thereby making it more difficult to enter the triode state.

[0107] In the comparative example where the control transistor 336 is not provided, the drain-gate voltage V dg It is expressed by the following equation.

[0108] V dg =V gsn -V gs0 +Ac·ΔV VSL

[0109] ≈Ac·ΔV VSL +(2 1 / 2 -1)·V ODn0

[0110] ≈Ac·ΔV VSL +0.4×V ODn0 ...Equation 1

[0111] In the above equation, V gsn Vgs0 is the gate-source voltage of the N-type current mirror transistor 337 when the input signal level is low. Vgs1 is the gate-source voltage of the current mirror transistor 337 when the auto-zero adjustment is performed. VSL is the amplitude of the pixel signal Vin. ODn0 is the overdrive voltage of the current mirror transistor 337 (in other words, the pinch-off voltage).

[0112] In addition, in Equation 1, it is assumed that when the amplitude of the pixel signal Vin is very large, a current approximately twice that of the auto-zero adjustment flows through the differential transistor 332. Therefore, when the following equation is established, the differential transistor 332 is transformed into a triode state, resulting in a change in capacitance.

[0113] Ac·ΔV VSL +0.4×V ODn0 >|V thp |...Equation 2

[0114] By transforming Equation 2, the following equation is obtained.

[0115] ΔV VSL >Ac -1 ·(|V thp |-0.4×V ODn0 )...Equation 3

[0116] On the other hand, consider the case where the control transistor 336 is added. Assuming that the amplitude of the pixel signal Vin is large and the load resistance (on-resistance) of the control transistor 336 is sufficiently smaller than the on-resistance of the current mirror transistor 337, the following equation holds.

[0117] V dg ≈V sg3 ≈V ODp3 +|V thp3 |...Equation 4

[0118] In the above equation, V sg3 is the source-gate voltage of the control transistor 336. V ODp3 is the overdrive voltage of control transistor 336. V thp3 is the threshold voltage of the control transistor 336.

[0119] It can be seen from equation 4 that in order to prevent the differential transistor 332 from entering the triode state but maintaining the saturation state, it is only necessary to satisfy the following equation.

[0120] V ODp3 +|V thp3 |<|V thp |...Equation 5

[0121] By transforming Equation 5, the following equation is obtained.

[0122] |V thp |-|V thp3 |-V ODp =-Δ|V thp |-V ODp3 >0

[0123] However, note that due to the reverse bias effect of the P-type differential transistor 332, Δ|V thp | is often greater than 0, of course, the overdrive voltage V ODp3 is also greater than 0. Therefore, the differential transistor 332 cannot be completely prevented from entering the triode state. However, even so, by making these two parameters as close to 0 as possible, the differential transistor 332 can be stopped at slightly entering the triode state.

[0124] Specifically, for the control transistor 336, a transistor with a Δ|V thp| The element or transistor size. Alternatively, for example, the overdrive voltage V may be increased by increasing the aspect ratio as much as possible. ODp3 As much as possible. Note that if the control transistor 336 is added, its gate capacitance will reduce the auto-zero gain Ac of the comparator 330 and increase the voltage conversion noise of the pixel signal. Therefore, the gate area of ​​the control transistor 336 should be kept small enough compared to the differential transistor 332. At the same time, for example, by setting the gate width to be equal, the control transistor 336 is arranged to share the drain and source with the differential transistor 332, thereby minimizing the increase in parasitic capacitance.

[0125] Note that it can be expected that the control transistor 336 has almost no adverse effect because the control transistor 336 is turned off near the time when the comparison result Vout is reversed (ie, near the automatic zero adjustment point). thp | is the difference in threshold voltage between identical pMOS transistors, and therefore, a certain degree of robustness can be expected even for transition conditions such as imbalance between nMOS and pMOS transistors.

[0126] Fig.10 Graph showing an example of the relationship between the amplitude and the node voltage in the first embodiment of the present technology and the comparative example. Fig.10 In FIG. 1 , part a is a graph showing an example of the relationship between the amplitude and the node voltage in a comparative example when there is no control transistor 336. Fig.10 , part b is a graph showing an example of the relationship between the amplitude and the node voltage in the first embodiment with the control transistor 336. In addition, Fig.10 The horizontal axis in represents the amplitude ΔV of the pixel signal Vin. VSL Amplitude ΔV VSL It is the difference between the reset level Vinp and the signal level Vind of the pixel signal Vin. Fig.10 The vertical axis in represents the node voltage. The solid line represents the characteristic of the source voltage Vtail, and the dashed line represents the characteristic of the drain voltage V2.

[0127] like Fig.10 As shown in part a of the comparative example, as the amplitude ΔV VSL As the amplitude ΔV increases, the source voltage Vtail decreases until it reaches a constant value close to the drain voltage V2. On the other hand, the drain voltage V2 is constant. Then, when the amplitude ΔV VSL When the value exceeds the value at which the source voltage Vtail reaches a constant value, the differential transistor 332 is transformed into a triode state, causing the parasitic capacitance to increase.

[0128] On the other hand, in the case where the control transistor 336 is added, as shown in FIG. Fig.10 As shown in part b of FIG. 3 , when the source voltage Vtail reaches a value close to the drain voltage V2, the control transistor 336 turns to the on state. Then, the drain current flows on the control transistor 336 side, whereby the source voltage Vtail and the drain voltage V2 change with the amplitude ΔV VSL Since this decrease in source voltage Vtail reduces the gate-source voltage of differential transistor 332, differential transistor 332 can be maintained in a saturated state. As a result, tailing caused by an increase in parasitic capacitance can be suppressed.

[0129] In summary, the voltage divider circuit provides the divided voltage of the input pixel signal Vin voltage and the predetermined reference signal RMP voltage as the gate voltage V1. The differential transistor 332 outputs a drain current corresponding to the gate-source voltage between the gate voltage V1 input to the gate and the predetermined source voltage Vtail. In addition, the differential transistor 333 outputs a voltage corresponding to the drain current from the drain as a comparison result Vout between the pixel signal and the reference signal.

[0130] In addition, the amplitude ΔV VSL When the source voltage Vtail is greater than the value when the drain voltage V2 is close to the source voltage Vtail (in other words, when the signal level of the pixel signal is lower than a predetermined value), the control transistor 336 reduces the drain voltage V2. As a result, the gate-source voltage of the differential transistor 332 is reduced, and the increase of the parasitic capacitance of the transistor can be suppressed.

[0131] Note that although a pMOS transistor is used as the control transistor 336, an nMOS transistor can also be used as described later. In this case, when the signal level of the pixel signal Vin is higher than a predetermined value, the control transistor 336 increases the drain voltage V2 to reduce the gate-source voltage of the differential transistor 332.

[0132] To summarize the case where the control transistor 336 is an nMOS transistor and the case where the control transistor 336 is a pMOS transistor, when the pixel signal Vin has a value outside a predetermined range, the control transistor 336 reduces the gate-source voltage of the differential transistor 332 .

[0133] As described above, according to the first embodiment of the present technology, when the pixel signal Vin is a value outside the predetermined range, the control transistor 336 reduces the gate-source voltage of the differential transistor 332. Therefore, it is possible to suppress the increase in the parasitic capacitance of the differential transistor 332. As a result, it is possible to prevent tailing due to the increase in parasitic capacitance, and it is possible to improve the image quality of the image data.

[0134] <2. Second Embodiment>

[0135] In the first embodiment described above, in addition to the P-type differential transistor 332 and the like, the N-type current mirror transistor 337 and the like are provided in the comparator 330. However, in such a configuration in which pMOS transistors and nMOS transistors are mixed, the manufacturing cost may increase compared to the case in which only one of them is arranged. The comparator 330 of the second embodiment is different from the first embodiment in that a resistor is arranged instead of the nMOS transistor.

[0136] Fig.11 3 is a circuit diagram showing a configuration example of a comparator 330 of a second embodiment of the present technology. The comparator 330 of the second embodiment is different from that of the first embodiment in that resistors 351 and 352 are arranged instead of current mirror transistors 337 and 338.

[0137] One end of the resistor 351 is connected to the drain of the differential transistor 332, and one end of the resistor 352 is connected to the drain of the differential transistor 333. The other end of each of the resistors 351 and 352 is connected to a terminal of a reference potential (e.g., a ground potential). Note that the resistor 351 is an example of an input side resistor described in the claims, and the resistor 352 is an example of an output side resistor described in the claims.

[0138] Since the N-type current mirror transistors 337 and 338 are eliminated, only P-type transistors are used. Therefore, compared with the case where pMOS transistors and nMOS transistors are mixed, the number of steps for forming transistors can be reduced, and the manufacturing cost of the solid-state imaging element 200 can be reduced.

[0139] As described above, according to the second embodiment of the present technology, since resistors 351 and 352 are connected to differential transistors 332 and 333, the transistors in the comparator 330 can be limited to pMOS transistors. As a result, the number of steps in forming transistors can be reduced, and the manufacturing cost can be reduced.

[0140] <3. Third embodiment>

[0141] In the first embodiment described above, the current mirror transistors 337 and 338 are directly connected to the differential transistors 332 and 333. However, with this configuration, it may be difficult to sufficiently reduce power consumption. The comparator 330 of the third embodiment is different from the first embodiment in that a resistor is added to reduce the minimum power supply voltage that allows operation and reduce power consumption.

[0142] Fig.123 is a circuit diagram showing a configuration example of a comparator 330 of a third embodiment of the present technology. The comparator 330 of the third embodiment is different from that of the first embodiment in that resistors 361 and 362 are further provided.

[0143] One end of the resistor 361 is connected to the drain of the differential transistor 332, and the other end of the resistor 361 is connected to the drain of the current mirror transistor 337. One end of the resistor 362 is connected to the drain of the differential transistor 333, and the other end of the resistor 362 is connected to the drain of the current mirror transistor 338. Note that the resistor 361 is an example of an input side resistor described in the claims, and the resistor 362 is an example of an output side resistor described in the claims.

[0144] In addition, the gate of the current mirror transistor 337 is connected to the connection point of the resistor 361 and the differential transistor 332. The auto-zero switch 334 short-circuits the gate of the differential transistor 332 and the connection point of the resistor 361 and the current mirror transistor 337. The auto-zero switch 335 short-circuits the gate of the differential transistor 333 and the connection point of the resistor 362 and the current mirror transistor 338.

[0145] In addition, the source of the control transistor 336 is connected to a connection point of the resistor 361 and the current mirror transistor 337 .

[0146] In the above configuration, the power supply voltage VDD1 when the auto-zero switches 334 and 335 are closed is expressed by the following equation.

[0147] VDD1=VdsT+VgsP+VgsN-VR...Equation 6

[0148] In the above equation, VdsT is the drain-source voltage of the tail current source 331 implemented by a pMOS transistor. VgsP is the gate-source voltage of the P-type differential transistors 332 and 333 during the auto-zero operation. VgsN is the gate-source voltage of the N-type current mirror transistors 337 and 338. VR is the voltage between the respective terminals of the resistors 361 and 362.

[0149] On the other hand, in the first embodiment in which the resistors 361 and 362 are not provided, the power supply voltage VDD1 when the auto-zero switches 334 and 335 are closed is expressed by the following equation.

[0150] VDD1=VdsT+VgsP+VgsN...Equation 7

[0151] As shown in Equation 6 and Equation 7, the minimum power supply voltage VDD1 for the differential amplifier circuit to operate normally can be reduced by providing the resistors 361 and 362. As a result, the power consumption of the comparator 330 can be reduced.

[0152] Fig.13 340 is a circuit diagram showing a configuration example of a voltage dividing circuit 340 of a third embodiment of the present technology. The voltage dividing circuit 340 of the third embodiment includes capacitors 341 to 345 and switches 346 to 349.

[0153] One end of each of the capacitors 341 to 345 is commonly connected to the gate of the differential transistor 332. The other end of the capacitor 341 is connected to the pixel array section 213, and the other end of the capacitor 345 is connected to the DAC 212.

[0154] Under the control of the timing control section 214, the switch 346 opens and closes the path between the other end of the capacitor 341 and the other end of the capacitor 342. Under the control of the timing control section 214, the switch 347 opens and closes the path between the other end of the capacitor 342 and the other end of the capacitor 343. Under the control of the timing control section 214, the switch 348 opens and closes the path between the other end of the capacitor 343 and the other end of the capacitor 344. Under the control of the timing control section 214, the switch 349 opens and closes the path between the other end of the capacitor 344 and the other end of the capacitor 345.

[0155] The timing control section 214 can control each of the switches 346 to 349 to change the ratio of the input capacitance on the vertical signal line side to the input capacitance on the DAC 212 side. As a result, the voltage division ratio can be switched as necessary.

[0156] Note that although five capacitors 341 to 345 are provided, the number of capacitors is not limited to 5. Similarly, the number of switches is not limited to 4. In addition, the voltage dividing circuit 340 of the third embodiment can be applied to the second embodiment.

[0157] As described above, according to the third embodiment of the present technology, since the resistors 361 and 362 are inserted between the differential transistors 332 and 333 and the current mirror circuit, the required minimum power supply voltage VDD can be reduced by the amount of the terminal voltage of the resistors 361 and 362. As a result, the power consumption of the comparator 330 can be reduced.

[0158] <4. Fourth embodiment>

[0159] In the first embodiment described above, differential amplification is performed by a differential amplifier circuit provided with P-type differential transistors 332 and 333. However, in this configuration, differential amplification cannot be performed when the signal level of the pixel signal is higher than the reset level. The comparator 330 of the fourth embodiment is different from that of the first embodiment in that an N-type differential transistor is provided.

[0160] Fig.143 is a circuit diagram showing a configuration example of a comparator 330 of a fourth embodiment of the present technology. The comparator 330 of the fourth embodiment includes a control transistor 371, current mirror transistors 372 and 373, auto-zero switches 374 and 375, and differential transistors 376 and 377. In addition, the comparator 330 also includes a tail current source 378, a capacitor 379, and a voltage divider circuit 340.

[0161] NMOS transistors are used as the control transistor 371 and the differential transistors 376 and 377. In addition, pMOS transistors are used as the current mirror transistors 372 and 373.

[0162] The control transistor 371 and the current mirror transistor 372 are connected in parallel between the terminal of the power supply voltage VDD and the differential transistor 376. The current mirror transistor 372 is diode-connected. The current mirror transistor 373 and the differential transistor 377 are connected in series between the terminal of the power supply voltage VDD and the tail current source 378. The source of each of the differential transistors 376 and 377 is commonly connected to the tail current source 378.

[0163] In addition, the gates of the control transistor 371 and the differential transistor 376 are commonly connected to the voltage dividing circuit 340. The capacitor 379 is inserted between the gate of the differential transistor 377 and the terminal of the reference potential.

[0164] Under the control of the timing control section 214 , the auto-zero switch 374 short-circuits the gate and drain of the differential transistor 376 . On the other hand, under the control of the timing control section 214 , the auto-zero switch 375 short-circuits the gate and drain of the differential transistor 377 .

[0165] Note that the differential transistor 376 is an example of an input-side differential transistor described in the claims. The differential transistor 377 is an example of an output-side differential transistor described in the claims. In addition, the current mirror transistor 372 is an example of an input-side current mirror transistor described in the claims. The current mirror transistor 373 is an example of an output-side current mirror transistor described in the claims.

[0166] In the case where the pixel 220 accumulates positive charge, the signal level will be higher than the reset level. In this case, when the signal level is very high (ie, the amplitude is large), the gate-source voltage of the differential transistor 376 becomes high.

[0167] In addition, when the signal level of the pixel signal Vin is higher than a predetermined value, the control transistor 371 increases the drain voltage V2 and decreases the gate-source voltage of the differential transistor 376. As a result, an increase in the parasitic capacitance of the differential transistor 376 can be suppressed.

[0168] Note that the second embodiment and the third embodiment can also be applied to the comparator 330 of the fourth embodiment.

[0169] As described above, according to the fourth embodiment of the present technology, the N-type control transistor 371 can reduce the gate-source voltage of the differential transistor 376. Therefore, even when the signal level becomes higher than the reset level, an increase in parasitic capacitance can be suppressed.

[0170] <5. Application examples of endoscopic surgery systems>

[0171] The technology according to the present disclosure can be applied to various products. For example, the technology according to the present disclosure can be applied to an endoscopic surgery system.

[0172] Fig.15 is a diagram showing an example of a schematic configuration of an endoscopic surgery system 5000 to which the technology of the present disclosure is applicable. Fig.15 FIG. 5 shows a state in which a surgeon 5067 performs surgery on a patient 5071 on a bed 5069 using an endoscopic surgery system 5000. Fig.15 As shown, the endoscopic surgery system 5000 includes an endoscope 5001, other surgical tools 5017, a support arm device 5027 for supporting the endoscope 5001, and a cart 5037 on which various devices for endoscopic surgery are installed.

[0173] In endoscopic surgery, multiple punctures are made in the abdominal wall using cylindrical opening instruments called trocars 5025a to 5025d, instead of cutting the abdominal wall to perform laparotomy. Then, the endoscope barrel 5003 and other surgical tools 5017 are inserted into the body cavity of the patient 5071 through the trocars 5025a to 5025d. Fig.15 In the example shown, as other surgical tools 5017, a pneumoperitoneum tube 5019, an energy treatment tool 5021, and forceps 5023 are inserted into the body cavity of a patient 5071. In addition, the energy treatment tool 5021 is a treatment tool that performs incision and peeling of tissues or sealing of blood vessels by high-frequency current or ultrasonic vibration. However, it is noted that the surgical tool 5017 shown is only an example, and as the surgical tool 5017, various surgical tools generally used in endoscopic surgery, such as forceps and retractors, can also be used.

[0174] The image of the surgical site in the body cavity of the patient 5071 captured by the endoscope 5001 is displayed on the display device 5041. The surgeon 5067 performs treatment such as excision of the affected part using the energy treatment tool 5021 or the forceps 5023 while observing the image of the surgical site displayed on the display device 5041 in real time. Note that although not shown in the figure, during the operation, the pneumoperitoneum tube 5019, the energy treatment tool 5021, and the forceps 5023 are held by the surgeon 5067 or an assistant.

[0175] (Support arm device)

[0176] The support arm assembly 5027 includes an arm portion 5031 extending from a base portion 5029. Fig.15 In the illustrated example, the arm 5031 includes joints 5033a, 5033b, and 5033c and links 5035a and 5035b, and the arm 5031 is driven by control from an arm control device 5045. The arm 5031 supports the endoscope 5001, and controls the position and posture of the endoscope 5001. As a result, the position of the endoscope 5001 can be stably fixed.

[0177] (Endoscope)

[0178] The endoscope 5001 includes: a barrel 5003, a region having a predetermined length from the front end of the barrel 5003 is inserted into the body cavity of a patient 5071; and a camera head 5005 connected to the base end of the barrel 5003. Fig.15 An example is shown in which the endoscope 5001 is configured as a so-called rigid endoscope having a rigid lens barrel 5003 , but the endoscope 5001 may also be configured as a so-called flexible endoscope having a flexible lens barrel 5003 .

[0179] An opening portion in which an objective lens is installed is provided at the front end of the lens barrel 5003. A light source device 5043 is connected to the endoscope 5001 so that the light generated by the light source device 5043 is guided to the front end of the lens barrel through a light guide extending in the lens barrel 5003. The light is irradiated onto an observation object in the body cavity of the patient 5071 via the objective lens. Note that the endoscope 5001 may be a forward-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0180] An optical system and an imaging element are provided in the camera head 5005 so that the reflected light (observation light) from the observation object is gathered onto the imaging element through the optical system. The observation light is photoelectrically converted by the imaging element, and an electrical signal corresponding to the observation light, that is, an image signal corresponding to the observation image, is generated. The image signal is sent to the CCU (camera control unit) 5039 as RAW data. Note that the camera head 5005 has a function of adjusting the magnification and focal length by appropriately driving the optical system.

[0181] Note that in order to support stereoscopic observation (3D display), for example, the camera 5005 may be provided with a plurality of imaging elements. In this case, in order to guide observation light to each of the plurality of imaging elements, a plurality of relay optical systems may be provided inside the lens barrel 5003.

[0182] (Various devices mounted on carts)

[0183] The CCU 5039 includes a central processing unit (CPU) and a graphics processing unit (GPU), etc., and the CCU 5039 comprehensively controls the operations of the endoscope 5001 and the display device 5041. Specifically, the CCU 5039 performs various image processing such as development processing (demosaic processing) for displaying an image based on the image signal received from the camera 5005. The CCU 5039 provides the image signal after the image processing to the display device 5041. In addition, the CCU 5039 sends a control signal to the camera 5005 to control the driving of the camera 5005. The control signal may include information related to the imaging conditions (for example, magnification or focal length, etc.).

[0184] Under the control of the CCU 5039, the display device 5041 displays an image based on an image signal processed by the CCU 5039. When the endoscope 5001 is compatible with high-resolution imaging such as 4K (3840 horizontal pixels × 2160 vertical pixels) or 8K (7680 horizontal pixels × 4320 vertical pixels) and / or 3D display, a device capable of high-resolution display and / or a device capable of 3D display can be used as the display device 5041 corresponding to each endoscope 5001. When the display device 5041 is compatible with high-resolution imaging such as 4K or 8K, a more immersive feeling can be obtained by using a display device 5041 of 55 inches or larger. In addition, a plurality of display devices 5041 having different resolutions and sizes may be provided according to the purpose.

[0185] The light source device 5043 includes, for example, a light source such as a light emitting diode (LED), and supplies irradiation light for imaging a surgical site to the endoscope 5001 .

[0186] For example, the arm control device 5045 includes a processor such as a CPU, and operates according to a predetermined program, and thereby controls the driving of the arm portion 5031 of the support arm device 5027 according to a predetermined control method.

[0187] The input device 5047 is an input interface for the endoscopic surgery system 5000. The user can input various information or instructions to the endoscopic surgery system 5000 through the input device 5047. For example, the user inputs various information about the surgery, such as the patient's physical information or information about the surgical method, through the input device 5047. In addition, for example, the user inputs instructions for driving the arm 5031, instructions for changing the imaging conditions (type of irradiation light, magnification, focal length, etc.) of the endoscope 5001, and instructions for driving the energy treatment tool 5021, etc. through the input device 5047.

[0188] The type of the input device 5047 is not limited, and the input device 5047 may be various known input devices. As the input device 5047, for example, a mouse, a keyboard, a touch panel, a switch, a foot switch 5057, and / or a joystick can be applied. In the case of using a touch panel as the input device 5047, the touch panel may be provided on the display surface of the display device 5041.

[0189] Alternatively, the input device 5047 is a device worn by the user, such as a glasses-type wearable device or a head-mounted display (HMD), and various inputs are performed according to the user's posture or line of sight detected by these devices. In addition, the input device 5047 includes a camera capable of detecting the user's movements, and various inputs are performed according to the user's posture or line of sight detected from the image taken by the camera. In addition, the input device 5047 includes a microphone capable of collecting the user's voice, and various inputs are performed by voice using the microphone. As described above, since the input device 5047 can be configured to input various information in a non-contact manner, users (e.g., surgeons 5067) belonging to clean areas in particular can operate equipment belonging to non-clean areas in a non-contact manner. In addition, the user can operate the equipment without releasing his hands from the surgical tools, which improves convenience for the user.

[0190] The treatment tool control device 5049 controls the driving of the energy treatment tool 5021 for burning or cutting tissue or sealing blood vessels. In order to expand the body cavity of the patient 5071 to ensure the field of view of the endoscope 5001 and to ensure the working space of the surgeon, the pneumoperitoneum device 5051 delivers gas to the body cavity through the pneumoperitoneum tube 5019. The recorder 5053 is a device capable of recording various information related to the operation. The printer 5055 is a device capable of printing various information related to the operation in various forms such as text, images or charts.

[0191] Hereinafter, the special features of the endoscopic surgical system 5000 will be described in more detail.

[0192] (Support arm device)

[0193] The support arm device 5027 includes a base 5029 as a base and an arm 5031 extending from the base 5029. Fig.15 The arm 5031 in the illustrated example includes a plurality of joints 5033a, 5033b, and 5033c and a plurality of links 5035a and 5035b connected by the joint 5033b, but in Fig.15 In the figure, for simplicity, the structure of arm 5031 is shown in a simplified manner. In fact, in order to realize the desired degree of freedom of arm 5031, the shape, quantity and arrangement of joints 5033a to 5033c and connecting rods 5035a and 5035b and the direction of the rotation axis of joints 5033a to 5033c etc. can be appropriately set. For example, arm 5031 can be appropriately constructed to have six or more degrees of freedom. As a result, endoscope 5001 can be freely moved within the movable range of arm 5031, so that the lens barrel 5003 of endoscope 5001 can be inserted into the body cavity of patient 5071 from the desired direction.

[0194] The joints 5033a to 5033c are provided with actuators, and the joints 5033a to 5033c can be rotated around a predetermined rotation axis by driving the actuators. The arm control device 5045 controls the driving of the actuators, thereby controlling the rotation angles of the joints 5033a to 5033c and controlling the driving of the arm 5031. As a result, the position and posture of the endoscope 5001 can be controlled. At this time, the arm control device 5045 can control the driving of the arm 5031 by various known control methods such as force control or position control.

[0195] For example, when the surgeon 5067 performs appropriate operation input via the input device 5047 (including the foot switch 5057), the arm control device 5045 can appropriately control the drive of the arm 5031 according to the operation input, and control the position and posture of the endoscope 5001. According to this control, the endoscope 5001 at the front end of the arm 5031 can be moved from any position to any position, and then fixedly supported at the moved position. Note that the arm 5031 can be operated in a so-called master-slave manner. In this case, the user can remotely operate the arm 5031 via the input device 5047 installed in a place separated from the operating room.

[0196] In addition, in the case where force control is applied, the arm control device 5045 can perform so-called power-assisted control as follows: in which, upon receiving an external force from the user, the actuators of the joints 5033a to 5033c are driven in such a manner that the arm 5031 moves smoothly with the external force. As a result, when the user moves the arm 5031 in a manner that directly contacts the arm 5031, he / she can move the arm 5031 with a relatively light force. Therefore, the endoscope 5001 can be moved more intuitively and with a simpler operation, which is more convenient for the user.

[0197] Here, generally, in endoscopic surgery, a surgeon called an endoscopist holds the endoscope 5001. By using the support arm device 5027, the position of the endoscope 5001 can be fixed more reliably without manual work. Therefore, an image of the surgical site can be reliably obtained, and the surgery can be performed smoothly.

[0198] Note that the arm control device 5045 does not necessarily have to be provided on the cart 5037. In addition, the arm control device 5045 does not necessarily have to be one device. For example, the arm control device 5045 may be provided in each of the joints 5033a to 5033c of the arm 5031 of the support arm device 5027, and a plurality of arm control devices 5045 may cooperate with each other to control the driving of the arm 5031.

[0199] (Light source device)

[0200] The light source device 5043 provides the endoscope 5001 with irradiation light for photographing the surgical site. For example, the light source device 5043 may include an LED, a laser light source, or a white light source composed of a combination of an LED and a laser light source. At this time, in the case of a white light source composed of a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision. Therefore, the white balance of the captured image can be adjusted in the light source device 5043. In addition, in this case, it is also possible to irradiate the observation object with lasers from each of the RGB laser light sources in a time-division manner, and control the drive of the imaging element of the camera 5005 synchronously with the irradiation timing, so as to capture images corresponding to each of R, G and B in a time-division manner. According to this method, even if a color filter is not provided in the imaging element, a color image can be obtained.

[0201] In addition, the drive of the light source device 5043 can be controlled so that the light intensity to be output is changed at predetermined intervals. By controlling the drive of the imaging element of the camera 5005 in synchronization with the timing of the change in light intensity, images are acquired in a time-division manner, and these images are synthesized, so that a high dynamic range image without so-called underexposure (blackout) and overexposure (overexposure) can be generated.

[0202] In addition, the light source device 5043 may be configured to provide light of a predetermined wavelength band corresponding to special light observation. In special light observation, for example, so-called narrow band imaging is performed as follows: that is, by utilizing the wavelength dependence of light absorption in human tissue, light having a narrower band than the irradiation light (i.e., white light) during ordinary observation is irradiated, thereby imaging predetermined tissues such as blood vessels in the surface layer of the mucosa with high contrast. Alternatively, in special light observation, fluorescence observation may be performed as follows: wherein an image is obtained by fluorescence generated by irradiating excitation light. For example, examples of fluorescence observation include: irradiating human tissue with excitation light and observing fluorescence from the human tissue (autofluorescence observation); or, obtaining a fluorescence image by locally injecting a reagent such as indocyanine green (ICG) into human tissue and irradiating the human tissue with excitation light corresponding to the fluorescence wavelength of the reagent. The light source device 5043 may be configured to provide narrow band light and / or excitation light corresponding to such special light observation.

[0203] (Camera and CCU)

[0204] Reference Fig.16 The functions of the camera 5005 and the CCU 5039 of the endoscope 5001 are described in more detail. Fig.16It is shown Fig.15 A block diagram showing an example of the functional configuration of a camera 5005 and a CCU (camera control unit) 5039 shown.

[0205] refer to Fig.16 As functions of the camera 5005, the camera 5005 has a lens unit 5007, an imaging unit 5009, a driving unit 5011, a communication unit 5013, and a camera control unit 5015. In addition, as functions of the CCU 5039, the CCU 5039 has a communication unit 5059, an image processing unit 5061, and a control unit 5063. The camera 5005 and the CCU 5039 are connected to each other so as to be communicable via a transmission cable 5065.

[0206] First, the functional configuration of the camera head 5005 will be described. The lens unit 5007 is an optical system provided at the connection portion with the lens barrel 5003. The observation light picked up from the front end of the lens barrel 5003 is guided to the camera head 5005 and incident on the lens unit 5007. The lens unit 5007 is constructed by combining a plurality of lenses including a zoom lens and a focus lens. The optical characteristics of the lens unit 5007 can be adjusted so that the observation light is gathered on the light receiving surface of the image pickup element of the image pickup section 5009. In addition, the zoom lens and the focus lens are constructed so that their positions on the optical axis can be moved so as to adjust the magnification and focus of the captured image.

[0207] The imaging unit 5009 includes an imaging element and is arranged at the rear stage of the lens unit 5007. The observation light that has passed through the lens unit 5007 is collected on the light receiving surface of the imaging element, and an image signal corresponding to the observation image is generated by photoelectric conversion. The image signal generated by the imaging unit 5009 is provided to the communication unit 5013.

[0208] As the imaging element constituting the imaging unit 5009, for example, a CMOS (complementary metal oxide semiconductor) type image sensor having a Bayer array and capable of color imaging is used. Note that as the imaging element, for example, a device capable of capturing images with a high resolution of 4K or more can be used. By obtaining an image of the surgical site at a high resolution, the surgeon 5067 can grasp the condition of the surgical site in more detail and can perform the surgery more safely.

[0209] In addition, the imaging element constituting the imaging unit 5009 may have a pair of imaging elements for respectively acquiring a right eye image signal and a left eye image signal corresponding to 3D display. By performing 3D display, the surgeon 5067 can more accurately grasp the depth of human tissue in the surgical site. Note that, in the case where the imaging unit 5009 is a multi-plate type, a plurality of lens units 5007 are provided corresponding to each imaging element.

[0210] In addition, the imaging unit 5009 does not necessarily have to be disposed in the camera head 5005. For example, the imaging unit 5009 may be disposed in the lens barrel 5003 and immediately behind the objective lens.

[0211] The driving section 5011 includes an actuator and moves the zoom lens and the focus lens of the lens unit 5007 by a predetermined distance along the optical axis under the control of the camera control section 5015. As a result, the magnification and focus of the captured image of the imaging section 5009 can be appropriately adjusted.

[0212] The communication unit 5013 includes a communication device for sending various information to and receiving various information from the CCU 5039. The communication unit 5013 sends the image signal obtained from the camera unit 5009 as raw data to the CCU 5039 through the transmission cable 5065. At this time, it is preferred that the image signal is sent through optical communication so that the captured image of the surgical site is displayed with a low delay time. During the operation, the surgeon 5067 performs the operation while observing the state of the affected area through the captured image. Therefore, in order to make the operation safer and more reliable, it is required to display the dynamic image of the surgical site as close to real time as possible. In the case of optical communication, the communication unit 5013 is provided with a photoelectric conversion module that converts an electrical signal into an optical signal. The image signal is converted into an optical signal by the photoelectric conversion module and then transmitted to the CCU 5039 through the transmission cable 5065.

[0213] In addition, the communication unit 5013 receives a control signal for controlling the drive of the camera 5005 from the CCU 5039. For example, the control signal includes information related to the shooting conditions, such as: information for specifying the frame rate of the captured image, information for specifying the exposure value during shooting, and / or information for specifying the magnification and focus of the captured image. The communication unit 5013 provides the received control signal to the camera control unit 5015. Note that the control signal from the CCU 5039 can also be transmitted through optical communication. In this case, the communication unit 5013 is provided with a photoelectric conversion module that converts an optical signal into an electrical signal. The control signal is converted into an electrical signal by the photoelectric conversion module and then provided to the camera control unit 5015.

[0214] Note that the imaging conditions such as the above-mentioned frame rate, exposure value, magnification, and focus are automatically set based on the acquired image signal by the control unit 5063 of the CCU 5039. That is, the endoscope 5001 is equipped with a so-called automatic exposure (AE: auto exposure) function, an automatic focus (AF: auto focus) function, and an automatic white balance (AWB: auto white balance) function.

[0215] The camera control unit 5015 controls the driving of the camera 5005 based on the control signal from the CCU 5039 received through the communication unit 5013. For example, the camera control unit 5015 controls the driving of the imaging element of the imaging unit 5009 based on the information for specifying the frame rate of the captured image and / or the information for specifying the exposure value when capturing an image. In addition, for example, the camera control unit 5015 appropriately moves the zoom lens and the focus lens of the lens unit 5007 through the driving unit 5011 based on the information for specifying the magnification and focus of the captured image. The camera control unit 5015 may also include a function of storing information for identifying the lens barrel 5003 and the camera 5005.

[0216] Note that by arranging the lens unit 5007, the imaging section 5009, and the like in a sealed structure with high airtightness and waterproofness, the camera head 5005 can be made durable against high-pressure sterilization.

[0217] Next, the functional configuration of the CCU 5039 will be described. The communication unit 5059 includes a communication device for sending various information to the camera 5005 and receiving various information from the camera 5005. The communication unit 5059 receives an image signal sent from the camera 5005 via the transmission cable 5065. At this time, as described above, the image signal is preferably capable of being transmitted through optical communication. In this case, in order to support optical communication, the communication unit 5059 is provided with a photoelectric conversion module that converts an optical signal into an electrical signal. The communication unit 5059 provides the image signal that has been converted into an electrical signal to the image processing unit 5061.

[0218] In addition, the communication unit 5059 transmits a control signal for controlling the driving of the camera 5005 to the camera 5005. The control signal may be transmitted by optical communication.

[0219] The image processing unit 5061 performs various image processing on the image signal as raw data sent from the camera 5005. Examples of image processing include various known signal processing such as development processing, enhancement processing (e.g., band emphasis processing, super-resolution processing, noise reduction (NR: noise reduction) processing and / or camera shake correction processing), and / or magnification processing (electronic zoom processing). In addition, the image processing unit 5061 also performs detection processing on the image signal for performing AE, AF and AWB.

[0220] The image processing unit 5061 includes a processor such as a CPU or a GPU, and the processor operates according to a predetermined program, thereby performing the above-mentioned image processing and detection processing. Note that in the case where the image processing unit 5061 includes a plurality of GPUs, the image processing unit 5061 appropriately divides the information related to the image signal, and performs image processing in parallel by the plurality of GPUs.

[0221] The control unit 5063 performs various controls related to the imaging of the surgical site by the endoscope 5001 and the display of the captured image. For example, the control unit 5063 generates a control signal for controlling the driving of the camera 5005. At this time, in the case where the user inputs the imaging conditions, the control unit 5063 generates a control signal based on the user's input. Alternatively, in the case where the endoscope 5001 is equipped with an AE function, an AF function, and an AWB function, the control unit 5063 appropriately calculates the optimal exposure value, focal length, and white balance according to the result of the detection processing of the image processing unit 5061, and generates a control signal.

[0222] In addition, based on the image signal that has been image-processed by the image processing unit 5061, the control unit 5063 causes the display device 5041 to display the image of the surgical site. At this time, the control unit 5063 uses various image recognition technologies to recognize various objects in the surgical site image. For example, the control unit 5063 can recognize surgical tools such as forceps, specific human body parts, bleeding, and mist when the energy treatment tool 5021 is used by detecting the shape or color of the edge of the object included in the surgical site image. When the image of the surgical site is displayed on the display device 5041, the control unit 5063 uses the above-mentioned recognition results to superimpose various surgical auxiliary information on the image of the surgical site. By superimposing the surgical auxiliary information and presenting the surgical auxiliary information to the surgeon 5067, the operation can be performed more safely and reliably.

[0223] The transmission cable 5065 connecting the camera head 5005 to the CCU 5039 is an electrical signal cable supporting electrical signal communication, an optical fiber supporting optical communication, or a composite cable supporting electrical communication and optical communication.

[0224] Here, despite Fig.16 In the example shown, the transmission cable 5065 is used for wired communication, but the communication between the camera 5005 and the CCU 5039 can also be performed wirelessly. In the case where the communication between the camera 5005 and the CCU 5039 is performed wirelessly, there is no need to lay the transmission cable 5065 in the operating room. Therefore, it is possible to avoid a situation where the transmission cable 5065 hinders the movement of medical staff in the operating room.

[0225] An example of an endoscopic surgery system 5000 to which the technology of the present disclosure can be applied has been described above. Note that although the endoscopic surgery system 5000 is used as an example for description here, the system to which the technology according to the present disclosure can be applied is not limited to the above example. For example, the technology according to the present disclosure can also be applied to a flexible endoscope system for inspection and a microscope surgery system.

[0226] The technology according to the present disclosure is applicable to the camera unit 5009 in the above-described configuration. Figure 1 The imaging device 100 is applied to the imaging unit 5009. By applying the technology according to the present disclosure to the imaging unit 5009, smearing can be suppressed and a clearer surgical site image can be obtained. Therefore, surgery can be performed more safely and reliably.

[0227] <6. Application examples of mobile objects>

[0228] The technology disclosed herein (the technology) can be applied to various products. For example, the technology disclosed herein can be implemented as a device installed on any type of mobile body, such as a car, an electric car, a hybrid car, a motorcycle, a bicycle, a personal mobile vehicle, an airplane, a drone, a ship, or a robot.

[0229] Fig.17 : is a block diagram showing a schematic configuration example of a vehicle control system as an example of a moving body control system to which the technology of the present disclosure is applicable.

[0230] The vehicle control system 12000 includes a plurality of electronic control units connected to each other via a communication network 12001. Fig.17 In the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. In addition, as a functional configuration of the integrated control unit 12050, a microcomputer 12051, a sound and image output unit 12052, and an in-vehicle network interface (I / F: interface) 12053 are shown.

[0231] The drive system control unit 12010 controls the operation of the devices related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 functions as a control device for the following devices: a drive force generating device such as an internal combustion engine or a drive motor for generating the drive force of the vehicle; a drive force transmitting mechanism for transmitting the drive force to the wheels; a steering mechanism for adjusting the steering angle of the vehicle; and a braking device for generating the braking force of the vehicle.

[0232] The body system control unit 12020 controls the operation of various devices installed on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for the following devices: a keyless entry system; a smart key system; a power window device; or various lights such as headlights, taillights, brake lights, turn signals, or fog lights. In this case, the body system control unit 12020 can receive input of radio waves or signals of various switches sent from a portable device that replaces the key. The body system control unit 12020 receives the input of radio waves or signals and controls the door lock device, power window device, and lights of the vehicle.

[0233] The vehicle exterior information detection unit 12030 detects information on the exterior of the vehicle on which the vehicle control system 12000 is installed. For example, the vehicle exterior information detection unit 12030 is connected to the camera unit 12031. The vehicle exterior information detection unit 12030 causes the camera unit 12031 to capture an image of the exterior of the vehicle and receives the captured image. Based on the received image, the vehicle exterior information detection unit 12030 can perform object detection processing or distance measurement processing on pedestrians, vehicles, obstacles, signs, or text on the road surface.

[0234] The imaging unit 12031 is an optical sensor for receiving light and outputting an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or can output the electrical signal as distance measurement information. In addition, the light received by the imaging unit 12031 can be visible light or non-visible light such as infrared light.

[0235] The in-vehicle information detection unit 12040 detects information about the interior of the vehicle. For example, the in-vehicle information detection unit 12040 is connected to a driver state detection unit 12041 for detecting the driver's state. The driver state detection unit 12041 includes, for example, a camera for capturing an image of the driver, and based on the detection information input from the driver state detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue level or concentration level, or can determine whether the driver is dozing off.

[0236] Based on the information outside or inside the vehicle acquired by the outside information detection unit 12030 or the inside information detection unit 12040, the microcomputer 12051 can calculate the control target value of the driving force generating device, the steering mechanism, or the braking device, and can output a control command to the driving system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an advanced driver assistance system (ADAS), the functions of which include: collision avoidance or collision mitigation of the vehicle, following driving based on the vehicle-to-vehicle distance, speed maintenance driving, vehicle collision warning, or lane departure warning of the vehicle.

[0237] In addition, based on the information about the vehicle surroundings obtained by the external information detection unit 12030 or the internal information detection unit 12040, the microcomputer 12051 can control the driving force generating device, the steering mechanism or the braking device, etc., thereby performing, for example, collaborative control of automatic driving aimed at achieving autonomous driving without relying on the driver's operation.

[0238] In addition, based on the information outside the vehicle acquired by the vehicle exterior information detection unit 12030, the microcomputer 12051 can output a control command to the body system control unit 12020. For example, the microcomputer 12051 can control the headlights according to the position of the leading vehicle or the oncoming vehicle detected by the vehicle exterior information detection unit 12030, and perform cooperative control for the purpose of anti-glare, such as switching the high beam to the low beam.

[0239] The audio and video output unit 12052 sends an output signal of at least one of audio and video to an output device capable of visually or auditorily notifying the vehicle passengers or the outside of the vehicle of information. Fig.17 In the example of FIG. 1 , as examples of output devices, an audio speaker 12061, a display portion 12062, and an instrument panel 12063 are shown. The display portion 12062 may include, for example, at least one of an onboard display or a head-up display.

[0240] Fig.18 This is a diagram showing an example of the installation position of the camera unit 12031.

[0241] exist Fig.18 In the figure, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104 and 12105.

[0242] For example, the camera units 12101, 12102, 12103, 12104 and 12105 are arranged at positions such as the front nose, side mirrors, rear bumper, trunk door and upper part of the windshield in the vehicle 12100. The camera unit 12101 arranged at the front nose and the camera unit 12105 arranged at the upper part of the windshield in the vehicle mainly acquire images in front of the vehicle 12100. The camera units 12102 and 12103 arranged at the side mirrors mainly acquire images on the sides of the vehicle 12100. The camera unit 12104 arranged at the rear bumper or trunk door mainly acquires images behind the vehicle 12100. The camera unit 12105 arranged at the upper part of the windshield in the vehicle is mainly used to detect vehicles or pedestrians in front, obstacles, signal lights, traffic signs or lanes, etc.

[0243] Notice, Fig.18 An example of the imaging range of the imaging units 12101 to 12104 is shown. The imaging range 12111 indicates the imaging range of the imaging unit 12101 provided at the front nose, the imaging ranges 12112 and 12113 respectively indicate the imaging ranges of the imaging units 12102 and 12103 provided at the side mirrors, and the imaging range 12114 indicates the imaging range of the imaging unit 12104 provided at the rear bumper or the trunk door. For example, by superimposing the image data captured by the imaging units 12101 to 12104, it is possible to obtain a bird's-eye view image of the vehicle 12100 seen from above.

[0244] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera including a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0245] For example, the microcomputer 12051 can measure the distance to each three-dimensional object within the imaging range 12111 to 12114 and the change of the distance over time (relative speed relative to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104. As a result, the microcomputer 12051 can extract the following three-dimensional object as the leading vehicle: the three-dimensional object is particularly closest to the vehicle 12100 on the driving road of the vehicle 12100 and is traveling at a predetermined speed (for example, greater than or equal to 0 km / h) in the same direction as the vehicle 12100. In addition, the microcomputer 12051 can set the inter-vehicle distance to be ensured in advance in front of the leading vehicle, and can perform automatic braking control (including follow-up stop control) or automatic acceleration control (including follow-up start control) and the like. As described above, cooperative control aimed at achieving autonomous driving, for example, independent of the driver's operation, can be performed.

[0246] For example, based on the distance information obtained from the camera units 12101 to 12104, the microcomputer 12051 can extract the three-dimensional object data by classifying the three-dimensional object data about the three-dimensional object into two-wheeled vehicles, standard vehicles, large vehicles, pedestrians, and other three-dimensional objects such as electric poles, and use the extracted data to automatically avoid obstacles. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that can be seen by the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 can determine the collision risk for indicating the risk of collision with each obstacle, and when the collision risk is equal to or higher than the set value and thus there is a possibility of collision, the microcomputer 12051 can output an alarm to the driver through the audio speaker 12061 or the display unit 12062, or can perform forced deceleration or evasive steering through the drive system control unit 12010, thereby performing driving assistance for avoiding collision.

[0247] At least one of the camera units 12101 to 12104 may be an infrared camera for detecting infrared rays. For example, the microcomputer 12051 can identify a pedestrian by determining whether there is a pedestrian in the image captured by the camera units 12101 to 12104. For example, such identification of pedestrians is performed by extracting feature points in the image captured by the camera units 12101 to 12104 as infrared cameras; and determining whether the object is a pedestrian by pattern matching a series of feature points representing the outline of the object. When the microcomputer 12051 determines that there is a pedestrian in the image captured by the camera units 12101 to 12104 and identifies the pedestrian, the sound and image output unit 12052 controls the display unit 12062 to display a rectangular outline for emphasis in a superimposed manner on the identified pedestrian. In addition, the sound and image output unit 12052 can also control the display unit 12062 to display an icon or the like for representing a pedestrian at a desired position.

[0248] In the above, an example of a vehicle control system to which the technology of the present disclosure can be applied has been described. In the above configuration, the technology according to the present disclosure is applied to the camera unit 12031, for example. Specifically, Figure 1 The imaging device 100 is applied to the imaging unit 12031. By applying the technology according to the present disclosure to the imaging unit 12031, smearing can be suppressed, and a captured image that is easier to observe can be obtained, thereby reducing the fatigue of the driver.

[0249] Note that the above-described embodiments are examples for implementing the present technology, and the matters in the embodiments have a corresponding relationship with the matters of the present invention recorded in the claims. Similarly, the matters of the present invention recorded in the claims and the matters with the same names in the embodiments of the present technology have a corresponding relationship. However, note that the present technology is not limited to the embodiments, and the present technology can be implemented by making various modifications to the embodiments without departing from the gist of the present technology.

[0250] Note that the present technology can also be configured in the following manner.

[0251] (1) A solid-state imaging element comprising:

[0252] A voltage dividing circuit for providing a voltage division of an input voltage inputted and a predetermined reference voltage;

[0253] an input-side differential transistor that outputs a drain current corresponding to a gate-source voltage between the divided voltage input to the gate and a predetermined source voltage;

[0254] an output-side differential transistor that outputs a voltage corresponding to the drain current as a comparison result between the input voltage and the reference voltage; and

[0255] A control transistor is configured to reduce the gate-source voltage when the input voltage is a value outside a predetermined range.

[0256] (2) The solid-state imaging device according to (1) above, further comprising:

[0257] a tail current source commonly connected to a source of the input-side differential transistor and a source of the output-side differential transistor;

[0258] an input-side current mirror transistor having a drain and a gate connected to the drain of the input-side differential transistor; and

[0259] an output-side current mirror transistor having a drain connected to the drain of the output-side differential transistor and a gate connected to the gate of the input-side current mirror transistor,

[0260] The gate of the control transistor is connected to the output node of the voltage divider circuit, and the source of the control transistor is connected to the connection point of the input-side differential transistor and the input-side current mirror transistor.

[0261] (3) The solid-state imaging device according to (1) above, further comprising:

[0262] a tail current source commonly connected to a source of the input-side differential transistor and a source of the output-side differential transistor;

[0263] an input side resistor having one end connected to the drain of the input side differential transistor; and

[0264] an output side resistor, one end of which is connected to the drain of the output side differential transistor,

[0265] The gate of the control transistor is connected to the output node of the voltage divider circuit, and the source of the control transistor is connected to the connection point of the input-side differential transistor and the input-side resistor.

[0266] (4) The solid-state imaging device according to (3) above, further comprising:

[0267] an input-side current mirror transistor having a gate connected to a connection point between the input-side differential transistor and the input-side resistor and a drain connected to the other end of the input-side resistor; and

[0268] An output-side current mirror transistor has a drain connected to the other end of the output-side resistor and a gate connected to the gate of the input-side current mirror transistor.

[0269] (5) The solid-state imaging element according to any one of (1) to (4) above, wherein:

[0270] The input side differential transistor, the output side differential transistor and the control transistor are P-type transistors, and

[0271] The control transistor reduces the drain voltage of the input-side differential transistor when the input voltage is lower than a predetermined value.

[0272] (6) The solid-state imaging element according to any one of (1) to (4) above, wherein:

[0273] The input side differential transistor, the output side differential transistor and the control transistor are N-type transistors, and

[0274] The control transistor increases the drain voltage of the input-side differential transistor in a case where the input voltage is higher than a predetermined value.

[0275] (7) The solid-state imaging element according to any one of (1) to (6) above, wherein:

[0276] The voltage dividing circuit changes the voltage dividing ratio between the input voltage and the reference voltage according to a control signal.

[0277] (8) A camera device comprising:

[0278] A voltage dividing circuit for providing a voltage division of an input voltage inputted and a predetermined reference voltage;

[0279] an input-side differential transistor that outputs a drain current corresponding to a gate-source voltage between the divided voltage input to the gate and a predetermined source voltage;

[0280] an output-side differential transistor that outputs a voltage corresponding to the drain current as a comparison result between the input voltage and the reference voltage;

[0281] a control transistor that reduces the gate-source voltage when the input voltage is a value outside a predetermined range; and

[0282] A counter counts a count value based on the comparison result.

[0283] Reference numerals list

[0284] 100: Camera

[0285] 110: Optical Department

[0286] 120: DSP circuit

[0287] 130: Display unit

[0288] 140: Operation Department

[0289] 150: Bus

[0290] 160: Frame memory

[0291] 170: Storage

[0292] 180: Power supply department

[0293] 200: Solid-state imaging device

[0294] 201: Optical receiving chip

[0295] 202: Circuit Chip

[0296] 211: Row selection unit

[0297] 212: DAC (digital-to-analog converter)

[0298] 213: Pixel array unit

[0299] 214: Timing Control Department

[0300] 215: Horizontal transfer scanning unit

[0301] 216: Signal Processing Department

[0302] 220: Pixels

[0303] 221: Photoelectric conversion element

[0304] 222: Pass transistor

[0305] 223: Reset transistor

[0306] 224: Floating diffusion layer

[0307] 225: Amplifier transistor

[0308] 226: Select transistor

[0309] 230: Constant current source

[0310] 231: Constant current source

[0311] 300: Analog-to-digital conversion unit

[0312] 310: Counter

[0313] 320: Latch

[0314] 330: Comparator

[0315] 331,378: Tail current source

[0316] 332,333,376,377: Differential transistors

[0317] 334,335,374,375: Automatic zeroing switch

[0318] 336,371: Control transistor

[0319] 337,338,372.373: Current mirror transistor

[0320] 339,341~345,379:Capacitors

[0321] 340: Voltage divider circuit

[0322] 346-349: Switch

[0323] 351,352,361,362: Resistors

[0324] 5009,12031: Camera Department

Claims

1. A solid-state imaging element, comprising: A voltage dividing circuit for providing a voltage division of an input voltage inputted and a predetermined reference voltage; an input-side differential transistor that outputs a drain current corresponding to a gate-source voltage between the divided voltage input to the gate and a predetermined source voltage; an output-side differential transistor that outputs a voltage corresponding to the drain current as a comparison result between the input voltage and the reference voltage; and A control transistor is configured to reduce the gate-source voltage when the input voltage is a value outside a predetermined range.

2. The solid-state imaging element according to claim 1, further comprising: a tail current source commonly connected to a source of the input-side differential transistor and a source of the output-side differential transistor; an input-side current mirror transistor, whose drain and gate are connected to the drain of the input-side differential transistor; and an output-side current mirror transistor having a drain connected to the drain of the output-side differential transistor and a gate connected to the gate of the input-side current mirror transistor, The gate of the control transistor is connected to the output node of the voltage divider circuit, and the source of the control transistor is connected to the connection point of the input-side differential transistor and the input-side current mirror transistor.

3. The solid-state imaging element according to claim 1, further comprising: a tail current source commonly connected to a source of the input-side differential transistor and a source of the output-side differential transistor; an input side resistor, one end of which is connected to the drain of the input side differential transistor; and an output side resistor, one end of which is connected to the drain of the output side differential transistor, The gate of the control transistor is connected to the output node of the voltage divider circuit, and the source of the control transistor is connected to the connection point of the input-side differential transistor and the input-side resistor.

4. The solid-state imaging element according to claim 2, further comprising: an input side resistor, one end of which is connected to the drain of the input side differential transistor and the gate of the input side current mirror transistor, and the other end of which is connected to the drain of the input side current mirror transistor and the source of the control transistor; and An output side resistor has one end connected to the drain of the output side differential transistor and the other end connected to the drain of the output side current mirror transistor.

5. The solid-state imaging element according to claim 1, wherein The input side differential transistor, the output side differential transistor and the control transistor are P-type transistors, and The control transistor reduces the drain voltage of the input-side differential transistor when the input voltage is lower than a predetermined value.

6. The solid-state imaging element according to claim 1, wherein The input side differential transistor, the output side differential transistor and the control transistor are N-type transistors, and The control transistor increases the drain voltage of the input-side differential transistor in a case where the input voltage is higher than a predetermined value.

7. The solid-state imaging element according to any one of claims 1 to 6, wherein: The voltage dividing circuit changes the voltage dividing ratio between the input voltage and the reference voltage according to a control signal.

8. A camera device, comprising: The solid-state imaging element according to any one of claims 1 to 7; as well as A counter counts a count value based on the comparison result.

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