Image sensor pixel structure

Abstract

The present invention provides a pixel structure of an image sensor. By arranging a polysilicon structure between a floating diffusion region and a transfer transistor, the distance between the floating diffusion region and the transfer transistor is increased, the area of ​​the overlapping region between the floating diffusion region and the transfer transistor is reduced, the gate induced drain leakage current effect is reduced, and the device performance is guaranteed. The floating diffusion region is surrounded by the polysilicon structure to achieve self-alignment of the floating diffusion region injection process and the contact hole etching process, thereby reducing the generation of dark current or white spots caused by the offset of the contact hole etching position. In addition, since the added polysilicon structure occupies part of the original floating diffusion region, the area of ​​the floating diffusion region is reduced, the capacitance of the floating diffusion region is reduced, the conversion gain capability of the floating diffusion region is improved, the output voltage signal range is guaranteed, and the overall performance of the image sensor is improved.

Description

Technical Field

[0001] The invention relates to a pixel structure of an image sensor. Background Art

[0002] Existing image sensors mainly include modules such as pixel array, timing control, analog signal processing and analog-to-digital conversion. In the pixel array, the photodiode is the photosensitive element, the floating diffusion area can collect electrons converted by the photodiode, and the transfer transistor is arranged between the photodiode and the floating diffusion area to realize the switching function. The floating diffusion area can convert the collected electrons into corresponding voltage signals according to its conversion gain capability.

[0003] The floating diffusion area is the core area of ​​the image sensor pixel unit. Currently, there are the following technical problems that need to be solved:

[0004] First, with the development of technology, the method of connecting the transfer transistor to a negative voltage when collecting charges to improve the isolation function of the transfer transistor has been widely used. However, the disadvantage of this method is that when the transfer transistor is at a negative voltage, the floating diffusion area is at a positive voltage, and the voltage difference between the transfer transistor and the floating diffusion area will increase, which will cause the electric field strength of the transfer transistor and the floating diffusion area to increase, exacerbating the gate-induced drain leakage current effect.

[0005] Figure 1-Figure 3 The pixel structure of a common image sensor in the prior art is shown, including a floating diffusion area 107 and at least one transfer transistor 103 arranged corresponding to the floating diffusion area 107, wherein each transfer transistor 103 has an insulating sidewall 105, and the floating diffusion area 107 is arranged adjacent to the corresponding transfer transistor 103 and its insulating sidewall 105.

[0006] Those skilled in the art will appreciate that the corresponding relationship between the floating diffusion region 107 and the transfer transistor 103 can be selected as needed, and the relationship shown in the figure is only an example and not a limitation. For example, Figure 1 Each floating diffusion region 107 corresponds to one transfer transistor 103 (single transfer transistor mode); Figure 2 Each floating diffusion region 107 corresponds to two transfer transistors 103 (dual shared transfer transistor mode); Figure 3 Each floating diffusion region 107 in the embodiment corresponds to four transfer transistors 103 (four-shared transfer transistor mode).

[0007] by Figure 3 Taking the four-shared transfer transistor mode in FIG. 1 as an example, the formation process of the floating diffusion region 107 and its corresponding transfer transistor 103 is as follows: Figure 4-Figure 7 shown. Figure 4-Figure 7 For along Figure 3 Cross-sectional view along line A1-B1-A1.

[0008] See also Figure 4 , a transfer transistor 103 and an insulating sidewall 105 thereof are formed on a semiconductor substrate 101 .

[0009] See also Figure 5 , covering the photoresist 106 to define a high concentration doping window of the floating diffusion region.

[0010] See also Figure 6 The transfer transistor 103 and its insulating sidewall 105 serve as self-aligned windows of a high-concentration doping window, and high-concentration doping ion implantation is performed to form a floating diffusion region 107 .

[0011] See also Figure 7 Since the floating diffusion region 107 is adjacent to the transfer transistor 103, under the action of the subsequent high-temperature process, the high-concentration doped ions in the floating diffusion region will diffuse from 107 to 107' (as shown by the dotted line in the figure), forming an overlapping region below the transfer transistor 103. This overlapping region will cause an electric field to be generated between the floating diffusion region 107' and the transfer transistor 103, and the greater the voltage difference between the floating diffusion region 107' and the transfer transistor 103, the greater the electric field generated, which in turn leads to a more serious gate-induced drain leakage current effect, thereby attenuating the device performance.

[0012] Secondly, continue with Figure 3 Taking the four-shared transfer transistor mode in FIG. 1 as an example, after the floating diffusion region 107' and the corresponding transfer transistor 103 are formed, the formation process of the contact hole 109 on the floating diffusion region 107' is as follows: Figure 8-Figure 12 shown. Figure 8-Figure 12 For along Figure 3 Cross-sectional view along line A1-B1-C1.

[0013] See also Figure 8 ,pass Figure 4-Figure 7 The floating diffusion region 107' is formed by the process of forming the floating diffusion region 107'. Here, the case where the B1-C1 region has the shallow trench isolation region 102 is taken as an example. In other preferred embodiments not shown, there may be no shallow trench isolation region 102.

[0014] See also Fig. 9 , forming an interlayer dielectric layer 108.

[0015] See also Fig.10 , covering the photoresist 106 to define the etching window of the contact hole.

[0016] See also Fig.11 , etching to form a contact hole 109.

[0017] See also Fig.12Since the etching position of the contact hole 109 on the floating diffusion area 107' is determined by the accuracy of the photolithography process, the high-concentration doping ion implantation position of the floating diffusion area 107' is also affected by the accuracy of the photolithography process. That is to say, since the etching of the contact hole 109 and the high-concentration doping ion implantation of the floating diffusion area 107' have undergone two photolithography processes, these two photolithography processes may produce an offset, resulting in an actual etching position 109' of the contact hole (as shown by the dotted line in the figure) being offset from the position of the floating diffusion area 107', and the high-concentration doping area in the floating diffusion area 107' may not be able to wrap around the contact hole 109', thereby generating dark current and white spots. In addition, if there is a shallow trench isolation region 102 around the floating diffusion region 107', if the position of the window defined by the contact hole etching is inaccurate, the offset contact hole 109' may contact the boundary of the shallow trench isolation region 102, so that the interface of the shallow trench isolation region 102 is destroyed. Since the bottom of the shallow trench isolation region 102 is inside the semiconductor substrate 101 and connected to the active area, the resulting interface defects will further aggravate the dark current and the generation of white spots.

[0018] In addition, the floating diffusion area can convert the collected electrons into corresponding voltage signals according to its conversion gain capability. The conversion output voltage signal range is small, which will cause the device signal-to-noise ratio to deteriorate. If the output voltage signal range is to be guaranteed, it can be achieved by increasing the pixel full well capacity or increasing the conversion gain capability of the floating diffusion area. As technology develops, the size of the pixel unit becomes smaller and smaller, and the increase in the pixel full well capacity will be limited by the size. Therefore, how to improve the conversion gain capability of the floating diffusion area has always been a research object of concern. Summary of the invention

[0019] The object of the present invention is to provide a pixel structure of an image sensor, reduce the gate induced drain leakage current effect, reduce the generation of dark current or white spots, increase the conversion gain capability of the floating diffusion area, and improve the overall performance of the image sensor.

[0020] Based on the above considerations, the present invention provides a pixel structure of an image sensor, comprising: a floating diffusion region; at least one transfer transistor corresponding to the floating diffusion region; and a polysilicon structure located between the floating diffusion region and the transfer transistor.

[0021] Preferably, the polysilicon structure surrounds the floating diffusion region to achieve self-alignment between a floating diffusion region implantation process and a contact hole etching process.

[0022] Preferably, voltage is applied to the transfer transistor and the polysilicon structure simultaneously to increase the potential of the floating diffusion region and enhance the conduction performance.

[0023] Preferably, in the integration state where the transmission transistor is in a low voltage state, the carrier transmission channel below the polysilicon structure is in a depletion state to reduce the capacitance of the floating diffusion region.

[0024] Preferably, the polysilicon structure has discontinuous regions to optimize the conductive performance of the image sensor.

[0025] Preferably, the minimum line width of the polysilicon structure is smaller than the minimum line width of other structures formed by polysilicon in the pixel structure.

[0026] Preferably, the distance between the polysilicon structure and the transfer transistor is smaller than a preset value of the distance between structures formed by polysilicon.

[0027] Preferably, a resident charge or voltage is applied to the polysilicon structure to control conduction of a carrier transmission channel below the polysilicon structure.

[0028] Preferably, there is distributed capacitance coupling between the transfer transistor and the polysilicon structure: as the voltage of the floating diffusion area and the transfer transistor increases, the voltage of the polysilicon structure increases and the conduction is enhanced; as the voltage of the floating diffusion area and the transfer transistor decreases, the voltage of the polysilicon structure decreases and the conduction is weakened.

[0029] Preferably, a variable voltage is applied to the polysilicon structure to form a dual-gate structure of the transfer transistor.

[0030] Preferably, the inner gates of the dual-gate structure are connected and the conduction is controlled by the same signal.

[0031] Preferably, the polysilicon structure and the transfer transistor have an integral insulating sidewall.

[0032] The pixel structure of the image sensor of the present invention increases the distance between the floating diffusion area and the transfer transistor, reduces the area of ​​the overlapping area between the floating diffusion area and the transfer transistor, reduces the gate induced drain leakage current effect, ensures the device performance, surrounds the floating diffusion area with the polysilicon structure to achieve self-alignment of the floating diffusion area injection process and the contact hole etching process, reduces the generation of dark current or white spots caused by the offset of the contact hole etching position, and further, because the added polysilicon structure occupies part of the original floating diffusion area, the area of ​​the floating diffusion area is reduced, the capacitance of the floating diffusion area is reduced, the conversion gain capability of the floating diffusion area is improved, the output voltage signal range is guaranteed, and the overall performance of the image sensor is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Other features, objects and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings.

[0034] Figure 1-Figure 3 A schematic diagram of a pixel structure of an image sensor in the prior art;

[0035] Figure 4-Figure 7 For along Figure 3 Schematic diagram of the formation process of the floating diffusion region of the A1-B1-A1 line;

[0036] Figure 8-Figure 12 For along Figure 3 Schematic diagram of the formation process of the contact hole on the floating diffusion area of ​​the A1-B1-C1 line;

[0037] Figure 13-Figure 15 is a schematic structural diagram of a pixel structure of an image sensor of the present invention;

[0038] Figure 16-Figure 19 For along Fig.15 Schematic diagram of the formation process of the floating diffusion area of ​​line A2-B2-A2;

[0039] Figure 20-24 For along Fig.15 Schematic diagram of the process of forming contact holes on the floating diffusion area of ​​line A2-B2-C2.

[0040] In the drawings, the same or similar reference numerals denote the same or similar devices (modules) or steps throughout different drawings. DETAILED DESCRIPTION

[0041] The present invention provides a pixel structure of an image sensor. By arranging a polysilicon structure between a floating diffusion region and a transfer transistor, the distance between the floating diffusion region and the transfer transistor is increased, the area of ​​the overlapping region between the floating diffusion region and the transfer transistor is reduced, the gate induced drain leakage current effect is reduced, and the device performance is guaranteed. The floating diffusion region is surrounded by the polysilicon structure to achieve self-alignment of the floating diffusion region injection process and the contact hole etching process, thereby reducing the generation of dark current or white spots caused by the offset of the contact hole etching position. In addition, since the added polysilicon structure occupies part of the original floating diffusion region, the area of ​​the floating diffusion region is reduced, the capacitance of the floating diffusion region is reduced, the conversion gain capability of the floating diffusion region is improved, the output voltage signal range is guaranteed, and the overall performance of the image sensor is improved.

[0042] In the following specific description of the preferred embodiments, reference will be made to the attached drawings which constitute a part of the present invention. The attached drawings show by way of example specific embodiments that can implement the present invention. The illustrative embodiments are not intended to be exhaustive of all embodiments according to the present invention. It will be appreciated that other embodiments may be utilized, and structural or logical modifications may also be made without departing from the scope of the present invention. Therefore, the following specific description is not restrictive, and the scope of the present invention is limited by the appended claims.

[0043] The present invention is described in detail below with reference to specific embodiments.

[0044] Figure 13-Figure 15 Three preferred embodiments of the pixel structure of the image sensor of the present invention are shown. The pixel structure of the image sensor includes a floating diffusion region 207 and at least one transfer transistor 203 arranged corresponding to the floating diffusion region 207 , wherein each transfer transistor 203 has an insulating sidewall 205 .

[0045] Those skilled in the art will appreciate that the corresponding relationship between the floating diffusion region 207 and the transfer transistor 203 can be selected as needed, and the relationship shown in the figure is only an example and not a limitation. For example, Fig.13 Each floating diffusion region 207 corresponds to one transfer transistor 203 (single transfer transistor mode); Fig.14 Each floating diffusion region 207 corresponds to two transfer transistors 203 (dual shared transfer transistor mode); Fig.15 Each floating diffusion region 207 in the embodiment corresponds to four transfer transistors 203 (four-shared transfer transistor mode).

[0046] Different from the prior art, the pixel structure of the image sensor of the present invention further includes a polysilicon structure 232 located between the floating diffusion region 207 and the corresponding transfer transistor 203 , wherein each polysilicon structure 232 has an insulating sidewall 205 .

[0047] by Fig.15 Taking the four-shared transfer transistor mode in FIG. 1 as an example, the formation process of the floating diffusion region 207 and its corresponding transfer transistor 203 and the polysilicon structure 232 is as follows: Figure 16-Figure 19 shown. Figure 16-Figure 19 For along Fig.15 Cross-sectional view along line A2-B2-A2.

[0048] See also Fig.16, a transfer transistor 203 and its corresponding polysilicon structure 232 are formed on the semiconductor substrate 201. Preferably, the transfer transistor 203 and the polysilicon structure 232 are formed simultaneously in the same process step. Further preferably, the insulating sidewall 205 of the transfer transistor 203 and the insulating sidewall 205 of the polysilicon structure 232 can also be formed simultaneously in the same process step and are integrated.

[0049] See also Fig.17 , covering the photoresist 206 to define a high concentration doping window of the floating diffusion region.

[0050] See also Fig.18 The polysilicon structure 232 and its insulating sidewall 205 serve as self-aligned windows of a high-concentration doping window, and high-concentration doping ion implantation is performed to form a floating diffusion region 207 .

[0051] See also Fig.19 Since a polysilicon structure 232 is provided between the floating diffusion region 207 and the transfer transistor 203, the distance between the floating diffusion region 207 and the transfer transistor 203 is increased. Even if the high-concentration doped ions in the floating diffusion region diffuse from 207 to 207' (as shown by the dotted line in the figure) under the action of the subsequent high-temperature process, no overlapping area will be formed under the transfer transistor 203 or the overlapping area will be very small, thereby greatly reducing the gate-induced drain leakage current effect and ensuring the device performance.

[0052] Continue with Fig.15 Taking the four-shared transfer transistor mode in FIG. 1 as an example, after the floating diffusion region 207' and the corresponding transfer transistor 203 and polysilicon structure 232 are formed, the formation process of the contact hole 209 on the floating diffusion region 207' is as follows: Figure 20-24 As shown. Figure 20-24 For along Fig.15 Cross-sectional view along line A2-B2-C2.

[0053] See also Fig. 20 ,pass Figure 16-Figure 19 The floating diffusion region 207' is formed by the process of forming the floating diffusion region 207'. Here, the case where the B2-C2 region has the shallow trench isolation region 202 is taken as an example. In other preferred embodiments not shown, there may be no shallow trench isolation region 202.

[0054] See also Fig.21 , forming an interlayer dielectric layer 208.

[0055] See also Fig. 22 , covering the photoresist 206 to define the etching window of the contact hole.

[0056] See also Fig.23 , etching to form a contact hole 209.

[0057] See also Fig.24 Since the polysilicon structure 232 surrounds the floating diffusion region, the polysilicon structure 232 and its insulating sidewall 205 will simultaneously become the position definition window for the floating diffusion region injection process and the contact hole etching process, thereby realizing the self-alignment of the floating diffusion region injection process and the contact hole etching process. Even if the photoresist position defining the contact hole etching window is inaccurate, the offset contact hole 209' can only contact the insulating sidewall 205 of the polysilicon structure 232, and cannot contact the shallow trench isolation region 202 in the semiconductor substrate 201 due to the obstruction of the insulating sidewall 205, and will not be due to The interface of the shallow trench isolation area 202 is destroyed, resulting in the generation of dark current or white spots. In addition, since the floating diffusion area injection process and the contact hole etching process share the polysilicon structure 232 and its insulating sidewall 205 as a self-aligned window, in the subsequent high-temperature process, the diffusion of high-concentration doped ions in the floating diffusion area makes the range of the floating diffusion area 207' larger than the original window. Therefore, the bottom of the contact hole 209' contacts the position in the semiconductor substrate 201 and will be wrapped by the floating diffusion area 207', thereby reducing the generation of dark current or white spots and ensuring device performance.

[0058] On the other hand, this self-alignment function is not affected by the change in the size of the isolation polysilicon structure 232. Under such requirements, the size and spacing of the polysilicon structure 232 do not need to ensure high uniformity, and can be smaller than the minimum line width or spacing required to be complied with by other structures formed by polysilicon in the pixel structure. Specifically, the minimum line width of the polysilicon structure 232 can be smaller than the minimum line width of other structures formed by polysilicon in the pixel structure, and the spacing between the polysilicon structure 232 and the transfer transistor 203 can be smaller than the preset value of the spacing between structures formed by polysilicon.

[0059] In addition, since the added polysilicon structure 232 occupies part of the original floating diffusion area, compared with the prior art, the area of ​​the floating diffusion area 207 is reduced, the capacitance of the floating diffusion area 207 is reduced, and the conversion gain capability of the floating diffusion area 207 is improved. Under the premise of ensuring the same output voltage signal range, compared with the method of increasing the pixel full well capacity, the structure of the present invention can be applied to smaller pixel units, thereby saving area and bringing profits.

[0060] exist Figure 13-Figure 15 In the preferred embodiment of the present invention, the polysilicon structure 232 is continuous and surrounds the floating diffusion area 207; in other preferred embodiments not shown, the polysilicon structure 232 may also have a discontinuous area and need not completely surround the floating diffusion area 207. At the discontinuous position, the window of high-concentration doping of the floating diffusion area 207 is opened, and the discontinuous position is also doped with high concentration, thereby forming an N-type channel at the discontinuous position, which helps to enhance the conductive performance of the image sensor.

[0061] Preferably, in order to further enhance the conduction performance, a voltage or a resident charge may be applied to the polysilicon structure 232 to control the conduction of the carrier transmission channel below the polysilicon structure 232. Because when the potential of the transmission transistor 203 is increased, the potential of the polysilicon structure 232 is increased accordingly, and the potential of the floating diffusion area 207 can be increased by using the potential of the polysilicon structure 232 (the resident charge can also achieve a similar function); in addition, when the potential of the polysilicon structure 232 is increased, the potential of the floating diffusion area 207 will be triggered to self-actualize, thereby improving the transmission performance of the image sensor. Therefore, voltages may be applied to the transmission transistor 203 and the polysilicon structure 232 at the same time to increase the potential of the floating diffusion area and enhance the conduction performance. When the transfer transistor 203 is turned off, the potential of the polysilicon structure 232 can also be increased, which will also trigger the potential self-holding behavior of the floating diffusion area 207, so that the electrons under the transfer transistor 203 are attracted to the side of the polysilicon structure 232 and the floating diffusion area 207 rather than the side of the photodiode, thereby preventing the electron residual phenomenon in the photodiode due to electron backflow.

[0062] Preferably, when the transfer transistor 203 is turned off, that is, in the integration state where the transfer transistor 203 is in a low voltage, the potential of the polysilicon structure 232 is controlled so that the carrier transmission channel below the polysilicon structure 232 is in a depletion state rather than an inversion state. This is because when the transfer transistor 203 is turned on, if this is in an inversion state, the electrons transmitted from the pixel part will be consumed, reducing the conversion gain; while the depletion state can increase the conversion gain and reduce the capacitance of the floating diffusion area 207 at the same time.

[0063] Preferably, a variable voltage similar to the timing of the transfer transistor 203 can also be applied to the polysilicon structure 232 to equivalently form a dual-gate structure of the transfer transistor, in which the inner gates of the dual-gate structure are connected and controlled to be turned on by the same signal. The advantages of the dual-gate structure are: (1) when the potential of the transfer transistor is increased, the potential of the polysilicon structure is higher than the potential of the transfer transistor, which increases the potential of the floating diffusion area to optimize the transmission; (2) when the transfer transistor is turned off, the transfer transistor is turned off first, and then the polysilicon structure is turned off. Since the channel potential of the polysilicon structure is greater than the potential of the pixel area when the transfer transistor is turned off, the electron backflow caused by the turning off of the transfer transistor can be suppressed; (3) the potential of the polysilicon structure when it is turned off is higher than the potential of the transfer transistor, which can reduce the potential difference between the floating diffusion area and the overlapping area of ​​the polysilicon structure, and reduce the gate-induced drain leakage current effect.

[0064] Preferably, when no voltage is applied to the polysilicon structure 232, there is distributed capacitance coupling between the transfer transistor 203 and the polysilicon structure 232: as the voltage of the floating diffusion area 207 and the transfer transistor 203 rises, the voltage of the polysilicon structure 232 rises, and the conduction is enhanced; as the voltage of the floating diffusion area 207 and the transfer transistor 203 drops, the voltage of the polysilicon structure 232 drops, and the conduction is weakened.

[0065] In summary, the pixel structure of the image sensor of the present invention increases the distance between the floating diffusion area and the transfer transistor, reduces the area of ​​the overlapping area between the floating diffusion area and the transfer transistor, reduces the gate induced drain leakage current effect, ensures the device performance, surrounds the floating diffusion area with the polysilicon structure to achieve self-alignment of the floating diffusion area injection process and the contact hole etching process, reduces the generation of dark current or white spots caused by the offset of the contact hole etching position, and further, because the added polysilicon structure occupies part of the original floating diffusion area, the area of ​​the floating diffusion area is reduced, the capacitance of the floating diffusion area is reduced, the conversion gain capability of the floating diffusion area is improved, the output voltage signal range is guaranteed, and the overall performance of the image sensor is improved.

[0066] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, in any case, the embodiments should be considered exemplary and non-restrictive. Furthermore, it is apparent that the term "comprising" does not exclude other elements and steps, and the wording "a" does not exclude the plural. Multiple elements stated in a device claim may also be implemented by one element. The words first, second, etc. are used to indicate names and do not indicate any particular order.

Claims

1. A pixel structure of an image sensor, characterized in that: include: floating diffusion area; at least one transfer transistor corresponding to the floating diffusion region; A polysilicon structure is located between the floating diffusion region and the transfer transistor, and the polysilicon structure surrounds the floating diffusion region to achieve self-alignment of a floating diffusion region implantation process and a contact hole etching process.

2. The pixel structure of the image sensor according to claim 1, characterized in that: Voltage is applied to the transfer transistor and the polysilicon structure simultaneously to increase the potential of the floating diffusion region and enhance the conduction performance.

3. The pixel structure of the image sensor according to claim 1, characterized in that: In the integration state where the transmission transistor is in a low voltage state, the carrier transmission channel under the polysilicon structure is in a depletion state to reduce the capacitance of the floating diffusion region.

4. The pixel structure of the image sensor according to claim 1, wherein: The polysilicon structure has discontinuous regions to optimize the conductive performance of the image sensor.

5. The pixel structure of the image sensor according to claim 1, characterized in that: The minimum line width of the polysilicon structure is smaller than the minimum line width of other structures formed by polysilicon in the pixel structure.

6. The pixel structure of the image sensor according to claim 1, wherein: A spacing between the polysilicon structure and the transfer transistor is smaller than a preset value of a spacing between structures formed of polysilicon.

7. The pixel structure of the image sensor according to claim 1, characterized in that: A resident charge or voltage is applied to the polysilicon structure to control the conduction of a carrier transmission channel below the polysilicon structure.

8. The pixel structure of the image sensor according to claim 1, wherein: There is distributed capacitance coupling between the transfer transistor and the polysilicon structure: as the voltage of the floating diffusion area and the transfer transistor increases, the voltage of the polysilicon structure increases and the conduction is enhanced; as the voltage of the floating diffusion area and the transfer transistor decreases, the voltage of the polysilicon structure decreases and the conduction is weakened.

9. The pixel structure of the image sensor according to claim 1, wherein: A variable voltage is applied to the polysilicon structure to form a dual-gate structure of a transfer transistor.

10. The pixel structure of the image sensor according to claim 9, characterized in that: The inner gates of the dual-gate structure are connected and controlled to be turned on by the same signal.

11. The pixel structure of the image sensor according to claim 1, characterized in that: The polysilicon structure and the transfer transistor have an integral insulating sidewall.

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