Switching device for converting differential input signals and system having the same

Through the combined structure of differential stage and output stage, combined with the optocoupler and logic gate, the error state in the differential input signal is identified and eliminated, ensuring the definition state and consistency of the output signal, solving the problem of uncertainty in the output signal in the prior art, and achieving optimized error cancellation and fault diagnosis.

CN113615089BActive Publication Date: 2025-08-15SEW EURODRIVE GMBH & CO KG
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Patent Information

Application Number
CN202080022194.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-03-22
Filing Date
2020-02-27
Publication Date
2025-08-15
Estimated Expiration
2040-02-27

AI Technical Summary

Technical Problem

The prior art is difficult to effectively identify and eliminate level conversion in differential input signals and error states in signal transmission times, resulting in output signal uncertainty and potential failure.

Method used

Using a combination structure of differential stage and output stage, through the design of the optocoupler and logic gate, error status is identified and output signals are generated to ground. The evaluation stage and the bidirectional communication stage are optimized to eliminate errors to ensure the defined state of the output signal and to prevent interference through the power supply voltage protection stage.

Benefits of technology

The defined state of the output signal under a constant number of interface signals is realized, the error cancellation process is optimized, the output signal is consistent with the input signal, and the galvanic isolation and fault diagnosis capabilities are provided.

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Abstract

The invention relates to a switching device (1) for converting a differential input signal (S_DIFF_IN) into an output signal to ground (S_OUT) using a control signal (S_EXT), wherein an error state is detected, the detected error state leads to a shutdown of the output signal to ground (S_OUT) and is additionally displayed on the control signal (S_EXT).
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Description

Technical Field

[0001] The present invention relates to a switching device and system for converting a differential input signal. Background Art

[0002] A switching device for converting a differential input signal into a ground-referenced output signal is known from US 2010 / 0 327 914 A1.

[0003] Another prior art is known from US 2008 / 0 025 451 A1. Summary of the Invention

[0004] The object of the invention is to improve an electronic circuit arrangement.

[0005] According to the invention, this object is achieved by a switching device according to the features specified in claim 1 and a system having a switching device according to the features specified in claim 14 .

[0006] An essential feature of the present invention for converting a differential input signal into a ground-referenced output signal using a control signal is the detection of error states / fault states, in particular error states caused by errors in level conversion and / or signal transmission times, which result in the ground-referenced signal being switched off and additionally displayed on the control signal.

[0007] Advantageously, given a constant number of interface signals, a defined state of the output signal to ground can be established and time-optimized error elimination can be ensured.

[0008] Advantageously, according to the invention, it is possible to detect during operation whether the information of the output signal always corresponds to the information on the input signal.

[0009] Furthermore, in the present invention, an error state caused by an error in level conversion and / or signal transmission time is identified, and the identified error state causes the output signal to be turned off and is additionally displayed on the pin of the control signal.

[0010] The invention therefore has the advantage that defined states of the output signal are generated with a constant number of interface signals and that time-optimized error elimination is possible.

[0011] In another advantageous embodiment, the switching device includes a differential stage and an output stage, wherein the differential stage generates a first ground signal based on a differential input signal delayed by a first signal transmission time t1, the output stage generates a ground output signal based on the first ground signal and based on a control signal, the switching device includes another differential stage, an evaluation stage, and a bidirectional communication stage, wherein the other differential stage generates a second ground signal based on the differential input signal delayed by a second signal transmission time t2, in particular, wherein the second signal transmission time t2 is significantly shorter than the first signal transmission time t1, the evaluation stage generates a third ground signal based on the first and second ground signals, taking into account the first and second signal transmission times t1 and t2, the bidirectional communication stage generates a control signal based on either the third ground signal or based on the third ground signal and at least one other station, and the output stage additionally transmits the first ground signal to the ground output signal based on the third ground signal. A "other station" is understood herein to mean a component connected to the switching device and exchanging information with the switching device.

[0012] Advantageously, both the second signal transmission time t2 and the second signal to ground can be used as references to be able to identify and communicate errors in the differential stage and to provide another possible shutdown solution for the output signal to ground.

[0013] Advantageously, with a constant number of interface signals, a defined state of the output signal to ground can be established and time-optimized error elimination can be ensured.

[0014] Advantageously, according to the invention, it is possible to detect during operation whether the information of the output signal always corresponds to the information on the input signal.

[0015] Furthermore, in the present invention, an error state due to an error in level conversion and / or signal transmission time is identified, the identified error state causes the output signal to be turned off, and is additionally displayed on the pin of the control signal.

[0016] The present invention therefore has the advantage that defined states of the output signal are generated with a constant number of interface signals and that time-optimized error elimination is possible.

[0017] In another advantageous embodiment, the differential stage is ground-referenced using an optocoupler. The output signal of the optocoupler is conducted via a filter element. The first switching element transfers the power supply voltage to the first ground-referenced signal based on the output signal of the filter element. The first signal transmission time t1 of the differential stage is the sum of the switching times of the optocoupler and the first switching element, and the delay time of the filter element.

[0018] This advantageously ensures galvanic isolation between the differential input signal and the first signal to ground, interference pulses and / or transients / transient processes, i.e., mostly brief signal level changes in the differential input signal, which are coupled into the actual useful signal either intentionally (e.g., for testing electronic circuits) or unintentionally (e.g., due to interference radiation), are suppressed, and the first signal to ground can be used to conduct higher currents, in particular for supplying other circuit components.

[0019] In another advantageous embodiment, the second differential input signal is implemented using another optocoupler. The second signal transmission time t2 of the other differential input signal is substantially equivalent to the switching time of the other optocoupler. This advantageously ensures galvanic isolation between the differential input signal and the second signal to ground.

[0020] In another advantageous embodiment, the evaluation stage evaluates the first signal to ground and the second signal to ground via at least one first logic gate, in particular an exclusive OR (XOR) logic gate. The output signal of the first logic gate is conducted via a further filter element. The further filter element has a delay time tf. The delay time tf is selected as a function of the first signal propagation time t1, the second signal propagation time t2, and a signal propagation time tolerance value td. In particular, the delay time tf = |t2-t1| + td. Advantageously, this allows for the determination of deviations in signal propagation time and signal level between the first signal to ground and the second signal to ground.

[0021] In another advantageous embodiment, the further filter element comprises an RC filter and a second logic gate, in particular an inverting logic gate. The nominal value of the RC filter is selected as tf = R*C. The second logic gate digitizes the output signal of the RC filter and generates the output signal of the further filter element. In particular, the second logic gate is implemented in CMOS technology. This allows the delay time tf to be set / adjusted in an advantageously cost-effective and space-saving manner.

[0022] In a further advantageous embodiment, the output signal of the further filter element corresponds to a third signal relative to ground.

[0023] In another advantageous embodiment, the output signal of the further filter element sets a memory element, in particular an RS flip-flop. The output signal of a third logic gate, in particular a WIRED-OR logic gate, resets the memory element. The third logic gate evaluates the first signal to ground and the second signal to ground. The output signal of the memory element corresponds to the third signal to ground. Advantageously, thus, the detected error state can be stored until the levels of the first signal to ground and the second signal to ground are both at ground potential.

[0024] In another advantageous embodiment, the bidirectional communication stage includes a communication interface, in particular an open-drain interface, with a pull-up resistor to the supply voltage or another supply voltage. The control signal can be short-circuited to ground potential via a second switching element based on a third ground-to-ground signal, in particular an inverted signal. This advantageously creates an interface that enables bidirectional information flow via a single signal.

[0025] In another advantageous embodiment, the output stage includes a fourth switching element and at least one fourth logic gate. The fourth switching element transmits the first ground signal to at least one supply voltage input of the fourth logic gate based on the third ground signal. The fourth logic gate generates the ground output signal based on the signal at the supply voltage input and the control signal. Advantageously, this allows for diversified and redundant shutdown of the ground output signal. Diverse and redundant shutdown should be understood as equivalent multi-stage shutdown with different functional principles, which can set the ground output signal to a defined state based on the control signal at the signal input of the fourth logic gate and the supply voltage input of the fourth logic gate.

[0026] In another advantageous embodiment, the output signal of the filter element of the differential stage is additionally transmitted to the output stage as a fourth ground signal. The fourth logic gate of the output stage is designed as an AND logic gate with an inverting input or as a NOR logic gate and additionally generates the ground output signal based on the fourth ground signal. Advantageously, this allows the ground output signal to be quickly switched off in a time-optimized manner, particularly without the delay times of the first and fourth switching elements.

[0027] In another advantageous embodiment, an error state caused by an error on another supply voltage is detected. Advantageously, this can provide additional fault diagnosis.

[0028] In another advantageous embodiment, the switching device includes a supply voltage protection stage that generates a supply voltage based on the signal level of a further supply voltage. The voltage level of the further supply voltage is monitored, wherein a voltage level within a valid range, in particular +3 V DC to +3.5 V DC, results in the further supply voltage being passed to the supply voltage, while a voltage level outside the valid range results in the further supply voltage being isolated from the supply voltage. This advantageously protects the switching device from interference introduced into the system via the supply voltage.

[0029] In another advantageous embodiment, a system with a switching device comprises a safety-related switching device and a frequency converter. A differential input signal (S_DIFF_IN) can be generated by the safety-related switching device. A control signal (S_EXT) can be evaluated and actuated by the frequency converter. An output signal to ground (S_OUT) can be used to interrupt the generation of a rotating field by the frequency converter.

[0030] In a further advantageous embodiment, the control signal (S_EXT) can be short-circuited to ground potential (GND) via at least one third switching element in the frequency converter.

[0031] In a further advantageous embodiment, a bus driver module for transmitting a PWM signal for generating a converter rotating field can be supplied with voltage via an output signal to ground (S_OUT).

[0032] Further advantages are provided by the dependent claims. The present invention is not limited to the feature combinations of the claims. Other reasonable combinations of the claims and / or features of individual claims and / or features of the description and / or features of the drawings will be apparent to a person skilled in the art, particularly from the objectives presented and / or from a comparison with the prior art. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The present invention will be described in detail below with reference to the accompanying drawings. DETAILED DESCRIPTION

[0034] Figure 1 The external interfaces of the switching device (1) are shown in FIG. According to the present invention, the switching device (1) has three external interfaces. A differential input signal (S_DIFF_IN) is received, converted, and output as an output signal (S_OUT) to ground in accordance with a control signal (S_EXT). The differential input signal (S_DIFF_IN) is a symmetrically transmitted signal, i.e., it is transmitted using a pair of identical signal conductors.

[0035] Typically, an information signal is transmitted on a first signal conductor, and a static reference signal or a signal identical to but inverted from the first signal conductor is transmitted as a reference on a second signal conductor. The differential voltage of the differential input signal (S_DIFF_IN) is preferably within a voltage range of -30 V DC to +60 V DC, in particular, the switching device is capable of interpreting a differential signal level less than +5 V DC as a low level and a differential signal level greater than +11 V DC as a high level, and setting the output signal (S_OUT) relative to ground based on these interpreted levels and based on the control signal (S_EXT).

[0036] Figure 2 A possible implementation of a switching device (1) according to the prior art is shown. The switching device is further refined by dividing it into a differential stage (2) and an output stage (3).

[0037] The differential stage (2) generates a first ground signal (S1) from a differential input signal (S_DIFF_IN). A first signal transmission time t1 is derived from the internal structure of the differential stage (2) and is the time required for a state change on the differential input signal (S_DIFF_IN) to be displayed on the first ground signal (S1).

[0038] The output stage (3) provides a ground-referenced output signal (S_OUT) at an output terminal for further use within the system. The state of the control signal (S_EXT) determines whether the level of the first ground-referenced signal (S1) is reflected in the ground-referenced output signal (S_OUT) or whether the ground-referenced output signal (S_OUT) is pulled to a defined state, typically to ground potential (GND).

[0039] exist Figure 3 A switching device (1) according to the invention is shown in FIG. In addition to the differential stage (2) and the output stage (3), the switching device (1) is further refined by adding a further differential stage (4), an evaluation stage (5) and a bidirectional communication stage (6).

[0040] The other differential stage (4) generates a second ground signal (S2) from the differential input signal (S_DIFF_IN). The second signal transmission time t2 is derived from the internal structure of the other differential stage (2), and the second signal transmission time is the time required for a state change on the differential input signal (S_DIFF_IN) to be displayed on the second ground signal (S2). The internal structure of the other differential stage (2) is particularly selected so that the resulting second signal transmission time t2 is significantly shorter than the first signal transmission time t1 of the differential stage (2).

[0041] The evaluation unit (5) compares the first ground signal (S1) with the second ground signal (S2) and generates a third ground signal (S3) according to the comparison result.

[0042] This enables a test to monitor the functionality of the differential stage (2) and, in the event of deviations from the signal performance of another differential stage (4) serving as a reference, to provide this information in the switching device (1) to other functional blocks, taking into account the first signal transmission time t1 and the second signal transmission time t2.

[0043] Compared with the prior art, the bidirectional communication level (6) has an interface for control signals (S_EXT), which can process control information transmitted to the switching device (1) and report information from the switching device (1).

[0044] In addition to the prior art, the output stage (3) also uses a third ground signal (S3). The state of the third ground signal (S3) and the control signal (S_EXT) determines whether the level of the first ground signal (S1) is reflected in the ground output signal (S_OUT) or whether the ground output signal (S_OUT) is pulled to a defined state, usually to ground potential (GND).

[0045] Another embodiment of the switching device (1) according to the present invention is Figure 4 In addition to Figure 3 outside, Figure 4 Also included is a power supply voltage protection stage (7) and a fourth ground signal (S4).

[0046] The supply voltage protection stage (7) is connected upstream of the supply voltage (VCC) input and monitors the actual supply voltage, here referred to as the further supply voltage (VCC_EXT), used to operate the switching device (1) for a valid voltage range. A voltage level of the further supply voltage (VCC_EXT) within the valid voltage range causes the further supply voltage (VCC_EXT) to be passed to the supply voltage (VCC). A voltage level of the further supply voltage (VCC_EXT) outside the valid voltage range causes the further supply voltage (VCC_EXT) to be isolated from the supply voltage (VCC), and the supply voltage (VCC) is thus set to a voltage-free state.

[0047] The voltage-free state causes both the ground output signal (S_OUT) and the control signal (S_EXT) to be at or at least close to ground potential (GND). In addition, a fourth ground signal (S4) is generated in the differential stage (2) and is also evaluated by the output stage (3).

[0048] The state of the third ground signal, the state of the fourth ground signal (S4) and the state of the control signal (S_EXT) determine whether the level of the first ground signal (S1) is reflected on the ground output signal (S_OUT) or whether the ground signal (S_OUT) is pulled to a defined state, typically to ground potential (GND). In particular, the power supply voltage protection stage (7) is dimensioned so that a power supply voltage level in the range of at least -0.5V DC to +15V DC can be applied to the input terminal for receiving the further power supply voltage (VCC_EXT).

[0049] Furthermore, the generation and evaluation of the fourth signal to ground ( S4 ) is designed such that the output signal to ground (S_OUT) can be switched off quickly in a transmission-time-optimized manner.

[0050] Figure 5 An exemplary implementation of the switch device (1) according to the present invention is described in Figure 4 Starting from this, the functional blocks of the differential stage (2), the output stage (3), the further differential stage (4), the evaluation stage (5) and the bidirectional communication stage (6) are further refined and the possible circuit implementation is shown.

[0051] In the differential stage (2), the differential input signal (S_DIFF_IN) is evaluated by means of an optocoupler (21). The input of the optocoupler (21) is connected to a resistor divider (24). At the output, the optocoupler (21) switches the supply voltage (VCC) via a pull-down resistor (25). The output signal of the optocoupler (21) is conducted via a filter element (22), which consists of an RC filter and an inverting logic gate, in particular an inverting logic gate with a Schmitt trigger input.

[0052] The output signal of the inverting logic gate simultaneously forms the output signal of the filter element (22) and is provided to the downstream functional block as a fourth ground-referenced signal (S4). In addition, the output signal of the filter element (22) is used to drive the first switching element (23) via a series resistor (26), which is implemented as a PFET transistor. The PFET transistor can transmit the supply voltage (VCC) to multiple downstream functional blocks via the first ground-referenced signal (S1).

[0053] In the further differential stage (4), the differential input signal (S_DIFF_IN) is evaluated by means of a further optocoupler (41). The input of the further optocoupler (41) is connected via a further resistor divider (42). At the output, the further optocoupler (41) switches the supply voltage (VCC) via a further pull-down resistor (43), and the output signal of the further optocoupler (41) is directly transmitted to the downstream functional block as a second ground-referenced signal (S2).

[0054] The evaluation stage (5) then compares the first signal to ground (S1) with the second signal to ground (S2) by means of a first logic gate (51), here implemented as an XOR logic gate.

[0055] The output of the first logic gate (51) is conducted via a further filter element (52), which comprises an RC filter (521) and a second logic gate (522), in particular a second inverting logic gate (522) with a Schmitt trigger input. The output signal of the second logic gate (522) simultaneously forms the output signal of the further filter element (52) and is used to control the set input of the RS trigger (53). In addition, the first ground signal (S1) and the second ground signal (S2) are logically operated with each other via a WIRED-OR circuit (54), which comprises a diode in each signal path leading to the corresponding signal, and are connected to the ground potential (GND) via a pull-down resistor.

[0056] The output signal of the WIRED-OR circuit is used to reset the RS flip-flop (53). The RS flip-flop (53) is preferably implemented so that its input is low-level active. A circuit embodiment designed in this way allows the RS flip-flop to be set when different voltage levels between the first ground signal (S1) and the second ground signal (S2) exist for a period of time t that is greater than a defined delay time tf resulting from the selection of the components of the RC filter, and the RS flip-flop (53) can only be reset when the first ground signal (S1) and the second ground signal (S2) are low (i.e., signal levels close to ground (GND)).

[0057] The output signal of the RS flip-flop (53) now simultaneously forms the output signal of the evaluation stage (5) and is provided as a third ground-referenced signal (S3) to further downstream functional blocks.

[0058] The bidirectional communication stage (6) then uses the third ground signal (S3) to drive a second switching element (63) via a series resistor (64), the second switching element being implemented here as an NFET transistor. The NFET transistor, in conjunction with an additional pull-up resistor (62) connected to the power supply voltage (VCC), forms a communication interface (61) (implemented here as an open-drain interface) that can pull a control signal (S_EXT) to ground potential (GND) in response to the third ground signal (S3). Thus, both the bidirectional communication stage (6) and an optionally connected counterpart station can pull the control signal (S_EXT) to a low level. If neither the bidirectional communication stage (6) nor the counterpart station drives the signal (S_EXT), the signal (S_EXT) is always set to a high level via the pull-up resistor (62).

[0059] The output stage (3) also uses the third ground signal (S3) to drive the fourth switching element (31) via a series resistor (33), which is implemented here as a PFET transistor. The PFET transistor can now transmit the first ground signal (S1) and thus the supply voltage (VCC) to the supply voltage input of the fourth logic gate (32), which is implemented here as an AND logic gate with an inverting input. At the same time, the supply voltage input of the AND logic gate is connected to the ground potential (GND) via a pull-down resistor (34). The control signal (S_EXT) drives the fifth switching element (35), which is implemented here as an NFET transistor. The NFET transistor switches the ground potential (GND) based on a pull-up resistor (36), which also relates to the supply voltage input of the AND logic gate.

[0060] With this transistor circuit, the voltage level of the control signal (S_EXT) is inverted and connected to one of the inverting inputs of an AND logic gate. The other inverting input of the AND logic gate is connected to a fourth ground-referenced signal (S4). The output signal of the AND logic gate simultaneously forms the output signal of the output stage (3) and, therefore, also the ground-referenced output signal (S_OUT) of the switching device (1) according to the invention.

[0061] With this circuit structure, the output stage (3) can quickly switch off the output signal to ground (S_OUT) by means of the fourth logic gate (32) depending on the fourth signal to ground (S4) and the control signal (S_EXT). Due to the parasitic residual capacitance when the power supply voltage is switched off, which must be discharged first, the first signal to ground (S1) and the third signal to ground (S3) additionally result in a slow, redundant switching off of the output signal to ground (S_OUT). However, by switching off the power supply voltage, it is ensured that the output signal to ground (S_OUT) can be switched off even if the fourth logic gate (32) fails.

[0062] The control signal (S_EXT) can be used in particular to control the output stage (3).

[0063] The control signal (S_EXT) according to the invention is generated not only by the bidirectional communication stage (6) but also by a counterpart station optionally connected to the switching device (1).

[0064] In accordance with Figure 5 In the exemplary embodiment of , a high level of the control signal (S_EXT) means that the output stage (3) is turned on / enabled, while a low level of the control signal (S_EXT) means that the output stage (3) is blocked.

[0065] Here, the low level is dominant. A high level is obtained on the signal (S_EXT) only when the communication stage (6) and the other station jointly open the output stage (3).

[0066] If the other station wants to switch on the output stage (3) but measures a low level, the other station can conclude from this that the switching device (1) is in an incorrect state.

[0067] It should be pointed out again that the output stage (3) evaluates the signal (S_EXT) in order to reflect the first ground signal (S1) to the ground output signal (S_OUT) or to pull the ground output signal (S_OUT) to a defined state, usually to ground potential (GND), while the signal (S_EXT) is generated by the bidirectional communication stage (6) in conjunction with an optionally connected counterpart station.

[0068] The following also applies here: Compared to the prior art, the bidirectional communication level (6) has an interface for control signals (S_EXT) which can process both control information transmitted to the switching device (1) and reporting information from the switching device (1).

[0069] Therefore, in this embodiment, the following occurs: Next, the bidirectional communication stage (6) uses the third ground signal (S3) to drive the second switching element (63) via the series resistor (64), the second switching element being implemented as an NFET transistor here. The NFET transistor cooperates with an additional pull-up resistor (62) connected to the power supply voltage (VCC) to form a communication interface (61), which is implemented as an open-drain interface and can pull the control signal (S_EXT) to the ground potential (GND) according to the third ground signal (S3). Therefore, the bidirectional communication stage (6) and the optional counterpart station connected thereto can both pull the control signal (S_EXT) to a low level. If neither the bidirectional communication stage (6) nor the counterpart station drives the signal (S_EXT), the pull-up resistor (62) always sets the signal (S_EXT) to a high level.

[0070] The following list of reference numerals is incorporated into the description and explains further features of the present invention.

[0071] List of reference numerals:

[0072] 1 Switchgear

[0073] 2 Differential level

[0074] 21 Photocoupler

[0075] 22 filter elements

[0076] 23 First switching element

[0077] 24-resistor voltage divider

[0078] 25 pull-down resistor

[0079] 26 Series resistor

[0080] 3 Output stage

[0081] 31 Fourth switching element

[0082] 32 Fourth Logic Gate

[0083] 33 Series resistor

[0084] 34 pull-down resistor

[0085] 35 Fifth switching element

[0086] 36 pull-up resistor

[0087] 4 Another differential level

[0088] 41 Another optocoupler

[0089] 42 Another resistor divider

[0090] 43 Another pull-down resistor

[0091] 5 Assessment Level

[0092] 51 First Logic Gate

[0093] 52 Another filter element

[0094] 521 RC filter

[0095] 522 Second Logic Gate

[0096] 53 memory components

[0097] 54 Third Logic Gate

[0098] 6 Bidirectional communication level

[0099] 61 Communication Interface

[0100] 62 pull-up resistor

[0101] 63 Second switching element

[0102] 64 series resistor

[0103] 7 Power supply voltage protection level

[0104] GND ground potential

[0105] t duration

[0106] t1 First signal transmission time

[0107] t2 Second signal transmission time

[0108] td signal transmission time tolerance value

[0109] tf delay time

[0110] S1 First ground signal

[0111] S2 Second ground signal

[0112] S3 The third ground signal

[0113] S4 Fourth ground signal

[0114] S_DIFF_IN Differential input signal

[0115] S_EXT control signal

[0116] S_OUT output signal to ground

[0117] VCC supply voltage

[0118] VCC_EXT Another power supply voltage

Claims

1. A switching device (1) for converting a differential input signal (S_DIFF_IN) into an output signal (S_OUT) relative to ground using a control signal (S_EXT), It is characterized in that Identify error conditions, The switching device (1) is designed such that a detected error state leads to a shutdown of the output signal (S_OUT) to ground and is additionally displayed on the control signal (S_EXT). The switching device (1) comprises a differential stage (2) and an output stage (3), wherein the differential stage (2) generates a first ground signal (S1) in a manner delayed by a first signal transmission time t1 according to the differential input signal (S_DIFF_IN), and the output stage (3) generates a ground output signal (S_OUT) according to the first ground signal (S1). The switching device (1) comprises a further differential stage (4), an evaluation stage (5) and a bidirectional communication stage (6), The other differential stage (4) generates a second ground signal (S2) according to the differential input signal (S_DIFF_IN) in a manner delayed by a second signal transmission time t2, The evaluation stage (5) generates a third signal to ground (S3) based on the first signal to ground (S1) and the second signal to ground (S2), taking into account the first signal transmission time t1 and the second signal transmission time t2, The bidirectional communication stage (6) is constructed as follows: - or according to the third ground signal (S3) - or according to the third ground signal (S3) and at least one other station Generate control signal (S_EXT), The output stage (3) is designed to transmit the first signal to ground (S1) to an output signal to ground (S_OUT) in addition to the third signal to ground (S3).

2. The switch device (1) according to claim 1, wherein: The second signal transmission time t2 is much shorter than the first signal transmission time t1.

3. The switchgear (1) according to claim 2, wherein: The differential stage (2) is ground referenced by means of a photocoupler (21), an output signal of the photocoupler (21) is conducted via a filter element (22), a first switch element (23) transmits a power supply voltage (VCC) to the first ground signal (S1) according to the output signal of the filter element (22), and a first signal transmission time t1 of the differential stage (2) is composed of the sum of the switching time of the photocoupler (21), the switching time of the first switch element (23), and the delay time of the filter element (22).

4. The switch device (1) according to any one of claims 1 to 3, wherein: The other differential stage (4) realizes a second ground signal (S2) by means of another photoelectric coupler (41), and a second signal transmission time t2 of the other differential stage (4) is substantially equivalent to a switching time of the other photoelectric coupler (41).

5. The switch device (1) according to any one of claims 1 to 3, wherein: The evaluation stage (5) evaluates the first signal to ground (S1) and the second signal to ground (S2) via at least one first logic gate (51), the output signal of the first logic gate (51) being conducted via a further filter element (52), The further filter element (52) has a delay time tf, The delay time tf is selected according to the first signal transmission time t1, the second signal transmission time t2, and the signal transmission time tolerance value td, and the delay time tf = |t2 - t1| + td.

6. The switch device (1) according to claim 5, wherein: The further filter element (52) comprises an RC filter (521) and a second logic gate (522), the nominal value of the RC filter being selected as tf = R*C, the second logic gate (522) digitizing the output signal of the RC filter (521) and generating the output signal of the further filter element (52), the second logic gate (522) being implemented in CMOS technology.

7. The switch device (1) according to claim 5, wherein: The output signal of the further filter element (52) corresponds to a third ground signal (S3).

8. The switch device (1) according to claim 5, wherein: The output signal of the further filter element (52) sets the memory element (53), the output signal of the third logic gate (54) resets the memory element (53), the third logic gate (54) evaluates the first ground signal (S1) and the second ground signal (S2), the output signal of the memory element (53) corresponds to the third ground signal (S3).

9. The switch device (1) according to any one of claims 1 to 3, wherein: The bidirectional communication stage (6) comprises a communication interface (61) having a pull-up resistor (62) connected to either a power supply voltage (VCC) or another power supply voltage (VCC_EXT), wherein the control signal (S_EXT) can be short-circuited to a ground potential (GND) via a second switching element (63) according to the third ground signal (S3).

10. The switch device (1) according to any one of claims 1 to 3, wherein: The output stage (3) comprises a fourth switching element (31) and at least one fourth logic gate (32), wherein the fourth switching element (31) transmits the first ground signal (S1) to at least one power supply voltage input terminal of the fourth logic gate (32) according to a third ground signal (S3), and the fourth logic gate (32) generates a ground output signal (S_OUT) according to the signal at the power supply voltage input terminal and according to the control signal (S_EXT).

11. The switch device (1) according to claim 10, wherein: The output signal of the filter element (22) of the differential stage (2) is additionally transmitted to the output stage (3) as a fourth ground signal (S4); the fourth logic gate (32) of the output stage (3) is implemented as an AND logic gate with an inverting input or as a NOR logic gate, and additionally generates a ground output signal (S_OUT) based on the fourth ground signal (S4).

12. The switch device (1) according to claim 9, wherein: Identifies error conditions caused by errors on another supply voltage (VCC_EXT).

13. The switch device (1) according to claim 9, wherein: The switching device (1) includes a power supply voltage protection stage (7), which generates a power supply voltage (VCC) according to the signal level of another power supply voltage (VCC_EXT), monitors the voltage level of the another power supply voltage (VCC_EXT), and causes the another power supply voltage (VCC_EXT) to be transferred to the power supply voltage (VCC) when the voltage level is within the effective range, and causes the another power supply voltage (VCC_EXT) to be isolated from the power supply voltage (VCC) when the voltage level is outside the effective range.

14. A system having a switching device (1) according to any one of claims 1 to 13, the system having a safety-related switching device and a frequency converter, characterized in that: The differential input signal (S_DIFF_IN) can be generated by the safety-related switching device, the control signal (S_EXT) can be evaluated and actuated by the frequency converter, and the output signal to ground (S_OUT) can be used to interrupt the generation of a rotating field by the frequency converter.

15. The system according to claim 14, wherein: The control signal (S_EXT) can be short-circuited to the ground potential (GND) via at least one third switching element in the frequency converter. And / or the bus driver module can be powered via the output signal to ground (S_OUT) to transmit the PWM signal for generating the inverter rotating field.

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