Class D amplifier

Abstract

The present invention discloses a class-D amplifier, comprising: a loop filter, a pulse-width modulation signal generator, a gate driver, a power driver, and a feedback circuit for establishing a closed amplification loop; wherein, the feedback circuit is used to establish a feedback path; and a feedback breaker for interrupting the feedback path in response to a no-signal information condition of the class-D amplifier. Therefore, when there is no meaningful signal in the signal amplification circuit, noise will not be fed into the signal amplification circuit through the feedback path, and the signal-to-noise ratio performance is significantly improved.

Description

Technical Field

[0001] The present invention relates to the field of circuit technologies, and more particularly to a class-D amplifier. Background Art

[0002] A class-D audio amplifier is basically a switching amplifier or a pulse width modulation (PWM) amplifier. In this type of amplifier, the metal–oxide–silicon (MOS) transistors of the power driver are fully turned on or fully turned off, greatly reducing the power loss of the output stage and achieving high-efficiency amplification.

[0003] There are several methods for converting an analog signal into a PWM signal to drive the MOS of the power driver. To eliminate the output filter, the BD modulation switching technique has been developed. According to the BD modulation switching technique, the duty cycle of the difference between the two output signals VOP and VON of the class-D amplifier is modulated so that the average content of the amplification result corresponds to the analog input signal. The class-D amplifier is a dead-loop circuit, and the greater the analog input signal, the more significant the difference between the two output signals.

[0004] However, in the case of no signal information in BD modulation, for example, (VON, VOP) can be (VDD, VDD) or (GND, GND). In these cases of no signal information, although there is no meaningful signal in the loop, noise is fed into the loop, thereby reducing the signal-to-noise ratio (SNR).

[0005] Class-D amplifiers are commonly used in audio applications. Users cannot tolerate any small noise fed into the loop in the case of no signal information. How to handle the case of no signal information is an important issue in the field of class-D amplifiers. Summary of the Invention

[0006] In view of this, the present invention provides a class-D amplifier to solve the above problems.

[0007] According to a first aspect of the present invention, there is disclosed a class-D amplifier, comprising:

[0008] a loop filter, a pulse width modulation signal generator, a gate driver, a power driver, and a feedback circuit for establishing a closed amplification loop; wherein the feedback circuit is used to establish a feedback path; and

[0009] a feedback breaker for interrupting the feedback path in response to the no signal information situation of the class-D amplifier.

[0010] The class-D amplifier of the present invention includes: a feedback breaker that interrupts the feedback path in response to a no-signal information condition of the class-D amplifier. Therefore, in the present invention, when there is no meaningful signal in the signal amplification circuit, noise is not fed into the signal amplification circuit through the feedback path, and the signal-to-noise ratio performance is significantly improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 shows a class-D amplifier in a differential input and differential output architecture according to an exemplary embodiment of the present invention;

[0012] Figure 2 shows a class-D amplifier according to an exemplary embodiment of the present invention Figure 1 of the waveform of the signal in the class-D amplifier.

[0013] Figure 3 depicts a class-D amplifier in a single-ended input and single-ended output architecture according to an exemplary embodiment of the present invention; and

[0014] Figure 4 shows a class-D amplifier according to an exemplary embodiment of the present invention Figure 3 of the waveform of the signal in the class-D amplifier. DETAILED DESCRIPTION

[0015] The following description is the best contemplated mode of implementing the present invention. This description is for the purpose of illustrating the general principles of the present invention and should not be considered restrictive. The scope of the present invention is determined by the appended claims.

[0016] Figure 1Depicts a class D amplifier in a differential input and differential output architecture according to an exemplary embodiment of the present invention. The class D amplifier includes a loop filter 102, a pulse width modulation (PWM) signal generator 104, a gate driver 106, a power driver 108, and a pair of feedback resistors Rfbp and Rfbn, which are configured to establish a closed amplification loop. A feedback path in the closed amplification loop is established by the feedback resistors Rfbp and Rfbn. The class D amplifier further includes a pair of switches RTO_SWp and RTO_SWn, and a logic circuit 110. The logic circuit 110 is configured to detect a no-signal information condition of the class D amplifier. When the no-signal information condition is detected, the logic circuit 110 outputs a switch signal RTO_clk to disconnect the feedback resistors Rfbp and Rfbn from the positive input terminal Inp and the negative input terminal Inn of the class D amplifier, respectively. In this way, in response to the no-signal information condition of the class D amplifier, the feedback path of the closed amplification loop is disconnected. When there is no meaningful signal in the signal amplification circuit, noise is not fed into the signal amplification circuit through the feedback path. Therefore, the signal-to-noise ratio (SNR) performance is significantly improved.

[0017] As shown, the input signals (Iinp, Iinn) of the class D amplifier are coupled to the loop filter 102. The loop filter 102 is coupled to the PWM signal generator 104. The PWM signal generator 104 generates a PWM signal Vpwmp. By comparing the signal from the loop filter 102 with a saw signal Vsaw, Vpwmn and Vpwmn can be obtained. The gate driver 106 converts the PWM signals Vpwmp and Vpwmn into control signals CSAp, CSAn, CSBp, and CSBn. The power driver 108 includes an H-bridge circuit controlled by the control signals CSAp, CSAn, CSBp, and CSBn to drive a load 112. The feedback resistor Rfbp is coupled between the positive output terminal Vop of the class D amplifier and the positive input terminal Inp of the class D amplifier. The feedback resistor Rfbn is coupled between the negative output terminal Von of the class D amplifier and the negative input terminal Inn of the class D amplifier. In the no-signal information condition, the PWM signal Vpwmp can be equal to the PWM signal Vpwmn. For example, in the no-signal information condition, (VON, VOP) can be (VDD, VDD) or (GND, GND).

[0018] As shown in the figure, the logic circuit 110 can be integrated into the gate driver 106. The logic circuit 110 includes an exclusive - OR gate 114 and a delay unit 116. The exclusive - OR gate 114 receives the PWM signals Vpwmp and Vpwmn, and the output terminal of the exclusive - OR gate 114 is coupled to the delay unit 116. The delay unit 116 provides a delay time according to the response time of the class - D amplifier. In this way, the switching signal RTO_clk has an appropriate delay. Before all the significant signals in the amplifier circuit are amplified, the feedback path will not be interrupted. The delay unit 116 is an optional device.

[0019] In another exemplary embodiment, an exclusive - OR calculation is performed on the positive output signal Vop and the negative output signal Von instead of on the PWM signals Vpwmp and Vpwmn.

[0020] Figure 2 The waveforms of the signals in the class - D amplifier according to an exemplary embodiment of the present invention are shown. Figure 1 of the class - D amplifier.

[0021] The states of the PWM signals Vpwmp and Vpwmn are reflected in the positive output signal Vop and the negative output signal Von of the class - D amplifier. In the case of no signal information, the PWM signal Vpwmp is equal to the PWM signal Vpwmn, so the positive output signal Vop is equal to the negative output signal Von. According to the exclusive - OR calculation, XOR(Vpwmp, Vpwmn) or XOR(Vop, Von), it will be detected that the states of Vpwmp and Vpwmn are the same. After a delay depending on the response time of the class - D amplifier, the switching signal RTO_clk is generated. When the switching signal RTO_clk is high, the switches RTO_SWp and RTO_SWn are turned off. The feedback path has been disconnected. Noise will not be fed into the signal amplification circuit through the feedback path. In the case of no signal information, there is no significant signal in the loop at this time. The present invention disconnects the feedback path so that noise cannot be fed to the input terminal of the loop filter 102. Therefore, there is no noise fed into the loop in the case of no signal information. For example, in the application environment of headphones, the method of the present invention can avoid any small noise interference to the user in the case of no signal information. The insignificant signals can be signals of abnormal music or sound playback, or no sound signals, or occasional noise when there is no sound, etc.

[0022] Figure 3Depicts a class-D amplifier in a single-ended input and single-ended output architecture according to an exemplary embodiment of the present invention. The class-D amplifier includes a loop filter 302, a PWM signal generator 304, a gate driver 306, a power driver 308, and a feedback resistor Rfb, which are configured to establish a closed amplification loop (closed amplification loop). A feedback path in the closed amplification loop is established through the feedback resistor Rfb. The class-D amplifier further includes a switch RTO_SW and a logic circuit 310. The logic circuit 310 is used to detect the no-signal information condition of the class-D amplifier. When the no-signal information condition is detected, the logic circuit 310 outputs a switch signal RTO_clk to disconnect the feedback resistor Rfb from the input terminal In of the class-D amplifier, respectively. In this way, in response to the no-signal information condition of the class-D amplifier, the feedback path of the closed amplification loop is disconnected. When there is no meaningful signal in the signal amplification circuit, noise is not fed into the signal amplification circuit through the feedback path. Therefore, the signal-to-noise ratio (SNR) performance is significantly improved.

[0023] As shown, the input signal Iin of the class-D amplifier is coupled to the loop filter 302. The loop filter 302 is coupled to the PWM signal generator 304. The PWM signal generator 304 generates PWM signals Vpwmp and Vpwmn by comparing the signal from the loop filter 302 with a sawtooth signal Vsaw. The gate driver 306 converts the PWM signals Vpwmp and Vpwmn into control signals CSp and CSn. The power driver 308 includes transistors Mp, Mn, and Mcm. The transistor Mp is controlled by the control signal CSp and is coupled between the power supply terminal (VDD) and the output terminal VOUT of the class-D amplifier. The transistor Mn is controlled by the control signal CSn and is coupled between the output terminal VOUT of the class-D amplifier and the negative power supply terminal (-VDD). The transistor Mcm is controlled by the control signal CScm (e.g., asserted (e.g., high level, etc.) when the PWM signals Vpwmp and Vpwmn are at the same value), and is coupled between the output terminal VOUT of the class-D amplifier and the common-mode node (GND) of the class-D amplifier, and GND can be ground. The power driver 308 drives the load 312. A feedback resistor Rfbp is coupled between the output terminal VOUT of the class-D amplifier and the input terminal In of the class-D amplifier. In the no-signal information condition, the PWM signal Vpwmp can be equal to the PWM signal Vpwmn. For example, in the no-signal information condition, (Vpwmp, PWM) can be (VDD, VDD) or (GND, GND).

[0024] As shown in the figure, the logic circuit 310 can be integrated into the gate driver 306. The logic circuit 310 includes an exclusive-OR gate 314 and a delay unit 316. The exclusive-OR gate 314 receives the PWM signals Vpwmp and Vpwmn, and the output terminal of the exclusive-OR gate 314 is coupled to the delay unit 316. The delay unit 316 provides a delay time according to the response time of the class-D amplifier. In this way, the switching signal RTO_clk has an appropriate delay. Before all the significant signals in the amplifier circuit are amplified, the feedback path will not be interrupted. The delay unit 316 is an optional device.

[0025] Figure 4 showing waveforms of signals in a class-D amplifier according to an exemplary embodiment of the present invention Figure 3 in a class-D amplifier.

[0026] In the case of no signal information, the PWM signal Vpwmp is equal to the PWM signal Vpwmn, such that the positive output signal Vop is equal to the negative output signal Von. According to the exclusive-OR calculation XOR(Vpwmp, Vpwmn), it is detected that the states of Vpwmp and Vpwmn are the same. After a delay depending on the response time of the class-D amplifier, the switching signal RTO_clk is generated. When the switching signal RTO_clk is high, the switch RTO_SW is turned off. The feedback path has been disconnected. Noise will not be fed into the signal amplifier circuit through the feedback path.

[0027] Various modifications can be made in the class-D amplifier circuit. Any class-D amplifier having the following components should be considered within the scope of the present invention. The proposed class-D amplifier includes a loop filter, a pulse-width modulation signal generator, a gate driver, a power driver, and a feedback circuit, which are configured to establish a closed amplification loop. The feedback circuit is configured to establish a feedback path. The proposed class-D amplifier further includes a feedback breaker. The feedback breaker interrupts the feedback path in response to the no signal information condition of the class-D amplifier.

[0028] Those skilled in the art will readily observe that many modifications and changes can be made to the apparatus and methods while maintaining the teachings of the present invention. Therefore, the foregoing disclosure should be interpreted as being limited only by the bounds and scope of the appended claims.

Claims

1. A class D amplifier, characterized in that, comprising: a loop filter, a pulse width modulation signal generator, a gate driver, a power driver, and a feedback circuit for establishing a closed amplification loop; wherein, the feedback circuit is used to establish a feedback path; and a feedback breaker that interrupts the feedback path in response to a no-signal information condition of the class D amplifier; wherein, an input signal of the class D amplifier is coupled to an input of the loop filter; an output of the loop filter is coupled to an input of the pulse width modulation signal generator; the feedback circuit is coupled between an output of the power driver and an input of the loop filter to establish the feedback path.

2. The class D amplifier according to claim 1, characterized in that: the pulse width modulation signal generator generates a first pulse width modulation signal and a second pulse width modulation signal; the gate driver converts the first pulse width modulation signal and the second pulse width modulation signal into control signals; the power driver is controlled by the control signals to drive a load.

3. The class D amplifier according to claim 2, characterized in that: in the no-signal information condition, the first pulse width modulation signal is equal to the second pulse width modulation signal.

4. The class D amplifier according to claim 3, characterized in that: the feedback breaker includes a logic circuit and a switch circuit; the logic circuit detects the no-signal information condition; and when the no-signal information condition is detected, the logic circuit outputs a switching signal to switch the switch circuit to disconnect the feedback path.

5. The class D amplifier according to claim 4, characterized in that: the logic circuit includes an exclusive OR gate that receives the first pulse width modulation signal and the second pulse width modulation signal to output the switching signal.

6. The class D amplifier according to claim 5, characterized in that: the logic circuit is integrated into the gate driver.

7. The class D amplifier according to claim 5, characterized in that: the logic circuit further includes a delay unit that delays the switching signal according to the response time of the class D amplifier.

8. The class D amplifier according to claim 4, the class D amplifier is a differential input and differential output amplifier, characterized in that: the feedback circuit includes: a first feedback resistor coupled between a positive output terminal of the class D amplifier and a positive input terminal of the class D amplifier; and a second feedback resistor coupled between a negative output terminal of the class D amplifier and a negative input terminal of the class D amplifier; the switch circuit includes: a first switch for disconnecting the first feedback resistor from the positive input terminal of the class D amplifier; and a second switch for disconnecting the second feedback resistor from the negative input terminal of the class D amplifier.

9. The class D amplifier according to claim 8, characterized in that: the power driver includes an H-bridge circuit.

10. The class D amplifier according to claim 9, characterized in that: the logic circuit includes an exclusive OR gate that receives the first pulse width modulation signal and the second pulse width modulation signal to output the switching signal; and the first switch and the second switch are disconnected by the switching signal.

11. The class D amplifier according to claim 4, characterized in that, The class D amplifier is a single-ended input and single-ended output amplifier, where: The feedback circuit includes a feedback resistor coupled between the output terminal and the input terminal of the class D amplifier; and The switching circuit includes a switch operable to disconnect the feedback resistor from the input terminal of the class D amplifier.

12. The class D amplifier according to claim 11, characterized in that The power driver includes a first transistor, a second transistor, and a third transistor controlled by the gate driver, where: The first transistor is coupled between the power supply terminal and the output terminal of the class D amplifier; The second transistor is coupled between the output terminal of the class D amplifier and the negative power supply terminal; and The third transistor is coupled between the output terminal of the class D amplifier and the common mode node of the class D amplifier.

13. The class D amplifier according to claim 12, characterized in that: The logic circuit includes an exclusive OR gate that receives the first pulse width modulation signal and the second pulse width modulation signal to output the switching signal; and The switch is turned on by the switching signal.

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