LED module

Abstract

A light-emitting diode (LED) module includes an integrated substrate comprising: a plurality of LEDs; a glass substrate; and a signal wiring layer disposed on the glass substrate. The signal wiring layer includes a plurality of signal electrodes configured to provide data signals to the plurality of LEDs. The LED module also includes a conductive pattern disposed on at least one surface of the integrated substrate and connected to ground.

Description

Technical Field

[0001] This disclosure relates to a light-emitting diode module configured to display an image using light-emitting diodes. Background Technology

[0002] Display devices may include non-emissive display panels such as liquid crystal displays (LCDs) and self-emissive display panels that generate light corresponding to data signals.

[0003] Specifically, for self-emissive display panels, light-emitting diodes (LEDs), which correspond to inorganic light-emitting diodes, have been actively researched. LEDs are devices that convert electrical signals into light forms such as infrared or visible light by utilizing the properties of compound semiconductors. LEDs can be used in home appliances, remote controls, digital signage, and various automated equipment. Furthermore, LEDs are widely used in small handheld electronic devices and large display devices. Additionally, with the recent development of micro-LED displays manufactured through miniaturization, LEDs have been realized in the form of modular displays. Summary of the Invention

[0004] Technical issues

[0005] A light-emitting diode (LED) module is provided that can prevent damage to the LED that may be caused by electrostatic discharge by implementing conductive patterns in the LED module.

[0006] Technical solution

[0007] Other aspects will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the presented embodiments.

[0008] According to one aspect of this disclosure, a light-emitting diode (LED) module is provided, comprising: an integrated substrate including a plurality of LEDs; a glass substrate; and a signal wiring layer disposed on the glass substrate, the signal wiring layer including: a plurality of signal electrodes configured to provide data signals to the plurality of LEDs; and a conductive pattern disposed on at least one surface of the integrated substrate and connected to ground.

[0009] The integrated substrate may further include a first substrate, on which the plurality of LEDs may be disposed, and at least a portion of the conductive pattern may be disposed on at least one side surface of the first substrate.

[0010] The integrated substrate may further include a second substrate, the signal wiring layer may further include multiple scan lines and multiple data lines disposed on the second substrate, and the conductive pattern may be disposed on at least one surface of the second substrate.

[0011] The LED module may further include: a plate on the surface of the glass substrate, the plate being connected to the conductive pattern, and the conductive pattern being connected to ground through the plate.

[0012] The signal wiring layer may further include: at least one via penetrating the glass substrate; and a plurality of reference electrodes, wherein the conductive pattern is connected to the plurality of reference electrodes through the at least one via and connected to ground through at least one of the plurality of reference electrodes.

[0013] The conductive pattern can be electrically isolated from the plurality of LEDs and the plurality of signal electrodes.

[0014] The conductive pattern can be connected to ground via an external component.

[0015] The signal wiring layer may further include: an upper signal wiring layer disposed between the plurality of LEDs and a first surface of the glass substrate; and a lower signal wiring layer connected to the upper signal wiring layer and disposed on a second surface of the glass substrate, the second surface facing the first surface of the glass substrate.

[0016] The LED module may also include side wiring configured to connect the upper signal wiring layer to the lower signal wiring layer.

[0017] According to one aspect of this disclosure, a light-emitting diode (LED) module is provided, comprising: a glass substrate including a pair of surfaces and a plurality of side surfaces between the pair of surfaces; an upper signal wiring layer disposed on the glass substrate and including a plurality of signal electrodes configured to provide data signals to a plurality of LEDs and a plurality of reference electrodes configured to ground the plurality of LEDs; a lower signal wiring layer connected to the upper signal wiring layer, the lower signal wiring layer being disposed below the glass substrate; side wiring disposed on at least one first surface of the LED module and configured to connect the upper signal wiring layer to the lower signal wiring layer; and a conductive pattern disposed on at least one second surface of the LED module different from the at least one first surface, the conductive pattern being connected to at least one of the plurality of reference electrodes.

[0018] At least a portion of the conductive pattern may be disposed on at least one side surface of the upper signal wiring layer.

[0019] At least a portion of the conductive pattern may be disposed on at least one side surface of the lower signal wiring layer.

[0020] The LED module may further include: at least one plate disposed on the surface of the glass substrate and connected to the conductive pattern, wherein the conductive pattern is connected to ground through the at least one plate.

[0021] The glass substrate shown may further include at least one via extending through the pair of surfaces, wherein the conductive pattern is connected to at least one of the plurality of reference electrodes through the at least one via.

[0022] The conductive pattern can be electrically isolated from the plurality of LEDs and the plurality of signal electrodes.

[0023] According to an aspect of this disclosure, a light-emitting diode (LED) module is provided, comprising: a glass substrate including a pair of surfaces and four side surfaces between the pair of surfaces; a plurality of LEDs disposed on the glass substrate; a signal wiring layer electrically connected to the plurality of LEDs; a drive signal wiring layer disposed on a lower surface of the glass substrate; side wiring disposed on a first side surface and a second side surface of the glass substrate, the second side surface facing the first side surface, the side wiring being configured to electrically connect the signal wiring layer to the drive signal wiring layer; and a conductive pattern disposed on a third side surface and a fourth side surface of the glass substrate, the third side surface and the fourth side surface being different from the first side surface and the second side surface, the third side surface facing the fourth side surface, and the conductive pattern being connected to ground.

[0024] A reference electrode may be included in at least one of the signal wiring layer and the drive signal wiring layer, and the conductive pattern may be electrically connected to the reference electrode.

[0025] The glass substrate may have a rectangular shape, and the pair of surfaces may include flat surfaces.

[0026] The conductive pattern can be electrically isolated from the plurality of LEDs, the signal wiring layer, and the drive signal wiring layer.

[0027] The capacitance of the conductive pattern can be larger than that of the side wiring, and the impedance can be lower than that of the side wiring. Attached Figure Description

[0028] Figure 1 This is a perspective view of a display device according to an embodiment;

[0029] Figure 2 This is an exploded perspective view of a display panel used in a display device according to an embodiment;

[0030] Figure 3This is a view showing a display panel equipped with a light-emitting diode (LED) module according to an embodiment;

[0031] Figure 4 This is a schematic diagram illustrating the configuration of an LED module according to an embodiment;

[0032] Figure 5 It shows the setting Figure 4 A circuit diagram of the circuitry in the pixel area of ​​the display panel;

[0033] Figure 6 This is a cross-sectional view showing the arrangement structure of the pixel areas of a display panel according to an embodiment;

[0034] Figure 7A This is a cross-sectional view showing the configuration of the upper signal routing layer connected to the lower signal routing layer according to an embodiment;

[0035] Figure 7B This is a cross-sectional view showing the configuration of the upper signal routing layer connected to the lower signal routing layer according to an embodiment;

[0036] Figure 8A This is a plan view illustrating how a conductive pattern is implemented on an LED module according to an embodiment;

[0037] Figure 8B This is a cross-sectional view showing the implementation of the conductive pattern on an LED module according to an embodiment;

[0038] Figure 9A This is a plan view of the LED module according to an embodiment;

[0039] Figure 9B This is a cross-sectional view of the LED module according to an embodiment;

[0040] Figure 10A This is a plan view of the LED module according to an embodiment;

[0041] Figure 10B This is a perspective view of an LED module according to an embodiment;

[0042] Figure 11A This is a plan view of the LED module according to an embodiment;

[0043] Figure 11B This is a perspective view of an LED module according to an embodiment;

[0044] Figure 12 This shows a cross-sectional view of a power supply for an LED module according to an embodiment; and

[0045] Figure 13 This is a block diagram of a display device according to an embodiment. Detailed Implementation

[0046] The embodiments described in this disclosure and the configurations shown in the accompanying drawings are merely examples of embodiments of this disclosure, and various modifications can be made to replace the embodiments and drawings of this disclosure when this application is filed.

[0047] The terminology used herein is for describing embodiments and is not intended to limit and / or constrain this disclosure.

[0048] The singular forms “one,” “a,” and “the” are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0049] In this disclosure, the terms “comprising,” “including,” “having,” etc., are used to specify features, quantities, steps, operations, elements, components, or combinations thereof, but do not exclude the presence or addition of one or more features, elements, steps, operations, components, or combinations thereof.

[0050] It should be understood that although the terms “first,” “second,” “third,” etc., may be used in this document to describe various elements, the elements are not limited by these terms.

[0051] In addition, terms such as “unit”, “component”, “block”, “building block” and “module” indicate a unit for processing at least one function or operation, and may represent at least one piece of hardware (e.g., field-programmable gate array (FPGA), application-specific integrated circuit (ASIC)), at least one piece of software stored in memory and / or at least one process processed by a processor.

[0052] The present disclosure will now be described more fully with reference to the accompanying drawings. Throughout the description, similar reference numerals refer to similar elements. Well-known functions or constructions are not described in detail, as this would obscure one or more exemplary embodiments with unnecessary detail. For clarity, illustration, and convenience, the relative sizes and descriptions of these elements may be exaggerated.

[0053] It should be understood that when a component or layer is referred to as being "above," "over," "on," "connected to," or "coupled to" another component or layer, the component or layer may be directly above, above, or on the other component or layer, may be connected to or coupled to other components or layers, or there may be intermediate components or layers. Conversely, when a component is referred to as being "directly" above, above, or on another component or layer, directly connected to, or directly coupled to the other component or layer, there are no intermediate components or layers.

[0054] Similarly, when a given material layer is described as being on a substrate or other layer, that material layer may be in direct contact with the substrate or other layer, and another third layer may exist between them. Furthermore, in the following examples, the materials forming the layers are illustrative, and other materials may also be used.

[0055] In the following text, "display device" includes any device capable of providing an image to a user by displaying an image. For example, a display device may include, but is not limited to, display devices such as televisions, monitors, laptop computers, and mobile communication terminals.

[0056] Figure 1 This is a perspective view of a display device according to an embodiment. Figure 2 This is an exploded perspective view of the display panel used in the display device according to an embodiment.

[0057] Reference Figure 1 The display device 1 includes a display panel 2 on which an image is displayed and a housing 3 configured to support the display panel 2 and provide the rear surface and / or side surface of the display device (see reference). Figure 3 The display panel 2 can be implemented using at least one light-emitting diode (LED) module 10.

[0058] Reference Figure 2 The display panel 2 may include LED modules 10 arranged in columns and rows in an MN matrix, a fixing member 12 configured to allow fixing of the LED modules 10 in a matrix, and a glass panel 13 arranged on the front side of the LED modules 10 by the fixing member 12.

[0059] Figure 2 The diagram shows that the LED module 10, the fixing member 12, and the glass panel 13 are separable from each other. However, in an embodiment, the LED module 10 and the glass panel 13 can be integrally formed through the fixing member 12 therebetween, thereby forming the display panel 2.

[0060] That is, according to the embodiment, the display device 1 may include: a glass plate (or glass substrate), a plurality of light-emitting diodes (LEDs) and a signal wiring layer disposed on the glass substrate, the signal wiring layer further including a plurality of signal electrodes configured to provide data signals to each of the plurality of LEDs and a plurality of reference electrodes configured to ground the plurality of LEDs.

[0061] According to an embodiment, a conductive pattern can be formed on at least one surface of an integrated substrate comprising a glass substrate, a plurality of LEDs, and a signal wiring layer.

[0062] The conductive pattern can be connected to at least one of a plurality of reference electrodes or ground.

[0063] In addition, the display device 1 may also include a glass panel disposed on the front surface of the integrated substrate and a fixing member configured to fix the integrated substrate.

[0064] Figure 3 This is a view showing a display panel equipped with a light-emitting diode (LED) module according to an embodiment.

[0065] Reference Figure 3 The LED module 10 includes a glass substrate P3 and a plurality of LEDs 300 mounted on the glass substrate P3.

[0066] The glass substrate P3 may include a transparent material such as glass and may form multiple pixel regions P. According to an embodiment, circuits and components mounted on the glass substrate may be mounted in a chip-on-glass (COG) manner. Specifically, the COG manner may be a method of directly embedding driving integrated circuits on the glass substrate of the liquid crystal panel to achieve ultra-thin and lightweight fine-pitch display panels.

[0067] The signal wiring layer P2 is a thin-film transistor (TFT) substrate, and thin-film transistors and various wirings for driving LED 300 can be formed corresponding to pixel region P. When the thin-film transistor is turned on, a driving signal input from the outside through the wiring is applied to LED 300, so LED 300 emits light to realize the image.

[0068] Reference Figure 3 The LED module 10 may include a glass substrate P3, a TFT array substrate P2, and a substrate P1 including LEDs 300, wherein the TFT array substrate P2 includes a plurality of signal electrodes configured to provide data signals to each LED 300 and a plurality of reference electrodes configured to ground the plurality of LEDs 300.

[0069] According to an embodiment, the LED 300 can have a size of 10-100 μm, and the LED 300 can be formed by performing a thin film growth method on a sapphire substrate or a silicon substrate using inorganic materials such as Al, Ga, N, P, As, and In, and then cutting and separating the sapphire substrate or silicon substrate. Therefore, the LED 300 can have fine dimensions.

[0070] Multiple gate lines and data lines can be arranged vertically and horizontally to define multiple pixel regions P in a matrix form. In this case, the gate lines and data lines can be connected to LED 300, and the ends of the gate lines and data lines can be respectively provided with gate pads and data pads connected to the outside, and the gate pads and data pads can be formed in the side wiring in the LED module 10.

[0071] LED 300 can be operated based on external signals applied to LED 300 through the gate line and data line.

[0072] Figure 4 This is a schematic diagram illustrating the configuration of an LED module according to an embodiment.

[0073] Reference Figure 4 Multiple data lines D1-Dm, multiple scan lines S1-Sn, and multiple pixel circuits can be arranged as electrode patterns on one surface of the LED module. A pixel region SP can represent the area defined by the intersections of adjacent data lines and scan lines in the data lines D1-Dm and scan lines S1-Sn, and can be provided with pixel circuits. Multiple pixel regions SP can be grouped into pixels, and a color represented by a corresponding pixel can be selected by mixing the corresponding light generated in a pixel region SP.

[0074] Data lines D1-Dm can send data signals representing image signals to the corresponding pixel circuits in pixel region SP, and scan lines S1-Sn can send scan signals to the corresponding pixel circuits in pixel region SP.

[0075] The scan driver 140 can sequentially apply scan signals to each of the multiple scan lines S1-Sn arranged along the row direction, and the data driver 130 can sequentially apply data voltages (VDATA) corresponding to the image signals to data lines D1-Dm arranged along the column direction.

[0076] The scan driver 140 and / or the data driver 130 can be electrically connected to the display panel 110, or they can be mounted as chips to a tape-on-a-package (TCP) that is bonded to and then electrically connected to the display panel 110. Alternatively, the scan driver 140 and / or the data driver 130 can be mounted as chips to a flexible printed circuit (FPC) or film that is bonded to and then electrically connected to the display panel 110. Furthermore, the scan driver 140 and / or the data driver 130 can be directly mounted to the substrate of the LED module 10.

[0077] Figure 5 It shows Figure 4 The equivalent circuit diagram of the pixel circuit in the pixel region. Specifically, Figure 5 The pixel circuit driven by the first scan line S1 and the first data line D1 is shown.

[0078] Reference Figure 5The pixel circuit may include an LED, two transistors M1 and M2, and a capacitor Cst. Multiple transistors M1 and M2 can be configured as PMOS transistors. However, such a circuit configuration is based on an active matrix (AM) driving method and is merely an example of a pixel circuit. Therefore, the pixel circuit is not limited to... Figure 4 Circuit configuration.

[0079] For the switching transistor M2, the gate electrode can be connected to the scan line Sn, the source electrode can be connected to the data line Dm, the drain electrode can be connected to the first terminal of the capacitor Cst and the gate electrode of the driving transistor M1, and the second terminal of the capacitor Cst can be connected to the power supply voltage VDD. For the driving transistor M1, the source electrode can be connected to the power supply voltage VDD, and the drain electrode can be connected to the anode 310 of the LED (see reference). Figure 6 ), and the cathode of the LED is 390 (refer to) Figure 6 ) can be achieved through reference electrodes 250-1 and 250-2 (reference Figure 6 The cathode 390 of the LED is connected to a reference voltage VSS. Therefore, the LED can emit light based on the current applied from the driver transistor M1. The reference voltage VSS connected to the cathode 390 of the LED can be lower than the supply voltage VDD, so ground voltage can be used as the reference voltage VSS.

[0080] According to an embodiment, the power supply provided in the LED can supply a power supply voltage VDD to the LED module and be connected to a reference voltage VSS.

[0081] The operation of the pixel circuit according to an embodiment is described. First, when a scan signal is applied to the scan line Sn and the switching transistor M2 is turned on, a data voltage can be sent to the first terminal of the capacitor Cst and the gate electrode of the driving transistor M1. Therefore, the gate-source voltage VGS of the driving transistor M1 can be maintained by the capacitor Cst for a predetermined period of time. Furthermore, the driving transistor M1 can allow the LED to emit light by applying a current ILED corresponding to the gate-source voltage VGS of the driving transistor M1 to the anode 310 of the LED.

[0082] When a high data voltage VDATA is sent to the gate electrode of the driving transistor M1, the gate-source voltage VGS of the driving transistor M1 can be reduced. Correspondingly, a small current ILED can be applied to the anode 310 of the LED, so the LED can emit light with a lower intensity. Therefore, the LED may display low grayscale. On the other hand, when a low data voltage VDATA is sent to the gate of the driving transistor M1, the gate-source voltage VGS of the driving transistor M1 can be increased. Correspondingly, a large current ILED can be applied to the anode 310 of the LED, so the LED can emit light with a higher intensity. Therefore, the LED can display high grayscale. Therefore, the level of the data voltage VDATA applied to each pixel circuit can be selected based on the image to be displayed.

[0083] exist Figure 6 An example of a cross-section of the pixel region SP is shown in the figure.

[0084] Figure 6 This is a view showing the arrangement structure of the pixel areas of a display panel according to an embodiment. Figure 6 This illustrates a case where one of the two transistors 200 is connected to the LED 300.

[0085] The glass substrate P3 can comprise various materials. For example, the glass substrate P3 can be formed from a transparent glass material containing SiO2 as the main component, but the glass substrate P3 is not limited to this. Therefore, the glass substrate P3 can be formed from a transparent plastic material, thereby allowing the glass substrate P3 to be flexible. The plastic material can be an insulating organic material selected from the group consisting of: polyethersulfone (PES), polyacrylate (PAR), polyetherimide (PEI), polyethylene terephthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyallyl ester, polyimide, polycarbonate (PC), cellulose triacetate (TAC), and cellulose acetate propionate (CAP).

[0086] A buffer layer 111 may be formed on the glass substrate P3. The buffer layer 111 may provide a flat surface on the top of the glass substrate P3 and may prevent foreign matter or moisture from being introduced into the glass substrate P3. For example, the buffer layer 111 may be formed of inorganic materials such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, titanium oxide, or titanium nitride, or organic materials such as polyimide, polyester, or acrylic acid. Alternatively, the buffer layer 111 may be formed of multiple layers of the inorganic materials described above.

[0087] Transistor 200 can be disposed on buffer layer 111.

[0088] Transistor 200 may include an active layer 210, a gate electrode 220, a source electrode 230a, and a drain electrode 230b. The active layer 210 may include a semiconductor material and may include a source region, a drain region, and a channel region between the source and drain regions. The gate electrode 220 may be formed on the active layer 210 to correspond to the channel region. The source electrode 230a and drain electrode 230b may be electrically connected to the source and drain regions of the active layer 210, respectively. A first insulating layer 113 formed of an inorganic insulating material may be disposed as a gate insulating film between the active layer 210 and the gate electrode 220. A second insulating layer 115 may be disposed as an interlayer insulating film between the gate electrode 220 and the source electrode 230a, and between the gate electrode 220 and the drain electrode 230b. A third insulating layer 117 may be disposed as a planarization film on the source electrode 230a and the drain electrode 230b. The second insulating layer 115 and the third insulating layer 117 can be formed of organic or inorganic insulating materials. Alternatively, the second insulating layer 115 and the third insulating layer 117 can be formed by alternating organic and inorganic insulating materials.

[0089] Figure 6 The transistor 200 is shown implemented in a top-gate configuration, with the gate electrode disposed on top of the active layer, but this disclosure is not limited thereto. In embodiments, the gate electrode may be disposed below the active layer.

[0090] The buffer layer 111, the first insulating layer 113, the second insulating layer 115, the third insulating layer 117, and the transistor 200 can form a signal wiring layer including the scan lines and data lines described above. According to an embodiment, the signal wiring layer can be formed in a thin-film transistor (TFT) substrate.

[0091] exist Figure 6 In the embodiment, the layer including the LED 300 is referred to as the first substrate P1, and the layer including the scan lines and data lines and including the buffer layer 111, the first insulating layer 113, the second insulating layer 115, the third insulating layer 117, and the transistor 200 is referred to as the second substrate. The second substrate may include an upper signal wiring layer P2-1 and a lower signal wiring layer P2-2.

[0092] The first substrate P1, the second substrate including layers P2-1 and P2-2, and the glass substrate P3 can form an integrated substrate.

[0093] In addition, although the LED 300 is described as a flip type, the vertical type also applies.

[0094] The memory cell 400, which defines a pixel area, can be disposed on the third insulating layer 117. The memory cell 400 may include a recess 430 therein to accommodate the LED 300. The height of the memory cell 400 may be selected based on the height of the LED 300 and the viewing angle. The size (or width) of the recess 430 may be selected based on the resolution and pixel density of the display device 1. According to an embodiment, the height of the LED 300 may be greater than the height of the memory cell 400.

[0095] Figure 6 The recess 430 is shown to be quadrilateral in shape, but is not limited to this. Therefore, the recess 430 can have various shapes, such as polygonal, rectangular, circular, conical, elliptical, and triangular shapes.

[0096] The signal electrode 510 may be arranged around the recess 430 along the side and bottom surfaces of the recess 430 and the upper surface of the memory body 400. The signal electrode 510 may be electrically connected to the source electrode 230a or drain electrode 230b of the transistor 200 through vias formed on the third insulating layer 117.

[0097] According to an embodiment, the conductive pattern, which will be described later, can be connected to ground via a via along with a reference electrode.

[0098] The memory cell 400 can be used as a light-blocking element with low light transmittance to block light emitted toward the side surface of the LED 300. Therefore, the memory cell 400 can prevent the colors of light emitted from adjacent LEDs 300 from mixing. Furthermore, the memory cell 400 can improve the bright-room contrast of the display device 1 by absorbing and blocking light incident from the outside. The memory cell 400 may include materials that absorb at least some light beams, light-reflecting materials, and / or light-scattering materials.

[0099] The memory cell 400 may include a translucent or opaque insulating material for visible light (e.g., light with wavelengths from 380 nm to 750 nm). The memory cell 400 may be formed from, but is not limited to, thermoplastic resins such as polycarbonate (PC), polyethylene terephthalate (PET), polyethersulfone, polyvinyl butyral, polyphenylene ether, polyamide, polyetherimide, norbornene resins, methacrylic resins, or cyclic polyolefin resins; thermosetting resins such as epoxy resins, phenolic resins, polyurethane resins, acrylic resins, vinyl ester resins, imide resins, polyurethane resins, urea resins, or melamine resins; or organic insulating materials such as polystyrene, polyacrylonitrile, or polycarbonate.

[0100] Alternatively, the storage body 400 may be formed of an inorganic insulating material, such as, but not limited to, inorganic oxides or inorganic nitrides such as SiOx, SiNx, SiNxOy, AlOx, TiOx, TaOx or ZnOx.

[0101] According to an embodiment, the memory cell 400 may be formed of an opaque material such as a black matrix material. The insulating black matrix material may include a resin or slurry comprising an organic resin, a glass paste, and a black pigment, metal particles (e.g., nickel, aluminum, molybdenum, and their alloys), metal oxide particles (e.g., chromium oxide), or metal nitride particles (e.g., chromium nitride). According to another embodiment, the memory cell 400 may be a distributed Bragg reflector (DBR) with high reflectivity or a specular reflector formed of metal.

[0102] LED 300 can be disposed on the recess 430 of memory cell 400. LED 300 can be a micro LED. Micro LEDs can have a size of 1 to 100 μm, but LED 300 is not limited to this. Therefore, LED 300 can be an LED with a size larger or smaller than 1 to 100 μm. LED 300 can be picked up individually or jointly from the wafer by a transfer mechanism and transferred to glass substrate P3 to be accommodated in the recess 430 of glass substrate P3. According to an embodiment, after the memory cell 400 and signal electrode 510 are formed, LED 300 can be accommodated in the recess 430 of glass substrate P3. LED 300 can emit light of a predetermined wavelength in the wavelength range from ultraviolet light to visible light. For example, LED 300 can be a red, green, blue, white LED or an ultraviolet (UV) LED.

[0103] LED 300 may include a pn diode, an anode 310, and a cathode 390. The anode 310 and / or cathode 390 may be formed of a variety of conductive materials, including metals, conductive oxides, and conductive polymers. The anode 310 may be electrically connected to a signal electrode 510, and the cathode 390 may be electrically connected to a common electrode 530. The pn diode may include a p-doped portion 330 and one or more quantum well portions 350 on the anode 310 side, and an n-doped portion 370 on the cathode 390 side. Alternatively, the doped portion on the cathode 390 side may correspond to the p-doped portion 330, and the doped portion on the anode 310 side may correspond to the n-doped portion 370.

[0104] A passivation layer 520 may be provided to surround the LED 300 within the recess 430. The passivation layer 520 may be disposed between the memory body 400 and the LED 300. The passivation layer 520 may include an organic insulating material. For example, the passivation layer 520 may be formed of acrylic acid, polymethyl methacrylate (PMMA), benzocyclobutene (BCB), polyimide, acrylate, epoxy resin, and polyester, but is not limited thereto.

[0105] Each LED 300 included in the display device 1 can emit a unique color. In this case, each of the multiple LEDs included in a pixel area P can be connected to a different signal electrode and can be configured to share a common electrode 530.

[0106] The signal wiring layer may include an upper signal wiring layer P2-1 disposed above the glass substrate P3 and a lower signal wiring layer P2-2 disposed below the glass substrate P3.

[0107] Reference electrodes 250-1 and 250-2 may be disposed on at least one of the upper signal routing layer P2-1 and the lower signal routing layer P2-2.

[0108] Regardless of the positions of the reference electrodes 250-1 and 250-2 set on the upper signal routing layer and / or the lower signal routing layer, the upper signal routing layer P2-1 and the lower signal routing layer P2-2 can be connected to each other.

[0109] exist Figure 6 In this embodiment, the reference electrode is conceptually shown as an electrode arranged in the signal wiring layer. However, the embodiments are not limited to this, as long as the diode is an electrode of the wiring connected to the reference voltage.

[0110] Regardless of the connection method between the upper signal routing layer P2-1 and the lower signal routing layer P2-2, they can share the reference electrode set in both the upper routing layer P2-1 and the lower routing layer P2-2. The reference electrode can be connected to ground.

[0111] As will be described later, the upper signal routing layer P2-1 and the lower routing layer P2-2 can be connected to each other in various ways.

[0112] Figure 7A and Figure 7B This is a cross-sectional view showing the configuration of the upper signal routing layer connected to the lower signal routing layer according to an embodiment.

[0113] Figure 7A It is shown that the upper signal wiring layer P2-1 is connected to the lower signal wiring layer P2-2 through the glass substrate P3.

[0114] Figure 7A The connection structure between the upper signal routing layer P2-1 and the lower signal routing layer P2-2 shown can be referred to as the through-glass via (TGV) method.

[0115] According to an embodiment, the upper signal wiring layer P2-1 can be connected to the lower signal wiring layer P2-2 through vias formed in the glass substrate P3.

[0116] Specifically, the pads 270-1 in the upper signal routing layer P2-1 can be connected to the flexible printed circuit pads 260 in the lower signal routing layer P2-2 via vias.

[0117] The flexible circuit board pads 260 can be connected to external components of the LED module 10.

[0118] In this configuration, the conductive pattern can be connected to ground via wiring through vias formed in the glass substrate P3. Furthermore, the conductive pattern can be connected to the reference electrode 250-2 disposed in the lower signal wiring layer P2-2.

[0119] Figure 7B It is shown that the upper signal routing layer P2-1 is connected to the lower signal routing layer P2-2 via a separate side routing 280.

[0120] Specifically, the side wiring pad 270-2 of the upper signal wiring layer P2-1 can be connected to the side wiring pad 270-3 of the lower signal wiring layer P2-2 via the side wiring 280.

[0121] Specifically, the side wiring 280 can connect the pads on the upper and lower parts of the glass substrate P3 to each other.

[0122] When the upper signal routing layer P2-1 is connected to the lower signal routing layer P2-2 via the side routing 280, conductive patterns can be formed on the surface of the integrated substrate where the side routing 280 is not formed. A detailed description of this will follow later.

[0123] like Figure 7A As shown, the flexible circuit board pad 260 can be disposed in the lower signal wiring layer P2-2 and connected to the external components of the LED module 10.

[0124] In addition, the conductive pattern can be connected to the reference electrode 250-2 disposed in the lower signal wiring layer P2-2.

[0125] Refer again Figure 7B According to an embodiment, the LED module 10 can be configured as having at least one layer stacked therein.

[0126] The upper layer included in the LED module 10 can be disposed on the upper surface of the glass substrate P3 to fix multiple LEDs 300.

[0127] In addition, the upper layer of the LED module 10 may include a plurality of signal electrodes configured to provide data signals to a plurality of LEDs 300 and a plurality of reference electrodes configured to ground the plurality of LEDs 300.

[0128] The upper layer of the LED module 10 may include an upper signal wiring layer P2-1. The upper layer of the LED module 10 may include a first substrate P1 and an upper signal wiring layer P2-1.

[0129] The lower layer of the LED module 10 may include a lower signal wiring layer P2-2 connected to the upper signal wiring layer P2-1, and may be disposed below the glass substrate P3.

[0130] according to Figure 7B In the embodiment shown, the side wiring 280 can be configured to connect the upper signal wiring layer P2-1 to the lower signal wiring layer P2-2.

[0131] Furthermore, conductive patterns can be disposed on the side surface of the LED module 10 and connected to at least one of a plurality of reference electrodes.

[0132] The entire LED module 10 can be configured as a substrate structure, and the substrate structure can be configured to have an upper surface, a lower surface and a side surface.

[0133] Side wiring 280 can be disposed on a portion of the side surface, and conductive patterns can be disposed on the surface of the LED module 10 where the side wiring 280 is not disposed.

[0134] At least a portion of the conductive pattern may be disposed on at least one side surface of the upper layer of the LED module 10, and may be formed on at least one side surface of the lower layer of the LED module.

[0135] Furthermore, it should be understood that the aforementioned upper and lower layers of the LED module 10 can be functional expressions.

[0136] Specifically, the upper and lower layers can be integrally formed on the substrate. The upper and lower layers can be formed as a structure stacked on the substrate, and are formed using substrate-based processes for film bonding of various conductors, semiconductors, and non-conductors, as well as deposition and patterning. Those skilled in the art will understand that the extent (e.g., width or thickness) of the upper and / or lower layers can vary.

[0137] Figure 8A and Figure 8B The figures shown are a plan view and a cross-sectional view of the LED module 10 according to an embodiment, to explain how the conductive patterns on the LED module 10 are implemented.

[0138] Reference Figure 8A and Figure 8B According to an embodiment, LED module 10 may include ultra-small LEDs (e.g., a size of a few micrometers (μm)).

[0139] According to embodiments of the present disclosure, the LED module 10 may include a conductive pattern 600 connected to a reference electrode independently of (or electrically isolated from) a plurality of LEDs and a plurality of signal electrodes.

[0140] Furthermore, in the implementation of LED module 10, conductive pattern 600 can be formed on the side surface of LED module 10 to prevent damage to LED 300.

[0141] When electrostatic discharge (ESD) occurs, current can flow to the conductive pattern 600 and then to ground. Therefore, the conductive pattern 600 can provide protection for the LED 300 and signal wiring. Furthermore, the conductive pattern 600 can have a larger capacitance and lower impedance compared to the capacitance and impedance of the side wiring.

[0142] Furthermore, the conductive pattern 600 can be configured to be electrically independent (or electrically isolated) from the first substrate P1 including the LED 300 and the second substrates P2-1 and P2-2 including multiple signal electrodes.

[0143] The conductive pattern 600 can be configured to surround the LED 300 and multiple signal electrodes.

[0144] The conductive pattern 600 can be connected to the reference electrodes 250-1 and 250-2 independently of the multiple signal electrodes. Furthermore, the conductive pattern 600 can be connected to a board P4 disposed in the LED module 10. Board P4 can be connected to ground. For example, board P4 can be disposed on the lower part of the LED module 10, and... Figure 8A It can be a plan view when viewed from the bottom of the LED module 10.

[0145] As described above, when ESD is applied to the LED module 10 with the conductive pattern 600 connected to ground, the ESD can flow to ground through the conductive pattern 600 without affecting other circuits included in the LED module 10.

[0146] The conductive pattern 600 can be connected to ground in various forms, examples of which are shown in... Figure 8B As shown in the image.

[0147] The conductive pattern 600 can be connected to reference electrodes 250-1 and 250-2 independently of the multiple signal electrodes, and the reference electrodes can provide grounding. The signal routing layer may include an upper signal routing layer P2-1 and a lower signal routing layer P2-2.

[0148] Reference electrode 250-2 can be disposed on the lower signal wiring layer P2-2 and then connected to conductive pattern 600.

[0149] The reference electrode set on the lower signal wiring layer P2-2 can be connected to ground.

[0150] The conductive pattern 600 can be directly connected to a board P4 located below the LED module 10 via separate wiring. According to an embodiment, board P4 can be connected to ground.

[0151] Therefore, the conductive pattern 600 can be connected to ground via board P4.

[0152] The conductive pattern 600 can be connected to the wiring in the via provided in the lower signal wiring layer P2-2 via, and then to the reference electrode 250-2. The reference electrode 250-2 can be connected to the via provided in the lower signal wiring layer P2-2.

[0153] Therefore, the conductive pattern 600 can be connected to the reference electrode 250-2 and to ground through a via provided on the lower signal wiring layer P2-2.

[0154] According to another embodiment, the conductive pads can be connected to ground via external components of the LED module 10. A detailed description thereof will follow.

[0155] The LED module 10 may include a first substrate P1 and second substrates P2-1 and P2-2. The first substrate P1 includes an LED 300, and the second substrates P2-1 and P2-2 are provided with multiple scan lines and multiple data lines.

[0156] At least a portion of the conductive pattern 600 may be disposed on at least one side surface of the first substrate.

[0157] When electrostatic discharge (ESD) occurs in LED module 10, the ESD can be transmitted to the conductive pattern 600 disposed in LED module 10, instead of to LED 300 and signal electrodes. The conductive pattern 600 can then transmit the ESD to the connected ground. Based on this operation, the ESD applied to LED module 10 can be transmitted to ground via the conductive pattern 600 instead of to the LEDs and signal electrodes.

[0158] As described above, the conductive pattern 600 can be set independently without being connected to the circuit configuration of the LED module 10 that connects multiple scan lines, multiple data lines and LEDs.

[0159] The above describes how the conductive pattern 600 can be connected to ground, thereby transmitting ESD directly to ground. However, the form in which the conductive pattern 600 is connected to ground is not limited to this and can vary, as long as the conductive pattern 600 is implemented to be connected to ground.

[0160] also, Figure 8A and Figure 8B The operations described herein are merely examples of protecting the LED module 10 of this disclosure, and operations that transmit ESD through the conductive pattern 600 can be performed in various ways.

[0161] Figure 9A , Figure 9B , Figure 10A , Figure 10B , Figure 11A and Figure 11B This is a view showing various implementations of the conductive patterns on the LED module 10.

[0162] Figure 9A This is a plan view of the LED module 10 according to an embodiment. Figure 9B This is a cross-sectional view of the LED module 10 according to an embodiment.

[0163] Reference Figure 9A and Figure 9B Conductive patterns 600-9a and 600-9b can be configured to surround LED 300 and be connected to ground.

[0164] When conductive patterns 600-9A and 600-9B are connected to ground, they can eliminate ESD occurring in LED module 10. Conductive patterns 600-9A and 600-9B can be connected to reference electrodes 250-1 and 250-2.

[0165] Reference electrodes 250-1 and 250-2 can be connected to a reference voltage VSS. As described above, conductive patterns 600-9A and 600-9B can be connected to a signal routing layer, specifically, to reference electrode 250-2 in the lower signal routing layer P2-2. According to an embodiment, conductive patterns 600-9A and 600-9B can be directly connected to reference electrode 250-2 disposed in the lower signal routing layer P2-2. According to an embodiment, the reference electrode can be connected to conductive patterns 600-9A and 600-9B through vias disposed in the lower signal routing layer P2-2. Furthermore, as described above, conductive patterns 600-9A and 600-9B can be connected to ground through a board 4 disposed in the LED module 10.

[0166] Figure 10A This is a plan view of the LED module according to an embodiment. Figure 10B This is a perspective view of an LED module according to an embodiment.

[0167] Figure 10A and Figure 10B At least a portion of the conductive pattern is shown disposed on the side surface of the LED module 10. Figure 10A The conductive pattern 600-10A is shown to be disposed on the side surface of the first substrate P1 and the periphery of the LED module 10.

[0168] also, Figure 10A and Figure 10BThe conductive patterns 600-10A or 600-10B are shown positioned where the side wiring 280 is not located. The side wiring 280 connects the upper signal wiring layer P2-1, which is disposed above the glass substrate, to the lower signal wiring layer P2-2, which is disposed below the glass substrate. The details of the side wiring 280 have already been described above, and a repeated description thereof will be omitted.

[0169] Side wiring 280 and conductive pattern 600-10A or 600-10B can be formed in thin film on the side surface of the substrate structure included in the LED module 10.

[0170] According to an embodiment, the side wiring 280 and the conductive pattern 600-10A or 600-10B can be formed in the form of a thin film and can be formed to be in close contact with the side surface of the glass substrate included in the LED module 10.

[0171] Conductive patterns 600-10A and 600-10B can be connected to a reference electrode and then to ground. Specifically, conductive patterns 600-10A and 600-10B can be connected to ground via reference electrodes 250-1 and 250-2, but alternatively, they can be connected to ground via board P4 and external components (such as other frames and / or other substrates disposed in the display device).

[0172] The conductive pattern 600-10A can be configured by considering the positional relationship between the conductive pattern 600-10A and the LED disposed on the first substrate P1 and the signal electrode and side wiring disposed on the second substrate P2.

[0173] According to an embodiment, signal electrodes and side wiring 280 may be disposed on at least one surface of LED module 10, and conductive pattern 600-10A may be disposed in the area of ​​wiring on LED module 10 where no signal electrodes are disposed.

[0174] Furthermore, conductive pattern 600-10A can be connected to a reference electrode disposed in LED module 10. Conductive pattern 600-10A can be intermittently disposed on the side surface of the first substrate P1. The intermittently disposed conductive patterns 600-10A and 600-10B can be connected to ground through one or more paths.

[0175] Figure 10B The conductive pattern 600-10B shown is formed intermittently on the side surface of the first substrate P1 on which the LED 300 is mounted, so that the conductive pattern 600-10B can be connected to ground through one or more paths.

[0176] Specifically, multiple reference electrodes can be disposed in the signal wiring layer. Each reference electrode can be connected to ground. Therefore, the intermittently arranged conductive pattern 600-10B can be connected to ground by connecting to multiple reference electrodes.

[0177] The wiring positions of the signal electrodes on the second substrate P2 can be considered to form a conductive pattern.

[0178] Figure 10A and Figure 10B The configuration described herein is merely an example of this disclosure. The configuration of the LED module and conductive pattern can vary, as long as the conductive pattern can eliminate ESD by being connected to ground.

[0179] Figure 11A This is a plan view of the LED module 10 according to an embodiment. Figure 11B This is a perspective view of the LED module 10 according to an embodiment.

[0180] Reference Figure 11A and Figure 11B It can provide such as Figure 10A and Figure 10B The side wiring 280 shown is configured to connect the upper signal wiring layer to the lower signal wiring layer. Furthermore, conductive patterns 600-11A and 600-11B can be configured to avoid the surface of the LED on which the side wiring 280 is formed.

[0181] However, it can be set continuously. Figure 11A and Figure 11B The conductive patterns 600-11A and 600-11B shown are consistent with... Figure 10A and Figure 10B Different. Figure 11A and Figure 11B Since conductive patterns 600-11A and 600-11B are formed on the surface of the integrated substrate other than the surface on which the side wiring 280 is formed, conductive patterns 600-11A and 600-11B can be continuously provided.

[0182] In this case, conductive patterns 600-11A and 600-11B can be connected to ground, and there are no restrictions on the form of conductive patterns 600-11A and 600-11B.

[0183] Specifically, according to an embodiment, the LED module 10 may include a rectangular glass substrate.

[0184] The glass substrate may include a first surface and a second surface, and may include a plurality of side surfaces surrounding the first surface and the second surface.

[0185] The first and second surfaces can be configured to face each other, and the side surfaces can be configured to surround the first and second surfaces.

[0186] Each of the first and second surfaces can correspond to a flat surface of the glass substrate.

[0187] According to an embodiment, the first surface may correspond to the upper surface of the glass substrate and the second surface may correspond to the lower surface of the glass substrate.

[0188] According to another embodiment, the first surface may correspond to the lower surface, and the second surface may correspond to the upper surface.

[0189] Furthermore, according to an embodiment, the LED module 10 may include a plurality of LEDs disposed on the upper surface of the glass substrate, a signal wiring layer electrically connected to the LEDs, and a drive signal wiring layer disposed on the lower surface of the glass substrate.

[0190] According to an embodiment, side wiring 280 may be formed on a first side surface of a glass substrate and a second side surface of the glass substrate opposite to the first side surface.

[0191] Side wiring 280 can electrically connect the signal wiring layer to the drive signal wiring layer. Conductive patterns 600-11A and 600-11B can be formed on the third and fourth side surfaces of the glass substrate, which are different from the first and second side surfaces of the glass substrate where the side wiring 280 is provided. The conductive patterns 600-11A and 600-11B are connected to ground to prevent electrostatic discharge from being applied to the LED. The third surface can be opposite to the fourth surface.

[0192] Specifically, the side wiring 280 can be arranged in two side surfaces (e.g., the first side surface and the second side surface) of the LED module 10, which is configured as a rectangular substrate, and the two side surfaces can face each other. The conductive patterns 600-11A and 600-11B can be arranged on other side surfaces of the LED module 10 where the side wiring 280 is not provided (e.g., the third side surface or the fourth side surface).

[0193] A reference electrode may be included in at least one of the signal routing layer and the drive signal routing layer. Furthermore, a conductive pattern layer may be configured to be electrically connected to the reference electrode.

[0194] Figures 9A to 11B The implementation of the conductive pattern described herein is merely an example. The conductive pattern according to this disclosure can have various other forms and implementations, as long as the conductive pattern can eliminate ESD by being connected to ground.

[0195] Figure 12 This is a cross-sectional view showing a conductive pattern connected to an external component according to an embodiment. Figure 13 This is a block diagram of a display device according to an embodiment.

[0196] Reference Figure 12 and Figure 13 The conductive pattern 600 may be formed on at least one surface of the second substrates P2-1 and P2-2. Furthermore, at least one surface of the second substrates P2-1 and P2-2 may include a conductive plate P4. The conductive pattern 600 can be connected to ground by connecting to the conductive plate P4.

[0197] Furthermore, ESD applied to the LED module 10 can be connected to the external component 700 via the conductive pattern 600. According to an embodiment, the external component 700 can be provided as a power supply disposed in the display device.

[0198] like Figure 13 As shown, the display device 1 may include multiple LED modules 10, conductive patterns 600, and external components 700. The external components 700 may include a power supply 710 and a signal processor 720. The power supply 710 may be configured as a power supply device for supplying power to drive the multiple LED modules 10, such as a switch-mode power supply (SMPS), and the signal processor 720 may be provided with multiple input signal ports for receiving external signals and a processor.

[0199] Therefore, according to the embodiment, the conductive pattern 600 may not be electrically connected to the components included in the LED module 10, but may be electrically connected to the ground of the external component 700.

[0200] The form of the external component 700 is not limited to this, as long as the external component 700 is connected to ground.

[0201] External component 700 can be connected to ground via conductive pattern 600 and reference electrode 250-2.

[0202] According to another embodiment, the external component 700 can be connected to ground via a signal wiring layer and a flexible printed circuit board.

[0203] Furthermore, since ESD is transmitted to the conductive plate P4 disposed on the rear surface of the glass substrate, damage to the LED and the signal electrodes disposed in the LED module 10 can be prevented.

[0204] The conductive plate P4 can be connected to ground in another substrate disposed in the display device 1. By using this structure, the conductive plate P4 can prevent ESD from being transmitted back to the first substrate P1 and the second substrates P2-1 and P2-2. Figure 12 The diagram shows a conductive plate P4 formed on the rear surface of the LED module 10, but it is not limited thereto. Therefore, the conductive plate P4 can be formed on any surface of the LED module 10.

[0205] That is, the conductive pattern 600 can be connected to ground via an external component 700 configured to ground the reference electrode 250-2.

[0206] According to the embodiments of the present disclosure described above, the display device and the LED module can prevent damage to the LED that may be caused by electrostatic discharge by implementing conductive patterns in the LED module.

[0207] This disclosure may be embodied in the form of a computer-readable recording medium storing processor (or computer) executable instructions. The instructions may be stored as program code and, when executed by a processor, may generate program modules to perform the operations of the embodiments. The computer-readable recording medium may be embodied in a computer-readable recording medium.

[0208] Non-transitory computer-readable recording media include all kinds of recording media in which instructions that a computer can decode are stored. For example, read-only memory (ROM), random access memory (RAM), magnetic tape, magnetic disk, flash memory, and optical data storage devices can be present.

[0209] Although several embodiments of the present disclosure have been shown and described, those skilled in the art will understand that changes may be made to these embodiments without departing from the principles and spirit of the present disclosure, the scope of which is defined in the claims and their equivalents.

Claims

1. A light-emitting diode (LED) module, comprising: Integrated substrate, including: Multiple LEDs; Glass substrate; and A signal wiring layer is disposed on the glass substrate, the signal wiring layer including: a plurality of signal electrodes configured to provide data signals to the plurality of LEDs, and a plurality of reference electrodes configured to ground the plurality of LEDs; and Conductive patterns are disposed on at least one side surface of the integrated substrate. The signal wiring layer further includes at least one via penetrating the glass substrate. The conductive pattern is connected to ground or to at least one of the plurality of reference electrodes through the at least one via, and is connected to ground through the at least one reference electrode.

2. The LED module according to claim 1, wherein, The integrated substrate further includes a first substrate, and The plurality of LEDs are disposed on the first substrate.

3. The LED module according to claim 1, wherein, The integrated substrate also includes a second substrate. The signal wiring layer further includes multiple scan lines and multiple data lines disposed on the second substrate.

4. The LED module according to claim 1, further comprising: A plate on the surface of the glass substrate, the plate being connected to the conductive pattern, and The conductive pattern is connected to ground via the plate.

5. The LED module according to claim 1, wherein, The conductive pattern is electrically isolated from the plurality of LEDs and the plurality of signal electrodes.

6. The LED module according to claim 1, wherein, The conductive pattern is connected to ground via an external component.

7. An LED module having at least one layer of stacked light-emitting diodes (LEDs), comprising: A glass substrate, comprising a pair of surfaces and a plurality of side surfaces surrounding the pair of surfaces; The upper layer is disposed on the glass substrate to fix a plurality of light-emitting diodes (LEDs) and includes an upper signal wiring layer, the upper signal wiring layer including: a plurality of signal electrodes configured to provide data signals to the plurality of LEDs, and a plurality of reference electrodes configured to ground the plurality of LEDs; The lower layer includes a lower signal wiring layer connected to the upper signal wiring layer, the lower signal wiring layer being disposed below the glass substrate; Side wiring is disposed on at least one first side surface of the LED module and configured to connect the upper signal wiring layer to the lower signal wiring layer; and A conductive pattern is disposed on at least one second side surface of the LED module, which is different from the at least one first side surface. The at least one second side surface includes the side surface of the glass substrate, the side surface of the upper layer, and the side surface of the lower layer. The conductive pattern is connected to ground or to at least one of the plurality of reference electrodes through at least one via penetrating the glass substrate, and is connected to ground through the at least one reference electrode.

8. The LED module according to claim 7, further comprising: At least one plate is disposed on the surface of the glass substrate and connected to the conductive pattern. The conductive pattern is connected to ground via at least one plate.

9. The LED module according to claim 7, wherein, The glass substrate includes a first surface surrounded by four side surfaces and a second surface opposite to the first surface. Wherein, at least one via is formed on the glass substrate, penetrating the first surface and the second surface.

10. The LED module according to claim 7, wherein, The conductive pattern is electrically isolated from the plurality of LEDs and the plurality of signal electrodes.

11. A light-emitting diode (LED) module, comprising: A glass substrate includes a pair of surfaces and four side surfaces between the pair of surfaces, and at least one through-hole through the glass substrate; Multiple light-emitting diodes (LEDs) are arranged on the upper surface of the glass substrate; The signal wiring layer is electrically connected to the plurality of LEDs; A drive signal wiring layer is disposed on the lower surface of the glass substrate; Side wiring is disposed on a first side surface and a second side surface of the glass substrate, the second side surface facing the first side surface, and the side wiring is configured to electrically connect the signal wiring layer to the drive signal wiring layer. Multiple reference electrodes are included in at least one of the signal wiring layer and the drive signal wiring layer; as well as A conductive pattern is disposed on a third side surface and a fourth side surface of the glass substrate, the third side surface and the fourth side surface being different from the first side surface and the second side surface, the third side surface and the fourth side surface facing each other, the conductive pattern being further disposed on the side surface of the signal wiring layer and the side surface of the drive signal wiring layer, and the conductive pattern being connected to ground or connected to at least one of the plurality of reference electrodes through the at least one via, and connected to ground through the at least one reference electrode.

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