Storage system and method of operating the same

Abstract

A storage system is provided. The storage system includes a storage device having a plurality of memory cells, and a storage controller configured to control the storage device to store write data in a first memory cell among the plurality of memory cells, identify a current charge amount of a first cell string including at least one of the first memory cell and a current charge amount of a second cell string adjacent to the first cell string, and store dummy data in at least one memory cell connected to the first cell string or the second cell string based on the current charge amount of the first cell string and the current charge amount of the second cell string.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2020-0066674, filed on June 2, 2020, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0003] The methods, apparatus, and systems according to the example embodiments relate to a storage system and a method of operating the same, and more specifically, to a storage system and a method of operating the same that additionally performs operations for storing dummy data after operations for storing data requiring security. Background Technology

[0004] With the implementation of the Fourth Industrial Revolution based on artificial intelligence (AI) and related innovative technologies, the types and throughput of data have grown rapidly. Therefore, the security of various types of data has become crucial, and interest in the security of high-capacity storage devices has increased. Regarding data storage, secure data (e.g., security keys) needs to be absolutely protected against hacking. Summary of the Invention

[0005] An example embodiment provides a storage system and a method of operation thereof, the storage system being used to additionally perform an operation for writing dummy data after a write operation of data requiring security, in order to enhance security.

[0006] According to one aspect of an example embodiment, a storage system includes a storage device and a storage controller. The storage device includes a plurality of storage cells. The storage controller is configured to control the storage device to perform the following operations: storing write data in a first storage cell among the plurality of storage cells; identifying the current charge of a first cell string including at least one of the first storage cells and the current charge of a second cell string adjacent to the first cell string; and storing dummy data in at least one storage cell connected to either the first cell string or the second cell string based on the current charge of the first cell string and the current charge of the second cell string.

[0007] According to one aspect of an example embodiment, a storage system includes a storage device and a storage controller, the storage device including a plurality of storage cells; and the storage controller is configured to control the storage device to perform the following operations: storing write data in a first storage cell among the plurality of storage cells, identifying a group of storage cells corresponding to the first storage cell, generating dummy data based on the charge amount of a second storage cell included in the identified group of storage cells, and storing the dummy data in the second storage cell.

[0008] According to one aspect of an example embodiment, an operation method of a storage system including a storage device includes: storing write data in a first storage cell of the storage device; identifying the current charge of a first cell string including at least one first storage cell in the first storage cell and the current charge of a second cell string adjacent to the first cell string; and storing dummy data in at least one storage cell connected to the first cell string or the second cell string based on the current charge of the first cell string and the current charge of the second cell string. Attached Figure Description

[0009] The above and other objects and features will become more apparent from the following description of exemplary embodiments with reference to the accompanying drawings, in which:

[0010] Figure 1 This is a block diagram of a storage system according to an example embodiment;

[0011] Figure 2 This is a block diagram of a storage controller according to an example embodiment;

[0012] Figure 3 This is a block diagram illustrating an example of a storage device according to an exemplary embodiment;

[0013] Figure 4 This is a circuit diagram of the memory blocks included in the memory cell array according to an example embodiment;

[0014] Figure 5 According to the example embodiment Figure 4 A perspective view of the storage blocks;

[0015] Figure 6A This is a diagram illustrating a method for measuring charge using X-rays according to an example embodiment, and Figure 6B This is a diagram showing an X-ray image according to an example embodiment;

[0016] Figure 7 This is a flowchart of an operation method of a storage system according to an example embodiment;

[0017] Figure 8 This is a flowchart illustrating operations for generating and writing dummy data according to an example embodiment;

[0018] Figure 9A This is a diagram illustrating the X-ray imaging operation of a storage block according to an example embodiment. Figure 9B This is a diagram showing an X-ray image after security data has been written, according to an example embodiment. Figure 9C This is a diagram showing an X-ray image after writing dummy data according to an example embodiment;

[0019] Figure 10A This is a diagram illustrating the X-ray imaging operation of a storage block according to an example embodiment. Figure 10B This is a diagram showing an X-ray image after security data has been written, according to an example embodiment. Figure 10C This is a diagram showing an X-ray image after writing dummy data according to an example embodiment;

[0020] Figure 11A This is a diagram illustrating the X-ray imaging operation of a storage block according to an example embodiment. Figure 11B This is a diagram showing an X-ray image after security data has been written, according to an example embodiment. Figure 11C This is a diagram showing an X-ray image after writing dummy data according to an example embodiment;

[0021] Figure 12 This is a flowchart illustrating operations for generating and writing dummy data according to an example embodiment;

[0022] Figure 13A This is a diagram illustrating the X-ray imaging operation of a storage block according to an example embodiment. Figure 13B This is a diagram showing an X-ray image after security data has been written, according to an example embodiment. Figure 13C This is a diagram showing an X-ray image after writing dummy data according to an example embodiment;

[0023] Figure 14A This is a diagram illustrating the X-ray imaging operation of a storage block according to an example embodiment, and Figure 14B This is a diagram showing an X-ray image after writing dummy data according to an example embodiment;

[0024] Figure 15 This is a flowchart of a method for operating a storage system according to an example embodiment;

[0025] Figure 16A This is a diagram illustrating a group of storage cells according to an example embodiment. Figure 16B This is a diagram illustrating a dummy data write operation on a group of storage cells according to an example embodiment, and Figure 16C This is a diagram illustrating a dummy data write operation on a group of storage cells according to an example embodiment;

[0026] Figure 17 A block diagram illustrating an SSD system according to an example embodiment is shown; and

[0027] Figure 18 This is a diagram illustrating the structure of a storage device 400 according to an example embodiment. Detailed Implementation

[0028] Figure 1 This is a block diagram illustrating a storage system 10 according to an example embodiment. (Refer to...) Figure 1 The storage system 10 may include a storage controller 100 and a storage device 200. In this example, the storage controller 100 and the storage device 200 may be implemented as separate chips.

[0029] Storage system 10 may include a storage medium for storing data. For example, storage system 10 may include one or more solid-state drives (SSDs). However, the example embodiment is not limited thereto, and storage system 10 may include any of a variety of types of devices, such as embedded multimedia card (eMMC), universal flash memory (UFS), compact flash memory (CF), secure digital (SD), micro secure digital (micro-SD), mini secure digital (mini-SD), extreme digital (xD), or memory stick.

[0030] When the storage system 10 includes an SSD, the storage device 200 may include a plurality of flash memory chips (e.g., NAND flash memory chips) that non-volatilely store data. Alternatively, the storage device 200 may correspond to a flash memory device, or the storage device 200 may include a memory card that includes one or more flash memory chips.

[0031] When the storage system 10 includes a flash memory device, the flash memory device may include a 2D NAND memory array or a 3D (or vertical) NAND (VNAND) memory array. The 3D memory array includes an array of memory cells arranged on a silicon substrate and having active regions or circuitry related to the operation of the memory cells. The 3D memory array is monolithically formed on the substrate or monolithically formed in at least one physical level of circuitry formed in the substrate. The term "monolithic" indicates that the layers constituting the 3D memory array are directly stacked on top of the layers of the lower level of the 3D memory array.

[0032] In an example embodiment, the 3D memory array includes vertical NAND strings arranged in a vertical direction, such that at least one memory cell is disposed on top of another memory cell. The at least one memory cell may include a charge trapping layer.

[0033] U.S. Patent Nos. 7,679,133, 8,553,466, 8,654,587, and 8,559,235, and U.S. Patent Application Publication No. 2011 / 0233648 (the entire contents of which are incorporated herein by reference) disclose appropriate configurations of 3D memory arrays in which multiple levels are provided and word lines and / or bit lines are shared between levels.

[0034] In another example, storage system 10 may include a variety of other types of memory. For example, storage system 10 may include non-volatile memory, and the non-volatile memory may be any of a variety of types of memory, such as magnetic RAM (MRAM), spin-torque MRAM, conductive bridged RAM (CBRAM), ferroelectric RAM (FeRAM), phase RAM (PRAM), resistive RAM, nanotube RAM, polymer RAM (PoRAM), nanofloating gate memory (NFGM), holographic memory, molecular electronic memory, or insulator resistance change memory.

[0035] Storage device 200 may include a memory cell array MCA, which may include multiple memory blocks BLK1 to BLKz, and memory block BLK1 may include multiple pages PG1 to PGk. Here, z and k may be positive integers and may vary depending on the example embodiment. In one example embodiment, a memory block may be an erase unit, and a page may be a write / read unit.

[0036] The memory cells of memory blocks BLK1 to BLKz can be connected to the cell strings, word lines, and bit lines that make up the memory cell array MCA. One or more bits can be written to each memory cell. For example, each memory cell can be a single-level cell (SLC), multi-level cell (MLC), three-level cell (TLC), or four-level cell (QLC). In the following text, for ease of explanation, it will be assumed that each memory cell is an SLC.

[0037] The storage controller 100 can perform control operations on the storage device 200. For example, the storage controller 100 can control the storage device 200 to write data DATA to the storage device 200 based on a write request from the host, or control the storage device 200 to read data DATA from the storage device 200 based on a read request from the host. For example, the storage controller 100 can control the storage device 200 to write data DATA by sending the command CMD, address ADDR, and data DATA to the storage device 200 via an input / output line. In another example, the storage controller 100 can control the storage device 200 to read data DATA by sending the command CMD and address ADDR to the storage device 200 via an input / output line.

[0038] Storage controller 100 may include a data writing module 110, which provides functionality related to data writing operations. Data writing module 110 can perform data writing operations with enhanced security. In an example embodiment, data writing module 110 can write data DATA to storage device 200, and additionally write dummy data DUMMY DATA for security purposes to storage device 200.

[0039] Here, DATA refers to data requiring security and can include various types of information, such as user data, user information, information about storage system 10, security key information, etc. DATA can be received from the host or generated during the operation of storage system 10. DUMMY DATA is not valid actual data, but rather data that exists only nominally. DUMMY DATA can be generated by data writing module 110. The enhanced security write operations of data writing module 110 will be described in detail below.

[0040] First, the data writing module 110 can write data DATA by dividing it into segments and distributing the segments of data DATA in a storage area of ​​the storage device 200. For example, the data writing module 110 can randomly divide the data DATA, randomly select some storage cells from a plurality of storage cells included in a storage area of ​​the storage device 200, and write the segmented data DATA into the selected storage cells.

[0041] Here, a storage area of ​​the storage device 200 may be a region configured to store secure data, but the example embodiment is not limited to this. For example, whenever a write operation with enhanced security is performed, the data writing module 110 can select one of multiple storage areas of the storage device 200. The unit of a storage area of ​​the storage device 200 may be a storage cell, page, block, plane, die, chip, etc. In addition, the data writing module 110 may store address information corresponding to the storage location of each segmented data DATA. The method by which the data writing module 110 writes by distributing data DATA is not limited to the example described above, and the data writing module 110 may write data DATA by distributing data DATA in various ways. As described above, the data writing module 110 may distribute data DATA in the storage device 200, thereby making it more difficult for unauthorized users to identify the data DATA.

[0042] Additionally, the data writing module 110 can write the dummy data DUMMY DATA to a storage cell that is adjacent to or not adjacent to the storage cell where the split data DATA is written. In one example embodiment, the data writing module 110 can write the split data DATA to a first storage cell and write the dummy data DUMMY DATA to at least one other storage cell included in the first cell string (i.e., a storage cell in the first cell string that has not been written with the split data DATA) and / or a storage cell included in a second cell string adjacent to the first cell string.

[0043] In one example embodiment, the data writing module 110 may randomly generate dummy data DUMMY DATA. However, the example embodiment is not limited to this, and the data writing module 110 may generate dummy data DUMMY DATA based on the amount of charge associated with the first storage cell of the data DATA being written.

[0044] Specifically, the data writing module 110 can calculate the charge of at least one first cell string, including each first cell in the first storage cell, and calculate the charge of a second cell string adjacent to the first cell string. The charge of the corresponding cell string can be calculated based on the value of the data written to the storage cells connected to the cell string.

[0045] For example, data "0" or "1" can be written to a storage cell used as an SLC, and the storage cell where data "1" is written can have a larger charge than the storage cell where data "0" is written. In another example, data "00", "01", "10", or "11" can be written to a storage cell used as an MLC, where the charge of the storage cell where data is written can increase in the order of data "00", "01", "10", and "11". Similarly, TLC or QLC storage cells can have different charges depending on the value of the data written into them. Therefore, the data writing module 110 can calculate the charge of the corresponding cell string by using the value of the data in the storage cells connected to each cell string.

[0046] Furthermore, based on the charge calculation results, the data writing module 110 can generate dummy data DUMMY DATA, which makes the ratio of the final charge of the first unit string to the final charge of the second unit string after writing the dummy data DUMMY DATA correspond to (substantially equal to) a preset ratio. For example, the preset ratio can be 1:1 or a similar ratio. However, the example embodiment is not limited to this, and various ratios can be applied.

[0047] For example, the data writing module 110 can generate dummy data DUMMY DATA such that, after writing the dummy data DUMMY DATA, the ratio of the final charge of the first unit string to the final charge of the second unit string is 1:1 (i.e., the final charge is the same). When writing the dummy data DUMMY DATA as described above, similar data (but data that is actually meaningless) exists around the distributed data DATA, so unauthorized users may have difficulty identifying the data DATA that has actual meaning. As described above, the data writing module 110 can additionally write the dummy data DUMMY DATA into a region adjacent to or not adjacent to the storage region of the data DATA that is written, thereby making it even more difficult for unauthorized users to identify the data DATA. (See below for further details.) Figure 7 and Figure 8 Provide a detailed description of the operation of the data writing module 110 in calculating the dummy data.

[0048] In the above example, the data writing module 110 calculates or writes dummy data based on a "string of cells" including the storage cells where data DATA is written, but the example embodiment is not limited to this. For example, in a modified example embodiment, the data writing module 110 may calculate or write dummy data based on a "word line" including the storage cells where data DATA is written. Specifically, the data writing module 110 may calculate the charge of a first word line including a first storage cell where data DATA is written, calculate the charge of a second word line adjacent to the first word line, and generate dummy data DUMMYDATA based on the calculation result. In addition, the data writing module 110 may write the dummy data DUMMYDATA to other storage cells included in the first word line (i.e., storage cells included in the first word line where data DATA is not written) and / or storage cells included in the second word line.

[0049] For example, in another modified example embodiment, the data writing module 110 can calculate or write dummy data based on "bit lines," including memory cells where data DATA is written. Specifically, the data writing module 110 can calculate the charge amount of a first bit line, including a first memory cell where data DATA is written, calculate the charge amount of a second bit line adjacent to the first bit line, and generate dummy data DUMMY DATA based on the calculation results. Additionally, the data writing module 110 can write the dummy data DUMMY DATA to other memory cells included in the first bit line (i.e., memory cells in the first bit line where data DATA is not written) and / or memory cells included in the second bit line.

[0050] The data writing module 110 can be implemented and disposed in the storage controller 100 in various forms. For example, the data writing module 110 can be implemented as a hardware hardware (HW), such as a circuit. Alternatively, the data writing module 110 can be implemented as a software software (SW) including a program, and when the processing unit executes the data writing module 110 loaded into the operational memory, it performs various processes related to the data writing operation. Alternatively, the data writing module 110 can be implemented as a combination of hardware hardware and software software. Furthermore, although... Figure 1 The example shows that the data writing module 110 is included in the storage controller 100, but the example embodiment is not limited thereto. For example, the data writing module 110 may be located outside the storage controller 100 within the storage system 10.

[0051] Storage system 10 can segment data DATA that requires security and write the segmented data DATA into distributed storage units, thereby enhancing security. Furthermore, storage system 10 can further improve security by writing dummy data DUMMY DATA into storage units that are adjacent to or not adjacent to the storage unit where the segmented data DATA is written.

[0052] In the following text, for ease of explanation, the data requiring security will be referred to as secure data, and the storage unit for writing secure data will be referred to as the first storage unit.

[0053] Figure 2 This is a block diagram illustrating a storage controller 100 according to an example embodiment. Specifically, Figure 2 It shows Figure 1 Block diagram of the storage controller 100.

[0054] Reference Figure 1 and Figure 2 The storage controller 100 may include a processor 120, a memory 130, a host interface 140, a memory interface 150, and a bus 160. Additionally, the memory 130 may include a data writing module 110. The data writing module 110 may correspond to... Figure 1 Data writing module 110.

[0055] Processor 120 may include a central processing unit (CPU) or a microprocessor, and can control the overall operation of memory controller 100 by executing instructions stored in memory 130. Although Figure 2 A processor 120 is shown, but according to the example embodiment, the storage controller 100 may include multiple processors 120.

[0056] The memory 130 can operate under the control of the processor 120 and can be used as operational memory, buffer memory, high-speed cache memory, etc. The memory 130 can be implemented using volatile memory such as DRAM or SRAM, or using non-volatile memory such as PRAM or flash memory. Furthermore, multiple memories 130 can be provided.

[0057] The data writing module 110 can be implemented as firmware or software and can be loaded into the memory 130. Although Figure 2 The example shows the data writing module 110 being loaded into the memory 130, but the example embodiment is not limited thereto. For example, the data writing module 110 may be loaded into the memory 130 outside the memory controller 100, or it may be provided as a separate hardware component inside or outside the memory controller 100.

[0058] Host interface 140 can communicate with the host (HOST) via various interfaces. In an example embodiment, host interface 112 can communicate with the host via various interfaces, including Universal Serial Bus (USB), Multimedia Card (MMC), PCI Express (PCI-E), AT Accessory (ATA), Serial AT Accessory (SATA), Parallel AT Accessory (PATA), Small Cell System Interface (SCSI), Serial Attached SCSI (SAS), Enhanced Small Disk Interface (ESDI), and Integrated Drive Electronics (IDE). Additionally, the Non-Volatile Memory Express (NVMe) standard has been proposed as an interface optimized for storage systems such as SSDs, and the NVMe interface can be applied to host interface 140. According to the example embodiment, host interface 140 can receive write requests and data requiring security from the host (HOST).

[0059] The memory interface 150 can provide a channel between the memory controller 100 and the storage device 200. For example, commands CMD, addresses ADDR, and data DATA can be sent and received between the memory controller 100 and the storage device 200 via the memory interface 150.

[0060] Communication between the storage controller 100, processor 120, memory 130, host interface 140, and memory interface can be performed via bus 160.

[0061] Figure 3 This is a block diagram illustrating an example implementation of a storage device 200 according to an example embodiment. Specifically, Figure 3 It shows Figure 1 Block diagram of storage device 200.

[0062] Reference Figure 3 The storage device 200 may include a memory cell array 210, a voltage generator 220, a control logic device 230, a row decoder 240, and a page buffer 250. Although in Figure 3 Although not shown, storage device 200 may also include various other components related to storage operations, such as data input / output circuitry, input / output interfaces, or buses.

[0063] The storage cell array 210 includes multiple storage blocks BLK1 to BLKz, and the storage cells of storage blocks BLK1 to BLKz can be connected to the word line WL, the serial select line SSL, the ground select line GSL, and the bit line BL. The storage cell array 210 can be connected to the row decoder 240 via the word line WL, the serial select line SSL, and the ground select line GSL, and can be connected to the page buffer 250 via the bit line BL.

[0064] The control logic device 230 can output various internal control signals for writing data to or reading data from the memory cell array 210 based on the command CMD, address ADDR, and control signal CTRL received from the memory controller 100. For example, the control logic device 230 can provide the row address X-ADDR and column address Y-ADDR corresponding to the storage location of the data DATA to the row decoder 240 and the page buffer 250, respectively, and provide the control voltage CTRL_vol to the voltage generator 220.

[0065] Figure 4 This is a circuit diagram illustrating the memory blocks included in a memory cell array 210 according to an example embodiment. Specifically, Figure 4 It shows Figure 3 The circuit diagram of the storage block BLK1 included in the storage cell array 210.

[0066] Reference Figure 3 and Figure 4 The storage cell array 210 can be a vertical NAND flash memory storage cell array and can include multiple storage blocks. Each storage block BLK1 can include multiple NAND cell strings NS11 to NS33, multiple word lines WL1 to WL8, multiple bit lines BL1 to BL3, multiple ground select lines GSL1 to GSL3, multiple cell string select lines SSL1 to SSL3, and a common source line CSL. Here, according to the example embodiment, the number of NAND cell strings, the number of word lines, the number of bit lines, the number of ground select lines, and the number of cell string select lines can vary.

[0067] NAND cell strings NS11, NS21, and NS31 are positioned between the first bit line BL1 and the common source line CSL; NAND cell strings NS12, NS22, and NS32 are positioned between the second bit line BL2 and the common source line CSL; and NAND cell strings NS13, NS23, and NS33 are positioned between the third bit line BL3 and the common source line CSL. Each NAND cell string (e.g., NS11) may include a series-coupled string selection transistor SST, multiple memory cells MC1 to MC8, and a ground selection transistor GST.

[0068] NAND cell strings that are commonly coupled to a bit line form a column. For example, NAND cell strings NS11, NS21, and NS31 that are commonly coupled to the first bit line BL1 can correspond to the first column, NAND cell strings NS12, NS22, and NS32 that are commonly coupled to the second bit line BL2 can correspond to the second column, and NAND cell strings NS13, NS23, and NS33 that are commonly coupled to the third bit line BL3 can correspond to the third column.

[0069] NAND cell strings coupled to a cell string select line constitute a row. For example, NAND cell strings NS11, NS12, and NS13 coupled to the first cell string select line SSL1 can correspond to the first row, NAND cell strings NS21, NS22, and NS23 coupled to the second cell string select line SSL2 can correspond to the second row, and NAND cell strings NS31, NS32, and NS33 coupled to the third cell string select line SSL3 can correspond to the third row.

[0070] The cell string select transistor SST is coupled to the corresponding string select lines SSL1 to SSL3. Memory cells MC1 to MC8 are coupled to the corresponding word lines WL1 to WL8. The ground select transistor GST is coupled to the corresponding ground select lines GSL1 to GSL3. The cell string select transistor SST is coupled to the corresponding bit lines BL1 to BL3, and the ground select transistor GST is coupled to the common source line CSL.

[0071] Word lines of the same height (e.g., WL1) are commonly coupled to each other, cell string select lines SSL1 to SSL3 are separated from each other, and ground select lines GSL1 to GSL3 are also separated from each other. For example, when programming memory cells coupled to the first word line WL1 and belonging to NAND cell strings NS11, NS12, and NS13, the first word line WL1 and the first cell string select line SSL1 are selected. Ground select lines GSL1 to GSL3 may be commonly coupled to each other.

[0072] According to the example embodiment Figure 1 The storage system 10 can store data DATA and dummy data DUMMY DATA in adjacent or non-adjacent areas within the storage cell array 210. For example, secure data can be stored in the eighth storage cell MC8 of the eighth word line WL8 of the NAND cell string NS13 connected to the storage block BLK1, and dummy data can be stored in the eighth storage cell MC8 of the eighth word line WL8 of the NAND cell string NS23 adjacent to the NAND cell string NS13.

[0073] Figure 5 yes Figure 4 A perspective view of the storage block.

[0074] Reference Figure 4 and Figure 5 The memory blocks included in the memory cell array 210 are formed in a direction perpendicular to the substrate SUB. Although Figure 5 The diagram shows that the memory block includes two select lines GSL and SSL, eight word lines WL1 to WL8, and three bit lines BL1 to BL3, but the actual number may be less or greater than the above.

[0075] A substrate SUB has a first conductivity type (e.g., p-type) and a common source line CSL extending in a first direction (e.g., the Y direction) and doped with impurities of a second conductivity type (e.g., n-type) is disposed in the substrate SUB. A plurality of insulating films IL extending along the first direction are sequentially disposed in a third direction (e.g., the Z direction) in the region between two adjacent common source lines CSL of the substrate SUB, and the insulating films IL are spaced apart from each other in the third direction. For example, the insulating films IL may comprise an insulating material such as silicon oxide.

[0076] A plurality of pillars P, arranged sequentially along a first direction and penetrating an insulating film IL along a third direction, are disposed on a substrate SUB in the region between two adjacent common source lines CSL. For example, the pillars P will contact the substrate SUB by penetrating the insulating film IL. Specifically, the surface layer S of each pillar P may include a silicon-based material doped with impurities of a first conductivity type and serve as a channel region. On the other hand, the inner layer I of each pillar P may include an insulating material such as silicon oxide or an air gap.

[0077] A charge storage layer CS is disposed in the region between two adjacent common source lines CSL along the exposed surfaces of the insulating film IL, pillar P, and substrate SUB. The charge storage layer CS may include a gate insulating layer (also called a "tunnel insulating layer"), a charge trapping layer, and a barrier insulating layer. For example, the charge storage layer CS may have an oxide-nitride-oxide (ONO) structure. Additionally, gate electrodes GE, such as those for selected gate lines GSL and SSL, and word lines WL1 to WL8, are disposed on the exposed surfaces of the charge storage layer CS in the region between the two adjacent common source lines CSL.

[0078] The drain or drain contact DR is disposed on the post P. For example, the drain or drain contact DR may comprise a silicon-based material doped with impurities of a second conductivity type. Bit lines BL1 to BL3 extending in a second direction (e.g., the X direction) and spaced apart from each other in the first direction are disposed on the drain.

[0079] Figure 6A This is a diagram illustrating a method for measuring charge using X-rays according to an example embodiment, and Figure 6B This is a diagram illustrating an X-ray image according to an example embodiment. Figure 6A and Figure 6B For ease of understanding, a method for measuring charge quantity will be described using X-rays and X-ray images of a memory block BLK1 with respect to a two-dimensional semiconductor (or planar semiconductor). It is also assumed that the memory cells connected to the memory block BLK1 are SLCs.

[0080] Reference Figure 6A The memory block BLK1 may include word lines WL1 to WLn extending in a first direction (e.g., the Y direction) and bit lines BL1 to BLm extending in a second direction (e.g., the X direction). Furthermore, memory cells MC1 to MCn-1 may be connected to the points where word lines WL1 to WLn intersect with bit lines BL1 to BLm, respectively.

[0081] Each storage cell MC1 to MCn-1 on each bit line included in storage block BLK1 can have a charge amount corresponding to the value of the data stored therein. Furthermore, the charge amount of the imaging target can be measured using X-ray imaging. Therefore, when performing X-ray imaging on storage block BLK1 in a third direction (e.g., the Z direction), the corresponding charge amounts of storage cells MC1 to MCn-1 can be measured. In the following text, for ease of explanation, it is assumed that the charge amount of a storage cell with data "1" is 2, and the charge amount of a storage cell with data "0" is 1. However, this assumption is merely an example to aid understanding and does not imply that there are multiple relationships between the charge amounts of storage cells with data "1" and those with data "0".

[0082] Reference Figure 6A The (n-1)th storage cell MCn-1 connected to the second bit line BL2 of storage block BLK1 can be a storage cell for writing data "1", and the nth storage cell MCn connected to the second bit line BL2 of storage block BLK1 can be a storage cell for writing data "0". Therefore, referring to... Figure 6B When viewed from a third-party perspective, the charge value of the (n-1)th storage cell MCn-1 can be 2, and the charge value of the nth storage cell MCn can be 1. Furthermore, X-ray imaging can be performed on both storage cells MCn-1 and MCn from a third-party perspective.

[0083] As the charge of the imaging target increases, the X-ray image darkens. Therefore, referring to... Figure 6B The X-ray image of the (n-1)th memory cell MCn-1 of the second bit line BL2, taken from the third-side upward direction, can have a darker color than the X-ray image of the nth memory cell MCn of the second bit line BL2, taken from the third-side upward direction. In this way, by using the X-ray image, the charge amount of each memory cell can be measured, and the data value corresponding to the measured charge amount can be inferred.

[0084] although Figure 6A and Figure 6B A method for measuring the charge of a two-dimensional semiconductor memory block using X-rays is shown, but the charge of a three-dimensional semiconductor memory block can also be measured using X-ray imaging.

[0085] Specifically, Figure 5 The memory block BLK1 may include multiple cell strings extending in a third direction (e.g., the Z direction). Furthermore, when X-ray imaging is performed on memory cells arranged in a row, the X-ray image can represent an image of the accumulated charge of the memory cells. Therefore, when X-ray imaging is performed in a third direction (e.g., the Z direction), the X-ray image can represent an image of the accumulated charge of the memory cells. Figure 5 When X-ray imaging is performed on the memory block BLK1, the X-ray image can represent an image of the cumulative charge amount of the memory cells connected to each cell string. Therefore, when X-ray imaging is performed on a three-dimensional semiconductor memory block, the charge amount of each cell string can be measured.

[0086] As described above, the charge of a memory cell in a two-dimensional semiconductor or the charge of a cell string in a three-dimensional semiconductor can be measured using X-ray images. Since the charge and data value are correlated, the data value of the memory cell can be inferred using X-ray images.

[0087] To prevent the data values ​​of storage units from being inferred using X-ray images Figure 1 The data writing module 110 can distribute and store data requiring security (secure data) into the first storage unit, and write dummy data into storage units that are adjacent to or not adjacent to the first storage unit where secure data is written. Specifically, Figure 1 The data writing module 110 can generate dummy data that makes the charge amounts of the cell strings of the semiconductor memory the same as each other, and write the generated dummy data to adjacent or non-adjacent memory cells, so that the X-ray images of the cell strings are the same as each other and prevent the data values ​​from being inferred from the X-ray images.

[0088] Figure 7 This is a flowchart of a method for operating a storage system according to an example embodiment. Specifically, Figure 7 It is an operation Figure 1 A flowchart of a method for constructing a storage system 10. Figure 7 At least some of the operations in the method shown can be performed by the storage controller 100 of the storage system 10.

[0089] Reference Figure 1 and Figure 7 The storage system 10 can write data (e.g., secure data requiring security) into a first storage cell of the storage device 200 (operation S110). Specifically, the storage system 10 can segment the secure data requiring security and distribute the segmented secure data in a storage area of ​​the storage device 200. For example, the data writing module 110 can randomly segment the secure data, randomly select a first storage cell from a plurality of storage cells included in a storage area of ​​the storage device 200, and write the segmented secure data into the selected first storage cell.

[0090] Additionally, the storage system 10 can calculate the charge of at least one first cell string, including each of the first storage cells in the first storage cells, and the charge of a second cell string adjacent to the first cell string. The charge of the corresponding cell string can be calculated based on the value of the data written to the storage cells connected to the cell string.

[0091] Furthermore, the storage system 10 can write dummy data to at least one storage cell connected to the first or second cell string based on the calculation results (operation S130). Specifically, based on the calculation results, the storage system 10 can generate dummy data such that the ratio of the final charge of the first cell string to the final charge of the second cell string after writing the dummy data corresponds to a preset ratio. For example, the preset ratio may be 1:1 or a similar ratio, but the example embodiment is not limited thereto. Furthermore, the storage system 10 can write the generated dummy data to at least one storage cell connected to the first or second cell string. (See below...) Figure 8 The following will describe a specific example embodiment with a preset ratio of 1:1.

[0092] Figure 8 This is a flowchart illustrating operations for generating and writing dummy data according to an example embodiment. Specifically, Figure 8 It shows Figure 7 A detailed diagram illustrating the operation of S130. Figure 8 An example embodiment is shown for generating dummy data such that the preset ratio between the final charge of the first unit string and the final charge of the second unit string is 1:1.

[0093] Reference Figure 1 , Figure 7 and Figure 8 The storage system 10 can determine a first charge based on the current charge of a first cell string and the current charge of a second cell string, which is the basis for generating dummy data (operation S210). Specifically, after writing security data to the first storage cell, the storage system 10 can determine the first charge based on the charge of the first cell string and the current charge of the second cell string. In one example embodiment, the first charge can be determined based on the larger of the current charge of the first cell string and the current charge of the second cell string. When dummy data is written, the charge of the cell string is maintained (e.g., when the dummy data is "0") or increased, so the first charge can be determined to be a value equal to or greater than the maximum charge. For example, when the current charge of the first cell string is 4 and the current charge of the second cell string is 2, the storage system 10 can determine a value equal to or greater than 4 as the first charge.

[0094] Next, the storage system 10 can generate first dummy data that makes the final charge of the first cell string correspond to (substantially equal to) the first charge (operation S220). Specifically, the storage system 10 can calculate the difference between the current charge of the first cell string and the first charge, and can generate first dummy data corresponding to the calculated difference.

[0095] For example, when the current charge value of the first unit string is 10 and the first charge value is determined to be 12, the storage system 10 can generate first dummy data that increases the charge value of the first unit string by 2. In another example, when the current charge value of the first unit string is 8 and the first charge value is also determined to be 8, it is not necessary to write dummy data to the first unit string, so the storage system 10 can omit the operation of generating the first dummy data.

[0096] Next, the storage system 10 can generate second dummy data that makes the final charge of the second unit string correspond to (substantially equal to) the first charge (operation S230). Specifically, the storage system 10 can calculate the difference between the current charge of the second unit string and the first charge, and can generate second dummy data corresponding to the calculated difference. For example, when the current charge of the second unit string is 8 and the value of the first charge is determined to be 10, the storage system 10 can generate second dummy data that increases the charge of the second unit string by 2.

[0097] Additionally, the storage system 10 can write the first dummy data into at least one of the second storage cells connected to the first cell string (operation S240). Specifically, the storage system 10 can write the first dummy data into the remaining second storage cells connected to all the storage cells in the first cell string, excluding the first storage cell where secure data is written.

[0098] Additionally, the storage system 10 can write the second dummy data to at least one third storage cell connected to the second cell string (operation S250). Specifically, the storage system 10 can write the second dummy data to at least one third storage cell among all the storage cells connected to the second cell string. The at least one third storage cell can correspond to a storage cell connected to the second cell string other than the first storage cell where secure data is written. Operations S240 and S250 can be omitted when it is determined in operations S220 and S230 that it is not necessary to write the dummy data.

[0099] Figure 8 The order of operations in the flowchart is only an example, and the order of operations S220 and S230 and the order of operations S240 and S250 can be changed.

[0100] Figure 9A This is a diagram illustrating the X-ray imaging operation of a storage block according to an example embodiment. Figure 9B This is a diagram showing an X-ray image after security data has been written, according to an example embodiment. Figure 9C This is a diagram showing an X-ray image after dummy data has been written, according to an example embodiment.

[0101] Figure 9A The diagram shows cell strings NS11 and NS21 connected to the first bit line BL1 and cell strings NS12 and NS22 connected to the second bit line BL2 in the memory cell array of memory block BLK1. (Refer to...) Figure 9A , Figure 1 The storage system 10 can segment the security data requiring security and store the segmented security data in storage cells MC13, MC15, and MC18 connected to cell string NS12. Next, the storage system 10 can determine to write dummy data to cell string NS22, which is adjacent to cell string NS12 and connected to the second bit line BL2 together with cell string NS12. For ease of description, it is assumed below that each segmented security data has the data "1".

[0102] Reference Figure 9B We can observe the charge amounts of each of the memory cells MC11 to MC18 and memory cells MC21 to MC28 connected to cell strings NS12 and NS22, respectively, in the first direction (e.g., the Y direction) after the security data is written. Since the security data is written to memory cells MC13, MC15, and MC18 connected to cell string NS12, the charge value of each of memory cells MC13, MC15, and MC18 can be 2, corresponding to the data "1". Since the security data is not written to the remaining memory cells MC11, MC12, MC14, MC16, MC17, and MC21 to MC28, the charge value of each of memory cells MC11, MC12, MC14, MC16, MC17, and MC21 to MC28 can be 1.

[0103] Reference Figure 9B We can see the accumulated charge of each of the cell strings NS12 and NS22 observed in a third direction (e.g., the Z direction) after the secure data was written. In other words, we can see that the total charge of memory cells MC11 to MC18 connected to cell string NS12 is 11, and the total charge of memory cells MC21 to MC28 connected to cell string NS22 is 8. Additionally, refer to... Figure 9BWe can see X-ray images of cell strings NS12 and NS22 taken by a third party after the security data was written. Because the charge of cell string NS12 is greater than that of cell string NS22, the X-ray image of cell string NS12 can be darker than that of cell string NS22. Although... Figure 9B The X-ray image of cell string NS12 is shown to be black and the X-ray image of cell string NS22 is shown to be white, but this is only for the purpose of understanding, and the X-ray image can have a brightness corresponding to the magnitude of the charge.

[0104] When X-ray imaging is performed on unit strings NS12 and NS22, storage system 10 can generate dummy data to make the X-ray images identical or similar to each other, and store the generated dummy data in at least one storage unit connected to unit strings NS12 and NS22. Storage system 10 can identify the final charge amount of each of unit strings NS12 and NS22. The final charge amounts can be the same. The final charge amounts can correspond to the current charge amount stored in one of the unit strings. The final charge amount can be greater than the current charge amount stored in each of the unit strings. Dummy data can be generated based on the final charge amount. Specifically, storage system 10 can generate dummy data based on the charge amount of unit string NS12 (i.e., a value of 11) which has the larger charge amount among unit strings NS12 and NS22. In other words, storage system 10 can generate dummy data that makes the final charge amount of unit strings NS12 and NS22 equal to or greater than 11. For example, when the final charge amount is determined to be 11, storage system 10 can determine that the first dummy data to be written to unit string NS12 is unnecessary. Next, the storage system 10 can generate second dummy data to increase the current charge of the cell string NS22 by 3. Then, the storage system 10 can write the generated second dummy data to at least some storage cells MC21 to MC28 connected to the cell string NS22.

[0105] Reference Figure 9C We can see the charge amounts of each of the memory cells MC11 to MC18 and memory cells MC21 to MC28 connected to cell strings NS12 and NS22, respectively, observed in the first direction (e.g., the Y direction) after the dummy data is written. It can also be seen that the second dummy data is written to memory cells MC24, MC25, and MC27 connected to cell string NS22.

[0106] Additionally, refer to Figure 9CWe can see the accumulated charge of each of the cell strings NS12 and NS22 in a third direction (e.g., the Z direction) after writing the dummy data. In other words, we can see that the total charge of the memory cells MC11 to MC18 connected to the cell string NS12 and the total charge of the memory cells MC21 to MC28 connected to the cell string NS22 are both 11.

[0107] Additionally, refer to Figure 9C As can be seen, X-ray images of cell strings NS12 and NS22 were taken from a third-party perspective after the dummy data was written. Since cell strings NS12 and NS22 have the same charge, the X-ray images of cell strings NS12 and NS22 can have the same color.

[0108] although Figures 9A to 9C An example embodiment of storage system 10 is shown, which segments secure data and writes the segmented secure data to only one cell string NS12. However, the exemplary embodiment is not limited thereto. Storage system 10 can write the segmented secure data to two cell strings. The following will refer to... Figures 10A to 10C This describes an example embodiment of storage system 10 writing segmented secure data into two unit strings.

[0109] Figure 10A This is a diagram illustrating the X-ray imaging operation of a storage block according to an example embodiment. Figure 10B This is a diagram showing an X-ray image after security data has been written, according to an example embodiment. Figure 10C This is a diagram showing an X-ray image after dummy data has been written, according to an example embodiment.

[0110] Reference Figure 10A , Figure 1 The storage system 10 can segment the security data requiring security and store the segmented security data in storage cell MC18 connected to cell string NS12 and storage cells MC22 and MC24 connected to cell string NS22. Next, the storage system 10 can determine whether to write dummy data to cell string NS12 and cell string NS22.

[0111] Reference Figure 10BWe can observe the charge amounts of each of the memory cells MC11 to MC18 and MC21 to MC28 connected to cell strings NS12 and NS22, respectively, in the first direction (e.g., the Y direction) after the security data is written. Since security data is written to memory cell MC18 connected to cell string NS12 and memory cells MC22 and MC24 connected to cell string NS22, the charge value of each of memory cells MC18, MC22, and MC24 can be 2, corresponding to the data "1". Since security data is not written to the remaining memory cells MC11 to MC17, MC21, MC23, and MC25 to MC28, the charge value of each of memory cells MC11 to MC17, MC21, MC23, and MC25 to MC28 can be 1.

[0112] Reference Figure 10B We can see the accumulated charge of each of the cell strings NS12 and NS22 observed in a third direction (e.g., the Z direction) after the secure data was written. In other words, we can see that the total charge of memory cells MC11 to MC18 connected to cell string NS12 is 9, and the total charge of memory cells MC21 to MC28 connected to cell string NS22 is 10. Additionally, refer to... Figure 10B As can be seen, X-ray images of cell strings NS12 and NS22 were taken by a third party after the security data was written. Because the charge of cell string NS22 is greater than that of cell string NS12, the X-ray image of cell string NS22 can be darker than that of cell string NS12.

[0113] When X-ray imaging is performed on unit strings NS12 and NS22, storage system 10 can generate dummy data to make the X-ray images identical or similar to each other, and store the generated dummy data in at least one storage unit connected to unit strings NS12 and NS22. Storage system 10 can identify the final charge amount of each of unit strings NS12 and NS22. The final charge amounts can be the same. The final charge amount can correspond to the current charge amount stored in one of the unit strings. The final charge amount can be greater than the current charge amount stored in each of the unit strings. Dummy data can be generated based on the final charge amount. Specifically, storage system 10 can generate dummy data based on the charge amount of unit string NS22, which has the larger charge amount (i.e., a value of 10). In other words, storage system 10 can generate dummy data that makes the final charge amount of unit strings NS12 and NS22 equal to or greater than 10. For example, when the final charge is determined to be 11, the storage system 10 can generate first dummy data to increase the current charge of cell string NS12 by 2. Next, the storage system 10 can generate second dummy data to increase the current charge of cell string NS22 by 1. Then, the storage system 10 can write the generated first dummy data to at least some storage cells MC11 to MC18 connected to cell string NS12, and write the generated second dummy data to at least some storage cells MC21 to MC28 connected to cell string NS22.

[0114] Reference Figure 10C We can see the charge amounts of each of the memory cells MC11 to MC18 and memory cells MC21 to MC28 connected to cell strings NS12 and NS22, respectively, observed in the first direction (e.g., the Y direction) after the dummy data is written. It can be seen that the first dummy data is written to memory cells MC13 and MC17 connected to cell string NS12, and the second dummy data is written to memory cell MC27 connected to cell string NS22.

[0115] Additionally, refer to Figure 10C We can see the accumulated charge of each of the cell strings NS12 and NS22 in a third direction (e.g., the Z direction) after writing the dummy data. In other words, we can see that the total charge of the memory cells MC11 to MC18 connected to the cell string NS12 and the total charge of the memory cells MC21 to MC28 connected to the cell string NS22 are both 11.

[0116] Additionally, refer to Figure 10CAs can be seen, X-ray images of cell strings NS12 and NS22 were taken from a third-party perspective after the dummy data was written. Since cell strings NS12 and NS22 have the same charge, the X-ray images of cell strings NS12 and NS22 can have the same color.

[0117] On the other hand, despite Figures 10A to 10C An example embodiment is shown in which the storage system 10 writes secure data to cell strings NS12 and NS22 and writes dummy data only to cell strings NS12 and NS22 where secure data is written; however, the exemplary embodiment is not limited thereto. Specifically, even when secure data is written to cell strings NS12 and NS22, the storage system 10 may write dummy data to cell strings adjacent to cell strings NS12 and NS22 that do not store secure data.

[0118] In addition, the above has already been referred to Figures 9A to 10C A description is given of how the memory system 10 generates and writes dummy data by comparing the charge amounts of cell strings connected to the same bit line BL2 and adjacent to each other; however, the example embodiment is not limited thereto. The memory system 10 can also generate and write dummy data by comparing the charge amounts of cell strings connected to different bit lines and adjacent to each other. Reference will be made below. Figures 11A to 11C Provide a detailed description.

[0119] Figure 11A This is a diagram illustrating the X-ray imaging operation of a storage block according to an example embodiment. Figure 11B This is a diagram showing an X-ray image after security data has been written, according to an example embodiment. Figure 11C This is a diagram showing an X-ray image after dummy data has been written, according to an example embodiment.

[0120] Reference Figure 1 , Figure 1 The storage system 10 can segment the secure data that requires security and store the segmented secure data in storage cells MC15 and MC18 connected to cell string NS12. Next, the storage system 10 can determine to write dummy data to cell string NS22, which is adjacent to cell string NS12 but connected to a different bit line (i.e., the first bit line BL1).

[0121] Reference Figure 11BWe can observe the charge amounts of each of the memory cells MC11 to MC18 and memory cells MC31 to MC38, respectively, connected to cell strings NS11 and NS12, in the second direction (e.g., the X direction) after the security data is written. Since the security data is written to memory cells MC15 and MC18 connected to cell string NS12, the charge value of each of memory cells MC15 and MC18 can be 2, corresponding to the data "1". Since the security data is not written to the remaining memory cells MC11 to MC14, MC16, MC17 and MC31 to MC38, the charge value of each of memory cells MC11 to MC14, MC16, MC17 and MC31 to MC38 can be 1.

[0122] Reference Figure 11B We can see the accumulated charge of each of the cell strings NS11 and NS12 observed in a third direction (e.g., the Z direction) after the secure data was written. In other words, we can see that the total charge of memory cells MC31 to MC38 connected to cell string NS11 is 8, and the total charge of memory cells MC11 to MC18 connected to cell string NS12 is 10. Additionally, refer to... Figure 11B As can be seen, X-ray images of cell strings NS11 and NS12 were taken by a third party after the security data was written. Because the charge of cell string NS12 is greater than that of cell string NS11, the X-ray image of cell string NS12 can be darker than the X-ray image of cell string NS11.

[0123] When X-ray imaging is performed on cell strings NS11 and NS12, storage system 10 can generate dummy data to make the X-ray images identical or similar to each other, and store the generated dummy data in at least one storage cell connected to cell strings NS11 and NS12. Storage system 10 can identify the final charge amount of each of cell strings NS12 and NS12. The final charge amounts can be the same. The final charge amounts can correspond to the current charge amount stored in one of the cell strings. The final charge amount can be greater than the current charge amount stored in each of the cell strings. Dummy data can be generated based on the final charge amounts. Specifically, storage system 10 can generate dummy data that makes the final charge amount of cell strings NS11 and NS12 equal to or greater than 10. For example, when the final charge amount is determined to be 10, storage system 10 can determine that the first dummy data to be written to cell string NS12 is unnecessary. Next, storage system 10 can generate a second dummy data to increase the current charge amount of cell string NS11 by 2.

[0124] Reference Figure 11CWe can see the charge amounts of each of the memory cells MC11 to MC18 and memory cells MC31 to MC38 connected to cell strings NS11 and NS12 respectively, observed in the second direction (e.g., the X direction) after the dummy data is written. It can be seen that the second dummy data is written to memory cells MC33 and MC38 connected to cell string NS11.

[0125] Additionally, refer to Figure 11C We can see the accumulated charge of each of the cell strings NS11 and NS12 in a third direction (e.g., the Z direction) after the dummy data is written. In other words, we can see that the total charge of the memory cells MC31 to MC38 connected to cell string NS11 and the total charge of the memory cells MC21 to MC28 connected to cell string NS12 are both 10.

[0126] Additionally, refer to Figure 11C As can be seen, X-ray images of cell strings NS11 and NS12 were taken from a third-party perspective after the dummy data was written. Since cell strings NS11 and NS12 have the same charge, the X-ray images of cell strings NS11 and NS12 can have the same color.

[0127] The above reference Figures 9A to 11C An example embodiment is described, in which dummy data is written to a storage cell connected to a first cell string that is used to write secure data, or to a second cell string adjacent to the first cell string. However, the example embodiment is not limited thereto, and dummy data can also be written to a third cell string that is not adjacent to the first cell string in the manner described above.

[0128] Additionally, the above reference Figures 9A to 11C An example embodiment of calculating charge and writing dummy data based on a cell string is described, but the example embodiment is not limited thereto. Specifically, the charge can be calculated based on a word line (or bit line), dummy data can be generated based on the calculated charge, and the dummy data can be written to a first word line (or first bit line) or an adjacent second word line (or adjacent second bit line) for writing secure data. Since this example embodiment can be performed based on a cell string in substantially the same manner as the example embodiment, descriptions identical to those already given above will be omitted.

[0129] Figure 12 This is a flowchart illustrating operations for generating and writing dummy data according to an example embodiment. Specifically, Figure 12 It is used to describe Figure 7 A diagram illustrating a modified example embodiment of operations S120 and S130.

[0130] Reference Figure 1 , Figure 7 and Figure 12 The storage system 10 can calculate the current charge of a predetermined number of fourth storage cells, which include the first storage cells and are arranged sequentially, connected to the storage cells in the first cell string (operation S310). Specifically, the storage system 10 can identify the first cell string corresponding to the first storage cell that has been written with secure data, identify the predetermined number of fourth storage cells, which include the first storage cells and are arranged sequentially, connected to the storage cells in the first cell string, and calculate the current charge based on the data value written to the fourth storage cells.

[0131] Next, the storage system 10 can calculate the current charge of the fifth storage cell in the storage cells connected to the second cell string that is adjacent to the fourth storage cell in the first cell string (operation S320). Specifically, the storage system 10 can identify the second cell string adjacent to the first cell string, identify the fifth storage cells in the storage cells connected to the second cell string that are respectively adjacent to the fourth storage cell, and calculate the current charge based on the data value written to the fifth storage cell.

[0132] Next, the storage system 10 can generate dummy data that makes the final charge of the fourth storage cell and the final charge of the fifth storage cell have the same value (operation S330). Specifically, the storage system 10 can determine a first charge based on the current charge of the fourth storage cell and the current charge of the fifth storage cell, which is the basis for generating the dummy data. For example, the first charge can be determined by the storage system 10 and can be equal to or greater than the larger of the current charge of the fourth storage cell and the current charge of the fifth storage cell.

[0133] Next, the storage system 10 can generate dummy data such that the final charge of the fourth storage cell and the final charge of the fifth storage cell are both equal to the first charge. For example, the storage system 10 can calculate the difference between the first charge and the current charge of the fourth storage cell, and can generate first dummy data corresponding to the calculated difference. Next, the storage system 10 can calculate the difference between the first charge and the current charge of the fifth storage cell, and can generate second dummy data corresponding to the calculated difference.

[0134] Next, the storage system 10 can write the generated dummy data into at least some of the storage cells in the fourth and fifth storage cells (operation S340). Specifically, the storage system 10 can write the first dummy data into the remaining storage cells in the fourth storage cell other than the first storage cell, and write the second dummy data into the fifth storage cell. On the other hand, when the fifth storage cell includes another first storage cell for writing data that requires security, the storage system 10 can write the second dummy data into the remaining storage cells in the fifth storage cell other than the other first storage cells.

[0135] although Figure 12 The example illustrates that in operation S330, the storage system 10 generates dummy data such that the final charge of the fourth storage cell and the final charge of the fifth storage cell have the same value; however, the example embodiment is not limited thereto. For example, the storage system 10 may generate preset ratios such as 1:1 or other preset ratios different from 1:1, such as the final charge of the fourth storage cell and the final charge of the fifth storage cell.

[0136] Figure 13A This is a diagram illustrating the X-ray imaging operation of a storage block according to an example embodiment. Figure 13B This is a diagram showing an X-ray image after security data has been written, according to an example embodiment. Figure 13C This is a diagram illustrating an X-ray image after writing dummy data, according to an example embodiment. Specifically, Figures 13A to 13C It is used for detailed description Figure 12 A diagram illustrating the method of operating the storage system.

[0137] Figure 13A The diagram shows cell strings NS11 and NS21 connected to the first bit line BL1 and cell strings NS12 and NS22 connected to the second bit line BL2 in the memory cell array of memory block BLK1. (Refer to...) Figure 13A , Figure 1 The storage system 10 can segment secure data and store the segmented secure data in storage cells MC17 and MC18 connected to the cell string NS12.

[0138] Next, the storage system 10 can identify the cell string NS12 to which the storage cells MC17 and MC18, which have been written with secure data, are connected, and identify a predetermined number (e.g., three) of storage cells MC16, MC17, and MC18, including the storage cells MC17 and MC18, which have been written with secure data, among the storage cells connected to the cell string NS12. Next, the storage system 10 can identify the storage cells MC26, MC27, and MC28, which are adjacent to storage cells MC16, MC17, and MC18, respectively, among the storage cells connected to the cell string NS22 adjacent to the cell string NS12. Next, the storage system 10 can determine that dummy data will be written to at least some of the identified storage cells MC16, MC17, MC18, MC26, MC27, and MC28.

[0139] Reference Figure 13BWe can observe the charge amounts of each of the memory cells MC16 to MC18 and memory cells MC26 to MC28, respectively, connected to cell strings NS12 and NS22, in the first direction (e.g., the Y direction) after the security data is written. Since the security data is written to memory cells MC17 and MC18 connected to cell string NS12, the charge value of each of memory cells MC17 and MC18 can be 2, corresponding to the data "1". Since the security data is not written to the remaining memory cells MC16 and MC26 to MC28, the charge value of each of the remaining memory cells MC16 and MC26 to MC28 can be 1.

[0140] Reference Figure 13B We can see the accumulated charge of memory cells MC16 to MC18 of cell string NS12 and memory cells MC26 to MC28 of cell string NS22 in a third direction (e.g., the Z direction) after writing secure data. In other words, we can see that the total charge of memory cells MC16 to MC18 connected to cell string NS12 is 5, and the total charge of memory cells MC26 to MC28 connected to cell string NS22 is 3. Additionally, refer to... Figure 13B As can be seen, X-ray images of cell strings NS12 and NS22 were taken by a third party after the security data was written. Because the charge of cell string NS12 is greater than that of cell string NS22, the X-ray image of cell string NS12 can be darker than the X-ray image of cell string NS22.

[0141] When X-ray imaging is performed on cell strings NS12 and NS22, storage system 10 can generate dummy data to make the X-ray images identical or similar to each other, and store the generated dummy data in at least one storage cell connected to cell strings NS12 and NS22. Storage system 10 can identify the final charge amount of each of cell strings NS12 and NS22. The final charge amounts can be the same. The final charge amounts can correspond to the current charge amount stored in one of the cell strings. The final charge amount can be greater than the current charge amount stored in each of the cell strings. Dummy data can be generated based on the final charge amounts. Specifically, storage system 10 can generate dummy data that makes the final charge amount of cell strings NS12 and NS22 equal to or greater than 5. For example, when the final charge amount is determined to be 5, storage system 10 can determine that the first dummy data to be written to cell string NS12 is unnecessary. Next, storage system 10 can generate a second dummy data to increase the current charge amount of cell string NS22 by 2.

[0142] Reference Figure 13CWe can see the charge amounts of each of the memory cells MC16 to MC18 and memory cells MC26 to MC28 connected to cell strings NS12 and NS22, respectively, observed in the first direction (e.g., the Y direction) after the dummy data is written. It can be seen that the second dummy data is written to memory cells MC26 and MC27 connected to cell string NS22.

[0143] Reference Figure 13C We can see the accumulated charge of memory cells MC16 to MC18 of cell string NS12 and memory cells MC26 to MC28 of cell string NS22 in a third direction (e.g., the Z direction) after writing the dummy data. In other words, we can see that the total charge of memory cells MC16 to MC18 of cell string NS12 and the total charge of memory cells MC26 to MC28 of cell string NS22 are both 5.

[0144] Additionally, refer to Figure 13C As can be seen, X-ray images of cell strings NS12 and NS22 were taken from a third-party perspective after the dummy data was written. Since cell strings NS12 and NS22 have the same charge, the X-ray images of cell strings NS12 and NS22 can have the same color.

[0145] Figure 14A This is a diagram illustrating the X-ray imaging operation of a storage block according to an example embodiment, and Figure 14B This is a diagram illustrating an X-ray image after writing dummy data, according to an example embodiment. Specifically, Figure 14A and Figure 14B This is a diagram illustrating a dummy data write operation, which can be performed at... Figures 13A to 13C The operation of the storage system 10 shown is then performed additionally.

[0146] Even after writing dummy data to memory cells MC27 and MC28 of cell string NS22, storage system 10 can additionally write dummy data to the memory cells. (See reference...) Figure 14A The storage system 10 can determine to additionally write dummy data to a predetermined number of consecutive storage cells MC13 to MC15, in addition to a predetermined number of storage cells MC16 to MC18, which are connected to the cell string NS12.

[0147] Additionally, according to the example embodiment, the storage system 10 may determine to additionally write dummy data to a predetermined number of consecutive storage cells MC23 to MC25, in addition to a predetermined number of storage cells MC26 to MC28, which are connected to the cell string NS22.

[0148] Since data is not written to storage cells MC13 to MC15 and storage cells MC23 to MC25, the charge value of each of storage cells MC13 to MC15 and storage cells MC23 to MC25 can be 1. In other words, the charge value of storage cells MC13 to MC15 and storage cells MC23 to MC25 can be equal to... Figure 13B The charge amounts of storage cells MC26 to MC28 are the same. Therefore, the storage system 10 can... Figure 13C The second dummy data generated in the process is written to at least some of the storage units MC13 to MC15 and at least some of the storage units MC23 to MC25.

[0149] Reference Figure 14B We can see the charge amount of each of the memory cells MC13 to MC15 and MC23 to MC25, which are connected to cell strings NS12 and NS22, respectively, observed in the first direction (e.g., the Y direction) after the dummy data is written. It can be seen that the second dummy data is written to memory cells MC13 and MC14 connected to cell string NS12 and memory cells MC23 and MC24 connected to cell string NS22.

[0150] Reference Figure 14B We can see the accumulated charge of memory cells MC13 to MC15 of cell string NS12 and memory cells MC23 to MC25 of cell string NS22 in a third direction (e.g., the Z direction) after writing the dummy data. In other words, we can see that the total charge of memory cells MC13 to MC15 of cell string NS12 and the total charge of memory cells MC23 to MC25 of cell string NS22 are both 5.

[0151] Additionally, refer to Figure 14B As can be seen, X-ray images of cell strings NS12 and NS22 were taken from a third-party perspective after the dummy data was written. Since cell strings NS12 and NS22 have the same charge, the X-ray images of cell strings NS12 and NS22 can have the same color.

[0152] The storage system 10 described above can generate and write dummy data based on sequentially arranged storage cells (which are units smaller than a cell string). Therefore, compared to writing dummy data based on cell strings, unauthorized users may find it more difficult to distinguish between meaningful data and dummy data.

[0153] Additionally, the above reference Figures 13A to 14BAn example embodiment is described, which calculates the charge amount based on the memory cells included in a cell string and writes dummy data. However, the example embodiment is not limited thereto. Specifically, the charge amount can be calculated based on the memory cells included in a word line (or bit line), dummy data can be generated based on the calculated charge amount, and the dummy data can be written to memory cells connected to a first word line (or first bit line) or an adjacent second word line (or adjacent second bit line) for writing data requiring security. Since this example embodiment can be performed in substantially the same manner as the example embodiment based on the memory cells included in the cell string, descriptions identical to those already given above will be omitted.

[0154] Figure 15 This is a flowchart of a method for operating a storage system according to an example embodiment. Specifically, Figure 15 It is used to describe Figure 7 A diagram illustrating a modified example embodiment. (Construction) Figure 15 At least some of the operations in the method shown can be performed by the storage controller 100 of the storage system 10.

[0155] Reference Figure 1 and Figure 15 The storage system 10 can write data to a first storage cell of the storage device 200 (operation S410). Specifically, the storage system 10 can segment secure data requiring security and distribute the segmented secure data in a storage area of ​​the storage device 200. For example, the data writing module 110 can randomly segment the secure data, randomly select a first storage cell from a plurality of storage cells included in a storage area of ​​the storage device 200, and write the segmented secure data to the selected first storage cell.

[0156] Next, the storage system 10 can select a group of storage cells corresponding to each of the first storage cells (operation S420). Specifically, for each of the first storage cells, the storage system 10 can select a group of storage cells that includes the first storage cell and at least some of the storage cells located within a preset distance from the first storage cell. However, the example embodiment is not limited to this, and the storage system 10 can select the group of storage cells corresponding to the first storage cell in various ways. For example, the storage system 10 can be implemented to identify the group of storage cells corresponding to the first storage cell based on information about the groups of storage cells that respectively correspond to the storage cells. The group of storage cells corresponding to the first storage cell can be implemented to include not only adjacent storage cells but also non-adjacent storage cells.

[0157] Next, the storage system 10 can generate dummy data based on the charge amount of the second storage cells included in the selected storage cell group (operation S430). Specifically, the storage system 10 can calculate the charge amount of each second storage cell in the second storage cells included in the storage cell group, and generate dummy data based on the calculation result so that the final charge amounts of the multiple strings included in the storage cell group are the same. Here, the string can include at least one of the following: multiple word lines included in the storage cell group, multiple bit lines included in the storage cell group, and multiple cell strings included in the storage cell group.

[0158] In one example embodiment, the storage system 10 can generate dummy data that makes the final charge amounts of the cell strings included in the storage cell group the same. For example, when the storage system 10 includes four cell strings, the storage system 10 can calculate the corresponding current charge amounts of the four cell strings based on the corresponding data values ​​of the storage cells connected to the four cell strings, and generate dummy data that makes the final charge amounts of the four cell strings the same as each other.

[0159] In another example embodiment, the storage system 10 can generate dummy data that makes the final charge amounts of the word lines (or bit lines) included in the group of storage cells the same. For example, when the storage system 10 includes four word lines (or bit lines), the storage system 10 can calculate the current charge amounts of the four word lines (or bit lines) based on the individual data values ​​of the storage cells connected to the four word lines (or bit lines) and generate dummy data that makes the final charge amounts of the four word lines (or bit lines) the same as each other.

[0160] Next, the storage system 10 can write the generated dummy data into the second storage cell included in the storage cell group (operation S440). Specifically, the storage system 10 can write the generated dummy data into at least some of the remaining storage cells in the storage cell group other than the first storage cell.

[0161] Figure 16A This is a diagram illustrating a group of storage cells according to an example embodiment. Figure 16B This is a diagram illustrating a dummy data write operation on a group of storage cells according to an example embodiment, and Figure 16C This is a diagram illustrating a dummy data write operation on a group of storage cells according to an example embodiment. Specifically, Figures 16A to 16C It is used for detailed description Figure 15 A diagram illustrating the method of operating the storage system.

[0162] Figure 16AThe diagram shows cell strings NS11, NS21, and NS31 connected to the first bit line BL1, cell strings NS12, NS22, and NS32 connected to the second bit line BL2, and cell strings NS13, NS23, and NS33 connected to the third bit line BL3 in the memory cell array of memory block BLK1. (Refer to...) Figure 16A , Figure 1 The storage system 10 can segment secure data that requires security and write one of the segmented secure data segments into the storage cell MC5 connected to the cell string NS22 of the second bit line BL2.

[0163] Storage system 10 can select a group of storage cells corresponding to the storage cell MC5 for writing secure data. Specifically, storage system 10 can select a group of storage cells that includes at least some of the storage cells within a preset distance (e.g., the distance between adjacent storage cells) from the storage cell MC5 for writing secure data.

[0164] For example, refer to Figure 16A The storage system 10 can select a group of storage cells including storage cells MC4, MC5, and MC6 of the cell string NS21 of the first bit line BL1, storage cells MC4, MC5, and MC6 of each of the cell strings NS12, NS22, and NS32 of the second bit line BL2, and storage cells MC4, MC5, and MC6 of the cell string NS23 of the third bit line BL3. Next, the storage system 10 can determine to write dummy data to the selected group of storage cells.

[0165] Reference Figure 16B We can see the charge amount of each memory cell in the group of memory cells observed in the second direction (e.g., the X direction) after the secure data is written. Since only memory cell MC5 of cell string NS22 is written with secure data, the charge amount of memory cell MC5 can be 2, and the charge amount of each of the remaining memory cells can be 1.

[0166] Storage system 10 can generate dummy data such that the final charge values ​​of multiple strings (e.g., multiple cell strings NS12, NS21, NS22, NS23, and NS32) included in the storage cell group are the same. Since the current charge value of cell string NS22 in the storage cell group is 4 and the current charge value of each of cell strings NS12, NS21, NS23, and NS32 is 3, storage system 10 can generate dummy data such that the final charge value of each of cell strings NS12, NS21, NS23, and NS32 is equal to or greater than 4. For example, storage system 10 can determine the final charge value of each of cell strings NS12, NS21, NS23, and NS32. The final charge values ​​can be the same. The final charge value can correspond to the current charge value stored in one of cell strings NS12, NS21, NS23, and NS32. The final charge value can be greater than the current charge value stored in each of cell strings NS12, NS21, NS23, and NS32. Dummy data can be generated based on the final charge value. For example, refer to Figure 16B When the final charge of each of the cell strings NS12, NS21, NS23, and NS32 is determined to be 4, the storage system 10 can generate dummy data to increment the current charge of each of the cell strings NS12, NS21, NS23, and NS32 by 1. Furthermore, the storage system 10 can write the generated dummy data to at least one storage cell of each of the cell strings NS12, NS21, NS23, and NS32.

[0167] The example embodiments are not limited to the operations of the storage system 10 regarding the generation and writing of dummy data in the storage cell group, and the storage system 10 may generate and write dummy data in various ways. For example, the storage system 10 may generate dummy data that makes only some of the strings included in the storage cell group have the same amount of charge, and write the calculated dummy data to the storage cells connected to at least some of the strings.

[0168] For example, refer to Figure 16C The system can generate dummy data that gives only some of the cell strings NS21, NS22, NS22, NS23, and NS32 constituting the memory cell group the same charge. Since secure data is written to cell strings NS21 and NS22, the charge value of each of these cell strings is 4. On the other hand, since secure data is not written to cell strings NS23 and NS32, the charge value of each of these cell strings is 3. Therefore, the storage system 10 can generate dummy data that gives cell strings NS23 and NS32 a final charge value of 4. Next, the storage system 10 can write the generated dummy data to the memory cells of cell strings NS23 and NS32.

[0169] Although the above references the assumption that the storage unit is SLC. Figures 1 to 16C A description has been given, but the example embodiments are not limited thereto, and the storage cells can all be SLC, MLC, TLC, or QLC. When the storage cells are MLC, TLC, or QLC, only the values ​​of the data stored in the storage cells and information about the magnitude of the charge corresponding to these values ​​change, and the storage system can operate in the same manner as in the example embodiments described above. Therefore, descriptions identical to those already given will be omitted.

[0170] Figure 17 This is a block diagram illustrating an SSD system according to an example embodiment.

[0171] Reference Figure 17 The SSD system 1000 may include a host 1100 and an SSD 1200. The SSD 1200 can exchange signals (SIG) with the host 1100 via an interface and can receive power (PWR) via a power interface. The SSD 1200 may include an SSD controller 1210, an auxiliary power supply 1220, and multiple storage devices 1230, 1240, and 1250. The SSD controller 1210 can be connected to the storage devices 130, 1240, and 1250 via channels Ch1, Ch2, and Chn. Here, reference can be made to the above... Figures 1 to 16C The example embodiments described implement the SSD 1200.

[0172] In one example embodiment, the SSD controller 1210 can segment security data requiring security and write the segmented security data to a distributed storage cell of at least one of the storage devices 1230, 1240, and 1250. Additionally, the SSD controller 1210 can further write dummy data to storage cells that are adjacent to or not adjacent to the storage cell where the security data is written.

[0173] According to the above example embodiment, the SSD system 1000 can provide write functionality with enhanced security. Specifically, the SSD system 1000 can enhance security by partitioning and storing data requiring security, and can further enhance security by writing dummy data to adjacent or non-adjacent storage cells.

[0174] Reference Figure 18The memory device 400 may have a chip-to-chip (C2C) structure. A C2C structure can refer to a structure formed by fabricating an upper chip including cell regions (CELL) on a first wafer, fabricating a lower chip including peripheral circuit regions (PERI) on a second wafer different from the first wafer, and then bonding the upper and lower chips together. For example, the bonding method may include electrically connecting a bonding metal formed on the uppermost metal layer of the upper chip to a bonding metal formed on the uppermost metal layer of the lower chip. For example, when the bonding metal is formed of copper (Cu), the bonding method is a Cu-Cu bonding. However, the example embodiment is not limited to this, and the bonding metal may also be formed of aluminum or tungsten.

[0175] Each of the peripheral circuit region PERI and cell region CELL of the storage device 40 may include an external pad bonding region PA, a word line bonding region WLBA, and a bit line bonding region BLBA.

[0176] The Peripheral Circuit Area (PERI) may include a first substrate 410, an interlayer insulating layer 415, a plurality of circuit elements 420a, 420b, and 420c formed on the first substrate 410, first metal layers 430a, 430b, and 430c respectively connected to the plurality of circuit elements 420a, 420b, and 420c, and second metal layers 440a, 440b, and 440c formed on the first metal layers 430a, 430b, and 430c. In an example embodiment, the first metal layers 430a, 430b, and 430c may be formed of tungsten, which has relatively high resistance, and the second metal layers 440a, 440b, and 440c may be formed of copper, which has relatively low resistance.

[0177] Although first metal layers 430a, 430b, and 430c and second metal layers 440a, 440b, and 440c have been shown and described, the exemplary embodiments are not limited thereto, and one or more metal layers may further be formed on the second metal layers 440a, 440b, and 440c. At least a portion of the one or more metal layers formed on the second metal layers 440a, 440b, and 440c may be formed of aluminum or the like, which has a lower resistivity than copper, which forms the second metal layers 440a, 440b, and 440c.

[0178] An interlayer insulating layer 415 may be disposed on a first substrate 410 and cover a plurality of circuit elements 420a, 420b and 420c, first metal layers 430a, 430b and 430c and second metal layers 440a, 440b and 440c. The interlayer insulating layer 415 may comprise an insulating material such as silicon oxide or silicon nitride.

[0179] Lower bonding metals 471b and 472b can be formed on the second metal layer 440b in the word line bonding area (WLBA). In the WLBA, the lower bonding metals 471b and 472b in the peripheral circuit area (PERI) can be electrically connected to the upper bonding metals 371b and 372b via bonding, and the lower bonding metals 471b and 472b, as well as the upper bonding metals 371b and 372b, can be formed of aluminum, copper, tungsten, or the like. Furthermore, the upper bonding metals 371b and 372b in the cell area (CELL) can be referred to as first metal pads, and the lower bonding metals 471b and 472b in the peripheral circuit area (PERI) can be referred to as second metal pads.

[0180] A cell region (CELL) may include at least one memory block. The cell region (CELL) may include a second substrate 310 and a common source line 320. Multiple word lines 331 to 338 (i.e., 330) may be stacked on the second substrate 310 in a direction perpendicular to the upper surface of the second substrate 310 (Z-axis direction). At least one string select line and at least one ground select line may be arranged above and below the multiple word lines 330, respectively, and the multiple word lines 330 may be positioned between the at least one string select line and the at least one ground select line.

[0181] In the bit line bonding area BLBA, the channel structure CH can extend in a direction perpendicular to the upper surface of the second substrate 310 and pass through multiple word lines 330, at least one string select line, and at least one ground select line. The channel structure CH may include a data storage layer, a channel layer, a buried insulating layer, etc., and the channel layer may be electrically connected to the first metal layer 350c and the second metal layer 360c. For example, the first metal layer 350c may be a bit line contact, and the second metal layer 360c may be a bit line. In an example embodiment, the bit line 360c may extend in a first direction (Y-axis direction) parallel to the upper surface of the second substrate 310.

[0182] exist Figure 18 In the illustrated example embodiment, the area where the channel structure CH, bit line 360c, etc., are arranged can be defined as the bit line bonding area BLBA. In the bit line bonding area BLBA, bit line 360c can be electrically connected to circuit element 420c providing page buffer 393 in the peripheral circuit area PERI. For example, bit line 360c can be connected to upper bonding metals 371c and 372c in the cell area CELL, and upper bonding metals 371c and 372c can be connected to lower bonding metals 471c and 472c, which are connected to circuit element 420c of the page buffer 393.

[0183] In the Word Line Bonding Area (WLBA), multiple word lines 330 can extend in a second direction (X-axis direction) parallel to the upper surface of the second substrate 310 and can be connected to multiple cell contact plugs 341 to 347 (i.e., 340). The multiple word lines 330 and the multiple cell contact plugs 340 can be interconnected in pads provided by at least a portion of the multiple word lines 330 extending at different lengths in the second direction. A first metal layer 350b and a second metal layer 360b can be sequentially connected to the upper portion of the multiple cell contact plugs 340, wherein the multiple cell contact plugs 340 are connected to the multiple word lines 330. The multiple cell contact plugs 340 can be connected to the Peripheral Circuit Area (PERI) via upper bonding metals 371b and 372b of the cell area CELL in the WLBA and lower bonding metals 471b and 472b of the peripheral circuit area PERI.

[0184] Multiple unit contact plugs 340 may be electrically connected to circuit elements 420b providing a line decoder 394 in the peripheral circuitry region PERI. In an example embodiment, the operating voltage of circuit elements 420b providing the line decoder 394 may differ from the operating voltage of circuit elements 420c providing the page buffer 393. For example, the operating voltage of circuit elements 420c providing the page buffer 393 may be greater than the operating voltage of circuit elements 420b providing the line decoder 394.

[0185] A common source line contact plug 380 can be disposed in the external pad bonding region PA. The common source line contact plug 380 can be formed of a conductive material such as metal, metal compound, polysilicon, etc., and can be electrically connected to the common source line 320. A first metal layer 350a, a second metal layer 360a, and an upper bonding metal 371a can be sequentially stacked on the upper part of the common source line contact plug 380. For example, the region in which the common source line contact plug 380, the first metal layer 350a, and the second metal layer 360a are disposed can be defined as the external pad bonding region PA.

[0186] Input and output pads 405 and 305 can be set in the external pad bonding area PA. (See reference...) Figure 18A lower insulating film 401 covering the lower surface of the first substrate 410 can be formed below the first substrate 410, and a first input / output pad 405 can be formed on the lower insulating film 401. The first input / output pad 405 can be connected to at least one of a plurality of circuit elements 420a, 420b, and 420c disposed in the peripheral circuit region PERI via a first input / output contact plug 403, and can be separated from the first substrate 410 via the lower insulating film 401. In addition, a side insulating film can be disposed between the first input / output contact plug 403 and the first substrate 410 to electrically separate the first input / output contact plug 403 and the first substrate 410.

[0187] Reference Figure 18 An upper insulating film 301 covering the upper surface of the second substrate 310 can be formed on the second substrate 310, and a second input / output pad 305 can be disposed on the upper insulating film 301. The second input / output pad 305 can be connected to at least one of a plurality of circuit elements 420a, 420b and 420c disposed in the peripheral circuit region PERI via a second input / output contact plug 303.

[0188] According to the example embodiment, the second substrate 310 and the common source line 320 may not be located in the area where the second input / output contact plug 303 is disposed. Additionally, the second input / output pad 305 may not overlap with the word line 330 in the third direction (Z-axis direction). See also... Figure 18 The second input / output contact plug 303 can be separated from the second substrate 310 in a direction parallel to the upper surface of the second substrate 310, and can pass through the interlayer insulating layer 315 of the cell region to connect to the second input / output pad 305.

[0189] According to the example embodiment, the first input / output pad 405 and the second input / output pad 305 can be selectively formed. For example, the storage device 400 may include only the first input / output pad 405 disposed on the first substrate 410, or only the second input / output pad 305 disposed on the second substrate 310. Alternatively, the storage device 400 may include both the first input / output pad 405 and the second input / output pad 305.

[0190] In each of the external pad bonding area PA and bit line bonding area BLBA included in the cell region CELL and the peripheral circuit region PERI respectively, a metal pattern in the uppermost metal layer may be provided as a dummy pattern, or the uppermost metal layer may not exist.

[0191] In the external pad bonding region PA, the storage device 400 may include a lower metal pattern 473a in the uppermost metal layer of the peripheral circuit region PERI. This lower metal pattern 473a corresponds to the upper metal pattern 372a formed in the uppermost metal layer of the cell region CELL and has the same shape as the upper metal pattern 372a of the cell region CELL. In the peripheral circuit region PERI, the lower metal pattern 473a formed in the uppermost metal layer of the peripheral circuit region PERI may not be connected to a contact. Similarly, in the external pad bonding region PA, an upper metal pattern may be formed in the uppermost metal layer of the cell region CELL. This upper metal pattern corresponds to the lower metal pattern formed in the uppermost metal layer of the peripheral circuit region PERI and has the same shape as the lower metal pattern of the peripheral circuit region PERI. In the external pad bonding region PA, the lower bonding metals 471a and 472a of the peripheral circuit region PERI may be electrically connected to the upper bonding metal 473a.

[0192] Lower bonding metals 471b and 472b can be formed on the second metal layer 440b in the word line bonding region WLBA. In the word line bonding region WLBA, the lower bonding metals 471b and 472b of the peripheral circuit region PERI can be electrically connected to the upper bonding metals 371b and 372b of the cell region CELL via Cu-Cu bonding.

[0193] Furthermore, in the bit line bonding area (BLBA), an upper metal pattern 392 can be formed in the uppermost metal layer of the cell region (CELL). This upper metal pattern 392 corresponds to the lower metal pattern 452 formed in the uppermost metal layer of the peripheral circuit region (PERI) and has the same shape as the lower metal pattern 452 of the peripheral circuit region (PERI). Contacts may not be formed on the upper metal pattern 392 formed in the uppermost metal layer of the cell region (CELL). In the bit line bonding area (BLBA), the lower bonding metal 451 of the peripheral circuit region (PERI) can be electrically connected to the lower metal pattern 452.

[0194] In an example embodiment, a reinforcing metal pattern having the same shape as the metal pattern formed in the uppermost metal layer of the other of the cell region CELL and peripheral circuit region PERI may be formed in the uppermost metal layer of the other of the cell region CELL and peripheral circuit region PERI, and the contacts may not be formed on the reinforcing metal pattern.

[0195] According to the example embodiment, you can refer to Figures 1 to 16C The storage device 400 is implemented according to the above example embodiment. For example, the storage device 400 may store secure data in a first storage cell and store dummy data in a second storage cell adjacent to the first storage cell. The method for storing dummy data can be the same as described above. Figures 1 to 16C The methods of description are basically the same, so redundant descriptions will be omitted.

[0196] Although exemplary embodiments have been specifically shown and described, it will be understood that various changes in form and detail may be made therein without departing from the spirit and scope of the appended claims.

Claims

1. A storage system comprising: a storage device including a plurality of storage units; and a storage controller configured to control the storage device to: store write data in a first storage unit among the plurality of storage units, identify a current charge amount of a first string of cells including at least one first storage unit among the first storage units and a current charge amount of a second string of cells adjacent to the first string of cells, and based on the current charge amount of the first string of cells and the current charge amount of the second string of cells, store dummy data in at least one storage unit connected to the first string of cells or the second string of cells such that a final charge amount of the first string of cells and a final charge amount of the second string of cells are identical to each other after the dummy data is stored in the at least one storage unit. The storage controller is further configured to generate the dummy data such that a ratio of the final charge amount of the first string of cells to the final charge amount of the second string of cells corresponds to a preset ratio after the dummy data is stored in the at least one storage unit.

2. The storage system of claim 1, wherein, The preset ratio is 1:

1.

3. The storage system of claim 2, wherein, The storage controller is further configured to:

4. The storage system of claim 3, wherein, identify a first charge amount based on the current charge amount of the first string of cells and the current charge amount of the second string of cells, generate first dummy data such that the final charge amount of the first string of cells corresponds to the first charge amount, and generate second dummy data such that the final charge amount of the second string of cells corresponds to the first charge amount. The storage controller is further configured to identify the first charge amount based on a larger charge amount between the current charge amount of the first string of cells and the current charge amount of the second string of cells.

5. The storage system of claim 4, wherein, The storage controller is further configured to control the storage device to:

6. The storage system of claim 4, wherein, store the first dummy data in at least one second storage unit connected to the first string of cells, and store the second dummy data in at least one third storage unit connected to the second string of cells. The storage controller is further configured to:

7. The storage system of claim 1, wherein, identify a current charge amount of fourth storage units including at least two first storage units among the first storage units and arranged in sequence in the first string of cells, and identify a current charge amount of fifth storage units included in the second string of cells, the fifth storage units being adjacent to the fourth storage units in the first string of cells. The storage controller is further configured to generate the dummy data based on the current charge amount of the fourth storage units and the current charge amount of the fifth storage units such that a final charge amount of the fourth storage units corresponds to a final charge amount of the fifth storage units.

8. The storage system of claim 7, wherein, The storage controller is further configured to store the dummy data in at least some of the fourth storage units and the fifth storage units.

9. The storage system of claim 8, wherein, The first storage unit is disposed in a preset storage area of the storage device.

10. The storage system of claim 1, wherein, The storage controller is further configured to randomly select the first storage unit from the plurality of storage units.

11. The storage system of claim 1, wherein, 12.A storage system comprising: ​ A memory device including a plurality of memory cells; and A memory controller configured to control the memory device to perform the following operations: storing write data in a first memory cell among the plurality of memory cells, identifying a group of memory cells corresponding to the first memory cell; generating dummy data based on a charge amount of the first memory cell included in the identified group of memory cells and a charge amount of a second memory cell included in the identified group of memory cells, and storing the dummy data in the second memory cell such that final charge amounts of at least some of cell strings included in the group of memory cells are identical to each other after the dummy data is stored in the second memory cell. 13.An operating method of a memory system including a memory device, the operating method comprising: storing write data in a first memory cell of the memory device; identifying current charge amounts of a first cell string including at least one of the first memory cell and a second cell string adjacent to the first cell string; and based on the current charge amounts of the first cell string and the second cell string, storing dummy data in at least one memory cell connected to the first cell string or the second cell string such that final charge amounts of the first cell string and the second cell string are identical to each other after the dummy data is stored in the at least one memory cell. The storing of the dummy data includes:

14. The method of operation of claim 13, wherein, generating the dummy data such that a ratio of the final charge amount of the first cell string to the final charge amount of the second cell string corresponds to a preset ratio; and storing the dummy data in the at least one memory cell. The preset ratio is 1:

1.

15. The method of operation of claim 14, wherein, The generating of the dummy data includes:

16. The method of operation of claim 15, wherein, identifying a first charge amount based on the current charge amounts of the first cell string and the second cell string; generating first dummy data such that the final charge amount of the first cell string corresponds to the first charge amount; and generating second dummy data such that the final charge amount of the second cell string corresponds to the first charge amount. The storing of the dummy data in the at least one memory cell includes:

17. The method of operation of claim 16, wherein, storing the first dummy data in at least one second memory cell connected to the first cell string; and storing the second dummy data in at least one third memory cell connected to the second cell string. 18.The operating method of claim 13, further comprising: identifying current charge amounts of fourth memory cells including at least two of the first memory cells and arranged in sequence in the first cell string; and identifying a current charge amount of a fifth memory cell among memory cells included in the second cell string, the fifth memory cell being adjacent to the fourth memory cells. The dummy data is generated based on the current charge amounts of the fourth memory cells and the current charge amount of the fifth memory cell such that a final charge amount of the fourth memory cells corresponds to a final charge amount of the fifth memory cell, and ​ 19. The method of operation of claim 18, wherein, ​ The storing of the dummy data includes storing the dummy data in at least some of the fourth storage units and the fifth storage units.

20. The method of operation of claim 13, wherein, The storing of the write data includes storing the write data in first storage units randomly selected from among the storage units of the memory device.

Images