Method and apparatus for driving a transistor
By generating a reference voltage in the power conversion system and using a comparator and signal generator to drive the field-effect transistor, the problem of inaccurate timing of the drive signal in the synchronous rectifier circuit is solved, achieving efficient and reliable transistor drive and improving the overall performance of the system.
Patent Information
- Application Number
- CN202110619343.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-06-04
- Filing Date
- 2021-06-03
- Publication Date
- 2026-01-23
- Estimated Expiration
- 2041-06-03
AI Technical Summary
In power conversion systems, inaccurate timing of the drive signal in synchronous rectification circuits can lead to low efficiency or transistor failure, especially when the operating frequency of the load or complementary circuit changes, resulting in poor rectification drive efficiency of the field-effect transistors.
By generating a reference voltage, using a comparator and a signal generator to drive the field-effect transistor, and adjusting the reference voltage threshold according to the operating frequency of the complementary circuit, the field-effect transistor is ensured to turn on and off at the appropriate time. The precise timing of the drive signal is achieved using a digital method.
It improves the efficiency and reliability of synchronous rectification circuits, ensures the correct driving of field-effect transistors when the load changes or the frequency changes, avoids transistor damage, and improves the overall performance of power conversion system.
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Figure CN113765390B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present description relates to a drive transistor and corresponding apparatus and method. BACKGROUND
[0002] In various power conversion systems, such as AC / DC and DC / DC converters, a field effect transistor or FET (e.g. MOSFET transistor) driven by control logic can be used to replace a rectifier diode.
[0003] This technique, commonly known as synchronous rectification (SR), is found to improve converter efficiency. With SR, conduction losses are reduced because the (rectified) output current flows through the MOSFET channel instead of a rectifier diode, and power dissipation is correspondingly reduced.
[0004] Such power converters can continue to operate if the synchronous rectification FET is not driven. This is because rectification is still provided by the MOSFET’s internal diode.
[0005] Changes in the operating conditions of the complementary circuit can affect the timing and performance of the synchronous rectification circuit. When there are changes in the operating conditions of the complementary circuit, it can also result in inefficient or MOSFET failure. Changes in the operating frequency of the load or the complementary elements can change the response in the rectification circuit, which can result in inefficient rectification drive of the transistor. SUMMARY
[0006] According to one embodiment of the present invention, a drive circuit includes a reference voltage generator for generating a reference voltage, wherein the reference voltage is based on an operating frequency of a complementary circuit. The drive circuit further includes a comparator, the comparator including: a first input configured to receive a drain-source voltage of a first low-side field effect transistor; and a second input coupled to an output of the reference voltage generator to receive the reference voltage. The drive circuit further includes a signal generator coupled to an output of the comparator, the signal generator configured to: deliver a drive signal to a gate terminal of the first low-side field effect transistor to drive the first low-side field effect transistor to an on state after the drain-source voltage of the first low-side field effect transistor becomes less than the reference voltage, and to drive the first low-side field effect transistor to an off state after the drain-source voltage of the first low-side field effect transistor becomes greater than the reference voltage.
[0007] According to one embodiment of the invention, a rectifier circuit includes a first field effect transistor, a second field effect transistor, a third field effect transistor, and a fourth field effect transistor. The rectifier circuit also includes a first drive circuit. The first drive circuit is configured to drive the first field effect transistor and the second field effect transistor to an on state after a drain-source voltage of the second field effect transistor becomes less than a first reference voltage, and to drive the first field effect transistor and the second field effect transistor to an off state after the drain-source voltage of the second field effect transistor becomes greater than the first reference voltage. The rectifier circuit also includes a second drive circuit. The second drive circuit is configured to drive the third field effect transistor and the fourth field effect transistor to an on state after a drain-source voltage of the fourth field effect transistor becomes less than a second reference voltage, and to drive the third field effect transistor and the fourth field effect transistor to an off state after the drain-source voltage of the fourth field effect transistor becomes greater than the second reference voltage. The rectifier circuit also includes an output port configured to be coupled to a load. According to embodiments of the invention, the first reference voltage is determined by an operating frequency of a complementary circuit, and the second reference voltage is determined by the operating frequency of the complementary circuit, and the first field effect transistor, the second field effect transistor, the third field effect transistor, and the fourth field effect transistor are configured to cooperate to provide a rectified current to the output port.
[0008] According to one embodiment of the invention, a method for driving a field effect transistor includes monitoring an operating frequency of a complementary circuit, setting a reference voltage to a first value determined by the operating frequency of the complementary circuit, sensing that a drain-source voltage of the field effect transistor becomes less than the reference voltage, driving the field effect transistor on, sensing that the drain-source voltage of the field effect transistor becomes greater than the reference voltage, and driving the field effect transistor off. BRIEF DESCRIPTION OF DRAWINGS
[0009] One or more embodiments will now be described, by way of example only, with reference to the accompanying drawings in which:
[0010] Figure 1 includes two parts, Figure 1A and Figure 1B and represents a possible alternative to diode rectification with synchronous rectification, where the synchronous rectification uses a field effect transistor (FET) such as a MOSFET;
[0011] Figure 2 depicts an LCC resonant converter with a synchronous rectification circuit;
[0012] Figure 3 depicts a graph of a synchronous rectification drain-source voltage of a field effect transistor and a drive signal for the field effect transistor;
[0013] Figure 4The diagram illustrates the misalignment caused by load variations at the output of the synchronous rectifier circuit.
[0014] Figure 5 The diagram illustrates a driving circuit for a field-effect transistor;
[0015] Figure 6 The diagram illustrates a driving circuit for a field-effect transistor;
[0016] Figure 7 An embodiment of the sensing circuit is illustrated;
[0017] Figure 8 The diagram illustrates a block diagram of a power converter with a synchronous rectification circuit and a drive circuit.
[0018] Figure 9 The diagram illustrates a block diagram of a power converter with a synchronous rectification circuit and two drive circuits; and
[0019] Figure 10 The diagram illustrates a method for driving a field-effect transistor. Detailed Implementation
[0020] In the following description, one or more specific details are set forth to provide a thorough understanding of examples of embodiments described herein. These embodiments may be obtained without one or more of these specific details, or may be obtained using other methods, components, materials, etc. In other instances, known structures, materials, or operations have not been detailed or described in order to avoid obscuring certain aspects of the embodiments.
[0021] The references to "an embodiment" or "one embodiment" within the framework of this description are intended to indicate that a particular configuration, structure, or feature described with respect to that embodiment is included in at least one embodiment. Therefore, phrases such as "in an embodiment" or "in one embodiment" that may appear at one or more points in this description do not necessarily refer to the same embodiment. Furthermore, in one or more embodiments, particular constructions, structures, or features may be combined in any suitable manner.
[0022] The reference numerals used herein are provided for convenience only and therefore do not limit the extent of protection or the scope of embodiments.
[0023] In various power conversion systems (such as AC / DC and DC / DC converters), transistors driven by control logic can replace rectifier diodes from other rectification methods. These transistors can include field-effect transistors, such as MOSFET transistors. This technique, often referred to as synchronous rectification, can improve the efficiency of power conversion systems.
[0024] Figure 1A andFigure 1B It provides a framework for utilizing rectifier circuitry. Figure 1B The corresponding field-effect transistors (e.g., MOSFET transistors) F1 and F2 replace one or more rectifier diodes (e.g., Figure 1A The diagram illustrates the possibilities of two rectifier diodes (D1 and D2) in a rectifier circuit. Field-effect transistors can also replace diodes in a full-bridge rectifier circuit or other rectifier architectures.
[0025] The transistors can be located on the secondary side of the transformer T. The MOSFET transistors F1 and F2 are alternately turned on (i.e., made to conduct electricity) and turned off (even when they are not conducting electricity) under the control of the control unit so that the (rectified) current can flow in the channels of the MOSFET transistors F1 and F2.
[0026] The rectifier circuit architecture in Figure 1 includes two diodes, D1 and D2. Figure 1A ) or two MOSFET transistors F1, F2 ( Figure 1B It is coupled to the secondary winding of transformer T and cascaded with an LC low-pass filter, which is suitable for providing a (rectified) voltage signal V to the load LD. out .
[0027] It should be understood that the rectifier circuit architecture in Figure 1 is merely an example of various rectifier circuits to which synchronous rectification can be applied. Therefore, the circuit architecture in Figure 1 should not be construed as limiting (or even indirectly) the scope of the embodiments.
[0028] In various cases, synchronous rectification circuits may include or be accompanied by circuits adapted to be coupled to field-effect transistors (e.g., Figure 1B The (digital) controller circuits (F1 and F2) in the circuit.
[0029] For example, a field-effect transistor such as a MOSFET may include a channel between a source terminal and a drain terminal, as well as a body diode and a gate terminal, the gate terminal being configured to control the flow of current in the field-effect transistor channel.
[0030] As described, by means of synchronous rectification, due to the output current I out The current flows through the (MOS) FET channel instead of the rectifier diode, thus reducing conduction losses and allowing power losses to decrease from Ploss_diode = Vd·Iout (where Vd is the rectifier diode). d The voltage drop across the diode is reduced to Ploss_MOSFET = Rds_on·Iout2 (where Rds_on is the drain-source resistance in the "on" or conducting state), which can be (very) low for synchronous rectifier MOSFETs.
[0031] In some embodiments, synchronous rectification can be used in a full-bridge rectifier architecture. Figure 2 An LCC resonant converter with synchronous rectification 201 is depicted. The LCC resonant converter with synchronous rectification 201 includes a full-bridge synchronous rectification circuit 200. However, the full-bridge synchronous rectification circuit 200 can also be used in other architectures that include other types of power converters, such as LLC resonant converters. Because the full-bridge synchronous rectification circuit 200 can be used in other topologies, therefore... Figure 2 This should not be construed as limiting the scope of the embodiments.
[0032] In various embodiments, the full-bridge synchronous rectifier circuit 200 may be coupled to the secondary winding of the transformer T. The transformer T may be part of a complementary circuit. In various embodiments, the complementary circuit may include the DC-DC stage of an LCC resonant converter with synchronous rectification 201. In various embodiments, the complementary circuit may include a half-bridge LCC 203. As already mentioned, the full-bridge synchronous rectifier circuit 200 may also be incorporated into a circuit other than... Figure 2 In architectures other than those described in the text.
[0033] In various embodiments, the full-bridge synchronous rectifier circuit 200 may include a first field-effect transistor 202 (high-side), a second field-effect transistor 204 (low-side), a third field-effect transistor 206 (high-side), and a fourth field-effect transistor 208 (low-side). The full-bridge synchronous rectifier circuit 200 may also include an output port 210. The output port 210 may be coupled to a load 212.
[0034] In various embodiments, the source 202A of the first field-effect transistor 202 can be coupled to the first input terminal 214. The drain 202B of the first field-effect transistor 202 can be coupled to the first output terminal 210A of the output port 210. The source 204A of the second field-effect transistor 204 can be coupled to the second output terminal 210B of the output port 210, and the drain 204B of the second field-effect transistor 204 can be coupled to the second input terminal 216.
[0035] The source 206A of the third field-effect transistor 206 can be coupled to the second input terminal 216; the drain 206B of the third field-effect transistor 206 can be coupled to the first output terminal 210A of the output port 210. The source 208A of the fourth field-effect transistor 208 can be coupled to the second output terminal 210B of the output port 210, and the drain 208B of the fourth field-effect transistor 208 can be coupled to the first input terminal 214.
[0036] A first drive signal can be delivered to the gate of a first field-effect transistor 202C. The first drive signal can also be delivered to the gate of a second field-effect transistor 204C. A second drive signal can be delivered to the gate of a third field-effect transistor 206C. A second drive signal can also be delivered to the gate of a fourth field-effect transistor 208C.
[0037] A first drive signal can turn the first field-effect transistor 202 and the second field-effect transistor 204 on and off. A second drive signal can turn the third field-effect transistor 206 and the fourth field-effect transistor 208 on and off. In various embodiments, a high drive signal can turn the first field-effect transistor 202 and the second field-effect transistor 204 on, and a low drive signal can turn the first field-effect transistor 202 and the second field-effect transistor 204 off. This can be implemented in various ways, including but not limited to logic implementation or by varying the types of field-effect transistors used in different embodiments.
[0038] Similarly, in various embodiments, a high drive signal can turn on the third field-effect transistor 206 and the fourth field-effect transistor 208, and a low drive signal can turn off the third field-effect transistor 206 and the fourth field-effect transistor 208. This can also be implemented in various ways, including but not limited to logic implementation or by varying the types of field-effect transistors used in different embodiments.
[0039] The rectified voltage output at output port 210 can be generated by timing the on-time and off-time of the first field-effect transistor 202, the second field-effect transistor 204, the third field-effect transistor 206, and the fourth field-effect transistor 208. The first field-effect transistor 202 and the second field-effect transistor 204 can be turned on for a first duration. Furthermore, the third field-effect transistor 206 and the fourth field-effect transistor 208 can be turned on for a second duration that does not overlap with the first duration.
[0040] Timing the drive signal for a synchronous rectifier circuit may be necessary to improve the power efficiency of the circuit and the devices containing it. For example, if the "on" signal is turned off too early, the efficiency of the synchronous rectifier circuit may be affected. If the "on" signal is turned off too late, the transistor may be forced to turn on, which could damage the transistor.
[0041] In various embodiments in which a synchronous rectification circuit is implemented in a resonant converter, the operation of the converter may be affected if the drive signal is generated incorrectly.
[0042] In various embodiments, synchronous rectification drive schemes can be based on the switching on and off of MOSFETs due to changes in the drain-source voltage of the MOSFET. Synchronous rectification drives can be implemented using analog components, application-specific integrated circuits (ASICs), or digital methods. Digital implementations of synchronous rectification (such as microcontroller-managed drive schemes) can allow for a reduction in the number of components and introduce greater flexibility in control algorithm design.
[0043] Figure 3 A diagram depicts the synchronous rectified drain-source voltage of a field-effect transistor and the driving signal used for the field-effect transistor.
[0044] The drain-source voltage (Vd) is sensed by sensing the voltages at two nodes (the drain of the low-side MOSFET), namely 214 and 216. DS )302. V can be DS Compared with the reference voltage threshold (V) threshold The comparison is performed. In various embodiments, this comparison can be performed by a comparator.
[0045] When V DS Drop to the reference voltage threshold (V threshold When the comparator output 304 triggers a drive signal to turn on the field-effect transistor, the comparator output 304 can be used to trigger a drive signal. In various embodiments, the drive signal can be triggered by the falling edge of the comparator output 304. It should also be understood that, in various embodiments, the drive signal can be triggered by the rising edge of the comparator output. The comparator output 304 can trigger a timer peripheral of the microcontroller to initiate a pulse to one or more corresponding synchronous rectified gate drivers. In various embodiments, there may be an on-delay 306 and a gate driver delay 308. The on-delay 306 can be included in the timer. And the gate driver delay 308 can represent the time taken to deliver the drive signal after the drive signal is initiated by the timer at 305A. After both the on-delay 306 and the gate driver delay 308, the field-effect transistor can be turned on 312.
[0046] After the drive signal turns on the field-effect transistor (FET), the drive signal can remain on for a minimum time period during which subsequent changes in the drain-source voltage of the FET will not trigger changes in the drive signal. This time period can be called the blanking time 310. The blanking time 310 can prevent changes in the Vdrain voltage from triggering a change in the drive signal for a certain period of time. DS The ringing in the signal causes a false shutdown trigger.
[0047] In various embodiments, when V has elapsed after the blanking period... DS Increase to V thresholdIn the above scenario, the comparator output can trigger a reset of the microcontroller's timer peripheral at 305B, causing the drive signal to switch the field-effect transistor to the off state. This can occur after the turn-off delay. Figure 3 The shutdown delay is not shown. In various embodiments, the rising edge of the comparator signal can trigger a change in the shutdown state. In various embodiments, the falling edge of the comparator signal can trigger a change in the shutdown state. Regardless of V DS Whether the voltage rises above the threshold voltage, the field-effect transistor can be turned off after a predetermined maximum time.
[0048] When V DS The voltage is negative, and the body diode of the field-effect transistor can conduct before the transistor is driven to conduct. This can be related to V. DS The time interval between the time it becomes negative and the rising edge of the drive signal 312 coincides, and... Figure 3 The 303A is used in the designation. The body diode of a field-effect transistor can also be used when the field-effect transistor is turned off and in V... DS It is turned on before becoming positive. This can be related to the falling edge of the drive signal 312 and V. DS The time intervals between the 318 times that are above zero are consistent, and... Figure 3 The Chinese character is represented by 303B.
[0049] The choice of the reference voltage threshold used for comparison with the drain-source voltage of the field-effect transistor affects the timing of the synchronous rectification circuit. In various embodiments, it may be necessary to vary the value of the reference voltage threshold during operation of the synchronous rectification circuit. This can improve the power efficiency of the rectification or the performance of the design, where it is preferable to coordinate the operation of the field-effect transistors of the rectification circuit with other parts of the design.
[0050] In various embodiments, this may be desirable: embodiments of the full-bridge synchronous rectifier circuit 200 are incorporated into a resonant converter with an LCC topology. In some cases where the load undergoes changes (such as LED lighting), the LCC topology may be preferred. In some cases, load changes can occur dynamically, such as dimming. The synchronous rectification turn-on of the LCC topology can depend on the output load and the operating frequency of the DC-DC stage. Variations in the output load, the operating frequency of the DC-DC stage of the resonant converter, or both can also change the slope of the drain-source voltage change in the field-effect transistors. This can also affect the timing of the synchronous rectification. And, in various embodiments, it may adversely affect the coordination between the DC-DC stage of the resonant converter and the synchronous rectifier circuit.
[0051] Figure 4The illustration shows a misalignment that can be caused by load variations at the output of the full-bridge synchronous rectifier circuit 200. The DC-DC stage drive signal 402 may include pulses for high-side and low-side switching. As described elsewhere, the DC-DC stage may include a half-bridge LCC.
[0052] The driving scheme 404 for the synchronous rectification circuit may include a first synchronous rectification signal SR1 and a second synchronous rectification signal SR2. For rectification in various embodiments, the first synchronous rectification signal SR1 may be high during the high-side pulse of the DC-DC stage and low during the low-side pulse of the DC-DC stage. Similarly, the second synchronous rectification signal SR2 may be high during the low-side pulse of the DC-DC stage and high during the low-side pulse of the DC-DC stage. The first signal SR1 may be delivered to the high-side field-effect transistor SR1_HS and the low-side field-effect transistor SR2_LS. The second signal SR2 may be delivered to the high-side field-effect transistor SR2_HS and the low-side field-effect transistor SR1_LS. Figure 4 In this context, SR1 is represented by pulses labeled SR1_HS and SR2_LS, while SR2 is represented by pulses labeled SR1_LS and SR2_HS.
[0053] The coordination of the aforementioned signals can be interrupted by changes in the operating frequency of the DC-DC stage or the output load. As described elsewhere, the rate at which the drain-source voltage of the field-effect transistor changes can vary when the output load or the operating frequency of the DC-DC stage changes. This can cause the field-effect transistors of the synchronous rectifier circuit 200 to be incorrectly driven. This misalignment is caused by… Figure 4 The pulse transition of the driving scheme of the synchronous rectification circuit shown is illustrated.
[0054] Figure 5 The illustration shows an embodiment of a driving circuit for a field-effect transistor. The driving circuit 500 can adjust the reference voltage threshold according to the operating frequency of the complementary circuit, the output load, or both.
[0055] In various embodiments, the drive circuit 500 can be used in conjunction with the full-bridge synchronous rectifier circuit 200. The drive circuit 500 can also be used in conjunction with other systems.
[0056] The driving circuit 500 may include a sensing circuit 502 configured to sense the drain-source voltage of a field-effect transistor and provide the drain-source voltage of the field-effect transistor to a first input 504A of a comparator 504. In some embodiments, the sensing circuit 502 may be separate from the driving circuit 500. For example, in various embodiments where the driving circuit 500 is arranged on the microcontroller, the sensing circuit 502 may not be arranged on the microcontroller. In some embodiments, the sensing circuit 502 may be part of the microcontroller. In various embodiments, the sensing circuit 502 may serve to protect the microcontroller from potentially large voltage fluctuations. DS Voltage influence and used for sensing V DS It has a dual function.
[0057] In some embodiments, the drive circuit 500 may be coupled to a synchronous rectification circuit to drive the field-effect transistors of the synchronous rectification circuit. In various embodiments, the drive circuit 500 may sense... Figure 2 The drain-source voltage of the second field-effect transistor 204. In various embodiments, the location of the node where the drain-source voltage of the second field-effect transistor 204 can be sensed is... Figure 2 V DS1 express.
[0058] In various embodiments, the drive circuit 500 can sense... Figure 2 The drain-source voltage of the fourth field-effect transistor 208. In some embodiments, the location of the node where the drain-source voltage of the fourth field-effect transistor 208 can be sensed is at... Figure 2 V DS2 This indicates that sensing the drain-source voltage at the low-side transistor coupled to the microcontroller's ground can be advantageous.
[0059] The drive circuit 500 may also include a reference voltage generator 506 to generate a reference voltage threshold, wherein the reference voltage threshold is determined by the operating frequency of the complementary circuit, the output load, or both. For example, in various embodiments, the complementary circuit may include a DC-DC stage that, combined with a full-bridge synchronous rectifier circuit 200 driven by the drive circuit 500 and other components, can constitute a power converter. In various embodiments, the DC-DC stage may include a half-bridge LCC of an LCC resonant converter with synchronous rectification 201. In various embodiments, the complementary circuit may include a half-bridge LCC 203.
[0060] In various embodiments, the first input 504A of comparator 504 is configured to receive the drain-source voltage of the field-effect transistor, as mentioned elsewhere in this disclosure. The second input 504B of the comparator may be coupled to the output of reference voltage generator 506B to receive a reference voltage.
[0061] The driving circuit 500 may further include a signal generator 508 coupled to the output of comparator 504C. The signal generator 508 is configured to deliver a driving signal to the gate terminal of the field-effect transistor (FET) to drive the FET to conduct after the drain-source voltage of the FET becomes less than a reference voltage, and to drive the FET to turn off after the drain-source voltage of the FET becomes greater than the reference voltage. The signal generator 508 may include a timer triggered at the falling edge of the output of comparator 504, which can enable the driving signal after a conduction delay and a gate driver delay.
[0062] In various embodiments, the drive signal can be delivered to the gate of the first field-effect transistor 202C or the gate of the third field-effect transistor 206C. In various embodiments, the same drive signal can be delivered to the gate of more than one field-effect transistor.
[0063] For example, the driving circuit 500 can deliver the same driving signal to the gate of the first field-effect transistor 202C and the gate of the second field-effect transistor 204C. The driving signal can: drive the first field-effect transistor 202 and the second field-effect transistor 204 to turn on after the drain-source voltage of the second field-effect transistor 204 becomes less than the reference voltage threshold, and drive the first field-effect transistor 202 and the second field-effect transistor 204 to turn off after the drain-source voltage of the second field-effect transistor 204 becomes greater than the reference voltage threshold.
[0064] Another driving circuit 500 can deliver another driving signal to the gates of the third field-effect transistor 206C and the fourth field-effect transistor 208C. This driving signal can: turn on the third and fourth field-effect transistors 206C after the drain-source voltage of the fourth field-effect transistor 208 becomes less than a reference voltage threshold, and turn off the third and fourth field-effect transistors 206C and the fourth field-effect transistor 208C after the drain-source voltage of the fourth field-effect transistor 208 becomes greater than the reference voltage threshold. The driving circuit 500 can also be used to drive field-effect transistors in other types of circuits.
[0065] When adjusting the reference voltage threshold based on the frequency of the complementary circuit, the output load, or both, a lookup table can be used. Figure 6An embodiment of the drive circuit 500 is illustrated. In various embodiments, the reference voltage generator 506 of the drive circuit 500 may include a lookup table 602. The lookup table 602 may include a first field 602A for storing a first value. In various embodiments, the reference voltage generator 506 sets a reference voltage threshold to the first value when the operating frequency of the complementary circuit is at a first corresponding frequency. The first frequency may also be stored in a corresponding field of the lookup table 602. It should be understood that the first frequency may include a range of frequencies or a threshold frequency.
[0066] In some embodiments, lookup table 602 may include a second field 602B for storing a second value. In some embodiments, when the operating frequency of the complementary circuit is at a second frequency, reference voltage generator 506 sets a reference voltage threshold to the second value. In various embodiments, lookup table 602 may include additional fields, such as a third field 602C, for storing additional possible values for the reference voltage threshold. Each additional possible reference voltage threshold may correspond to a different operating frequency of the complementary circuit. It should be understood that each additional possible reference voltage may correspond to a range of frequencies or a threshold frequency. The additional possible operating frequencies may vary by a consistent amount. For example, a corresponding reference voltage may exist for every 1 kHz change in operating frequency.
[0067] By adjusting the reference voltage threshold according to changes in the operating frequency, the drive circuit 500 can drive the field-effect transistors to provide preferred timing, regardless of changes in the operating frequency of the complementary circuit. For example, in various embodiments, the first field-effect transistor 202, the second field-effect transistor 204, the third field-effect transistor 206, and the fourth field-effect transistor 208 of the full-bridge rectifier circuit can be driven in sync with the DC-DC stage (which may include a half-bridge LCC 203 with synchronous rectification 201), and the slope of the change in the drain-source voltage of the field-effect transistors can vary as the operating frequency of the DC-DC stage changes. When the operating frequency of the DC-DC stage is a first frequency, the reference voltage threshold can be set to a first value. When the operating frequency of the DC-DC stage is a second frequency, the reference voltage threshold can be set to a second value.
[0068] In various embodiments, the lookup table 602 can be pre-programmed for a known topology of the complementary circuit. In various embodiments, this allows the driver circuit 500 to quickly adapt to changes in the operating frequency of the complementary circuit.
[0069] In various embodiments, the reference voltage threshold may be determined by another characteristic of the complementary circuit (such as the output current or output voltage of the synchronous rectifier circuit). In various embodiments, the range of the output current may correspond to the value of the reference voltage threshold.
[0070] In various embodiments of the drive circuit 500, comparator 504, signal generator 508, and reference voltage generator 506 may be arranged on microcontroller 606. Microcontroller 606 can manage the operating frequency of the DC-DC stage of the LCC resonant converter or other power converter with synchronous rectification 201. Microcontroller 606 can also monitor the output voltage and current of the synchronous rectification circuit, for example, at output port 210. Microcontroller 606 can receive the output voltage, current, or both at input 610. Input 610 may include multiple ports. For example, it may include one port for receiving the output voltage and one port for receiving the output current. In various embodiments, microcontroller 606 may include analog-to-digital converter 612 that converts the output voltage, current, or both into digital form. Microcontroller 606 may include control logic 608 to set the operating frequency of the DC-DC stage of the LCC resonant converter with synchronous rectification 201 based on the output voltage, output current, or both. The DC-DC operating frequency may depend on the voltage in one operating mode and on the output current in another operating mode. The microcontroller 606 can internally transmit the operating frequency value to the lookup table 602. The lookup table 602 can receive the operating frequency value at input 506A. The operating frequency can be transmitted to the reference voltage generator 506 via input 506A. The operating frequency can be transmitted to the lookup table 602 periodically. This can occur at preset intervals or change dynamically during operation.
[0071] In various embodiments, the reference voltage generator 506 may include a digital-to-analog converter 604 to convert a digital output signal from lookup table 602 into a reference voltage threshold to be output to a second input 504B of comparator 504.
[0072] Synchronous rectification circuits, including but not limited to a full-bridge synchronous rectification circuit 200, can provide rectification even when the field-effect transistors are not driven. This may occur due to the conduction of the internal body diode of the field-effect transistor, which... Figure 2 The numbers are represented as 202D, 204D, 206D, and 208D.
[0073] In some cases, it may be desirable to disable the drive circuit 500 to allow rectification via the body diode. This may be preferred when the output current of the synchronous rectification circuit is low. In various embodiments, the output current can be measured at output port 210.
[0074] Go to Figure 6In various embodiments, the drive circuit 500 can be enabled when the output current (which in some embodiments can be measured at output 210 or the full-bridge synchronous rectifier circuit) is greater than a current threshold; and disabled when the output current of the synchronous rectifier circuit is less than the current threshold. The output current can be received at input 610 and converted into digital form by analog-to-digital converter 612. The output of analog-to-digital converter 612 can be received by signal generator 508 and compared with a reference current threshold. The output of analog-to-digital converter 612 can convey the output current. Signal generator 508 can be disabled when the output current is less than the current threshold. In various embodiments, signal generator 508 may include a timer for initiating a drive signal. The timer can be disabled when the output current is less than the threshold current.
[0075] In various embodiments, the microcontroller 606 may include circuitry for converting a signal conveying the current of the output of a rectifier circuit (e.g., a full-bridge synchronous rectifier circuit 200) into a digital form to disable the signal generator 508. This circuitry may include an analog-to-digital converter 612. In some embodiments, the signal generator 508 includes a PWM signal generator.
[0076] Figure 7 An embodiment of the sensing circuit 502 is illustrated. In various embodiments, the sensing network consists of a fast diode 702 and a pull-up resistor 704 connected to a microcontroller supply voltage 706. In some embodiments, the microcontroller supply voltage 706 can provide 3.3V. The sensing circuit 502 can receive the drain-source voltage of a field-effect transistor at input 708. For example, the sensing circuit 502 can receive the Vdrain voltage of a second field-effect transistor 204. DS1 ,like Figure 2 As shown in the diagram. In various embodiments, the sensing circuit 502 can receive the V signal from the fourth field-effect transistor 208. DS2 ,like Figure 2 As shown in the image.
[0077] In some embodiments, when the drain-source voltage of the field-effect transistor received at input 708 is higher than the microcontroller supply voltage, the fast diode 702 is reverse biased and the sensed voltage is pulled up to the microcontroller supply voltage 706. When the drain-source voltage of the field-effect transistor received at input 708 is lower than the microcontroller supply voltage 706, the fast diode 702 is forward biased and the sensed voltage is equal to that voltage plus the voltage drop of the diode providing positive shift.
[0078] The sensed voltage can then be provided to the first input 504A of the comparator 504 via the output of the sensing circuit 502. The current during positive bias is limited by the pull-up resistor 704. In various embodiments, the sensing circuit 502 may include an RC filter 710. The sensing circuit 502 may also include a clamping diode 714.
[0079] Figure 8 A block diagram of a power converter with synchronous rectification circuitry and drive circuitry is illustrated. Power converter 800 may include an input 802 for receiving input signals. Power converter 800 may also include a filter 804 and a bridge rectifier 806. In various embodiments, power converter 800 may include a power factor correction circuit 808.
[0080] The power converter 800 may also include a DC-DC converter 809, which in various embodiments may include a half-bridge LCC 203. The power converter 800 may also include a synchronous rectification circuit 810. The synchronous rectification circuit 810 may include various forms, such as embodiments of the synchronous rectification circuit described herein, including but not limited to a full-bridge synchronous rectification circuit 200. The synchronous rectification circuit 810 may be driven by a driver circuit 500. The power converter 800 may also include an auxiliary power supply 812.
[0081] Figure 9 A block diagram of a power converter with a synchronous rectification circuit and two drive circuits is illustrated. In various embodiments of the power converter 800, the synchronous rectification circuit 810 may be driven by a first drive circuit 500A and a second drive circuit 500B. The first drive circuit 500A may include any embodiment of drive circuit 500. The second drive circuit 500B may include any embodiment of drive circuit 500.
[0082] Figure 10 The illustration shows a method 1000 for driving a field-effect transistor (FET), which may include monitoring the operating frequency of a complementary circuit at step 1002. The method 1000 for driving the FET may further include: at step 1004, setting a reference voltage to a first value determined by the operating frequency of the complementary circuit; at step 1006, sensing that the drain-source voltage of the FET becomes less than the reference voltage; at step 1008, driving the FET to turn on; at step 1010, sensing that the drain-source voltage of the FET becomes greater than the reference voltage; and at step 1012, driving the FET to turn off.
[0083] In various embodiments, the method 1000 for driving a field-effect transistor may further include: observing a new operating frequency of the complementary circuit and setting a reference voltage to a second value determined by the new operating frequency of the complementary circuit.
[0084] In various embodiments, the method 1000 for driving a field-effect transistor may further include: using the field-effect transistor to drive a second field-effect transistor to turn on and off.
[0085] The method 1000 for driving a field-effect transistor may further include: driving a second field-effect transistor to turn on after the drain-source voltage becomes less than a reference voltage, and driving the second field-effect transistor to turn off after the drain-source voltage becomes greater than the reference voltage.
[0086] In various embodiments, the method 1000 for driving a field-effect transistor may further include: having a reference voltage generator to generate a reference voltage; and having a comparator including: a first input configured to receive a drain-source voltage of the field-effect transistor; and a second input coupled to the output of the reference voltage generator to receive the reference voltage. The method 1000 for driving a field-effect transistor may further include: a signal generator having an output coupled to the comparator, the signal generator being configured to deliver a drive signal to the gate terminal of the field-effect transistor.
[0087] The method 1000 for driving a field-effect transistor may further include: wherein a reference voltage generator includes a lookup table, the lookup table including a first field for storing a first value, and wherein the reference voltage generator sets a reference voltage to the first value when the operating frequency of the complementary circuit is at a first frequency.
[0088] In various embodiments, the method 1000 for driving a field-effect transistor may further include: wherein the lookup table includes a second field for storing a second value, and wherein a reference voltage generator sets a reference voltage to the second value when the operating frequency of the complementary circuit is at a second frequency.
[0089] In various embodiments, the method 1000 for driving a field-effect transistor may further include: wherein a reference voltage generator includes a lookup table, the lookup table including multiple fields, the multiple fields storing multiple values corresponding to multiple potential operating frequencies, a first value corresponding to a first potential operating frequency.
[0090] The method 1000 for driving a field-effect transistor may further include, wherein the reference voltage generator includes a digital-to-analog converter to convert the output signal from the lookup table into a reference voltage.
[0091] Example 1. A driving circuit includes: a reference voltage generator for generating a reference voltage, wherein the reference voltage is based on the operating frequency of a complementary circuit; and a comparator including: a first input configured to receive a drain-source voltage of a first low-side field-effect transistor; and a second input coupled to the output of the reference voltage generator to receive the reference voltage. The driving circuit further includes a signal generator coupled to the output of the comparator, the signal generator being configured to: deliver a driving signal to the gate terminal of the first low-side field-effect transistor to drive the first low-side field-effect transistor to an on state after the drain-source voltage of the first low-side field-effect transistor becomes less than the reference voltage, and to drive the first low-side field-effect transistor to an off state after the drain-source voltage of the first low-side field-effect transistor becomes greater than the reference voltage.
[0092] Example 2. The driving circuit according to Example 1, wherein the reference voltage generator includes a lookup table, the lookup table including a first field for storing a first value, and wherein the reference voltage generator sets the reference voltage to the first value when the operating frequency of the complementary circuit is at a first frequency.
[0093] Example 3. The driving circuit according to Example 1 or Example 2, wherein the lookup table includes a second field for storing a second value, and wherein the reference voltage generator sets the reference voltage to the second value when the operating frequency of the complementary circuit is at a second frequency.
[0094] Example 4. The driving circuit according to Examples 1 to 3, wherein the lookup table includes a plurality of additional fields for storing a plurality of additional values, and wherein the reference voltage generator sets the reference voltage to the selected value among the plurality of additional values when the operating frequency of the complementary circuit is at a frequency corresponding to a selected value among the plurality of additional values.
[0095] Example 5. The driving circuit according to Examples 1 to 4, wherein the reference voltage generator includes a digital-to-analog converter to convert the output signal from the lookup table into the reference voltage.
[0096] Example 6. The driving circuit according to Examples 1 to 5, wherein the reference voltage generator includes an input for receiving a signal conveying the operating frequency of the complementary circuit.
[0097] Example 7. The driving circuit according to Examples 1 to 6, wherein the driving signal is delivered to the gate terminal of the first high-side field-effect transistor for driving the first high-side field-effect transistor to conduct after the drain-source voltage of the first low-side field-effect transistor becomes less than the reference voltage, and for driving the first high-side field-effect transistor to turn off after the drain-source voltage of the first low-side field-effect transistor becomes greater than the reference voltage.
[0098] Example 8. The driving circuit according to Examples 1 to 7, wherein the complementary circuit includes a half-bridge LCC with an LCC resonant converter having synchronous rectification 201.
[0099] Example 9. The driving circuit according to Examples 1 to 8, wherein the signal generator is enabled by an input signal conveying the current of the output of the rectifier circuit when the current of the output of the rectifier circuit is higher than a current threshold, and the signal generator is disabled when the current of the output of the rectifier circuit is lower than the current threshold.
[0100] Example 10. The driving circuit according to Examples 1 to 9 further includes a voltage sensing circuit configured to: sense the drain-source voltage of the first low-side field-effect transistor and provide the drain-source voltage of the first low-side field-effect transistor to the first input of the comparator.
[0101] Example 11. The drive circuit according to Examples 1 to 10, wherein the signal generator includes a PWM signal generator.
[0102] Example 12. The driving circuit according to Examples 1 to 11, wherein the driving signal is further determined by the current output of the rectifier circuit.
[0103] Example 13. A rectifier circuit includes: a first field-effect transistor; a second field-effect transistor; a third field-effect transistor; and a fourth field-effect transistor. The rectifier circuit further includes: a first driving circuit configured to: drive the first field-effect transistor and the second field-effect transistor to an on state after the drain-source voltage of the second field-effect transistor becomes less than a first reference voltage, and drive the first field-effect transistor and the second field-effect transistor to an off state after the drain-source voltage of the second field-effect transistor becomes greater than the first reference voltage; and a second driving circuit configured to: drive the third field-effect transistor and the fourth field-effect transistor to an on state after the drain-source voltage of the fourth field-effect transistor becomes less than a second reference voltage, and drive the third field-effect transistor and the fourth field-effect transistor to an off state after the drain-source voltage of the fourth field-effect transistor becomes greater than the second reference voltage. The rectifier circuit also includes an output port configured to be coupled to a load; and wherein the first reference voltage is determined by the operating frequency of the complementary circuit, and the second reference voltage is determined by the operating frequency of the complementary circuit, and the first field-effect transistor, the second field-effect transistor, the third field-effect transistor, and the fourth field-effect transistor are configured to cooperate to provide rectified current to the output port.
[0104] Example 14. The rectifier circuit according to Example 13, wherein the source of the first field-effect transistor is coupled to a first input terminal, the drain of the first field-effect transistor is coupled to a first output terminal of the output port, the source of the second field-effect transistor is coupled to a second output terminal of the output port, and the drain of the second field-effect transistor is coupled to a second input terminal.
[0105] Example 15. A rectifier circuit according to Example 13 or Example 14, wherein the source of the third field-effect transistor is coupled to the second input terminal, the drain of the third field-effect transistor is coupled to the first output terminal of the output port, the source of the fourth field-effect transistor is coupled to the second output terminal of the output port, and the drain of the fourth field-effect transistor is coupled to the first input terminal.
[0106] Example 16. A rectifier circuit according to Examples 13 to 15, wherein the first driving circuit includes: a reference voltage generator for generating the first reference voltage; a comparator including: a first comparator input configured to receive the drain-source voltage of the second field-effect transistor; a second comparator input coupled to the output of the reference voltage generator to receive the first reference voltage; and a signal generator coupled to the output of the comparator, wherein the signal generator is configured to: deliver a first driving signal to the gate terminal of the first field-effect transistor and deliver the first driving signal to the gate terminal of the second field-effect transistor.
[0107] Example 17. A rectifier circuit according to Examples 13 to 16, wherein the reference voltage generator includes a lookup table, the lookup table including a first field for storing a first value, and wherein the reference voltage generator sets the first reference voltage to the first value when the operating frequency of the complementary circuit is at a first frequency.
[0108] Example 18. A rectifier circuit according to Examples 13 to 17, wherein the lookup table includes a second field for storing a second value, and wherein the reference voltage generator sets the first reference voltage to the second value when the operating frequency of the complementary circuit is at a second frequency.
[0109] Example 19. A rectifier circuit according to Examples 13 to 18, wherein the reference voltage generator includes a digital-to-analog converter to convert the output signal from the lookup table into the first reference voltage.
[0110] Example 20. A rectifier circuit according to Examples 13 to 19, wherein the reference voltage generator includes an input for receiving a signal conveying the operating frequency of the complementary circuit.
[0111] Example 21. A rectifier circuit according to Examples 13 to 20, wherein when the output current of the rectifier circuit is higher than a current threshold, the signal generator is enabled by an input signal conveying the output current of the rectifier circuit, and the signal generator is disabled when the output current of the rectifier circuit is lower than the current threshold.
[0112] Example 22. According to the rectifier circuit described in Examples 13 to 21, the first reference voltage is determined by the output current of the rectifier circuit, and the second reference voltage is determined by the output current of the rectifier circuit.
[0113] Example 23. A method for driving a field-effect transistor, comprising: monitoring the operating frequency of a complementary circuit; setting a reference voltage to a first value determined by the operating frequency of the complementary circuit; sensing that the drain-source voltage of the field-effect transistor becomes less than the reference voltage; driving the field-effect transistor to turn on; sensing that the drain-source voltage of the field-effect transistor becomes greater than the reference voltage; and driving the field-effect transistor to turn off.
[0114] Example 24. The method according to Example 23 further includes: observing a new operating frequency of the complementary circuit and setting the reference voltage to a second value determined by the new operating frequency of the complementary circuit.
[0115] Example 25. The method according to Example 23 or Example 24 further includes using the field-effect transistor to drive the second field-effect transistor to turn on and off.
[0116] Example 26. The method according to Examples 23 to 25 further includes: having a reference voltage generator to generate the reference voltage; having a comparator including: a first input configured to receive the drain-source voltage of the field-effect transistor; a second input coupled to the output of the reference voltage generator to receive the reference voltage; and a signal generator having the output coupled to the comparator, the signal generator being configured to deliver a drive signal to the gate terminal of the field-effect transistor.
[0117] Example 27. The method according to Examples 23 to 26, wherein the reference voltage generator includes a lookup table, the lookup table including multiple fields storing multiple values corresponding to multiple potential operating frequencies, the first value corresponding to a first potential operating frequency.
[0118] Example 28. The method according to Examples 23 to 27, wherein the reference voltage generator includes a digital-to-analog converter to convert the output signal from the lookup table into the reference voltage.
[0119] Example 29. The method according to Examples 23 to 28 further includes: setting the operating frequency of the complementary circuit based on the output current of the synchronous rectification circuit including the field-effect transistor.
[0120] References to illustrative embodiments in this description are not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative and other embodiments will become apparent to those skilled in the art after referring to the description. Therefore, the appended claims are intended to cover any such modifications or embodiments.
Claims
1. A driving circuit, comprising: A reference voltage generator, including a lookup table, is configured to generate a reference voltage based on the operating frequency of a complementary circuit according to the lookup table. A comparator, including: The first input is configured to receive the drain-source voltage of the first low-side field-effect transistor; and A second input, coupled to the output of the reference voltage generator, is used to receive the reference voltage; and A signal generator, coupled to the output of the comparator, is configured to: deliver a drive signal to the gate terminal of the first low-side field-effect transistor to drive the first low-side field-effect transistor to an on state after the drain-source voltage of the first low-side field-effect transistor becomes less than the reference voltage, and to drive the first low-side field-effect transistor to an off state after the drain-source voltage of the first low-side field-effect transistor becomes greater than the reference voltage.
2. The drive circuit of claim 1, wherein the lookup table includes a first field for storing a first value, and wherein the reference voltage generator sets the reference voltage to the first value when the operating frequency of the complementary circuit is at a first frequency.
3. The drive circuit of claim 2, wherein the lookup table includes a second field for storing a second value, and wherein the reference voltage generator sets the reference voltage to the second value when the operating frequency of the complementary circuit is at a second frequency.
4. The drive circuit of claim 2, wherein the lookup table includes a plurality of additional fields for storing a plurality of additional values, and wherein the reference voltage generator sets the reference voltage to the selected value among the plurality of additional values when the operating frequency of the complementary circuit is at a frequency corresponding to a selected value among the plurality of additional values.
5. The driving circuit of claim 2, wherein the reference voltage generator includes a digital-to-analog converter to convert the output signal from the lookup table into the reference voltage.
6. The driving circuit of claim 5, wherein the reference voltage generator includes an input for receiving a signal conveying the operating frequency of the complementary circuit.
7. The driving circuit of claim 1, wherein the driving signal is delivered to the gate terminal of the first high-side field-effect transistor to drive the first high-side field-effect transistor to turn on after the drain-source voltage of the first low-side field-effect transistor becomes less than the reference voltage, and to drive the first high-side field-effect transistor to turn off after the drain-source voltage of the first low-side field-effect transistor becomes greater than the reference voltage.
8. The drive circuit of claim 1, wherein the complementary circuit comprises a half-bridge LCC with synchronously rectified LCC resonant converter.
9. The driving circuit of claim 1, wherein the signal generator is enabled by an input signal conveying the current of the output of the rectifier circuit when the current of the output of the rectifier circuit is higher than a current threshold, and the signal generator is disabled when the current of the output of the rectifier circuit is lower than the current threshold.
10. The driving circuit of claim 1, further comprising a voltage sensing circuit configured to: sense the drain-source voltage of the first low-side field-effect transistor and provide the drain-source voltage of the first low-side field-effect transistor to the first input of the comparator.
11. The driving circuit according to claim 1, wherein the signal generator includes a PWM signal generator.
12. The driving circuit according to claim 1, wherein the driving signal is further determined by the current output of the rectifier circuit.
13. A rectifier circuit, comprising: First field-effect transistor; Second field-effect transistor; Third field-effect transistor; The fourth field-effect transistor; A first driving circuit, wherein the first driving circuit is configured to: drive the first field-effect transistor and the second field-effect transistor to an on state after the drain-source voltage of the second field-effect transistor becomes less than the first reference voltage, and drive the first field-effect transistor and the second field-effect transistor to an off state after the drain-source voltage of the second field-effect transistor becomes greater than the first reference voltage; The second driving circuit is configured to: drive the third field-effect transistor and the fourth field-effect transistor to the on state after the drain-source voltage of the fourth field-effect transistor becomes less than the second reference voltage, and drive the third field-effect transistor and the fourth field-effect transistor to the off state after the drain-source voltage of the fourth field-effect transistor becomes greater than the second reference voltage. The output port is configured to be coupled to the load; and The first reference voltage is determined by the operating frequency of the complementary circuit according to a lookup table in the first driving circuit, and the second reference voltage is determined by the operating frequency of the complementary circuit according to a lookup table in the second driving circuit. The first field-effect transistor, the second field-effect transistor, the third field-effect transistor, and the fourth field-effect transistor are configured to cooperate to provide rectified current to the output port.
14. The rectifier circuit of claim 13, wherein the source of the first field-effect transistor is coupled to a first input terminal, the drain of the first field-effect transistor is coupled to a first output terminal of the output port, the source of the second field-effect transistor is coupled to a second output terminal of the output port, and the drain of the second field-effect transistor is coupled to a second input terminal.
15. The rectifier circuit of claim 14, wherein the source of the third field-effect transistor is coupled to the second input terminal, the drain of the third field-effect transistor is coupled to the first output terminal of the output port, the source of the fourth field-effect transistor is coupled to the second output terminal of the output port, and the drain of the fourth field-effect transistor is coupled to the first input terminal.
16. The rectifier circuit according to claim 13, wherein the first driving circuit comprises: A reference voltage generator is used to generate the first reference voltage; A comparator, including: The first comparator input is configured to receive the drain-source voltage of the second field-effect transistor; and A second comparator input, coupled to the output of the reference voltage generator, is used to receive the first reference voltage; and A signal generator, coupled to the output of the comparator, wherein the signal generator is configured to deliver a first drive signal to the gate terminal of the first field-effect transistor and to the gate terminal of the second field-effect transistor.
17. The rectifier circuit of claim 16, wherein the reference voltage generator includes the lookup table, the lookup table including a first field for storing a first value, and wherein the reference voltage generator sets the first reference voltage to the first value when the operating frequency of the complementary circuit is at a first frequency.
18. The rectifier circuit of claim 17, wherein the lookup table includes a second field for storing a second value, and wherein the reference voltage generator sets the first reference voltage to the second value when the operating frequency of the complementary circuit is at a second frequency.
19. The rectifier circuit of claim 17, wherein the reference voltage generator includes a digital-to-analog converter to convert the output signal from the lookup table into the first reference voltage.
20. The rectifier circuit of claim 16, wherein the reference voltage generator includes an input for receiving a signal conveying the operating frequency of the complementary circuit.
21. The rectifier circuit of claim 16, wherein the signal generator is enabled to transmit an input signal of the output current of the rectifier circuit when the output current of the rectifier circuit is higher than a current threshold, and the signal generator is disabled when the output current of the rectifier circuit is lower than the current threshold.
22. The rectifier circuit of claim 13, wherein the first reference voltage is determined by the output current of the rectifier circuit, and the second reference voltage is determined by the output current of the rectifier circuit.
23. A method for driving a field-effect transistor, comprising: Monitor the operating frequency of the complementary circuit; The reference voltage is set to a first value determined by the operating frequency of the complementary circuit; The drain-source voltage of the field-effect transistor is sensed to be less than the reference voltage; Drive the field-effect transistor to conduct; The drain-source voltage of the field-effect transistor is sensed to be greater than the reference voltage; as well as Drive the field-effect transistor to turn off.
24. The method of claim 23, further comprising: Observe the new operating frequency of the complementary circuit, and set the reference voltage to a second value determined by the new operating frequency of the complementary circuit.
25. The method of claim 23, further comprising: The second field-effect transistor is driven to simultaneously turn on and off with the field-effect transistor.
26. The method of claim 23, further comprising: It has a reference voltage generator to generate the reference voltage; The comparator includes: The first input is configured to receive the drain-source voltage of the field-effect transistor; and A second input, coupled to the output of the reference voltage generator, is used to receive the reference voltage; and A signal generator having an output coupled to the comparator, the signal generator being configured to deliver a drive signal to the gate terminal of the field-effect transistor.
27. The method of claim 26, wherein the reference voltage generator includes a lookup table, the lookup table including a plurality of fields storing a plurality of values corresponding to a plurality of potential operating frequencies, the first value corresponding to a first potential operating frequency.
28. The method of claim 27, wherein the reference voltage generator includes a digital-to-analog converter to convert the output signal from the lookup table into the reference voltage.
29. The method of claim 23, further comprising: The operating frequency of the complementary circuit is set based on the output current of the synchronous rectifier circuit including the field-effect transistor.
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