Impedance measurement using multiplexer and analog-to-digital converter

Abstract

In some examples, an apparatus can be used to measure an impedance of a first battery cell. The apparatus includes a first analog-to-digital converter (ADC) and a second ADC. The apparatus also includes a multiplexer configured to connect the first ADC to the first battery cell in a first instance and to connect the second ADC to a current sensor in the first instance. The current sensor is configured to sense a current through the first battery cell. The multiplexer is further configured to connect the first ADC to the current sensor in a second instance and to connect the second ADC to the first battery cell in the second instance or a third instance.

Description

Technical Field

[0001] This disclosure relates to measuring the impedance of a battery. Background Technology

[0002] In battery management applications, complex alternating current (AC) impedance information can be used to estimate several internal parameters of a battery cell, such as internal cell temperature, state of health, and state of charge. To measure the AC impedance of the entire battery pack, the impedance of each individual cell must be monitored. Therefore, to monitor the impedance of each cell, N integrated circuits (ICs) are mounted on N series-connected battery cells. In electric vehicles, the number N is typically less than 100. From a system perspective, this approach is very costly due to the large number of ICs required. Summary of the Invention

[0003] This disclosure describes a technique for measuring the impedance of a first battery cell using at least two analog-to-digital converters (ADCs), a multiplexer, and a current sensor capable of sensing the current flowing through the first battery cell. The multiplexer can be configured to connect a first ADC to the first battery cell in a first embodiment, and a second ADC to the current sensor in another first embodiment. The multiplexer can also be configured to connect the first ADC to the current sensor in a second embodiment. Furthermore, the multiplexer can be configured to connect the second ADC to the first battery cell in either a second or third embodiment.

[0004] In some examples, a device can be used to measure the impedance of a first battery cell. The device includes a first ADC and a second ADC. The device also includes a multiplexer configured to connect the first ADC to the first battery cell in a first instance, and to connect the second ADC to a current sensor in a second instance. The current sensor is configured to sense the current through the first battery cell. The multiplexer is further configured to connect the first ADC to the current sensor in a second instance, and to connect the second ADC to the first battery cell in a second or third instance.

[0005] In some examples, a method includes: in a first instance, connecting a first ADC of at least two ADCs to a first battery cell via a multiplexer. The method also includes: in the first instance, connecting a second ADC of at least two ADCs to a current sensor via a multiplexer, wherein the current sensor is configured to sense current through the first battery cell. The method further includes: in a second instance, connecting the first ADC to the current sensor via a multiplexer. The method also includes: in a second or third instance, connecting the second ADC to the first battery cell via a multiplexer.

[0006] In some examples, a system includes: a first battery cell; a current sensor configured to sense current flowing through the first battery cell; and at least two ADCs, including a first ADC and a second ADC. The system also includes a multiplexer configured to connect the first ADC to the first battery cell in a first instance and to the second ADC to the current sensor in a second instance. The multiplexer is further configured to connect the first ADC to the current sensor in a second instance and to connect the second ADC to the first battery cell in a second or third instance.

[0007] Details of one or more examples are set forth in the accompanying drawings and the following description. Other features, objects, and advantages will be apparent from the specification, the drawings, and the claims. Attached Figure Description

[0008] Figure 1 This is a conceptual block diagram of a system including a battery, a multiplexer, and at least two analog-to-digital converters (ADCs) according to the technology disclosed herein.

[0009] Figure 2 This is a conceptual block diagram of an integrated circuit configured to apply a fast Fourier transform to the outputs of two ADCs, according to the technology disclosed herein.

[0010] Figure 3 This is a conceptual block diagram depicting a measurement period for four ADCs according to the technology disclosed herein.

[0011] Figures 4 to 8 This is a conceptual block diagram of a multiplexer configured to connect an ADC to a battery cell, based on the technology disclosed herein.

[0012] Figure 9 This is a circuit diagram of a multiplexer configured to connect two ADCs to voltage and current paths, based on the technology disclosed herein.

[0013] Figure 10 This is a flowchart illustrating an example technique for measuring the impedance of a battery cell according to the present disclosure. Detailed Implementation

[0014] This disclosure describes apparatus, methods, and techniques for measuring the alternating current (AC) impedance of multiple stacked battery cells using a single integrated circuit (IC). The terminals of each battery cell can be multiplexed to more than one analog-to-digital converter (ADC) so that each ADC can measure the voltage across the battery cell. By multiplexing more than one ADC to the battery cells, the apparatus can compensate for measurement errors in the multi-cell impedance IC caused by ADC mismatch (e.g., gain and phase mismatch between ADCs).

[0015] Figure 1 This is a conceptual block diagram of a system 100 according to the technology disclosed herein, which includes a battery 110, a multiplexer 160, and at least two ADCs 170A to 170M. Figure 1 In the example shown, system 100 includes a battery 110, a current sensor 130, and a device 150. Battery 110 includes cells 120A to 120N, where N is an integer. Device 150 includes a multiplexer 160, ADCs 170A to 170M, a processing circuitry system 180, and optional modulators 190 and modulation drivers 192, where M is an integer that may be equal to or different from N.

[0016] Device 150 may include a single semiconductor substrate in which multiplexer 160, ADCs 170A to 170M, processing circuitry 180, optional modulator 190, and optional modulation driver 192 are integrated. Alternatively, device 150 may include more than one semiconductor substrate for multiplexer 160, ADCs 170A to 170M, processing circuitry 180, optional modulator 190, and optional modulation driver 192.

[0017] Battery 110 may include lithium-ion battery cells, lithium iron phosphate battery cells, lithium-sulfur battery cells, sodium-ion battery cells, nickel-cadmium battery cells, nickel metal battery cells, and / or any other type of battery cell. In some examples, battery cells 120A to 120N may be arranged in series and / or parallel. Battery cells 120A to 120N may be configured to generate a battery voltage that causes current to flow through current sensor 130 and / or modulator 190.

[0018] The current sensor 130 can be configured to sense the excitation current flowing through the battery cells 120A to 120N. For example, the current sensor 130 can be connected in series with the battery cells 120A to 120N and the modulator 190. The current sensor 130 may include a shunt resistor, a magnetoresistive element, a current mirror, an ammeter, and / or any other current sensing component. The current sensor 130 may be partially or entirely inside and / or partially or entirely outside the device 150. The device 150 may include input / output nodes for connecting external current sensing elements. For example, the current sensor 130 may include an external resistor with optional internal resistance.

[0019] To determine the health status of each battery cell in battery cells 120A to 120N, device 150 can be configured to determine the impedance of each battery cell in battery cells 120A to 120N. However, the achievable measurement accuracy may depend on the matching between all ADCs 170A to 170M. Matching can be addressed through layout / layout planning, but increasing the number of ADCs may limit the usefulness of layout / layout planning. For example, the arrays of ADCs 170A and 170B can be inter-digitized so that each ADC in ADCs 170A and 170B has the same chip neighborhood. Each ADC in ADCs 170A and 170B can have the same macro so that each ADC in ADCs 170A and 170B uses the same subcircuit layout. For better matching of ADCs 170A and 170B, each ADC can have routing lines of the same length. Additionally, larger ADCs may be easier to match than smaller ADCs.

[0020] According to the technology disclosed herein, in a first embodiment, multiplexer 160 can be configured to connect ADC 170A to battery cell 120A and ADC 170B to current sensor 130. In a second embodiment, multiplexer 160 can be configured to connect ADC 170A to current sensor 130. In a second or third embodiment, multiplexer 160 can be configured to connect ADC 170B to battery cell 120A. Using these multiplexing techniques, device 150 may be able to compensate for measurement errors caused by mismatch (e.g., gain and phase mismatch) between ADCs 170A and 170M. Additionally, processing circuitry system 180 can be configured to implement digital post-processing algorithms to compensate for measurement errors caused by ADC mismatch. The connection between the ADC and the battery cell should be kept as short as possible to reduce any measurement errors.

[0021] In some examples, multiplexer 160 can be configured to connect one or more battery cells 120A to 120N and current sensor 130 to two or more ADCs 170A to 170M in a round-robin sequence, scheme, or protocol. Device 150 can be configured to use X ADCs 170A to 170M to test X battery cells 120A to 120N, where X is an integer. Additionally or alternatively, device 150 can be configured to use X+1 ADCs 170A to 170M to test X battery cells 120A to 120N, where X is an integer.

[0022] ADCs from 170A to 170M can include sigma-delta ADCs, successive approximation ADCs, fast ADCs, semi-fast ADCs, pipelined ADCs, and / or any other type of ADC. Bandwidth and signal-to-noise ratio are likely important parameters for ADCs from 170A to 170M.

[0023] When multiplexer 160 has connected the battery cell to one of the ADCs 170A to 170M or the current sensor 130, the ADC can be configured to convert voltage or current across the ADC or sensor into digital. Multiplexer 160 can be configured to connect the ADC to the battery cell or sensor for a sufficient time period to allow the ADC to convert analog voltage or current into digital. Multiplexer 160 can be configured to connect the ADCs 170A to 170M sequentially and / or successively to the battery cells 120A to 120N and the current sensor 130 to minimize the time between measurements, thereby reducing the amount of time-based drift experienced by the measured parameters.

[0024] Compared to devices with a dedicated ADC for each battery cell, device 150 can include fewer ADCs. For example, another device could include N battery cells and N+1 ADCs, where each ADC is dedicated to a battery cell, and one ADC is dedicated to a current sensor. This other device could have separate circuitry for measuring the voltage across each battery cell. Each ADC could occupy a significant amount of chip space. In contrast, device 150 could include a set of X ADCs (e.g., three or four ADCs) that could be used to connect to a subset of X or X-1 ADCs for a set of ten or fifteen battery cells. Therefore, by using fewer ADCs to measure battery impedance than other devices, device 150 can have reduced overall system cost and / or a smaller chip size.

[0025] Processing circuitry system 180 may include any suitable arrangement of hardware, software, firmware, or any combination thereof to perform the techniques attributed to processing circuitry system 180 herein. Examples of processing circuitry system 180 include any one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or any other equivalent integrated or discrete logic circuitry system, and any combination of such components. When processing circuitry system 180 includes software or firmware, it also includes any hardware for storing and executing that software or firmware, such as one or more processors or processing units. In the example where device 150 is mounted on a vehicle, processing circuitry system 180 may be implemented by a headlight controller.

[0026] Generally, a processing unit may include one or more microprocessors, DSPs, ASICs, FPGAs, or any other equivalent integrated or discrete logic circuit systems, and any combination of these components. Although Figure 1 Although not shown, the processing circuitry system 180 may include memory configured to store data. The memory may include any volatile or non-volatile medium, such as random access memory (RAM), read-only memory (ROM), non-volatile RAM (NVRAM), electrically erasable programmable ROM (EEPROM), flash memory, etc. In some examples, the memory may be external to the processing circuitry system 180 (e.g., external to the package in which the processing circuitry system 180 is housed).

[0027] Modulator 190 includes optional components of device 150, which may include transistors for modulating the current flowing through battery cells 120A to 120N and current sensor 130. Modulator 190 can be configured to connect across battery cells 120A to 120N such that a modulated current (e.g., excitation current) flows through at least one of battery cells 120A to 120N. Although in other figures (e.g., Figures 4 to 8 In this diagram, the modulator is represented as a current source, but the modulator may only allow or block the current, where the current is actually driven by the battery 110.

[0028] The processing circuitry 180 can be configured to control the modulator driver 192 to generate a drive signal at a drive signal frequency for driving the modulator 190. The modulator 190 can be configured to drive or modulate the current flowing into the battery cell 120A to 120N by driving only the positive current for charging the battery, only the negative current for discharging the battery, or alternately driving the positive and negative currents. The processing circuitry 180 can be configured to control the modulator driver 192 to turn the modulator 190 on and off at the frequency of the AC current at which the battery cell voltage is to be measured.

[0029] Modulator 190 may be part of device 150 or a separate component external to device 150. In some examples, modulator driver 192 may be part of device 150, while modulator 190 may be off-chip. In other examples, both modulator 190 and modulator driver 192 may be on-chip or off-chip.

[0030] The processing circuitry 180 can be configured to control the modulator driver 192 such that direct current or alternating current flows through the modulator 190, battery cells 120A to 120N, and current sensor 130. The current flowing through the modulator 190, battery cells 120A to 120N, and current sensor 130 can be driven through the current path of the modulator 190 by the battery voltage generated by the battery cells 120A to 120N, and return through the battery cells 120A to 120N. Alternating current is a current that includes an AC component and may also include a DC offset. In some examples, the AC component includes a sine wave, a rectangular wave, a triangular wave, and / or a sine square wave.

[0031] In some examples, battery 110 may include dozens or hundreds of battery cells. In some examples, device 150 may include a first set of three or four ADCs for a first set of three cells connected to battery 110, and a second set of three or four ADCs for a second set of three cells connected to battery 110. In other words, each set of battery cells may have a dedicated set of ADCs. Therefore, device 150 may include N or more ADCs, where N is the number of battery cells in battery 110. In some examples, ADCs may be distributed across multiple devices.

[0032] Additionally or alternatively, device 150 may include a set of ADCs (e.g., four ADCs) configured to connect to all battery cells in battery 110. Device 150 may include a switching network configured to connect the set of ADCs to a first set of battery cells, then to a second set of battery cells, and so on. The switching network may be configured to allow the set of ADCs to slide along the battery cells of battery 110.

[0033] As yet another example, device 150 may include more than one set of ADCs, wherein each set of ADCs is configured to be connected to multiple sets of battery cells. For example, a first set of three ADCs may be configured to be connected to several sets of ADCs, wherein each set of ADCs includes two or three ADCs. A second set of three ADCs may be configured to be connected to several additional sets of ADCs, wherein each set of ADCs includes two or three ADCs. Thus, a battery with one hundred battery cells may include fifteen or twenty ADCs divided into various sets (e.g., three sets or five sets), wherein each set of ADCs is configured to be connected to ten or twenty battery cells at a time by a set that is connected to two or three battery cells at a time.

[0034] Figure 2This is a conceptual block diagram of an IC 250 configured to apply a Fast Fourier Transform to the outputs of two ADCs, 270A and 270B, according to the technology disclosed herein. Figure 2 In the example shown, IC 250 includes ADCs 270A and 270B and processing circuitry system 280.

[0035] ADC 270A can be configured to receive an indication of battery cell voltage 220, and ADC 270B is configured to receive an indication of excitation current 222. Battery cell voltage 220 and excitation current 222 are present in analog domain 230. In some examples, ADC 270A receives an indication of battery cell voltage 220 via a sense resistor connected across the differential input of ADC 270A. ADC 270B can receive an indication of excitation current 222 via a current sensing element, wherein excitation current 222 flows through one or more battery cells. The indication of excitation current 222 can be a voltage value across the sense resistor and / or a signal output by a current sensor.

[0036] ADCs 270A and 270B can convert analog values ​​220 and 222 in the analog domain 230 to digital values ​​in the digital domain 232 and time domain 234. ADC 270A can convert the gain g... v Introducing the digital output of the ADC 270A, and the ADC 270B can increase the gain g. i Introduce the digital output of ADC 270B.

[0037] exist Figure 2 In the example, the processing circuitry 280 includes Fast Fourier Transform (FFT) modules 282A and 282B and a complex division module 284. FFT modules 282A and 282B may include front-end filtering (such as a low-pass filter) to remove high-frequency noise. The processing circuitry 280 can be configured to apply the FFT to produce an output in the frequency domain 236. The outputs of FFT modules 282A and 282B may each include a voltage gain G. v and current gain G i The Fourier representation of this. The voltage gain G can be expected. v With current gain G i The ratio between them is 1.

[0038] The additional gains from the filters and FFT modules 282A and 282B can be added purely in the digital domain 232. Therefore, the added gains can be controlled by the processing circuitry 280. For example, the processing circuitry 280 can be configured to determine whether a mismatch exists between the voltage gain and the current gain. In response to determining that a mismatch exists, the processing circuitry 280 can be configured to zero out the gains.

[0039] Processing circuitry 280 can be configured to divide the voltage output of FFT module 282A by the current output of FFT module 282B in complex division module 284. By performing complex division on the outputs of FFT modules 282A and 282B, processing circuitry 280 can determine an estimate of the impedance of the battery cell. Processing circuitry 280 can be configured to output the estimated impedance to a device external to IC 250. An example output of complex division module 284 is shown in equation (1) below.

[0040]

[0041] Figure 3 This is a conceptual block diagram depicting a measurement period 340 for four ADCs 370A to 370C and 370N according to the technology disclosed herein. Figure 3 As shown, all three battery cells 320A to 320C can be excited and measured within a measurement period 340. The resulting individual impedance values ​​of battery cells 320A to 320C can be calculated using equation (2) via post-processing 380, where V IC R represents the equivalent complex common measurement current for all battery cells after current-to-voltage conversion. sR It is the actual resistance value of the sensing resistor, and the index x indicates the number of battery cells for which the impedance is to be calculated.

[0042]

[0043] When converting a signal to the digital domain, each of the ADCs 370A through 370C and 370N adds the gain and phase error to the converted value. For accurate impedance measurements, the gain and phase mismatch between the current ADC 370N and each voltage of the voltage ADCs 370A through 370C should be as small as possible, such that the ratio is approximately equal to 1, and the impedance calculation results are unaffected.

[0044] In contrast, a single-cell system with two ADCs can use layout and patterning techniques to minimize the gain and phase mismatch between the two ADCs. Additionally, a system chopping path can be used to switch the inputs of the two ADCs, which can be used in the test mode of a single-cell system. However, for a large number of ADCs, impedance IC patterning and layout techniques may no longer be feasible for achieving sufficient matching.

[0045] Each of the ADCs in the ADC series 370A through 370C and 370N can be driven by an input buffer, which introduces gain and phase mismatch. Although Figure 3Not shown, but switching elements may be present at the input of each signal path (e.g., at the input of each of the ADCs 370A through 370C and 370N). Further examples of ADC gain and phase mismatch and battery impedance measurement are described in commonly assigned U.S. Patent No. 10,481,214 entitled “Battery Temperature Detection”, filed November 19, 2019, and in commonly assigned U.S. Patent Application Publication No. 2019 / 0115762 entitled “Battery Impedance Detection”, filed October 12, 2017, the entire contents of which are incorporated herein by reference.

[0046] Figures 4 to 8 This is a conceptual block diagram of multiplexers 460, 560, 660, 760, and 860 configured to connect ADCs 470A to 470C, 570A to 570C, 670A to 670C, 770A to 770C, and 870A to 870P to battery cells, based on the technology disclosed herein. Figures 4 to 7 In the example shown, the battery includes two battery cells connected in series. However, a battery may include more than two battery cells, and the battery cells may be connected in parallel and / or in series. Each battery cell may include a voltage source, a resistor, and / or a capacitor. For example, battery cells 420A and 420B are... Figure 4 The battery cells are described as including resistors and voltage sources, but battery cells 420A and 420B may also include capacitors and / or inductors.

[0047] Modulator 490 may include one or more transistors. The modulator can be operated to allow AC and / or DC current to flow through battery cells 420A and 420B, current sensor 430, and modulator 490. The current may be driven by the voltage generated by battery cells 420A and 420B.

[0048] By using a special measurement sequence, mismatches between different ADCs 470A to 470C can be compensated for, thereby compensating for impedance measurement errors, such as... Figures 5 to 7 As shown. The processing circuitry system can be configured to control the measurement sequence and implement digital post-processing algorithms.

[0049] Multiplexer 460 may include a high-voltage multiplexer configured to switch between ADCs 470A and 470C. In some examples, each battery cell in battery cells 420A and 420B can generate three or five volts, so dozens or hundreds of battery cells connected in series can generate a high voltage. Example measurement sequences are given below in Table I. In practice, ADCs 470A to 470C are switched sequentially in a polling manner to measure three different quantities (two voltages and one current). In the polling sequence given in Table I, each ADC in ADCs 470A to 470C converts each quantity once.

[0050]

[0051] Table I: Measurement Sequence

[0052] In the first example, switches 462A and 462B connect the terminals of battery cell 420A to ADC 470A, switches 462B and 462C connect the terminals of battery cell 420B to ADC 470B, and switches 462D and 462E connect the terminals of current sensor 430 to ADC 470C. In the second example, switches 462A and 462B connect the terminals of battery cell 420A to ADC 470B, switches 462B and 462C connect the terminals of battery cell 420B to ADC 470C, and switches 462D and 462E connect the terminals of current sensor 430 to ADC 470A. In the third example, switches 462A and 462B connect the terminals of battery cell 420A to ADC 470C, switches 462B and 462C connect the terminals of battery cell 420B to ADC 470A, and switches 462D and 462E connect the terminals of current sensor 430 to ADC 470B.

[0053] Figure 5 A first example is depicted in which multiplexer 560 connects the terminals of battery cell 520A to the differential terminals of ADC 570A. Figure 5 In the first example shown, multiplexer 560 connects the terminals of battery cell 520B to the differential terminals of ADC 570B. Figure 5 In the first example shown, multiplexer 560 connects the terminals of current sensor 530 to the differential terminals of ADC 570C. The processing circuitry can be configured to determine a first set of initial impedances for battery cells 520A and 520B, which are respectively determined by Z in equations (3a) to (3e). 1,T and Z 1,B express.

[0054]

[0055]

[0056] I = I0e jα (3c)

[0057]

[0058]

[0059] Figure 6 A first example is depicted in which a multiplexer 660 connects the terminals of a battery cell 620A to the differential terminals of an ADC 670B. Figure 6 In the first example shown, multiplexer 660 connects the terminals of battery cell 620B to the differential terminals of ADC 670C. Figure 6 In the first example shown, multiplexer 660 connects the terminals of current sensor 630 to the differential terminals of ADC 670A. The processing circuitry can be configured to determine a second set of initial impedances for battery cells 620A and 620B, which are respectively determined by Z in equations (4a) to (4e). 2,T and Z 2,B express.

[0060]

[0061]

[0062]

[0063]

[0064]

[0065] Figure 7 A first example is depicted in which the multiplexer 760 connects the terminals of battery cell 720A to the differential terminals of ADC 770C. Figure 7 In the first example shown, the multiplexer 760 connects the terminals of battery cell 720B to the differential terminals of ADC 770A. Figure 7 In the first example shown, multiplexer 760 connects the terminals of current sensor 730 to the differential terminals of ADC 770B. The processing circuitry can be configured to determine a second set of initial impedances for battery cells 720A and 720B, which are respectively determined by Z in equations (5a) to (5e). 3,T and Z 3,B express.

[0066]

[0067]

[0068]

[0069]

[0070]

[0071] The processing circuitry can determine the corrected impedance or composite impedance of each battery cell based on the initial impedance using equations (6a) and (6b). Equations (7a) and (7b) provide a less resource-intensive approximation and can be used for on-chip implementation. Equations (7a) and (7b) employ a second-order mismatch term, which is an order of magnitude lower than the first-order mismatch term.

[0072]

[0073]

[0074]

[0075]

[0076] As shown in equations (6a) and (6b), the processing circuitry can determine the composite impedance of the battery cell by multiplying by the initial impedance and taking the root of the product. Additionally or alternatively, the processing circuitry can be configured to use equations (7a) and (7b), with or without modification, to determine the composite impedance of any measurement sequence, including the measurement sequences shown in Tables I through IV and other measurement sequences.

[0077] Figure 8 A general-purpose (N+1)×(N+1) multiplexer 860 is shown for measuring the impedance of battery cells 820A to 820N using, for example, the gain mismatch compensation techniques described herein. Figure 8 In the example, N and P are integers, and P equals N plus 1. N can be any integer greater than zero.

[0078] Table II shows an example measurement sequence for multiplexer 860 to connect N battery cells to N+1 ADCs. In Table II, battery cell 820L is the (N-2)th battery cell, battery cell 820M is the (N-1)th battery cell, and ADC 870P is the (N+1)th ADC.

[0079]

[0080] Table II: Measurement sequences for multiplexer 860.

[0081] The processing circuit system can be configured to apply the approximation formula in Equation (8) to determine the compensation impedance of the k-th cell. The measurement sequence and approximation formula in Equation (8) are based on the assumption that the system is time-invariant, i.e., that individual mismatches do not drift during the measurement time. Drifts caused by individual mismatches will introduce errors into the calculation.

[0082]

[0083] Figure 8 The diagram depicts the use of N+1 ADCs 870A to 870P to measure the voltage and current of battery cells 820A to 820N and current sensor 830. However, a smaller number of ADCs, such as fewer than N+1 ADCs, can be used by increasing the number of measurements performed. In other words, the same ADCs can be used more frequently. This approach reduces the number of ADCs but increases the required measurement time.

[0084] Figure 9 This is a circuit diagram of a multiplexer 960 configured to connect two ADCs 970A and 970B to a voltage path 920 and a current path 930, according to the technology disclosed herein. Although Figure 9 Only one voltage path 920 is depicted, but two ADCs 970A and 970B may exist, configured to measure the voltage across each of the two battery cells. A multiplexer 960 may be configured to connect ADCs 970A and 970B to the battery cells in one of the sequences shown in Tables III and IV.

[0085] Tables III and IV show two exemplary measurement sequences for measuring two battery cells using two ADCs, 970A and 970B. Therefore, Tables III and IV show examples where N equals 2. However, in some examples, N can be greater than two, such that the IC can include three ADCs configured to measure the voltage across three battery cells.

[0086]

[0087] Table III: First Measurement Sequence for N ADCs

[0088] Table III illustrates exemplary measurement sequences, where in a first example, multiplexer 960 connects ADC 970A to a first battery cell via voltage path 920 and ADC 970B to a current sensor via current path 930. In a second example, multiplexer 960 connects ADC 970A to a current sensor via current path 930 and ADC 970B to the first battery cell via voltage path 920. In a third example, multiplexer 960 connects ADC 970A to a second battery cell via voltage path 920 and ADC 970B to a current sensor via current path 930. In a fourth example, multiplexer 960 connects ADC 970A to a current sensor via current path 930 and ADC 970B to the second battery cell via voltage path 920.

[0089] First Case Second example Third Case ADC 970A First battery unit Second battery unit Current sensor ADC 970B Current sensor First battery unit Second battery unit

[0090] Table IV: Second Measurement Sequence for N ADCs

[0091] Table IV illustrates exemplary round-robin measurement sequences where two battery cells can be simultaneously connected across each of paths 920 and 930. In the first example in Table IV, multiplexer 960 connects ADC 970A to the first battery cell and ADC 970B to the current sensor. In the second example in Table IV, multiplexer 960 connects ADC 970A to the second battery cell and ADC 970B to the first battery cell. In the third example, multiplexer 960 connects ADC 970A to the current sensor and ADC 970B to the second battery cell.

[0092] Of the three measurement sequences for sets of two battery cells shown in Tables I, III, and IV, the sequences shown in Tables I and IV use the shortest measurement times (e.g., the fewest instances). Therefore, these measurement sequences may be less prone to drift-related problems than the sequence shown in Table III.

[0093] Figure 10 This is a flowchart illustrating an example technique for measuring the impedance of a battery cell according to the present disclosure. (Reference) Figure 1 The system shown is for Figure 10 The technology described herein may be used to perform similar techniques, although other components or devices may be used to perform similar techniques.

[0094] exist Figure 10In the example, in the first instance, multiplexer 160 connects ADC 170A to battery cell 120A (1000). In the first instance, multiplexer 160 also connects ADC 170B to current sensor 130 (1002). With multiplexer 160 connecting ADCs 170A and 170B to battery cell 120A and sensor 130, ADCs 170A and 170B can be configured to convert the voltage across battery cell 120A and the current through sensor 130 (e.g., the voltage across a current sensing element) into digital values.

[0095] Then, in the second example, multiplexer 160 connects ADC 170A to current sensor 130 (1004). In either the second or third example, multiplexer 160 connects ADC 170B to battery cell 120A (1006). In the example measurement sequences shown in Table III, in the second example, multiplexer 160 can connect ADC 170B to battery cell 120A. In the example measurement sequences shown in Tables I and IV, in the third example, multiplexer 160 can connect ADC 170B to battery cell 120A.

[0096] This disclosure attributes functionality to multiplexers 160, 460, 560, 660, 760, 860, and 960, and processing circuitry systems 180, 280, and 380. Processing circuitry systems 180, 280, and / or 380 may include one or more processors to implement these functions. For example, processing circuitry systems 180, 280, and / or 380 may include any combination of integrated circuit systems, discrete logic circuitry systems, analog circuitry systems (such as one or more microprocessors), digital signal processors (DSPs), application-specific integrated circuits (ASICs), and / or field-programmable gate arrays (FPGAs). In some examples, processing circuitry systems 180, 280, and / or 380 may include multiple components, such as one or more microprocessors, one or more DSPs, one or more ASICs, or one or more FPGAs, and any combination of other discrete or integrated logic circuitry systems and / or analog circuitry systems.

[0097] The techniques described in this disclosure can also be implemented or encoded in an article of manufacture including non-transitory computer-readable storage media, such as memory or storage cells associated with processing circuitry systems 180, 280, and / or 380. In some examples, the memory may be local and electrically integrated with the processing circuitry system, or in other examples, the memory may be external and electrically connected to the processing circuitry system 160, such as via a data bus or a direct connection. Exemplary non-transitory computer-readable storage media may include RAM, ROM, programmable ROM (PROM), erasable programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), flash memory, hard disk, magnetic media, optical media, or any other computer-readable storage device or tangible computer-readable medium. The term "non-transitory" may indicate that the storage medium is not embodied in a carrier wave or propagating signal. In some examples, a non-transitory storage medium may store data that changes over time (e.g., stored in RAM or a cache).

[0098] The following numbered examples illustrate one or more aspects of this disclosure.

[0099] Example 1. A method includes: in a first instance, connecting a first ADC of at least two ADCs to a first battery cell via a multiplexer. The method further includes: in the first instance, connecting a second ADC of at least two ADCs to a current sensor via a multiplexer, wherein the current sensor is configured to sense current through the first battery cell. The method further includes: in a second instance, connecting the first ADC to the current sensor via a multiplexer. The method includes: in a second or third instance, connecting the second ADC to the first battery cell via a multiplexer.

[0100] Example 2. The method according to Example 1 further includes: in the first instance, connecting a third ADC of at least two ADCs to a second battery cell.

[0101] Example 3. The method according to any of the foregoing examples further includes: in a second instance, connecting a second ADC to a second battery cell.

[0102] Example 4. The method according to any of the preceding examples further includes: in a second instance, connecting a third ADC to the first battery cell.

[0103] Example 5. The method according to any of the foregoing examples further includes: in a third instance, connecting the first ADC to the second battery cell.

[0104] Example 6. The method according to any of the foregoing examples further includes: in a third instance, connecting the second ADC to the first battery cell.

[0105] Example 7. The method according to any of the preceding examples further includes: in a third instance, connecting a third ADC to a current sensor.

[0106] Example 8. The method according to any of the foregoing examples further includes: in a second instance, connecting a second ADC to a first battery cell.

[0107] Example 9. The method according to any of the foregoing examples further includes: in a third instance, connecting the first ADC to the second battery cell.

[0108] Example 10. The method according to any of the foregoing examples further includes: in a third instance, connecting a second ADC to a current sensor.

[0109] Example 11. The method according to any of the preceding examples further includes: in a fourth example, connecting the first ADC to a current sensor.

[0110] Example 12. The method according to any of the preceding examples further includes: in a fourth instance, connecting the second ADC to the second battery cell.

[0111] Example 13. The method according to any of the foregoing examples further includes: in a second instance, connecting a second ADC to a second battery cell.

[0112] Example 14. The method according to any of the foregoing examples further includes: in a third instance, connecting the first ADC to the second battery cell.

[0113] Example 15. The method according to any of the preceding examples further includes: in a third instance, connecting a second ADC to a first battery cell.

[0114] Example 16. The method according to any of the preceding examples further includes: connecting at least two ADCs to the current sensor, the first battery cell, and the second battery cell in a round-robin sequence.

[0115] Example 17. The method according to any of the foregoing examples further includes: controlling a multiplexer via a processing circuit system to perform the methods of 1 to 16 or any combination thereof.

[0116] Example 18. The method according to any of the preceding examples further includes: determining the impedance of the first battery cell based on measurements performed by at least two ADCs.

[0117] Example 19. The method according to any of the preceding examples further includes: determining a first preliminary impedance based on a first output of a first ADC in a first instance and a second output of a second ADC in a first instance.

[0118] Example 20. The method according to any of the foregoing examples further includes: determining a second preliminary impedance based on a first output of the first ADC in the second instance and a second output of the second ADC in the second instance.

[0119] Example 21. The method according to any of the preceding examples further includes: determining the composite impedance based on a first preliminary impedance and a second preliminary impedance.

[0120] Example 22. The method according to any of the preceding examples, wherein determining the first preliminary impedance comprises: determining a first Fourier representation by applying a first Fast Fourier Transform to a first output of a first ADC in a first instance.

[0121] Example 23. The method according to any of the preceding examples, wherein determining the first preliminary impedance comprises: determining the second Fourier representation by applying a second Fast Fourier Transform to the second output of the second ADC in the first instance.

[0122] Example 24. The method according to any of the preceding examples, wherein determining the first preliminary impedance comprises: determining the first preliminary impedance by performing complex division on the first Fourier representation and the second Fourier representation.

[0123] Example 25. The method according to any of the preceding examples further includes: measuring the impedance of N battery cells using N+1 ADCs.

[0124] Example 26. The method according to any of the preceding examples further includes: providing a drive signal at a drive signal frequency via a modulator driver for driving a modulator connected across the first battery cell such that a modulated drive current flows through the first battery cell.

[0125] Example 27. An apparatus including a multiplexer configured to perform the method described according to any of the foregoing examples.

[0126] Example 28. The device according to Example 27 further includes at least two ADCs, the at least two ADCs including a first ADC and a second ADC configured to perform the method according to Examples 1 to 26 or any combination thereof.

[0127] Example 29. The device according to Example 27 or Example 28 further includes a processing circuitry system configured to perform the method according to Examples 1 to 26 or any combination thereof.

[0128] Example 30. The device or any combination thereof according to Examples 27 to 28 further includes a modulator driver configured to perform the method according to Example 26.

[0129] Example 31. A device for measuring the impedance of a first battery cell. The device includes a first ADC and a second ADC. The device also includes a multiplexer configured to: in a first embodiment, connect the first ADC to the first battery cell, and in another first embodiment, connect the second ADC to a current sensor. The current sensor is configured to sense a current through the first battery cell. The multiplexer is further configured to connect the first ADC to the current sensor in a second embodiment, and to connect the second ADC to the first battery cell in either a second or third embodiment.

[0130] Example 35. An apparatus comprising a computer-readable medium having executable instructions stored thereon, the executable instructions being configured to be executed by a processing circuitry system to cause the processing circuitry system to perform the method or any combination thereof according to Examples 1 to 26.

[0131] Example 36. A system comprising means for performing the methods or any combination thereof according to Examples 1 to 26.

[0132] Various examples have been described in this disclosure. Any combination of the systems, operations, or functions described is contemplated. These and other examples fall within the scope of the appended claims.

Claims

1. An apparatus for measuring the impedance of a first battery cell, the apparatus comprising: At least two analog-to-digital converters (ADCs), including a first ADC and a second ADC; as well as A multiplexer is connected to the at least two ADCs and configured to connect to the first battery cell and the current sensor, wherein the multiplexer is further configured to: In the first instance, the first ADC is connected to the first battery cell; In the first example, the second ADC is connected to the current sensor, wherein the current sensor is configured to sense the current through the first battery cell; In the second example, the first ADC is connected to the current sensor; as well as In the second or third instance, the second ADC is connected to the first battery cell.

2. The device according to claim 1, The at least two ADCs include the first ADC, the second ADC, and the third ADC; and The multiplexer is further configured to: In the first example, the third ADC is connected to the second battery cell; In the second example, the second ADC is connected to the second battery cell; In the second example, the third ADC is connected to the first battery cell; In the third example, the first ADC is connected to the second battery cell; In the third example, the second ADC is connected to the first battery cell; as well as In the third example, the third ADC is connected to the current sensor.

3. The device according to claim 1, wherein the multiplexer is further configured to: In the second example, the second ADC is connected to the first battery cell; In the third example, the first ADC is connected to the second battery cell; In the third example, the second ADC is connected to the current sensor; In the fourth example, the first ADC is connected to the current sensor; as well as In the fourth example, the second ADC is connected to the second battery cell.

4. The device according to claim 1, wherein the multiplexer is further configured to: In the second example, the second ADC is connected to the second battery cell; In the third example, the first ADC is connected to the second battery cell; and In the third example, the second ADC is connected to the first battery cell.

5. The device of claim 1, wherein the multiplexer is configured to connect the at least two ADCs to the current sensor, the first battery cell, and the second battery cell in a round-robin sequence.

6. The device of claim 1, further comprising a processing circuit system configured to determine the impedance of the first battery cell based on measurements performed by the at least two ADCs.

7. The device of claim 6, wherein the processing circuitry is configured to determine the impedance in the following manner: The first preliminary impedance is determined based on the first output of the first ADC in the first instance and the second output of the second ADC in the first instance; The second preliminary impedance is determined based on the first output of the first ADC in the second instance and the second output of the second ADC in the second instance; as well as The composite impedance is determined based on the first preliminary impedance and the second preliminary impedance.

8. The device of claim 7, wherein the processing circuitry is configured to determine the first preliminary impedance in such a manner as: The first Fourier representation is determined by applying a first fast Fourier transform to the first output of the first ADC in the first instance; The second Fourier representation is determined by applying a second fast Fourier transform to the second output of the second ADC in the first instance; as well as The first preliminary impedance is determined by performing complex division on the first Fourier representation and the second Fourier representation.

9. The device according to claim 1, The at least two ADCs are configured to measure the impedance of N battery cells, including the first battery cell, and The at least two ADCs mentioned therein comprise N+1 ADCs.

10. The device of claim 1, further comprising a modulator driver, the modulator driver being configured to provide a drive signal at a drive signal frequency for driving a modulator connected across the first battery cell such that a modulated drive current flows through the first battery cell.

11. A method comprising: In the first instance, a first ADC of at least two analog-to-digital converters (ADCs) is connected to a first battery cell via a multiplexer, wherein the multiplexer is connected to the first battery cell, the at least two ADCs, and a current sensor; In the first example, the second ADC of the at least two ADCs is connected to the current sensor via the multiplexer, wherein the current sensor is configured to sense the current through the first battery cell; In the second example, the first ADC is connected to the current sensor via the multiplexer; as well as In the second or third instance, the second ADC is connected to the first battery cell via the multiplexer.

12. The method of claim 11, further comprising: In the first example, the third ADC of the at least two ADCs is connected to the second battery cell; In the second example, the second ADC is connected to the second battery cell; In the second example, the third ADC is connected to the first battery cell; In the third example, the first ADC is connected to the second battery cell; In the third example, the second ADC is connected to the first battery cell; as well as In the third example, the third ADC is connected to the current sensor.

13. The method of claim 11, further comprising: In the second example, the second ADC is connected to the first battery cell; In the third example, the first ADC is connected to the second battery cell; In the third example, the second ADC is connected to the current sensor; In the fourth example, the first ADC is connected to the current sensor; as well as In the fourth example, the second ADC is connected to the second battery cell.

14. The method of claim 11, further comprising: In the second example, the second ADC is connected to the second battery cell; In the third example, the first ADC is connected to the second battery cell; as well as In the third example, the second ADC is connected to the first battery cell.

15. A system comprising: First battery cell; A current sensor is configured to sense the current passing through the first battery cell; At least two analog-to-digital converters (ADCs), including a first ADC and a second ADC; as well as A multiplexer is connected to the first battery cell, the at least two ADCs, and the current sensor, wherein the multiplexer is configured to: In the first instance, the first ADC is connected to the first battery cell; In the first example, the second ADC is connected to the current sensor; In the second example, the first ADC is connected to the current sensor; as well as In the second or third instance, the second ADC is connected to the first battery cell.

16. The system according to claim 15, The at least two ADCs include the first ADC, the second ADC, and the third ADC; and The multiplexer is further configured to: In the first example, the third ADC is connected to the second battery cell; In the second example, the second ADC is connected to the second battery cell; In the second example, the third ADC is connected to the first battery cell; In the third example, the first ADC is connected to the second battery cell; In the third example, the second ADC is connected to the first battery cell; as well as In the third example, the third ADC is connected to the current sensor.

17. The system of claim 15, wherein the multiplexer is further configured to: In the second example, the second ADC is connected to the first battery cell; In the third example, the first ADC is connected to the second battery cell; In the third example, the second ADC is connected to the current sensor; In the fourth example, the first ADC is connected to the current sensor; as well as In the fourth example, the second ADC is connected to the second battery cell.

18. The system of claim 15, wherein the multiplexer is further configured to: In the second example, the second ADC is connected to the second battery cell; In the third example, the first ADC is connected to the second battery cell; and In the third example, the second ADC is connected to the first battery cell.

19. The system of claim 15, wherein the multiplexer is configured to connect the at least two ADCs to the current sensor, the first battery cell, and the second battery cell in a round-robin sequence.

20. The system of claim 15, further comprising: The second battery unit is connected in series with the first battery unit; as well as A modulator, connected across the first and second battery cells, modulates the current driven by the voltages of the first and second battery cells in a current path that passes through the modulator and returns through the first and second battery cells.

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