Semiconductor power module

Abstract

The invention relates to a semiconductor power module (1) having a first power transistor (5LA) and a second power transistor (5LB), the first power transistor (5LA) and the second power transistor (5LB) being arranged in parallel between a first collector conductor trace (11L) and a first emitter conductor trace (9L), wherein first connection surfaces of the power transistors (5LA, 5LB) are conductively connected to the first collector conductor trace (11L) respectively, and second connection surfaces of the power transistors (5LA, 5LB) are conductively connected to the first emitter conductor trace (9L) respectively, such that when the power transistors (5LA, 5LB) are turned on by an applied control voltage respectively, the current flowing between the first collector conductor trace (11L) and the first emitter conductor trace (9L) is distributed over the two power transistors (5LA, 5LB), wherein a first external power contact (P) is in direct contact with the first collector conductor trace (11) at a first contact area (KB1), wherein a second external power contact (TL) is in contact with the first emitter conductor trace (9L) at a second contact area (KB2) via a first connecting element (13), and wherein the second contact area (KB2) is positioned mechanically asymmetrically between the power transistors (5LA, 5LB) connected to the first emitter conductor trace (9L), such that electrical symmetry with the same effective control voltage is obtained at the two power transistors (5LA, 5LB).

Description

Field of the Invention

[0001] The present invention relates to a semiconductor power module having a first power transistor and a second power transistor, the first power transistor and the second power transistor being arranged in parallel between a first collector conductor trace and a first emitter conductor trace. Here, the first connection surfaces of the power transistors are conductively connected to the first collector conductor trace respectively, and the second connection surfaces of the power transistors are conductively connected to the first emitter conductor trace respectively, such that when the power transistors are turned on by the applied control voltage respectively, the current flowing between the first collector conductor trace and the first emitter conductor trace is distributed over the two power transistors. Background Art

[0002] Power electronics for hybrid electric vehicles or electric vehicles including relevant semiconductor power modules have increasing requirements for structural space, and thus the semiconductor power module together with the electrical leads is designed to be smaller. At the same time, due to the increased power demand, the current density increases. However, smaller electrical leads and higher currents result in higher electrical losses (ohmic as well as frequency characteristics). Therefore, semiconductor power modules optimized for structural space are usually mechanically constructed longitudinally, which, however, leads to extremely asymmetric electrical characteristics. Thus, in the case of parallel connection of power transistors, it may occur that the first power transistor takes over the conduction process and the second power transistor takes over the turn-off process. This particularly limits the short-circuit performance greatly in the case of short-circuit shutdown.

[0003] Figure 2 Exemplarily, a semiconductor power module known from the prior art and implemented as a so-called B2 bridge 1A' is shown, including four power transistors 5LA, 5LB, 5HA, 5HB implemented as IGBTs (IGBT: insulated gate bipolar transistor) and two freewheeling diodes 3L, 3H. From Figure 2It can also be seen that the first power transistor 5LA, the second power transistor 5LB, and the first freewheeling diode 3L are arranged between the first collector conductor trace 11L and the first emitter conductor trace 9L and form the low side of the semiconductor power module 1'. In addition, the third power transistor 5HA, the fourth power transistor 5HB, and the second freewheeling diode 3H are arranged between the second collector conductor trace 11H and the second emitter conductor trace 9H and form the high side of the semiconductor power module 1'. The two collector conductor traces 11L, 11H are arranged spaced apart from each other in the same plane and are coupled to a cooling device (not shown). Therefore, the two collector conductor traces 11L, 11H are respectively used as heat sinks for cooling the semiconductor power module 1. The four power transistors 5LA, 5LB, 5HA, 5HB and the two freewheeling diodes 3L, 3H are respectively arranged on the two collector conductor traces 11L, 11H, wherein the first connection surfaces of the power transistors 5LA, 5LB, 5HA, 5HB and the freewheeling diodes 3L, 3H are conductively connected to the corresponding collector conductor traces 11L, 11H respectively. The second connection surfaces of the power transistors 5LA, 5LB, 5HA, 5HB and the freewheeling diodes 3L, 3H are conductively connected to the corresponding emitter conductor traces 9L, 9H respectively. In addition, the power transistors 5LA, 5LB, 5HA, 5HB and the freewheeling diodes 3L, 3H dissipate heat through the corresponding collector conductor traces 11L, 11H.

[0004] From Figure 2It can also be seen that the first external power contact P to which an alternating voltage potential is applied is connected to the surface of the first collector conductor trace 11L at the first contact area KB1 and thus dissipates heat. The second external power contact TL to which a first direct voltage potential is applied is connected to the first emitter conductor trace 9L at the second contact area KB2 and dissipates heat via the first emitter conductor trace, through the power transistors 5LA, 5LB and the freewheeling diode 3L and via the first collector conductor trace 11L. The third external power contact TH to which a second direct voltage potential is applied is connected to the surface of the second collector conductor trace 11H at the third contact area KB3 and thus dissipates heat. The second emitter conductor 9H is electrically connected to the first collector conductor trace 11L at the fourth contact area KB4 by a connecting element. In addition, the shown semiconductor power module 1 further has further external contacts KH, EH, G1H, G2H, KL, EL, G1L, G2L. Here, the external contact KL is connected by a bonding wire to the first collector conductor trace 11L or the collector terminal of the low-side power transistors 5LA, 5LB of the semiconductor power module 1'. The external contact EL is connected by a bonding wire to the first emitter conductor trace 9L or the emitter terminal of the low-side power transistors 5LA, 5LB of the semiconductor power module 1'. The external contact G1L is connected by a bonding wire to the gate terminal of the first power transistor 5LA on the low side of the semiconductor power module 1'. The external contact G2L is connected by a bonding wire to the gate terminal of the second power transistor 5LB on the low side of the semiconductor power module 1'. Similarly, the external contact KH is connected by a bonding wire to the second collector conductor trace 11H or the collector terminal of the high-side power transistors 5HA, 5HB of the semiconductor power module 1'. The external contact EH is connected by a bonding wire to the second emitter conductor trace 9H or the emitter terminal of the high-side power transistors 5HA, 5HB of the semiconductor power module 1'. The external contact G1H is connected by a bonding wire to the gate terminal of the third power transistor 5HA on the high side of the semiconductor power module 1'. The external contact G2H is connected by a bonding wire to the gate terminal of the fourth power transistor 5HB on the high side of the semiconductor power module 1'. Summary of the Invention

[0005] The advantage of the semiconductor power module according to the present invention is that the effective inductance and ohmic resistance of two power transistors arranged in parallel between the first collector conductor trace and the first emitter conductor trace are adapted to each other by a special wire routing. This prompts the control voltages on the two parallel power transistors to be symmetric, and to turn on and off evenly, so that the energy input during normal operation and short - circuit conditions is evenly distributed across the two parallel power transistors. Thereby, during normal operation, an ideal chip area can be determined for the two power transistors. In the case of a short - circuit, the thermal damage limit of the two power transistors can be utilized to the maximum extent due to the equal distribution of current. In addition, due to the electrical symmetry of the two power transistors having the same effective control voltage, the distance between the two parallel power transistors can be increased, thus enabling a better cooling connection to be achieved.

[0006] An embodiment of the present invention provides a semiconductor power module having a first power transistor and a second power transistor, the first power transistor and the second power transistor being arranged in parallel between a first collector conductor trace and a first emitter conductor trace, wherein the first connection surfaces of the power transistors are conductively connected to the first collector conductor trace respectively, and the second connection surfaces of the power transistors are conductively connected to the first emitter conductor trace respectively, such that when the power transistors are turned on by the applied control voltage respectively, the current flowing between the first collector conductor trace and the first emitter conductor trace is distributed across the two power transistors. Here, a first external power contact is in direct contact with the first collector conductor trace in a first contact area. A second external power contact is in contact with the first emitter conductor trace at a second contact area through a first connection element, wherein the second contact area is mechanically asymmetrically positioned between the power transistors connected to the first emitter conductor trace, so as to obtain electrical symmetry with the same effective control voltage at the two power transistors.

[0007] The semiconductor power module described above can be advantageously improved by the measures and improvements listed below.

[0008] Particularly advantageously, the third power transistor and the fourth power transistor can be arranged in parallel between the second collector conductor path and the second emitter conductor trace, wherein the first connection surfaces of the power transistors can be conductively connected to the second collector conductor trace respectively, and the second connection surfaces of the power transistors can be conductively connected to the second emitter conductor trace respectively, such that when the power transistors are turned on by the applied control voltage respectively, the current flowing between the second collector conductor trace and the second emitter conductor trace can be distributed over the two power transistors. Herein, the third external power contact can be in direct contact with the first collector conductor trace at the third contact area, and the second emitter conductor trace can be in contact with the first emitter conductor trace at the fourth contact area through the second connecting element. Additionally, the first power transistor and the second power transistor connected in parallel can form a low-side path between the second external power contact and the first external power contact, and the third power transistor and the fourth power transistor connected in parallel can form a high-side path between the third external power contact and the first external power contact. Furthermore, the first freewheeling diode can be arranged in parallel with the first power transistor and the second power transistor between the first collector conductor trace and the first emitter conductor trace. The second freewheeling diode can be arranged in parallel with the third power transistor and the fourth power transistor between the second collector conductor trace and the second emitter conductor trace. Thereby, the semiconductor power module can be used as a B2 bridge, wherein an alternating voltage potential is applied at the first external power contact, a first direct voltage potential is applied at the second external power contact, and a second direct voltage potential is applied at the third external power contact. The power transistors can be implemented as IGBTs (Insulated Gate Bipolar Transistors), MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), etc., for example.

[0009] In another advantageous design of the semiconductor power module, the fourth contact area can be positioned mechanically and electrically symmetrically between the two power transistors with respect to the distance between the third power transistor and the fourth power transistor connected in parallel. This promotes symmetry of the control voltage across the two parallel power transistors and promotes uniform turn-on and turn-off, so that the energy input during normal operation and during short-circuit conditions is evenly distributed over the two parallel power transistors.

[0010] In another advantageous design of the semiconductor power module, the second contact area can be moved mechanically in the direction of the second power transistor with respect to the distance between the first power transistor and the second power transistor, and the second power transistor is spatially farther away from the second power contact than the first power transistor. Thereby, the effective inductance and the effective ohmic resistance of the first power transistor are increased, and the effective inductance and the effective ohmic resistance of the second power transistor are decreased, so that the effective inductance and the effective ohmic resistance of the two power transistors are adapted to each other.

[0011] In another advantageous design of the semiconductor power module, a first control voltage can be applied between the external emitter contact and a first external gate contact connected to the control terminal of the first power transistor. In addition, a second control voltage can be applied between the external emitter contact and a second external gate contact connected to the control terminal of the second power transistor. In addition, the external emitter contact can be connected to a first emitter conductor trace at an emitter contact. Here, the emitter contact and the first emitter conductor trace can be mechanically displaced in the direction of the first power transistor with respect to the distance between the first power transistor and the second power transistor.

[0012] In another advantageous design of the semiconductor power module, the first connecting element can be implemented in a U-shape such that, in addition to the second contact area, an air gap is formed between the first connecting element and the first emitter conductor trace. This enables the positioning of the second contact area to be achieved particularly simply and at low cost. In addition, the U-shaped implementation of the first connecting element can enable a heat dissipation path for cooling the second external power contact to be simply implemented.

[0013] In another advantageous design of the semiconductor power module, a heat dissipation assembly with an electrically insulating intermediate layer can be arranged in the region of the second external power contact. The heat dissipation assembly is connected in a materially engaging manner to the first connecting element via a first solder layer and to the first collector conductor trace via a second solder layer. The electrically insulating intermediate layer can form an electrically insulating heat dissipation path between the first connecting element and the first collector conductor trace, and the electrically insulating intermediate layer dissipates heat from the second external power contact. The second external power contact of the semiconductor module can be thermally coupled to the first collector conductor trace serving as a heat sink and heat can be dissipated through the electrically insulating heat dissipation path, and the second external power contact does not directly contact the surface of the collector conductor trace serving as a heat sink. Thus, these external power contacts of the semiconductor power module can also be cooled and the power losses can be dissipated through the cooling path of the semiconductor power module. The second external power contact is thermally coupled to the cooling system of the semiconductor power module via the heat dissipation assembly, so that defined heat dissipation of the external power contact can be achieved. In addition, the thermal performance of the semiconductor power module is advantageously decoupled from the externally applied power losses. In addition, the power transistors do not receive additional heat input due to the connection to the external busbars, so that they can be used more optimally.

[0014] Embodiments of the present invention are shown in the drawings and are explained in more detail in the following description. In addition, semiconductor power modules known from the prior art and described in the introduction of the specification are shown in the drawings. In the drawings, the same reference numerals denote components or elements that perform the same or similar functions. Description of the Drawings

[0015] Figure 1 A schematic diagram showing an embodiment of a semiconductor power module according to the present invention is shown.

[0016] Figure 2 FIG. 1 is a schematic diagram of a semiconductor power module known in the prior art.

[0017] Figure 3 Shown Figure 1 FIG. 1 is a schematic circuit diagram of a semiconductor power module according to the present invention.

[0018] Figure 4 Shown Figure 2 Characteristic curve diagram of the switching characteristics of a known semiconductor power module.

[0019] Figure 5 Shown Figure 1 and Figure 3 FIG. 4 is a characteristic curve diagram of the switching characteristics of the semiconductor power module according to the present invention. DETAILED DESCRIPTION

[0020] from Figure 1 and Figure 3 As can be seen, the illustrated embodiment of the semiconductor power module 1 according to the present invention includes a first power transistor 5LA and a second power transistor 5LB, which are arranged in parallel between a first collector conductor track 11L and a first emitter conductor track 9L, wherein a first connection surface of the power transistors 5LA, 5LB is respectively electrically conductively connected to the first collector conductor track 11L, and a second connection surface of the power transistors 5LA, 5LB is respectively electrically conductively connected to the first emitter conductor track 9L, so that when the power transistors 5LA, 5LB are respectively turned on by an applied control voltage, the current flowing between the first collector conductor track 11L and the first emitter conductor track 9L is distributed between the two power transistors 5LA, 5LB. A first external power contact P is directly in contact with the first collector conductor track 11L at a first contact area KB1. The second external power contact TL is contacted with the first emitter conductor trace 9L at a second contact area KB2 via a first connecting element 13, wherein the second contact area KB2 is mechanically asymmetrically positioned between the power transistors 5LA, 5LB connected to the first emitter conductor trace 9L, so that electrical symmetry with the same effective control voltage is obtained at the two power transistors 5LA, 5LB.

[0021] from Figure 1 and Figure 3It can also be seen that the semiconductor power module 1 shown includes a third power transistor 5HA and a fourth power transistor 5HB, which are arranged in parallel between a second collector conductor trace 11H and a second emitter conductor trace 9H, wherein first connection surfaces of the power transistors 5HA, 5HB are conductively connected to the second collector conductor trace 11H respectively, and second connection surfaces of the power transistors 5HA, 5HB are conductively connected to the second emitter conductor trace 9H respectively, such that when the power transistors 5HA, 5HB are turned on by the applied control voltages respectively, the current flowing between the second collector conductor trace 11H and the second emitter conductor trace 9H is distributed over the two power transistors 5HA, 5HB. In addition, a third external power contact TH is in direct contact with the second collector conductor trace 11H at a third contact region KB3. The second emitter conductor trace 9H is in contact with the first collector conductor trace 11L at a fourth contact region KB4 through a second connecting element 12. From Figure 1 It can also be seen that the fourth contact region KB4 is positioned mechanically and electrically symmetrically between the two power transistors 5HA, 5HB with respect to the distance between the third power transistor 5HA and the parallel-connected fourth power transistor 5HB.

[0022] From Figure 1 and Figure 3 It can also be seen that in the illustrated embodiment, the semiconductor power module 1 is implemented as a B2 bridge 1A. Accordingly, an alternating voltage potential is applied at a first external power contact P. A first DC voltage potential is applied at a second external power contact TL, and a second DC voltage potential is applied at a third external power contact TH. Similar to Figure 2The semiconductor power module 1' known from the prior art shown, the power transistors 5LA, 5LB, 5HA, 5HB are each implemented as an IGBT (IGBT: insulated gate bipolar transistor). In the illustrated embodiment of the semiconductor power module 1, the first power transistor 5LA and the second power transistor 5LB connected in parallel form a low-side path between the second external power contact TL and the first external power contact P. The third power transistor 5HA and the fourth power transistor 5HB connected in parallel form a high-side path between the third external power contact TH and the first external power contact P. In addition, the first freewheeling diode 3L is arranged in parallel with the first power transistor 5LA and the second power transistor 5LB in the low-side path between the first collector conductor trace 11L and the first emitter conductor trace 9L. The second freewheeling diode 3H is arranged in parallel with the third power transistor 5HA and the fourth power transistor 5HB in the high-side path between the second collector conductor trace 11H and the second emitter conductor trace 9H. The two collector conductor traces 11L, 11H are arranged spaced apart from each other in the same plane and are coupled to a cooling device (not shown). Thus, the two collector conductor traces 11L, 11H each serve as a heat sink for cooling the semiconductor power module 1. In addition, the power transistors 5LA, 5LB, 5HA, 5HB and the freewheeling diodes 3L, 3H dissipate heat through the respective collector conductor traces 11L, 11H.

[0023] The first external power contact P is directly connected to the surface of the first collector conductor trace 11L at the first contact area KB1 and thus dissipates heat. In the illustrated embodiment, the second external power contact TL is connected to the first emitter conductor trace 9L at the second contact area KB2 via a first connecting element 14. In the illustrated embodiment, the first connecting element 13 is implemented as U-shaped, such that an air gap 15 is formed between the first connecting element 13 and the first emitter conductor trace 9L, in addition to the second contact area KB2. Furthermore, in the illustrated embodiment, a heat dissipation assembly 20 with an electrically insulating intermediate layer (not shown) is arranged in the area of the second external power contact TL. The heat dissipation assembly is connected in a material-locking manner to the first connecting element 13 via a first soldering layer and to the first collector conductor trace 11L in a material-locking manner via a second soldering layer. The electrically insulating intermediate layer forms an electrically insulating heat dissipation path between the first connecting element 13 and the first collector conductor path 11L, which dissipates heat from the second external power contact TL. The electrically insulating intermediate layer not shown is implemented, for example, as an AMB ceramic substrate and has good to very good thermal conductivity in the range from 20 to 200 W / mK. The AMB ceramic substrate has copper structures on both sides as solderable surfaces, so that corresponding solder layers for heat dissipation can be established between the first connecting element 13 and the electrically insulating intermediate layer and between the electrically insulating intermediate layer and the collector conductor trace 11L. Of course, the electrically insulating intermediate layer can alternatively be implemented as a DBC substrate or an IMS substrate or a pure silicon wafer. The third external power contact TH is directly connected to the surface of the second collector conductor trace 11H at the third contact area KB3 and thus dissipates heat. Furthermore, the illustrated semiconductor power module 1 also has further external contacts KH, EH, G1H, G2H, KL, EL, G1L, G2L. Here, the external contact KL is connected via a bonding wire to the first collector conductor trace 11L or the collector terminal of the power transistors 5LA, 5LB on the low side of the semiconductor power module 1. The external contact EL is connected via a bonding wire to the first emitter conductor trace 9L or the emitter terminal of the power transistors 5LA, 5LB on the low side of the semiconductor power module 1. The external contact G1L is connected via a bonding wire to the gate terminal of the first power transistor 5LA on the low side of the semiconductor power module 1. The external contact G2L is connected via a bonding wire to the gate terminal of the second power transistor 5LB on the low side of the semiconductor power module 1. The external contact KH is similarly connected via a bonding wire to the second collector conductor trace 11H or the collector terminal of the power transistors 5HA, 5HB on the high side of the semiconductor power module 1. The external contact EH is connected via a bonding wire to the second emitter conductor trace 9H or the emitter terminal of the power transistors 5HA, 5HB on the high side of the semiconductor power module 1. The external contact G1H is connected via a bonding wire to the gate terminal of the third power transistor 5HA on the high side of the semiconductor power module 1.The external contact G2H is connected to the gate terminal of the fourth power transistor 5HB on the high side of the semiconductor power module 1 through a bonding wire.

[0024] It can also be seen from Figure 1 that the second contact area KB2 is mechanically moved in the direction of the second power transistor 5LB with respect to the distance between the first power transistor 5LA and the second power transistor 5LB. The second power transistor 5LB is spatially farther from the second power contact TL than the first power transistor 5LA. In addition, a first control voltage is applied between the external emitter contact EL and the first external gate contact G1L connected to the control terminal of the first power transistor 5LA. A second control voltage is applied between the external emitter contact EL and the second external gate contact G2L connected to the control terminal of the second power transistor 5LB. The external emitter contact EL is connected to the first emitter conductor trace 9L at the emitter contact EK. Here, the emitter contact EK and the first emitter conductor trace 9L are mechanically moved in the direction of the first power transistor 5LA with respect to the distance between the first power transistor 5LA and the second power transistor 5LB.

[0025] In Figure 3 , R represents the corresponding line resistance and L represents the corresponding line inductance. Here, the factor represented by x can be set by the positioning of the second contact area KB2 and / or the emitter contact EK to adjust the line ohmic resistance and line inductance at the emitters of the power transistors 5LA, 5LB or at the anode of the freewheeling diode 3L.

[0026] By comparing Figure 4 and Figure 5 in the two characteristic curves, it can be seen that by the embodiment of the semiconductor power module 1 according to the present invention, the current distribution on the two power transistors 5LA, 5LB can be set such that Figure 5 the current difference DI between the current I-5LA flowing through the first power transistor 5LA and the current I-5LB flowing through the second power transistor 5LB shown in Figure 4 is significantly smaller than the current difference DI' shown in

Claims

1. A semiconductor power module (1) having a first power transistor (5LA) and a second power transistor (5LB), wherein the first power transistor (5LA) and the second power transistor (5LB) are arranged in parallel between a first collector conductor trace (11L) and a first emitter conductor trace (9L), wherein a first connecting surface of the first power transistor (5LA) and a first connecting surface of the second power transistor (5LB) are conductively connected to the first collector conductor trace (11L) respectively, and a second connecting surface of the first power transistor (5LA) and a second connecting surface of the second power transistor (5LB) are conductively connected to the first emitter conductor trace (9L) respectively, such that when the first power transistor (5LA) and the second power transistor (5LB) are turned on by an applied control voltage respectively, the current flowing between the first collector conductor trace (11L) and the first emitter conductor trace (9L) is distributed over the first power transistor (5LA) and the second power transistor (5LB), wherein a first external power contact (P) is in direct contact with the first collector conductor trace (11L) at a first contact area (KB1), wherein a second external power contact (TL) is in contact with the first emitter conductor trace (9L) at a second contact area (KB2) via a first connecting element (13), and wherein the second contact area (KB2) is mechanically asymmetrically positioned between the first power transistor (5LA) and the second power transistor (5LB) connected to the first emitter conductor trace (9L) such that electrical symmetry with the same effective control voltage is obtained at the first power transistor (5LA) and the second power transistor (5LB): relative to the distance between the first power transistor (5LA) and the second power transistor (5LB), the second contact area (KB2) is mechanically moved in the direction of the second power transistor (5LB) until the effective inductances and ohmic resistances of the first power transistor (5LA) and the second power transistor (5LB) are adapted to each other by the position of the second contact area (KB2), wherein the second power transistor (5LB) is spatially further away from the second external power contact (TL) than the first power transistor (5LA).

2. The semiconductor power module (1) according to claim 1, characterized in that a third power transistor (5HA) and a fourth power transistor (5HB) are arranged in parallel between a second collector conductor trace (11H) and a second emitter conductor trace (9H), The first connection surfaces of the third power transistor (5HA) and the first connection surfaces of the fourth power transistor (5HB) are conductively connected to the second collector conductor trace (11H) respectively, and the second connection surfaces of the third power transistor (5HA) and the second connection surfaces of the fourth power transistor (5HB) are conductively connected to the second emitter conductor trace (9H) respectively, such that when the third power transistor (5HA) and the fourth power transistor (5HB) are turned on by the applied control voltages respectively, the current flowing between the second collector conductor trace (11H) and the second emitter conductor trace (9H) is distributed over the third power transistor (5HA) and the fourth power transistor (5HB). wherein a third external power contact (TH) is in direct contact with the second collector conductor trace (11H) at a third contact region (KB3), and wherein the second emitter conductor trace (9H) is in contact with the first collector conductor trace (11L) at a fourth contact region (KB4) via a second connecting element (12).

3. The semiconductor power module (1) according to claim 2, characterized in that the first power transistor (5LA) and the second power transistor (5LB) connected in parallel form a low-side path between the second external power contact (TL) and the first external power contact (P), and the third power transistor (5HA) and the fourth power transistor (5HB) connected in parallel form a high-side path between the third external power contact (TH) and the first external power contact (P).

4. The semiconductor power module (1) according to claim 2 or 3, characterized in that a first freewheeling diode (3L) is arranged in parallel with the first power transistor (5LA) and the second power transistor (5LB) between the first collector conductor trace (11L) and the first emitter conductor trace (9L), and a second freewheeling diode (3H) is arranged in parallel with the third power transistor (5HA) and the fourth power transistor (5HB) between the second collector conductor trace (11H) and the second emitter conductor trace (9H).

5. The semiconductor power module (1) according to claim 2 or 3, characterized in that, The fourth contact region (KB4) is positioned symmetrically both mechanically and electrically between the third power transistor (5HA) and the fourth power transistor (5HB) with respect to the distance between the third power transistor (5HA) and the fourth power transistor (5HB) connected in parallel.

6. The semiconductor power module (1) according to claim 1, characterized in that, A first control voltage is applied between an external emitter contact (EL) and a first external gate contact (G1L) connected to the control terminal of the first power transistor (5LA).

7. The semiconductor power module (1) according to claim 6, characterized in that, A second control voltage is applied between the external emitter contact (EL) and a second external gate contact (G2L) connected to the control terminal of the second power transistor (5LB).

8. The semiconductor power module (1) according to claim 6, characterized in that, The external emitter contact (EL) is connected to the first emitter conductor trace (9L) at the emitter contact (EK).

9. The semiconductor power module (1) according to claim 8, characterized in that, The emitter contact (EK) and the first emitter conductor trace (9L) are mechanically displaced in the direction of the first power transistor (5LA) relative to the distance between the first power transistor (5LA) and the second power transistor (5LB).

10. The semiconductor power module (1) according to any one of claims 1 to 3, characterized in that, The first connecting element (13) is embodied in a U-shape such that an air gap (15) is formed between the first connecting element (13) and the first emitter conductor trace (9L) in addition to the second contact area (KB2).

11. The semiconductor power module (1) according to any one of claims 1 to 3, characterized in that, A heat sink assembly (20) with an electrically insulating intermediate layer is arranged in the region of the second external power contact (TL), the heat sink assembly (20) being connected in a materially joined manner to the first connecting element (13) via a first solder layer and to the first collector conductor trace (11L) via a second solder layer, wherein the electrically insulating intermediate layer forms an electrically insulating heat dissipation path between the first connecting element (13) and the first collector conductor trace (11L), and the electrically insulating intermediate layer dissipates heat from the second external power contact (TL).

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