FPGA remote upgrade method, system and storage medium

Abstract

The present invention provides a method for remote upgrading of an FPGA, comprising: writing a data stream file in a non-volatile memory, wherein the data stream file includes a configuration program, a golden bit stream and each application bit stream of each application bit stream in order of storage addresses, and each configuration program includes a switch program and a jump program in order. Receive and cache the upgraded version of the application bit stream sent by the host computer, and perform a reception check on the cached upgraded version of the application bit stream. Perform a write check on the upgraded version of the application bit stream stored in the non-volatile memory. After the check passes, when a loading instruction of the upgraded version of the application bit stream is received, start the corresponding switch program to load the upgraded version of the application bit stream. A remote upgrading system and a storage medium for executing the above method are also provided. The FPGA remote upgrading method, system and storage medium of the present invention can select whether to load the upgraded data stream file, and enhance the stability and reliability of the system.

Description

Technical Field

[0001] The present invention relates to the technical field of programmable logic devices, and in particular to an FPGA remote upgrade method, system and storage medium. Background Art

[0002] Remote upgrade is a major advantage of field programmable gate array (FPGA), which can enhance system functions through upgrade. In the prior art, bitstream upgrade and update are inseparable from boot loading. For some applications, after the bitstream is updated, it is not suitable to start immediately, which is not flexible and convenient enough. The memory in the prior art has a limit on the number of bitstreams. If the number of bitstreams to be stored is relatively large, it will cause inconvenience. In the existing remote upgrade technology, for the existing bitstream in the memory, it cannot be upgraded from one application bitstream to another, and when the bitstream is updated, no verification is performed or only one verification is performed. In the process of receiving the bitstream and writing the bitstream, errors may occur. If no verification is performed or only one verification is performed, the FPGA cannot be successfully configured due to bitstream errors. In the process of remote upgrade, the entire system will fall into an infinite loop, affecting the reliability and stability of the FPGA. Summary of the invention

[0003] The purpose of the present invention is to overcome the deficiencies in the prior art and provide an FPGA remote upgrade method, system and storage medium to solve the technical problem that bitstream upgrade and update are inseparable from startup loading, while providing a multi-verification, reliable and stable FPGA system.

[0004] To achieve the above object, the technical solution adopted by the present invention is:

[0005] A method for remotely upgrading an FPGA comprises the following steps:

[0006] Writing a data stream file in a non-volatile memory, wherein the data stream file includes, in order of storage addresses, a configuration program of each application bit stream, a golden bit stream, and each application bit stream, wherein the configuration program of each application bit stream includes, in order, a switch program and a jump program, wherein the switch program is used to start the corresponding jump program, and the jump program is used to jump and load the application bit stream at a specified position;

[0007] Receiving and caching the upgraded version of the application bitstream sent by the host computer, erasing the corresponding original version of the application bitstream stored in the non-volatile memory, and performing reception verification on the cached upgraded version of the application bitstream;

[0008] If the receiving verification passes, writing the cached application bit stream of the upgraded version into the corresponding storage area of ​​the non-volatile memory;

[0009] reading back the application bit stream of the upgraded version stored in the non-volatile memory, and performing a write check on the read-back application bit stream of the upgraded version;

[0010] If the write verification passes, upon receiving the loading instruction of the upgraded version of the application bitstream, the currently running switch program is closed, and the switch program of the upgraded version of the application bitstream is started to load the upgraded version of the application bitstream;

[0011] If loading the application bitstream of the upgraded version fails, the corresponding switch program is turned off to load the golden bitstream.

[0012] Further improvements to the above technical solution are:

[0013] The non-volatile memory includes a FLASH chip, and the FLASH chip includes at least any one of SPI FLASH and BPIFLASH.

[0014] The method of writing a data stream file in a non-volatile memory includes: obtaining an initial storage address of a first storage space of the non-volatile memory; storing program data in the configuration program from the initial storage address of the first storage space, adding 1 to the storage address corresponding to the program data each time the program data is stored, wherein the number of bits of the first storage space is greater than or equal to the number of bits of the configuration program; adding a preset number to the storage address to obtain a starting storage address of a second storage space, and storing the bit stream data in the golden bit stream from the starting storage address of the second storage space, wherein the preset Assume that the number is an integer greater than or equal to zero, and the number of bits in the second storage space is greater than or equal to the number of bits in the golden bit stream; add a preset number to the storage address to obtain the starting storage address of the third storage space, and start storing the bit stream data in the first application bit stream from the starting storage address of the third storage space, wherein the preset number is an integer greater than or equal to zero, and the number of bits in the third storage space is greater than or equal to the number of bits in the first application bit stream; repeat the above steps until all application bit streams are stored; write the starting storage address of each application bit stream into the corresponding jump program in the first storage area respectively.

[0015] The receiving check of the cached upgraded version of the application bit stream includes: using a CRC check algorithm to respectively obtain a first CRC check code of the upgraded version of the application bit stream in the host computer and a second CRC check code of the cached upgraded version of the application bit stream, and determining whether the first CRC check code and the second CRC check code are consistent; if they are consistent, determining that the receiving check has passed; if they are inconsistent, determining that the receiving check has failed.

[0016] The write verification of the upgraded version of the application bitstream read back comprises: using a CRC verification algorithm to respectively obtain a first CRC verification code of the upgraded version of the application bitstream in the host computer, a second CRC verification code of the cached upgraded version of the application bitstream, and a third CRC verification code of the upgraded version of the application bitstream read back, and judging whether the first CRC verification code, the second CRC verification code and the third CRC verification code are consistent; if they are consistent, determining that the read-back verification passes; if they are inconsistent, determining that the read-back verification fails.

[0017] If the reception verification fails, the upgraded version of the application bit stream sent by the host computer is re-received and cached, and the reception verification is performed on the re-cached upgraded version of the application bit stream.

[0018] If the read-back verification fails, the cached upgraded version of the application bitstream is re-written into the corresponding storage area of ​​the non-volatile memory, and a write verification is performed on the re-written upgraded version of the application bitstream.

[0019] If the receiving check fails, the currently running switch program is closed to load the golden bit stream; if the read-back check fails, the currently running switch program is closed to load the golden bit stream.

[0020] The present invention also provides an FPGA remote upgrade system, comprising:

[0021] A writing module, used for writing a data stream file in a non-volatile memory, wherein the data stream file includes, in order of storage addresses, a configuration program of each application bit stream, a golden bit stream, and each application bit stream, wherein the configuration program of each application bit stream includes, in order, a switch program and a jump program, wherein the switch program is used for starting the corresponding jump program, and the jump program is used for jumping and loading the application bit stream at a specified position;

[0022] A receiving and verifying module, used for receiving and caching the upgraded version of the application bitstream sent by the host computer, erasing the corresponding original version of the application bitstream stored in the non-volatile memory, and performing a receiving and verifying operation on the cached upgraded version of the application bitstream;

[0023] An update module, configured to write the cached application bit stream of the upgraded version into a corresponding storage area of ​​the non-volatile memory if the received verification passes;

[0024] a read-back verification module, configured to read back the application bit stream of the upgraded version stored in the non-volatile memory, and perform write verification on the read-back application bit stream of the upgraded version;

[0025] A first loading module is configured to close the currently running switch program and start the switch program of the upgraded version of the application bitstream to load the upgraded version of the application bitstream when receiving a loading instruction of the upgraded version of the application bitstream if the write verification passes;

[0026] The second loading module is used to close the corresponding switch program to load the golden bitstream if loading the application bitstream of the upgraded version fails.

[0027] The present invention also provides a storage medium, wherein program instructions are stored in the storage medium, and when the program instructions are executed by a processor, the above-mentioned FPGA remote upgrade method is implemented.

[0028] According to the technical solution of the present invention, the FPGA remote upgrade method of the present invention can select the loaded file as needed after writing the data stream file in the non-volatile memory, that is, the bitstream upgrade and update are separated from the startup loading, which is more flexible and convenient for the situation that it is not suitable to start immediately after the bitstream upgrade and update. The receiving and writing processes of the upgraded version of the application bitstream sent by the host computer are verified. If the verification fails, the upgraded version of the application bitstream is not started, which ensures the stability of the system. And when the upgraded version of the application bitstream is selected to load, if an error occurs in the loading process, the corresponding switch program will be turned off, so as to sequentially load the stable golden bitstream, avoid the system from falling into an infinite loop, and ensure the stability and reliability of the FPGA system. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 The figure is a flow chart of the FPGA remote upgrade method according to the first embodiment of the present invention.

[0030] Figure 2 The figure is a schematic diagram of the storage order of files in the non-volatile memory according to an embodiment of the present invention.

[0031] Figure 3 This is a schematic diagram of the framework of the FPGA remote upgrade system of Example 2 of the present invention.

[0032] Figure 4 This is a schematic diagram of the partial module structure of the FPGA remote upgrade system of Example 2 of the present invention.

[0033] Figure 5 This is a schematic diagram of the structure of the FPGA remote upgrade system according to Embodiment 2 of the present invention.

[0034] Figure 6 This is a schematic diagram of the structure of the storage medium of Example 3 of the present invention. DETAILED DESCRIPTION

[0035] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the disclosure of the present invention more thorough and comprehensive.

[0036] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in the specification of the present invention herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0037] Embodiment 1, as Figure 1 As shown, the FPGA remote upgrade method of this embodiment includes the following steps:

[0038] S101. Writing a data stream file into a non-volatile memory, wherein the data stream file includes, in order of storage addresses, a configuration program of each application bit stream, a golden bit stream, and each application bit stream, wherein the configuration program of each application bit stream includes, in order, a switch program and a jump program. The switch program is used to start the corresponding jump program, and the jump program is used to jump and load the application bit stream at a specified position.

[0039] The switch program includes two states, open and closed. When the upgrade application bitstream switch program is in the open state, the corresponding jump program is loaded to jump and load the specified application bitstream. When the upgrade application bitstream switch program is in the closed state, the corresponding jump program is not loaded.

[0040] like Figure 3 As shown, in this embodiment, the non-volatile memory is a FLASH chip, and the FLASH chip can be any one of SPI FLASH and BPI FLASH.

[0041] The method of writing a data stream file in a non-volatile memory includes: obtaining an initial storage address of a first storage space of the non-volatile memory; storing program data in the configuration program from the initial storage address of the first storage space, adding 1 to the storage address corresponding to the program data each time the program data is stored, wherein the number of bits of the first storage space is greater than or equal to the number of bits of the configuration program; adding a preset number to the storage address to obtain a starting storage address of a second storage space, and storing the bit stream data in the golden bit stream from the starting storage address of the second storage space, wherein the preset Assume that the number is an integer greater than or equal to zero, and the number of bits in the second storage space is greater than or equal to the number of bits in the golden bit stream; add a preset number to the storage address to obtain the starting storage address of the third storage space, and start storing the bit stream data in the first application bit stream from the starting storage address of the third storage space, wherein the preset number is an integer greater than or equal to zero, and the number of bits in the third storage space is greater than or equal to the number of bits in the first application bit stream; repeat the above steps until all application bit streams are stored; write the starting storage address of each application bit stream into the corresponding jump program in the first storage area respectively.

[0042] like Figure 2 As shown, the non-volatile memory may include n application bitstreams and one golden bitstream, where n may be any integer greater than or equal to 1, and the number of application bitstream files is not limited, which is mainly limited by the size of the application bitstream files and the capacity of the non-volatile memory. Figure 5 As shown, the order of file storage in the non-volatile memory is switch program 1, jump program 1, switch program 2, jump program 2... switch program n, jump program n, golden bitstream, application bitstream 1, application bitstream 2... application bitstream n. The addresses between the above files may not be continuous. Among them, switch program 1 corresponds to jump program 1 and application bitstream 1, that is, when switch program 1 is turned on, jump program 1 is started, the jump program skips the golden bitstream, and loads the specified application bitstream 1. Similarly, switch program 2 corresponds to jump program 2 and application bitstream 2, that is, when switch program 2 is turned on, jump program 2 is started, the jump program skips the golden bitstream and application bitstream 1, and loads the specified application bitstream 2.

[0043] The golden bitstream is a correct backup data stream that has full integrity and enforceability and is characterized by a lower data version.

[0044] S102, receiving and caching the upgraded version of the application bitstream sent by the host computer, erasing the corresponding original version of the application bitstream stored in the non-volatile memory, and performing a reception check on the cached upgraded version of the application bitstream; if the reception check passes, the cached upgraded version of the application bitstream is written into the corresponding storage area of ​​the non-volatile memory. If the reception check fails, the currently running switch program is closed to load the golden bitstream, and at the same time, the upgraded version of the application bitstream sent by the host computer can be re-received and cached, and the re-cached upgraded version of the application bitstream is received and checked until the reception check passes.

[0045] The receiving verification includes: using a CRC verification algorithm to respectively obtain a first CRC verification code of the upgraded version of the application bit stream in the host computer and a second CRC verification code of the cached upgraded version of the application bit stream, and determining whether the first CRC verification code and the second CRC verification code are consistent; if they are consistent, determining that the receiving verification has passed; if they are inconsistent, determining that the receiving verification has failed.

[0046] The application bit stream of the upgraded version may be executed by the FPGA to be upgraded or by another FPGA, and the upgraded data stream file may be obtained through a remote upgrade channel or medium.

[0047] S103, reading back the application bit stream of the upgraded version stored in the non-volatile memory, and performing a write check on the read-back application bit stream of the upgraded version;

[0048] If the write check passes, step S104 is executed. If the read-back check fails, the currently running switch program is closed to load the golden bitstream, and at the same time, the cached upgraded version of the application bitstream can be re-written to the corresponding storage area of ​​the non-volatile memory, and the re-written upgraded version of the application bitstream is write-checked until the write check passes.

[0049] The write verification includes: using a CRC verification algorithm to respectively obtain a first CRC verification code of the upgraded version of the application bit stream in the host computer, a second CRC verification code of the cached upgraded version of the application bit stream, and a third CRC verification code of the read-back upgraded version of the application bit stream, and determining whether the first CRC verification code, the second CRC verification code, and the third CRC verification code are consistent; if they are consistent, determining that the read-back verification passes; if they are inconsistent, determining that the read-back verification fails.

[0050] S104: upon receiving the instruction to load the upgraded version of the application bitstream, the currently running switch program is closed, the switch program of the upgraded version of the application bitstream is started, the switch program executes the corresponding jump program, the jump program jumps and loads the upgraded version of the application bitstream. If loading the upgraded version of the application bitstream fails, the corresponding switch program is closed to load the golden bitstream.

[0051] In this embodiment, the configuration program of the application bitstream is written to the minimum address, which is conducive to the startup update after the upgrade. In other embodiments, the configuration program can also be stored in any area specified by the non-volatile memory. For example, if a certain bitstream is updated, the application bitstream file at the address is first erased, and then the upgraded version of the application bitstream is written to the address. When the upgraded version of the application bitstream needs to be loaded, it is only necessary to turn on the switch program corresponding to the application bitstream.

[0052] Due to the characteristics of FLASH chips, all the above data are stored in a subsector (sub-sector, which may be different for different manufacturers, generally 4KB), and the insufficient data is filled with 8'hff. The first section is the configuration program, followed by the golden bit stream, and then the application bit stream. The addresses between the files can be discontinuous, but the starting address needs to be aligned with the subsector.

[0053] Since the switch program is set in this embodiment, the application bitstream to be loaded can be selected arbitrarily. For example, when the second application bitstream is selected to be loaded, the switch program 2 is turned on, and all other switch programs are turned off, and the application jump program 2 is loaded, and the application bitstream 2 is jumped and loaded. This setting is more convenient for the situation where the loading and startup cannot be performed immediately after the upgrade.

[0054] Each application bitstream file corresponds to its own switch program and jump program. The opening of each switch program is used to execute the corresponding jump program. If the switch program is closed, the corresponding jump program will not be executed, but the program command of the next address will be executed sequentially. Therefore, the address of the golden bitstream is set after the configuration program and before the application bitstream. In addition, the golden bitstream does not set the switch program and jump program. When all switch programs are closed, the golden bitstream can be loaded directly, thereby improving the stability of the entire system. If multiple switch programs are turned on at the same time, the system will select the switch program with the smallest address to execute.

[0055] In this embodiment, the application bitstream of the upgraded version is verified multiple times, so that it can be determined whether the error occurs during the receiving process or the writing process during the upgrade process. When the receiving verification fails, you can choose to receive again and then write again. If the error only occurs during the writing process, you only need to rewrite it. Multiple verifications can ensure the correctness of the application bitstream of the upgraded version, thereby improving the stability of the FPGA system. Even if the application bitstream of the upgraded version is correct, errors may still occur during the upgrade loading process. At this time, the stability of the system is guaranteed by loading a mature and stable golden bitstream. The remote upgrade process only updates the application bitstream and does not change the golden bitstream. When the restart of the FPGA fails to load the application bitstream of the upgraded version, it will jump to the golden bitstream, thereby ensuring the stability of the system. After the system is updated and upgraded with the bitstream, if it is inconvenient to restart immediately, you can freely choose whether to load the application bitstream of the upgraded version, which is more flexible and convenient to use.

[0056] like Figure 3 As shown, the hardware system of the FPGA remote upgrade method in this embodiment includes a host computer, FPGA and a FLASH chip. The FLASH chip is SPI FLASH.

[0057] Embodiment 2, as Figure 4 and Figure 5 As shown, the FPGA remote upgrade system 10 of this embodiment includes:

[0058] A writing module 11 is used to write a data stream file in a non-volatile memory, wherein the data stream file includes a configuration program of each application bit stream, a golden bit stream and each application bit stream in sequence according to the storage address order, and the configuration program of each application bit stream includes a switch program and a jump program in sequence, wherein the switch program is used to start the corresponding jump program, and the jump program is used to jump and load the application bit stream at a specified position;

[0059] The receiving and verifying module 12 is used to receive and cache the upgraded version of the application bitstream sent by the host computer, erase the corresponding original version of the application bitstream stored in the non-volatile memory, and perform receiving and verifying the cached upgraded version of the application bitstream;

[0060] The updating module 13 is configured to write the cached application bit stream of the upgraded version into a corresponding storage area of ​​the non-volatile memory if the receiving verification passes;

[0061] A read-back verification module 14, configured to read back the application bit stream of the upgraded version stored in the non-volatile memory, and perform write verification on the read-back application bit stream of the upgraded version;

[0062] The first loading module 15 is configured to close the currently running switch program and start the switch program of the upgraded version of the application bitstream to load the upgraded version of the application bitstream when receiving a loading instruction of the upgraded version of the application bitstream if the write verification passes;

[0063] The second loading module 16 is configured to disable the corresponding switch program to load the golden bitstream if loading of the upgraded version of the application bitstream fails.

[0064] like Figure 4 As shown in the figure, the data_process module has the functions of parsing the commands of the host computer, caching the bitstream data, verifying the bitstream data, and generating IPAL commands, which is equivalent to the receiving verification module and the readback verification module. The spi_ctrl module in the figure completes the control of the spi bus during the process of reading and writing the flash chip.

[0065] like Figure 4 As shown, the ipal_ctrl module in the figure controls the hot start of the FPGA and loads the updated bit stream, which is equivalent to the first loading module and the second loading module.

[0066] Embodiment 3: This embodiment provides a storage medium 60, wherein the storage medium 60 stores program instructions 61, and when the program instructions 61 are executed by a processor, the FPGA remote upgrade method of embodiment 1 is implemented.

[0067] The FPGA remote upgrade method and system of the present invention realizes remote upgrade based on the circuit of SPI (Serial Paeripheral Interfacce) main loading mode, without adding and updating hardware circuits, saving PCB circuit costs. And the transmission of remote upgrade commands and bit stream data can be completed through multiple interfaces (serial port, Ethernet, PCIE, etc.), and these interfaces can be used by other modules inside FPGA during non-remote upgrade, which can reduce the investment of hardware resources. The upgrade method can store multiple application data stream files in a non-volatile memory, and can flexibly select the bit stream files that need to be upgraded. There will be a verification process during data writing and receiving to ensure the correctness of the written files, and in the case of failure to load the upgrade data stream file, the system will automatically load the golden bit stream to ensure stable and reliable operation of the system.

[0068] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0069] The above embodiments only express the preferred implementation modes of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for those of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A FPGA remote upgrade method, characterized in that: The following steps are involved: Writing a data stream file in a non-volatile memory, wherein the data stream file includes, in order of storage addresses, a configuration program of each application bit stream, a golden bit stream, and each application bit stream, wherein the configuration program of each application bit stream includes, in order, a switch program and a jump program, wherein the switch program is used to start the corresponding jump program, and the jump program is used to jump and load the application bit stream at a specified position; Receive and cache the upgraded version of the application bitstream sent by the host computer, erase the corresponding original version of the application bitstream stored in the non-volatile memory, and perform reception verification on the cached upgraded version of the application bitstream, including: using a CRC verification algorithm to respectively obtain a first CRC verification code of the upgraded version of the application bitstream in the host computer and a second CRC verification code of the cached upgraded version of the application bitstream, and determine whether the first CRC verification code and the second CRC verification code are consistent; if they are consistent, determine that the reception verification is passed; if they are inconsistent, determine that the reception verification fails; If the receiving verification passes, writing the cached application bit stream of the upgraded version into the corresponding storage area of ​​the non-volatile memory; Reading back the upgraded version of the application bitstream stored in the non-volatile memory, and performing write verification on the upgraded version of the application bitstream read back, including: using a CRC verification algorithm to respectively obtain a first CRC verification code of the upgraded version of the application bitstream in the host computer, a second CRC verification code of the cached upgraded version of the application bitstream, and a third CRC verification code of the upgraded version of the application bitstream read back, and judging whether the first CRC verification code, the second CRC verification code, and the third CRC verification code are consistent; if they are consistent, determining that the readback verification is passed; if they are inconsistent, determining that the readback verification fails; If the write verification passes, upon receiving a load instruction of the upgraded version of the application bitstream, the currently running switch program is closed, and the switch program of the upgraded version of the application bitstream is started to load the upgraded version of the application bitstream; If loading the application bitstream of the upgraded version fails, the corresponding switch program is turned off to load the golden bitstream.

2. The FPGA remote upgrade method according to claim 1, characterized in that: The non-volatile memory includes a FLASH chip, and the FLASH chip includes at least any one of SPI FLASH and BPI FLASH.

3. The FPGA remote upgrade method according to claim 1, characterized in that: The method of writing a data stream file in a non-volatile memory includes: obtaining an initial storage address of a first storage space of the non-volatile memory; storing program data in the configuration program from the initial storage address of the first storage space, adding 1 to the storage address corresponding to the program data each time the program data is stored, wherein the number of bits of the first storage space is greater than or equal to the number of bits of the configuration program; adding a preset number to the storage address to obtain a starting storage address of a second storage space, and storing the bit stream data in the golden bit stream from the starting storage address of the second storage space, wherein the preset Assume that the number is an integer greater than or equal to zero, and the number of bits in the second storage space is greater than or equal to the number of bits in the golden bit stream; add a preset number to the storage address to obtain the starting storage address of the third storage space, and start storing the bit stream data in the first application bit stream from the starting storage address of the third storage space, wherein the preset number is an integer greater than or equal to zero, and the number of bits in the third storage space is greater than or equal to the number of bits in the first application bit stream; repeat the above steps until all application bit streams are stored; write the starting storage address of each application bit stream into the corresponding jump program in the first storage space respectively.

4. The FPGA remote upgrade method according to claim 1, characterized in that: Also includes: If the reception verification fails, the upgraded version of the application bit stream sent by the host computer is re-received and cached, and the reception verification is performed on the re-cached upgraded version of the application bit stream.

5. The FPGA remote upgrade method according to claim 1, characterized in that: Also includes: If the read-back verification fails, the cached upgraded version of the application bitstream is re-written into the corresponding storage area of ​​the non-volatile memory, and a write verification is performed on the re-written upgraded version of the application bitstream.

6. The FPGA remote upgrade method according to claim 1, characterized in that: Also includes: If the reception verification fails, the currently running switch program is closed to load the golden bit stream; If the read-back verification fails, the currently running switch program is closed to load the golden bitstream.

7. An FPGA remote upgrade system, characterized in that: include: A writing module, used for writing a data stream file in a non-volatile memory, wherein the data stream file includes, in order of storage addresses, a configuration program of each application bit stream, a golden bit stream, and each application bit stream, wherein the configuration program of each application bit stream includes, in order, a switch program and a jump program for jumping and loading the application bit stream at a specified position, wherein the switch program is used for starting the corresponding jump program; A receiving verification module is used to receive and cache the upgraded version of the application bit stream sent by the host computer, and perform reception verification on the cached upgraded version of the application bit stream, including: using a CRC verification algorithm to respectively obtain a first CRC verification code of the upgraded version of the application bit stream in the host computer and a second CRC verification code of the cached upgraded version of the application bit stream, and determine whether the first CRC verification code and the second CRC verification code are consistent; if they are consistent, it is determined that the reception verification is passed; if they are inconsistent, it is determined that the reception verification fails; An update module, configured to, if the reception verification passes, erase the application bitstream corresponding to the original version stored in the non-volatile memory, and write the cached application bitstream of the upgraded version into a corresponding storage area of ​​the non-volatile memory; A readback verification module, used for reading back the upgraded version of the application bitstream stored in the non-volatile memory, and performing write verification on the upgraded version of the application bitstream read back, including: using a CRC verification algorithm to respectively obtain a first CRC verification code of the upgraded version of the application bitstream in the host computer, a second CRC verification code of the cached upgraded version of the application bitstream, and a third CRC verification code of the upgraded version of the application bitstream read back, and judging whether the first CRC verification code, the second CRC verification code and the third CRC verification code are consistent; if they are consistent, determining that the readback verification is passed; if they are inconsistent, determining that the readback verification fails; A first loading module is configured to close the currently running switch program and start the switch program of the upgraded version of the application bitstream to load the upgraded version of the application bitstream when receiving a loading instruction of the upgraded version of the application bitstream if the write verification passes; The second loading module is used to close the corresponding switch program to load the golden bitstream if loading the application bitstream of the upgraded version fails.

8. A storage medium, characterized in that: The storage medium stores program instructions, and when the program instructions are executed by the processor, the FPGA remote upgrade method according to any one of claims 1 to 6 is implemented.

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