A PCB model extraction method, device, equipment and medium

Abstract

The present application discloses a PCB model extraction method, device, equipment and medium, including: determining a correction link corresponding to a target PCB link; wherein the correction link does not contain a target device in the target PCB link, and the target device is a device that can cause nonlinear effects on the link; extracting a model of the correction link based on a dissipation factor parameter to obtain a corresponding model extraction result; correcting the dissipation factor parameter based on the model extraction result to obtain a corrected dissipation factor parameter; and extracting a model of the target PCB link based on the corrected dissipation factor parameter. In this way, the accuracy of simulation parameters can be improved, thereby improving the accuracy of model extraction and the accuracy of link design evaluation.

Description

Technical Field

[0001] The present application relates to the field of circuit design technology, and in particular to a PCB model extraction method, device, equipment and medium. Background Art

[0002] In traditional digital system design, high-speed interconnection phenomena can often be ignored because they have little impact on system performance. However, with the continuous development of computer technology, high-speed interconnection phenomena are playing a leading role in many factors that determine system performance, often leading to the emergence of some unforeseen problems, greatly increasing the complexity of system design. Therefore, in high-speed link design, it is necessary to optimize each module as much as possible, use simulation tools to evaluate the design feasibility and risk points in advance, and optimize the design based on the simulation results to improve the success rate of system design and shorten the R&D cycle. In the process of high-speed signal link simulation of server system, it is necessary to extract the high-speed link routing model based on PCB (Printed Circuit Board) information, usually extracting the S parameter model of the link for signal simulation. When extracting the model, it is necessary to ensure that the parameter settings of the PCB can reflect the electrical characteristics of the actual PCB, such as link loss. If the simulation parameter settings are inaccurate when extracting the model, the extracted model will deviate from the actual situation, which will affect the simulation results and increase the risk of system design.

[0003] Currently, when extracting PCB routing models, simulation parameters are usually set according to empirical values ​​first, and then the extracted model is compared with the test data of the actual PCB for verification. If the electrical characteristics of the extracted model are close to the actual results, it means that the simulation parameter settings are reasonable. If the electrical characteristics of the extracted model deviate greatly from the actual results, the parameters need to be corrected until the model characteristics match the actual PCB characteristics. However, when the link is more complex, errors are likely to occur during parameter correction, which will mislead engineers' parameter settings and increase system evaluation risks. Summary of the invention

[0004] In view of this, the purpose of this application is to provide a PCB model extraction method, device, equipment and medium, which can improve the accuracy of simulation parameters, thereby improving the accuracy of model extraction and the accuracy of link design evaluation. The specific scheme is as follows:

[0005] In a first aspect, the present application provides a PCB model extraction method, comprising:

[0006] Determine a correction link corresponding to a target PCB link; wherein the correction link does not include a target device in the target PCB link, and the target device is a device that can cause a nonlinear effect on the link;

[0007] Performing model extraction on the correction link based on the dissipation factor parameter to obtain a corresponding model extraction result;

[0008] Correcting the dissipation factor parameter based on the model extraction result to obtain a corrected dissipation factor parameter;

[0009] A model is extracted for the target PCB link based on the corrected dissipation factor parameters.

[0010] Optionally, the step of correcting the dissipation factor parameter based on the model extraction result to obtain the corrected dissipation factor parameter includes:

[0011] Determining a simulated link loss value based on the model extraction result;

[0012] Comparing the simulated link loss value with the actual link loss value of the correction link to obtain a comparison result; wherein the comparison result includes the magnitude relationship and difference between the simulated link loss value and the actual link loss value;

[0013] If the difference is greater than a preset threshold, the dissipation factor parameter is adjusted based on the size relationship and the difference, and the model extraction of the correction link is performed again based on the adjusted dissipation factor parameter until the difference is less than or equal to the preset threshold, and the current dissipation factor parameter is determined as the corrected dissipation factor parameter.

[0014] Optionally, adjusting the dissipation factor parameter based on the size relationship and the difference includes:

[0015] If the magnitude relationship is that the simulated link loss value is greater than the actual link loss value, lowering the dissipation factor parameter based on the difference;

[0016] If the magnitude relationship is that the simulated link loss value is less than the actual link loss value, the dissipation factor parameter is increased based on the difference.

[0017] Optionally, determining a correction link corresponding to a target PCB link includes:

[0018] The target device is removed from the target PCB link to obtain the correction link.

[0019] Optionally, determining a correction link corresponding to a target PCB link includes:

[0020] Determining a correction link corresponding to the target PCB link from existing PCB links;

[0021] Among them, the electronic components connected to the target device in the target PCB link are directly connected through signal lines in the correction link, and the remaining electronic components and routings in the target PCB link are consistent with the correction link.

[0022] Optionally, determining a simulated link loss value based on the model extraction result includes:

[0023] Based on the model extraction result, the simulation link loss value corresponding to the target key frequency point is determined.

[0024] Optionally, the target device includes a capacitor and an electrostatic resistor.

[0025] In a second aspect, the present application discloses a PCB model extraction device, comprising:

[0026] A correction link determination module is used to determine a correction link corresponding to a target PCB link; wherein the correction link does not include a target device in the target PCB link, and the target device is a device that can cause nonlinear effects on the link;

[0027] A correction link model extraction module, used to extract the model of the correction link based on the dissipation factor parameter to obtain a corresponding model extraction result;

[0028] A dissipation factor parameter correction module, used to correct the dissipation factor parameter based on the model extraction result to obtain a corrected dissipation factor parameter;

[0029] The target link model extraction module is used to extract the model of the target PCB link based on the corrected dissipation factor parameters.

[0030] In a third aspect, the present application discloses an electronic device, comprising:

[0031] Memory, used to store computer programs;

[0032] The processor is used to execute the computer program to implement the aforementioned PCB model extraction method.

[0033] In a fourth aspect, the present application discloses a computer-readable storage medium for storing a computer program, wherein the computer program implements the aforementioned PCB model extraction method when executed by a processor.

[0034] It can be seen that the present application first determines the correction link corresponding to the target PCB link; wherein the correction link does not include the target device in the target PCB link, and the target device is a device that can cause nonlinear effects on the link, and then the correction link is model extracted based on the dissipation factor parameter to obtain the corresponding model extraction result, and the dissipation factor parameter is corrected based on the model extraction result to obtain the corrected dissipation factor parameter, and finally the target PCB link is model extracted based on the corrected dissipation factor parameter. That is, the present application first determines the correction link corresponding to the target PCB link, the correction link does not include the device that can cause nonlinear effects on the link, the correction link is model extracted, and the dissipation factor parameter is corrected based on the correction, and finally the target PCB link is model extracted based on the corrected dissipation factor parameter, and the dissipation factor parameter is a key parameter in the simulation parameter, so that the accuracy of the simulation parameter can be improved, thereby improving the accuracy of the model extraction and the accuracy of the link design evaluation. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0036] Figure 1 A flow chart of a PCB model extraction method disclosed in this application;

[0037] Figure 2 A flow chart of a specific PCB model extraction method disclosed in this application;

[0038] Figure 3 A specific target PCB link schematic diagram provided for this application;

[0039] Figure 4 A schematic diagram of actual link loss provided for this application;

[0040] Figure 5 A schematic diagram of a specific simulated link loss curve provided for this application;

[0041] Figure 6 A specific actual loss diagram provided for this application;

[0042] Figure 7 A specific calibration link diagram provided for this application;

[0043] Figure 8A specific simulation link loss curve diagram provided for this application

[0044] Fig. 9 A specific simulation link loss curve diagram provided for this application

[0045] Fig.10 This is a schematic diagram of the structure of a PCB model extraction device disclosed in this application;

[0046] Fig.11 This is a structural diagram of an electronic device disclosed in this application. DETAILED DESCRIPTION

[0047] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0048] At present, when extracting the PCB routing model, the simulation parameters are usually set according to the empirical values ​​first, and then the extracted model is compared and verified with the test data of the actual PCB. If the electrical characteristics of the extracted model are close to the actual results, it means that the simulation parameter settings are reasonable. If the electrical characteristics of the extracted model deviate greatly from the actual results, the parameters need to be corrected until the model characteristics match the actual PCB characteristics. However, when the link is more complex, errors are likely to occur during parameter correction, which will mislead the engineer's parameter settings and increase the risk of system evaluation. To this end, the present application provides a PCB model extraction scheme that can improve the accuracy of simulation parameters, thereby improving the accuracy of model extraction and the accuracy of link design evaluation.

[0049] See also Figure 1 As shown, the embodiment of the present application discloses a PCB model extraction method, including:

[0050] Step S11: determining a correction link corresponding to a target PCB link; wherein the correction link does not include a target device in the target PCB link, and the target device is a device that can cause nonlinear effects on the link.

[0051] In a specific implementation, a correction link corresponding to the target PCB link can be determined from an existing PCB link; wherein the electronic components in the target PCB link connected to the target device are directly connected via signal lines in the correction link, and the remaining electronic components and routings in the target PCB link are consistent with the correction link.

[0052] In another specific implementation, the target device may be removed from the target PCB link to obtain the correction link.

[0053] The target device may include but is not limited to a capacitor and an electrostatic resistor.

[0054] That is, a PCB link similar to the target PCB link to be simulated can be selected from the existing PCB links, but the link does not contain the target device, such as a capacitor device. If there is no such link in the system, the capacitor can be deleted based on the target PCB link for parameter correction. After the parameter correction is completed, the model can be extracted based on the original target PCB link.

[0055] Step S12: extracting a model of the correction link based on the dissipation factor parameter to obtain a corresponding model extraction result.

[0056] Step S13: Correcting the dissipation factor parameters based on the model extraction results to obtain corrected dissipation factor parameters.

[0057] It is understandable that the dissipation factor parameter is a parameter that has a greater impact on the link loss value. Devices such as capacitors or electrostatic resistors will have a nonlinear effect on the link, thereby affecting the correction of this parameter. Removing devices such as capacitors or electrostatic resistors can avoid errors in the correction of this parameter.

[0058] Step S14: extracting a model of the target PCB link based on the corrected dissipation factor parameters.

[0059] It can be seen that the embodiment of the present application first determines the correction link corresponding to the target PCB link; wherein the correction link does not include the target device in the target PCB link, and the target device is a device that can cause nonlinear effects on the link, and then the correction link is model extracted based on the dissipation factor parameter to obtain the corresponding model extraction result, and the dissipation factor parameter is corrected based on the model extraction result to obtain the corrected dissipation factor parameter, and finally the target PCB link is model extracted based on the corrected dissipation factor parameter. That is, the present application first determines the correction link corresponding to the target PCB link, the correction link does not include the device that can cause nonlinear effects on the link, the correction link is model extracted, and the dissipation factor parameter is corrected based on the correction, and finally the target PCB link is model extracted based on the corrected dissipation factor parameter, and the dissipation factor parameter is a key parameter in the simulation parameter, so that the accuracy of the simulation parameter can be improved, thereby improving the accuracy of the model extraction and the accuracy of the link design evaluation.

[0060] See also Figure 2As shown, the embodiment of the present application discloses a specific PCB model extraction method, including:

[0061] Step S21: determining a correction link corresponding to a target PCB link; wherein the correction link does not include a target device in the target PCB link, and the target device is a device that can cause nonlinear effects on the link.

[0062] Step S22: extracting a model of the correction link based on the dissipation factor parameter to obtain a corresponding model extraction result.

[0063] Step S23: Determine a simulated link loss value based on the model extraction result.

[0064] In a specific implementation, the simulated link loss value corresponding to the target key frequency point may be determined based on the model extraction result.

[0065] Step S24: Compare the simulated link loss value with the actual link loss value of the correction link to obtain a comparison result; wherein the comparison result includes the size relationship and difference between the simulated link loss value and the actual link loss value.

[0066] Step S25: If the difference is greater than a preset threshold, the dissipation factor parameter is adjusted based on the size relationship and the difference, and the model extraction of the correction link is performed again based on the adjusted dissipation factor parameter until the difference is less than or equal to the preset threshold, and the current dissipation factor parameter is determined as the corrected dissipation factor parameter.

[0067] That is, if the difference is greater than the preset threshold, the dissipation factor parameter is adjusted based on the size relationship and the difference, and then the process jumps to step S23 until the difference is less than or equal to the preset threshold, and the current dissipation factor parameter is determined as the corrected dissipation factor parameter.

[0068] In a specific implementation, if the size relationship is that the simulated link loss value is greater than the actual link loss value, the dissipation factor parameter can be lowered based on the difference; if the size relationship is that the simulated link loss value is less than the actual link loss value, the dissipation factor parameter can be increased based on the difference.

[0069] Specifically, the amount of increase or decrease is determined based on the difference according to experience, or based on a preset mapping relationship.

[0070] Step S26: extracting a model of the target PCB link based on the corrected dissipation factor parameters.

[0071] For example, see Figure 3As shown, Figure 3 A specific target PCB link link schematic provided for an embodiment of the present application. The signal line is led out from CPU0 and then switched to the inner layer L16. In the middle position of the topology, it switches to the surface layer and connects to the capacitor device. It is then switched to the L16 layer until it is interconnected with CPU1. When extracting the model of the above link, it is necessary to consider whether the loss characteristics of the extracted model match the actual loss characteristics of the link. When there is a deviation between the simulation data and the actual data, it is necessary to correct the simulation parameters to finally match the simulation data with the measured data. First, find the measured loss data of the PCB stack corresponding to the link. The data is generally tested by the PCB board factory based on the test board. The signal line type on the test board is consistent with the CPU interconnect signal line, but does not contain capacitor devices. Check the measured loss value of the CPU interconnect signal line such as Figure 4 As shown, Figure 4 A schematic diagram of actual link loss provided in an embodiment of the present application.

[0072] When extracting the link model, an important parameter that affects the link loss is the Df (dissipation factor) value. This parameter characterizes the material's loss characteristics for the signal and is proportional to the PCB loss. When the simulated link loss value of the extracted model is greater than the actual link loss value, the DF value can be adjusted down during model extraction. When the simulated link loss value of the extracted model is less than the actual link loss value, the DF value can be adjusted up during model extraction. Ultimately, the simulated link loss value of the extracted model matches the actual link loss value. Specifically, the difference at the key frequency point can be less than the preset threshold, within 0.5db. When extracting the model, a relatively reasonable Df value is usually set based on experience, and then the simulated link loss value is compared with the actual link loss, and then the Df value is corrected. In this example, the Df parameter is set to 0.004 based on experience. Model extraction based on this parameter results in a link loss curve such as the following: Figure 5 shown. Figure 5 A schematic diagram of a specific simulated link loss curve provided in an embodiment of the present application. Figure 5 The loss curve in corresponds to the loss of the entire link, including PCB traces, vias, and capacitors.

[0073] For further information, see Figure 6 As shown, Figure 6 A specific actual loss diagram provided in an embodiment of the present application is shown in FIG. Figure 6 The loss values ​​of a single via and capacitor at each frequency are shown. By estimating the data at two frequencies, 8 GHz and 12.89 Hz, we analyze whether the simulated link loss value corresponding to the model extraction matches the actual link loss value. Figure 3It can be seen that the link has a total of 4 vias, 1 capacitor, and a 14-inch PCB trace. Theoretically, the actual link loss at 8GHz is about: -4*0.3-0.3-14*0.6=-9.9db. The actual link loss at 12.89GHz is about: -4*0.4-0.4-14*0.84=-13.76db. The simulated link loss at 8GHz is -11.257db, and the simulated link loss at 12.89GHz is -13.05db. From this comparison, it can be found that the simulated link loss value at 8GHz is greater than the actual link loss value, while the simulated link loss value at 12.89GHz is less than the actual link loss value. This results in that no matter how the Df value is adjusted, the simulation and measured data cannot be well fitted at each frequency point.

[0074] The main reason for this situation is that there are capacitors in the link, which will cause nonlinear effects on the link, thus affecting the fit between simulation and actual measurement. In order to eliminate the influence of capacitance and better fit the simulation parameters, the capacitance in the link is first removed to generate a correction link, such as Figure 7 shown. Figure 7 A specific correction link diagram provided in the embodiment of the present application. Model extraction is performed based on the correction link, and the obtained link loss curve is as follows Figure 8 As shown, Figure 8 A specific simulation link loss curve diagram provided in the embodiment of the present application is provided. By estimating the data at two frequency points of 8 GHz and 12.89 Hz, it is analyzed whether the model extraction matches the measured value. Figure 7 The link in the example has 2 vias and 14-inch PCB traces. The actual link loss at 8GHz is about -2*0.3-14*0.6=-9db. The actual total link loss at 12.89GHz is about -2*0.4-14*0.84=-12.56db. The simulated link loss at 8GHz is -8.13db, and the simulated link loss at 12.89GHz is -11.16db. Analysis shows that the simulated link loss is less than the actual total link loss at both 8GHz and 12.89Hz. The simulated df parameter needs to be increased and set to 0.0055.

[0075] Furthermore, the model is extracted again based on the corrected Df value, and the link loss curve obtained is as follows: Fig. 9 shown. Fig. 9A specific simulation link loss curve diagram provided for the embodiment of the present application. The simulated link loss after parameter correction is -9.1db@8GHz and -12.46db@12.89GHz, which is basically matched with the actual link loss -9db@8GHz and -12.56db@12.89GHz, indicating that the parameter setting is reasonable and can be applied to simulate the actual link containing capacitors. That is, the model of the target PCB link is extracted based on the parameter. Thereby improving the accuracy of system simulation evaluation and thus improving the quality of link design.

[0076] See also Fig.10 As shown, the embodiment of the present application discloses a PCB model extraction device, including:

[0077] A correction link determination module 11 is used to determine a correction link corresponding to a target PCB link; wherein the correction link does not include a target device in the target PCB link, and the target device is a device that can cause nonlinear effects on the link;

[0078] A correction link model extraction module 12, used to extract a model of the correction link based on a dissipation factor parameter to obtain a corresponding model extraction result;

[0079] A dissipation factor parameter correction module 13 is used to correct the dissipation factor parameter based on the model extraction result to obtain a corrected dissipation factor parameter;

[0080] The target link model extraction module 14 is used to extract the model of the target PCB link based on the corrected dissipation factor parameters.

[0081] It can be seen that the embodiment of the present application first determines the correction link corresponding to the target PCB link; wherein the correction link does not include the target device in the target PCB link, and the target device is a device that can cause nonlinear effects on the link, and then the correction link is model extracted based on the dissipation factor parameter to obtain the corresponding model extraction result, and the dissipation factor parameter is corrected based on the model extraction result to obtain the corrected dissipation factor parameter, and finally the target PCB link is model extracted based on the corrected dissipation factor parameter. That is, the present application first determines the correction link corresponding to the target PCB link, the correction link does not include the device that can cause nonlinear effects on the link, the correction link is model extracted, and the dissipation factor parameter is corrected based on the correction, and finally the target PCB link is model extracted based on the corrected dissipation factor parameter, and the dissipation factor parameter is a key parameter in the simulation parameter, so that the accuracy of the simulation parameter can be improved, thereby improving the accuracy of the model extraction and the accuracy of the link design evaluation.

[0082] The dissipation factor parameter correction module 13 specifically includes:

[0083] A simulation link loss value determination submodule, used to determine a simulation link loss value based on the model extraction result;

[0084] A link loss value comparison submodule, used to compare the simulated link loss value with the actual link loss value of the correction link to obtain a comparison result; wherein the comparison result includes the size relationship and difference between the simulated link loss value and the actual link loss value;

[0085] The parameter adjustment submodule is used to adjust the dissipation factor parameter based on the size relationship and the difference if the difference is greater than a preset threshold, and start the correction link model extraction module 12 based on the adjusted dissipation factor parameter until the difference is less than or equal to the preset threshold, then determine the current dissipation factor parameter as the corrected dissipation factor parameter.

[0086] The parameter adjustment submodule is specifically used to lower the dissipation factor parameter based on the difference if the size relationship is that the simulated link loss value is greater than the actual link loss value; if the size relationship is that the simulated link loss value is less than the actual link loss value, then increase the dissipation factor parameter based on the difference.

[0087] In a specific implementation, the correction link determination module 11 is specifically configured to remove the target device from the target PCB link to obtain the correction link.

[0088] In another specific implementation, the correction link determination module 11 is specifically used to determine the correction link corresponding to the target PCB link from the existing PCB links;

[0089] Among them, the electronic components connected to the target device in the target PCB link are directly connected through signal lines in the correction link, and the remaining electronic components and routings in the target PCB link are consistent with the correction link.

[0090] Furthermore, the simulation link loss value determination submodule is specifically used to determine the simulation link loss value corresponding to the target key frequency point based on the model extraction result.

[0091] Furthermore, the target device includes a capacitor and an electrostatic resistor.

[0092] See also Fig.11As shown, an embodiment of the present application discloses an electronic device 20, including a processor 21 and a memory 22; wherein the memory 22 is used to store a computer program; and the processor 21 is used to execute the computer program, wherein the computer program, when executed by the processor, implements the PCB model extraction method disclosed in the aforementioned embodiment.

[0093] For the specific process of the above-mentioned PCB model extraction method, reference may be made to the corresponding contents disclosed in the aforementioned embodiments, which will not be described in detail here.

[0094] Furthermore, the memory 22 as a carrier for storing resources may be a read-only memory, a random access memory, a magnetic disk or an optical disk, etc., and the storage method may be temporary storage or permanent storage.

[0095] In addition, the electronic device 20 also includes a power supply 23, a communication interface 24, an input / output interface 25 and a communication bus 26; wherein the power supply 23 is used to provide working voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and an external device, and the communication protocol it follows is any communication protocol that can be applied to the technical solution of the present application, and is not specifically limited here; the input / output interface 25 is used to obtain external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs, and is not specifically limited here.

[0096] Furthermore, an embodiment of the present application also discloses a computer-readable storage medium for storing a computer program, wherein the computer program, when executed by a processor, implements the PCB model extraction method disclosed in the aforementioned embodiment.

[0097] For the specific process of the above-mentioned PCB model extraction method, reference may be made to the corresponding contents disclosed in the aforementioned embodiments, which will not be described in detail here.

[0098] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0099] The steps of the method or algorithm described in conjunction with the embodiments disclosed herein may be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module may be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0100] The above is a detailed introduction to a PCB model extraction method, device, equipment and medium provided by the present application. This article uses specific examples to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea; at the same time, for general technicians in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A PCB model extraction method, characterized in that: include: Determine a correction link corresponding to a target PCB link; wherein the correction link does not include a target device in the target PCB link, and the target device is a device that can cause a nonlinear effect on the link; Performing model extraction on the correction link based on the dissipation factor parameter to obtain a corresponding model extraction result; Correcting the dissipation factor parameter based on the model extraction result to obtain a corrected dissipation factor parameter; A model is extracted for the target PCB link based on the corrected dissipation factor parameters.

2. The PCB model extraction method according to claim 1, characterized in that: The step of correcting the dissipation factor parameter based on the model extraction result to obtain the corrected dissipation factor parameter includes: Determining a simulated link loss value based on the model extraction result; Comparing the simulated link loss value with the actual link loss value of the correction link to obtain a comparison result; wherein the comparison result includes the magnitude relationship and difference between the simulated link loss value and the actual link loss value; If the difference is greater than a preset threshold, the dissipation factor parameter is adjusted based on the size relationship and the difference, and the model extraction of the correction link is performed again based on the adjusted dissipation factor parameter until the difference is less than or equal to the preset threshold, and the current dissipation factor parameter is determined as the corrected dissipation factor parameter.

3. The PCB model extraction method according to claim 2, characterized in that: The adjusting the dissipation factor parameter based on the size relationship and the difference includes: If the magnitude relationship is that the simulated link loss value is greater than the actual link loss value, lowering the dissipation factor parameter based on the difference; If the magnitude relationship is that the simulated link loss value is less than the actual link loss value, the dissipation factor parameter is increased based on the difference.

4. The PCB model extraction method according to claim 1, characterized in that: The step of determining a correction link corresponding to a target PCB link includes: The target device is removed from the target PCB link to obtain the correction link.

5. The PCB model extraction method according to claim 1, characterized in that: The step of determining a correction link corresponding to a target PCB link includes: Determining a correction link corresponding to the target PCB link from existing PCB links; Among them, the electronic components connected to the target device in the target PCB link are directly connected through signal lines in the correction link, and the remaining electronic components and routings in the target PCB link are consistent with the correction link.

6. The PCB model extraction method according to claim 1, characterized in that: Determining the simulated link loss value based on the model extraction result includes: Based on the model extraction result, the simulation link loss value corresponding to the target key frequency point is determined.

7. The PCB model extraction method according to claim 1, characterized in that: The target devices include capacitors and electrostatic resistors.

8. A PCB model extraction device, characterized in that: include: A correction link determination module is used to determine a correction link corresponding to a target PCB link; wherein the correction link does not include a target device in the target PCB link, and the target device is a device that can cause nonlinear effects on the link; A correction link model extraction module, used to extract the model of the correction link based on the dissipation factor parameter to obtain a corresponding model extraction result; A dissipation factor parameter correction module, used to correct the dissipation factor parameter based on the model extraction result to obtain a corrected dissipation factor parameter; The target link model extraction module is used to extract the model of the target PCB link based on the corrected dissipation factor parameters.

9. An electronic device, characterized in that: include: Memory, used to store computer programs; A processor, configured to execute the computer program to implement the PCB model extraction method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: Used to store a computer program, which, when executed by a processor, implements the PCB model extraction method as described in any one of claims 1 to 7.

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