Isolated switching power converter with data communication between primary and secondary sides

Abstract

The invention patent of this disclosure is named "Isolated switch power converter with data communication capability between primary side and secondary side." The invention discloses an isolated switch power converter, which has the function of signal communication between the secondary side and the primary side of the transformer. The isolated switch power converter includes a transformer, a primary side switch, a secondary side switch, a primary side controller and a secondary side controller. The transformer includes a primary winding and a secondary winding for signal communication with the input end and the output end. The primary side controller is located on the primary side, and the secondary side controller is located on the secondary side. The primary side controller provides a control signal for operating the primary side switch. The secondary side controller is used to detect the voltage on the secondary side switch and provide a control signal for operating the secondary side switch. In addition, the secondary side controller can disconnect the secondary side switch within a set time to transmit the data signal to the primary side controller.

Description

Technical Field

[0001] The present application relates to switching power converters, and more particularly, to a system for transmitting a data signal from a secondary side to a primary side of an isolated switching power converter. Background Art

[0002] An isolated switching power converter provides adjustable power to a load while providing electrical isolation between the load and a power source, such as an alternating current (AC) power source. To provide electrical isolation, an isolated switching power converter (e.g., a flyback converter) includes a transformer having a primary winding coupled to an AC power source via a bridge diode rectifier, and includes a secondary winding coupled to an output node. The components coupled to the primary winding are collectively referred to as the primary side of the power converter circuit. Similarly, the components coupled to the secondary winding are collectively referred to as the secondary side of the power converter circuit. The output node provides an adjustable output voltage and / or an adjustable output current to the load. A rectifier (such as a diode bridge) rectifies the AC power source to provide a rectified input voltage to the isolated switching power converter.

[0003] The primary side power switch (also referred to as a power switching transistor or simply "power switch") controls the delivery of energy to the output load. In the first (closed) state of the power switch, the rectified input voltage powers the primary winding current, which is conducted through the primary winding and the power switch to ground. Energy is stored in the transformer by the conduction of the primary winding current. When the power switch is turned on, a secondary side rectifier (such as an output diode or a synchronous rectifier switching transistor) prevents the secondary winding current from flowing in the secondary winding. In the second (open) state of the power switch, the primary winding current stops, and the secondary side rectifier allows the secondary winding current to conduct, thereby charging the output capacitor and supplying energy to the load.

[0004] Although the output diode is passive and therefore does not require synchronous rectifier control to perform secondary-side rectification of the secondary winding current. However, the use of an output diode reduces efficiency compared to the use of a synchronous rectifier. Therefore, synchronous rectification is widely used to improve efficiency. The synchronous rectifier switching transistor is typically a metal oxide semiconductor field effect transistor (MOSFET). In order to control the switching of the synchronous rectifier (SR) switching MOSFET, the SR controller monitors the drain-to-source voltage on the SR MOSFET. Based on the drain-to-source voltage, the SR controller detects whether the primary side power switch has been disconnected so that the SR switching transistor can be turned on. For example, if the SR switching transistor is an n-type metal oxide semiconductor (NMOS) transistor, the SR controller turns on the SR switching transistor by increasing the gate-to-source voltage of the SR switching transistor to above its threshold voltage.

[0005] The primary side also includes a primary side controller for controlling a closed-loop control loop of the power switch to adjust the output voltage (or output current). In order to properly adjust the output voltage, the primary side controller needs to measure the output voltage in some way. For example, the primary side controller in the converter implementation with primary feedback can indirectly measure the output voltage by detecting the voltage of the auxiliary winding at the transformer reset time. But it is usually more accurate that the secondary side controller directly measures the output voltage and transmits the measured value of the output voltage to the primary side controller through an isolation channel (such as an optical isolator). Since the output voltage is measured by the secondary side controller, this regulation method can be defined as secondary side regulation. In the secondary side regulation, the optical coupler feeds back the measured value of the output voltage to the primary side controller. However, the optical coupler has limitations in terms of occupying more space, increasing cost, reliability, etc. And there are large differences in the current transfer ratio of different optical couplers. Another problem with optical coupler-based communication is that its transmission speed is relatively low. Although high-speed digital isolators can be used as an alternative to optical couplers, digital isolators may be too expensive for low-cost isolated switching power converters.

[0006] In addition to transmitting the output voltage value, it is often desirable to transmit current data from the secondary side to the primary side. For example, a fast-charging flyback converter drives its output voltage to boost, but this boost depends on the qualifications of the load (e.g., a smartphone). The smartphone transmits the amount of boost it can tolerate to the secondary-side controller via a data channel in the charging cable (e.g., a USB cable). The secondary-side controller must then inform the primary-side controller of its desired boost value. Other factors (such as battery terminal voltage and battery temperature in the load) may also be transmitted from the secondary side to the primary side to prevent overcharging and damage to the battery cells, such as due to excessive output voltage in a fast-charging mode of operation. Data communications are also useful in other power conversion systems that need to quickly adjust their output regulation points. Examples include wireless charging, or any technology that typically requires regulation feedback from the secondary side to the primary side.

[0007] One known approach to addressing these issues is to use valley mode switching to transfer data to the primary side. Valley mode switching involves switching the synchronous rectifier switching transistor at the valley of the resonant oscillation of its drain voltage after the synchronous rectifier switching transistor has been turned off during the discontinuous conduction mode of operation (DCM). But valley mode switching is not suitable for continuous conduction mode (CCM) because in CCM mode there is no delay from the disconnection of the synchronous rectifier switching transistor to the turn-on of the power switch transistor. In fact, it is the turn-on of the power switch transistor in CCM operation that triggers the disconnection of the synchronous rectifier switching transistor.

[0008] Therefore, there is a need for an isolated switching power converter that can provide secondary-side to primary-side communication with improved functionality during DCM and CCM modes of operation. Summary of the invention

[0009] The first aspect of the present invention provides a secondary-side controller in a flyback converter for transmitting data to a primary-side controller through a transformer, wherein the secondary-side controller includes: a comparator configured to send a signal by detecting that the voltage on a synchronous rectifier switching transistor is less than a turn-on threshold voltage; a logic circuit configured to detect the start time of a series of first transformer reset cycles and second transformer reset cycles in response to an output signal from the comparator; and a gate driver, wherein the gate driver is used to drive the gate of the synchronous rectifier switching transistor. The logic circuit is configured to respond to the detection of the start of the first transformer reset cycle by turning on the synchronous rectifier switching transistor in response to a command to the gate driver. During the duration of each first transformer reset cycle, the second transformer reset cycle is started by responding to the command of the gate driver, and the synchronous rectifier switching transistor is turned off for at least a portion of each second transformer reset cycle to transmit the corresponding bit of data.

[0010] According to the second aspect of the present patent, a method for transmitting data from a secondary side controller to a primary side controller in a flyback converter is provided, the method comprising: at a first time, detecting that the voltage on a synchronous rectifier switching transistor drops below a turn-on threshold voltage to detect the beginning of a first transformer reset cycle; turning on the synchronous rectifier switching transistor during the first transformer reset cycle to transmit the first bit of the data; at a second time, detecting that the voltage on the synchronous rectifier switching transistor drops below the turn-on threshold voltage to detect the beginning of a second transformer reset cycle; and turning off the synchronous rectifier switching transistor during at least a portion of the second transformer reset cycle to transmit the second bit of the data.

[0011] By reading the following specific embodiments, various aspects of the present invention will be more fully understood. When reading the following description of specific exemplary embodiments in conjunction with the accompanying drawings, its features and embodiments will become apparent to those of ordinary skill in the art. Even though it can be discussed with respect to certain embodiments and the features in the following drawings, all embodiments may include one or more of the effective features discussed herein. In other words, although one or more embodiments may be discussed as having certain effective features, one or more of such features may also be used according to the various embodiments discussed herein. In a similar manner, although exemplary embodiments may be discussed as devices, systems or embodiments below, it should be understood that such exemplary embodiments may be implemented in various devices, systems and methods. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The present invention may be better understood by reference to the following drawings. The embodiments of the present disclosure and its advantages may be better understood by reference to the following specific embodiments. The components in the drawings are not necessarily drawn to scale, but the emphasis is placed on illustrating the principles of the present invention. In the drawings, similar reference numerals throughout the different views indicate corresponding parts.

[0013] Figure 1 An exemplary flyback converter having data transmission based on a transformer reset period according to the present disclosure is shown.

[0014] Figure 2 Some details of an exemplary SR controller and a primary side controller for a flyback converter with data transmission based on a transformer reset period according to the present disclosure are shown.

[0015] Figure 3 Some exemplary waveforms of a flyback converter with data transmission during a transformer reset period during a CCM operation mode according to the present disclosure are shown, wherein the binary state of the data bit is transmitted by maintaining the SR switching transistor on / off during the entire transformer reset period.

[0016] Figure 4 The invention shows the use of CCM operation mode to transfer data from Figure 1 Another exemplary waveform of secondary-side to primary-side transmission of an isolated switching power converter is shown, wherein the binary state of a data bit is transmitted by turning off the SR switching transistor during the latter portion of the transformer reset cycle.

[0017] Figure 5 It shows that according to the patent disclosed in this invention Figure 1 A flow chart of an example of a specific implementation of an isolated switching power converter is shown. DETAILED DESCRIPTION

[0018] The present invention discloses an isolated switching power converter, which has a primary side for signal communication with an input end and a secondary side for signal communication with an output end. The isolated switching power converter includes a transformer, a primary side power switch transistor, a secondary side synchronous rectifier (SR) switch transistor, a primary side controller and a secondary side SR controller. The transformer includes a primary winding for signal communication with the input end and a secondary winding for signal communication with the output end. The power switch transistor is in signal communication with the primary winding. Similarly, the SR switch transistor is in signal communication with the secondary winding. The primary side controller controls the power switch transistor to regulate the transmission of power to a load connected to the output end of the isolated switching power converter.

[0019] The following discussion will be specifically implemented for a flyback converter of an isolated switching power converter without loss of generality. The SR controller compares the drain-to-source voltage on the SR switching transistor with a turn-on threshold voltage. For example, the SR controller may include a comparator that issues an output signal by detecting that the drain-to-source voltage drops below the turn-on threshold voltage (which is typically a negative voltage). As used herein, a signal is considered to be "modulated" when it has a binary state, regardless of whether it is a logic high (e.g., charged to the power supply voltage) or a logic low (grounded. In a conventional flyback converter, the SR converter will respond to the comparator output signal to turn on the SR switching transistor for the entire duration of a transformer reset period. The transformer reset period depends on whether the operation is DCM or CCM. In both modes, the transformer reset period starts with the turning on of the power switching transistor. In DCM, when the secondary winding current drops to zero, then the transformer reset period ends. But in CCM, the current in the secondary winding has not yet dropped to zero before the power switching transistor is turned back on. Therefore, in CCM, the transformer reset period extends from when the power switching transistor has been turned off to when it is turned back on.

[0020] To transfer data, an SR controller is disclosed herein that transfers data to a primary side controller by selectively turning on or off an SR switch transistor during a transformer reset cycle. For example, in a first transformer reset cycle, the SR controller may turn on the SR switch for the entire duration of the first transformer reset cycle. However, in a second transformer reset cycle, the SR controller may not turn on the SR switch transistor for the entire duration of the second transformer reset cycle. For example, the SR controller may keep the SR switch transistor off for the entire duration of the second transformer reset cycle. In addition, the SR controller may turn on the SR switch transistor only for a portion of the second transformer reset cycle, but not for other transformer reset cycles.

[0021] When the power switch transistor is turned off to start the transformer reset cycle, the magnetic energy stored in the transformer is released by generating a secondary winding current. If the SR switch transistor is not turned on during the transformer reset cycle, the secondary winding current will still flow through the body diode of the SR switch transistor. In contrast, if the SR switch transistor is turned on by the SR controller, the secondary winding current flows through the channel in the SR switch transistor instead of the channel of the body diode. In order to turn on the SR switch transistor, the SR switch transistor drives the gate of the SR switch transistor with a voltage exceeding the threshold voltage of the SR switch transistor. When the gate voltage is greater than the threshold voltage, the channel in the SR switch transistor opens. But if the SR controller grounds the gate of the SR switch transistor, the channel closes. Therefore, the secondary winding current may pass through the SR switch transistor in two ways (through the body diode or through the channel), depending on whether the SR controller discharges or charges the gate of the SR switch transistor.

[0022] During the transformer reset cycle, a feedback voltage is generated on the primary winding. The feedback voltage will also be present on the auxiliary winding at the primary side of the transformer. In order to detect data, the primary side controller detects the feedback voltage during the transformer reset cycle. The feedback voltage depends on the output voltage, but will also depend on whether the body diode or the channel is conducting the secondary winding current. Although the feedback voltage varies with the output voltage, it should be noted that the change in the output voltage between the two adjacent transformer reset cycles should not exceed the threshold amount. In contrast, the difference in current conduction through the body diode or through the channel in the SR switching transistor will cause the change in the feedback voltage to exceed the threshold amount. As used herein, when the SR controller increases the gate voltage of the SR switching transistor to above the threshold voltage, the SR controller is considered to turn on the SR switching transistor. Conversely, when the SR controller grounds the gate voltage, the SR controller is considered to turn off the SR switching transistor.

[0023] Therefore, the primary side controller can detect the feedback voltage during each transformer reset cycle, that is, the monitoring of the feedback voltage can be performed by detecting the drain voltage of the power switch transistor or by detecting the voltage on the auxiliary winding. Before transmitting the data, the SR controller controls the SR switch transistor in a conventional SR manner so that the SR switch transistor is turned on during the duration of the transformer reset cycle. The resulting feedback voltage during the transformer reset cycle can be stored as a default feedback voltage. If in a subsequent transformer reset cycle, the primary side controller detects that the feedback voltage minus the default feedback voltage is greater than the threshold amount, the primary side controller has detected that the SR controller has not turned on the SR switch transistor during the entire duration of the transformer reset cycle. The data is therefore digital: if the primary side controller detects that the SR switch transistor is not turned on during the entire duration of the transformer reset cycle, the primary side controller decodes the detection into a first binary value code (logical true or logical false state). On the contrary, if the primary side controller detects that the SR switch transistor is turned on during the entire duration of the transformer reset cycle, the primary side controller decodes the detection into a second binary value, which is the complement of the first binary value. In this way, a single bit can be transmitted in each transformer reset cycle. In another embodiment, multiple data bits can be transmitted in each transformer reset cycle by detecting the on / off time of the SR in the transformer reset cycle. For example, if the transformer reset cycle is represented by a variable T, the SR controller can turn on the SR switch transistor for a duration of T, T / 2, T / 4, or 0 in each transformer reset cycle. These four possibilities are each mapped to 2 data bits. Therefore, the primary side controller can detect the duration that the feedback voltage exceeds the threshold during the transformer reset cycle to determine the data transmission code.

[0024] The following discussion will assume, without loss of generality, that only one bit is transmitted in each transformer reset cycle. In such embodiments, the primary side controller therefore only determines whether the feedback voltage exceeds the default feedback voltage plus the threshold offset voltage. Regardless of the number of bits transmitted in each transformer reset cycle, it should be noted that the transmission mode does not depend on whether there is DCM operation or CCM operation. Therefore, the data transmission disclosed herein is effectively applicable to DCM operation or CCM operation. Since the data transmission rate depends on the switching rate of the power switch transistor (which in turn determines the frequency of the transformer reset cycle repetition), data can be effectively transmitted during CCM operation. However, this method can also transmit data in DCM operation mode, although the data rate will be reduced.

[0025] The default state of data transmission is not transmitted. In this case, the SR controller operates in a conventional manner to turn on the SR switching transistor for the entire duration of each transformer reset cycle. At some point, the SR controller may need to send data. The data may specify a specific bit length (e.g., 8 bits, 16 bits, 32 bits, etc.). In order to alert the primary side controller that data transmission is coming, the SR controller can turn off the SR switching transistor in all or part of the transformer reset cycle. This initial transformer reset cycle acts as a header to alert the primary side controller that the data word is coming. Depending on the word length, a group of subsequent transformer reset cycles will be modulated by the SR controller. For example, if the word length is 16 bits, a group of 16 consecutive transformer reset cycles can be used to transmit words. In the case where the data word transmission is over, the SR controller can transmit another header again to alert the primary side controller of another data word. In this way, a sufficient number of data words can be transmitted to transmit the desired information. In the case where all information is transmitted, conventional SR control can be restored, where the SR switching transistor is fully turned on for the duration of the transformer reset cycle.

[0026] Now go to Figure 1 , an exemplary flyback converter 100 is shown having a transformer 102, a primary side 104, a secondary side 106, a primary side power switch transistor S1, an SR switch transistor S2, a primary side controller 108, and an SR controller 110. The transformer 102 includes a primary side power supply transistor S1, a primary side power supply transistor S2, a primary side power supply transistor S2, a primary side power supply transistor S1, and a secondary side power supply transistor S1. IN ) for signal communication with the primary winding 112 and the output voltage (V OUT) is in signal communication with the secondary winding 114. The power switch transistor S1 is in signal communication with the primary winding 112, and the SR switch transistor S2 is in signal communication with the secondary winding 114. The primary side controller 108 is in signal communication with the gate (or base in a bipolar junction transistor embodiment) of the power switch transistor S1. The SR controller 110 is in signal communication with the gate of the SR switch transistor S2. The transformer 102 may also include an auxiliary winding 120, which is in signal communication with the primary side controller 108 via a voltage detection circuit 122. The voltage detection circuit 122 may be implemented as a voltage divider having a first resistor R1 and a second resistor R2, wherein the first resistor R1 is connected to the auxiliary winding 120 and the second resistor R2, which in turn is connected to the ground portion. The primary side controller 108 monitors a feedback voltage 136 at a node between the resistors R1 and R2. In the flyback converter 100, the primary side power switch S1 is an NMOS FET, but in alternative embodiments may be, for example, a high power bipolar junction transistor (BJT). As is known in the field of primary side controllers, the primary side controller 108 controls the switching of the power switch transistor S1, such as by monitoring the primary winding peak current detected by the voltage across the sense resistor R3 connected between the source of the power switch transistor S1 and ground. In each switching cycle, when the primary winding current has reached the desired peak value, the primary side controller 108 turns off the power switch transistor S1. The primary side controller 108 uses the gate drive signal 132 to control the switching of the power switch transistor S1.

[0027] The secondary side 106 of the flyback converter 100 also includes an output capacitor C OUT and a secondary side grounding 126 at the source of the SR switch transistor S2, which may be an NMOS FET. The SR controller 138 controls the gate drive signal 134 through an output (OUT) terminal to drive the gate of the SR switch transistor S2. The SR controller 138 also has a drain terminal (DRAIN) connected to the drain of the SR switch transistor. A ground terminal (GND) is connected to the grounding 126.

[0028] exist Figure 21 is shown in more detail in . To detect the start of the transformer reset cycle, the SR controller 138 may include a comparator 205 that compares the drain voltage Vdrain of the SR switching transistor S2 with a turn-on threshold voltage. The turn-on threshold voltage is typically a negative voltage. In a conventional SR controller, if the drain voltage of the SR switching transistor S2 drops below the turn-on threshold voltage, the SR switching transistor will be turned on. But in the SR controller 138, the logic circuit 210 responds to an output signal from the comparator 205, which indicates that the drain voltage of the SR switching transistor has dropped below the turn-on threshold voltage. If the logic circuit 210 has data to send, the SR switching transistor S2 may be turned on or off in a subsequent transformer reset cycle. If there is no data to be transmitted, the logic circuit 210 responds to the comparator output signal by triggering the gate driver 215 to control the gate drive signal 134 applied to the gate of the SR switching transistor S2. Therefore, the resulting transformer reset cycle will be conventional.

[0029] However, if there is data to be sent, the logic circuit 210 may send a flag signal to the primary side controller 108 by, for example, turning off the SR switch transistor S2 during all or a portion of the transformer reset cycle. Figure 2 As shown, the primary side controller 108 may include a comparator 220 that compares the feedback voltage 136 with the primary side threshold voltage. The threshold voltage is determined based on a default feedback voltage stored in the memory 225. For example, the primary side controller 108 may observe the feedback voltage during the transformer reset cycle, where the SR switch transistor S2 is maintained on for the duration of the transformer reset cycle. In the absence of any data delivery, the default feedback voltage will be predetermined in the future transformer reset cycle (ignoring any slight changes caused by output voltage changes). The primary side controller 108 adds an offset voltage (ΔV) to the default threshold voltage to form the primary side threshold voltage. If the SR switch transistor S1 is disconnected during part or all of the transformer reset cycle, the resulting voltage difference due to the conduction of the body diode in the SR switch transistor S2 will cause the feedback voltage 136 to exceed the primary side threshold voltage, causing the comparator 220 to determine the output signal. If there is a data word to be transmitted (such as signaled by a flag signal), the decoder 230 can continuously decode the data bit (or multiple data bits) in each consecutive transformer reset cycle until the byte is fully received.

[0030] exist Figure 31 shows the waveform of the feedback voltage 136 during CCM operation. The first transformer reset cycle starts at time t0 when the power switch transistor S1 is turned off and ends at time t1 when the power switch transistor S1 is turned back on. The second transformer reset cycle starts at time t2 and ends at time t3. In the first transformer reset cycle and the second transformer reset cycle, the SR switch transistor S2 remains fully turned on. After the resonant ringing, the feedback voltage 136 is equal to the default feedback voltage 302 when the primary side switch S1 is turned off, and decays slowly over time in both the first transformer reset cycle and the second transformer reset cycle. The sudden change in current when the primary side switch S1 is turned off causes high-frequency parasitic ringing 304 in the first transformer reset cycle and high-frequency parasitic ringing 306 in the second transformer reset cycle. The high-frequency parasitic ringing is caused by the resonance between the transformer leakage inductance and the parasitic capacitance of the primary side switch S1 (which is in parallel with the equivalent parallel parasitic capacitance of the primary winding 112), and usually dissipates quickly. During these transformer reset cycles, because the flyback converter 100 operates in CCM mode, the transformer 102 cannot fully demagnetize and transfer its energy to the secondary side 106 .

[0031] In the first transformer reset cycle and the second transformer reset cycle, the SR controller 138 turns on the SR switch transistor S1 for the entire duration of each transformer reset cycle to transmit two consecutive data bits, each data bit having a first binary value. However, in the third transformer reset cycle starting from time t4 and ending at time t5, the SR controller 138 turns off the SR switch transistor S2 so that the secondary winding current must be conducted by the body diode 130. This will cause the feedback voltage 136 to increase to a voltage 314 that is offset ΔV greater than the default feedback voltage 302. The increase in the feedback voltage 136 indicates the transmission of a data bit having a second binary value, which is the complement of the first binary value. For example, if the first two data bits are binary zero, the third data bit will be binary one. Conversely, if the first two data bits are binary one, the third data bit will be binary zero. In this example, based on the feedback voltage 136 during each transformer reset cycle, the data bit being transmitted can be represented as "0" or "1". For example, if the feedback voltage 136 does not exceed the threshold voltage 314, the transmitted data bit may be assigned a digital value of "0", and if the feedback voltage 136 exceeds the threshold voltage 314, the data bit may be assigned a digital value of "1".

[0032] When the SR switch transistor S2 is not turned on during the transformer reset period, the change in feedback voltage 136 is caused by the conduction of the secondary winding current through the body diode 130. This results in a voltage drop across the SR switch transistor of approximately 0.6 to 0.7 volts. This is significantly greater than the expected change in output voltage over a switching cycle of the power switch transistor S1. For example, if the capacitance of the output capacitor is equal to approximately 600uF, the current load change in CCM is approximately 5 amps, and the switching frequency of the power switch transistor S1 is approximately equal to 60kHz, the change in output voltage may be only 138 millivolts.

[0033] As previously described, the feedback voltage 136 is subject to ringing at the end of each transformer reset cycle. To prevent this ringing from exceeding the threshold voltage 314, the SR switch transistor S2 may be turned off only during the final portion of the transformer reset cycle. Figure 4 An exemplary waveform of the feedback voltage during CCM operation is shown in FIG. Figure 3 As described. The first transformer reset cycle starts at time t0 and ends at time t1. The second transformer reset cycle starts at time t2 and ends at time t3. In these two transformer reset cycles, the SR switch transistor S2 is turned on for the duration of the transformer reset cycle. Therefore, the reflected voltage 136 at the midpoint of these transformer reset cycles is much lower than the threshold voltage 314 and equal to the default reflected voltage 302. The third transformer reset cycle starts at time t4 and ends at time t6. During the initial portion of the third transformer reset cycle from time t4 to time t5, the SR switch transistor is turned on. But during the final portion from time t5 to time t6, the SR switch transistor S2 is turned off. At time t5, the feedback voltage 136 therefore jumps to the threshold voltage 314. Referring again to the comparator 220 in the primary side controller 108, the decoder 230 can therefore decode the received data based on whether the comparator output signal exceeds the primary side threshold voltage during the final portion of the continuous transformer reset cycle (such as from time t5 to time t6).

[0034] Go to Figure 5 , shows an example flow chart of a specific implementation of a method 500 performed by an isolated switching power converter according to the disclosed patent. The method includes an action 505, which occurs at a first time and includes detecting that the voltage on the synchronous rectifier switching transistor drops below the turn-on threshold voltage to detect the beginning of a first transformer reset cycle. The method also includes an action 510, that is, turning on the synchronous rectifier switching transistor to transmit the first bit of data during the first transformer reset cycle. An example of such a first transformer reset cycle is Figure 3 and Figure 4The method includes an action 515 that occurs at a second time and includes detecting that the voltage on the synchronous rectifier switching transistor drops below the turn-on threshold voltage to detect the beginning of a second transformer reset cycle. Finally, the method includes an action 520 of turning off the synchronous rectifier switching transistor for at least a portion of the second transformer reset cycle to transmit a second bit of data. An example of such a second transformer reset cycle is Figure 3 or Figure 4 The third transformer reset cycle.

[0035] Some skilled in the art will now appreciate that, without departing from the scope of the present disclosure, various modifications, substitutions and changes may be made to the materials, devices, configurations and methods of use of the device of the present invention. In view of this, the scope of the present disclosure should not be limited to the scope of the specific embodiments shown and described herein, as they are only some examples thereof, and should be fully commensurate with the scope of the claims attached hereto and their functional equivalents.

Claims

1. A secondary side controller in a flyback converter for transmitting data to a primary side controller through a transformer, the secondary side controller comprising: a comparator configured to issue an output signal in response to a voltage across the synchronous rectifier switching transistor being less than a turn-on threshold voltage; a logic circuit configured to detect the initiation of each of a series of first and second transformer reset cycles in response to corresponding initiations of an output signal from the comparator; as well as a gate driver for driving a gate of a synchronous rectifier switching transistor, wherein the logic circuit is configured to: in response to detecting the start of the first transformer reset cycle, command the gate driver to turn on the synchronous rectifier switching transistor for the duration of each first transformer reset cycle, and in response to detecting the start of the second transformer reset cycle, command the gate driver to turn off the synchronous rectifier switching transistor for at least a portion of each second transformer reset cycle to transmit a corresponding bit of the data.

2. The secondary side controller according to claim 1, wherein: The data comprises a data word, and wherein the logic circuit is further configured to command the gate driver to turn off the synchronous rectifier switching transistor during at least a portion of an initial transformer reset period to function as a flag signal that notifies the primary side controller that the data word is to be transmitted.

3. The secondary side controller according to claim 1, wherein: The logic circuit is further configured to turn off the synchronous rectifier switching transistor for the duration of each second transformer reset period.

4. The secondary side controller according to claim 1, wherein: The logic circuit is further configured to turn on the synchronous rectifier switching transistor during a first half of each second transformer reset cycle and turn off the synchronous rectifier switching transistor during a second half of each second transformer reset cycle.

5. The secondary side controller according to claim 1, wherein: The turn-on threshold voltage is a negative voltage.

6. The secondary side controller according to claim 1, wherein: The voltage across the synchronous rectifier switching transistor is the drain voltage of the synchronous rectifier switching transistor.

7. A method for transmitting data from a secondary side controller to a primary side controller in a flyback converter, the method comprising: At a first time, detecting a voltage on a synchronous rectifier switching transistor falling below a turn-on threshold voltage to detect the start of a first transformer reset cycle; turning on the synchronous rectifier switching transistor during the first transformer reset period to transmit a first bit of the data; at a second time, detecting that the voltage across the synchronous rectifier switching transistor drops below the turn-on threshold voltage to detect the start of a second transformer reset cycle; as well as The synchronous rectifier switching transistor is turned off during at least a portion of the second transformer reset period to transmit the second bit of data. 8 . The method of claim 7 , wherein turning off the synchronous rectifier switching transistor during the at least a portion of the second transformer reset period comprises keeping the synchronous rectifier switching transistor off during the second transformer reset period.

9. The method according to claim 7, wherein: Turning off the synchronous rectifier switching transistor during the at least a portion of the second transformer reset period includes turning off the synchronous rectifier switching transistor during a second half of the second transformer reset period.

10. The method according to claim 9, wherein: The second half is the second half of the second transformer reset period.

11. The method according to claim 7, further comprising: The data is received from a data cable connected to the wireless telephone.

12. The method of claim 11, wherein the data comprises a fast charge setting for the wireless telephone.

13. The method according to claim 7, further comprising: A duration of the portion within the second transformer reset period is detected to transmit more than a single bit of data during the second transformer reset period.

14. An isolated switching power converter having a primary side in signal communication with an input terminal and a secondary side in signal communication with an output terminal, the isolated switching power converter comprising: a transformer including a primary winding in signal communication with the input terminal and a secondary winding in signal communication with the output terminal; a primary-side switch in signal communication with the primary winding; a secondary side switch in signal communication with the secondary winding; a primary side controller on the primary side, the primary side controller being configured to output a control signal for operating the primary side switch; as well as a secondary side controller on the secondary side, the secondary side controller configured to monitor a voltage across the secondary side switch to detect the start of each transformer reset cycle in a series of transformer reset cycles, turning on the secondary side switch during a first transformer reset cycle of the transformer reset cycles, and The secondary side switch is opened during at least a portion of a second one of the transformer reset cycles to transmit a data signal to the primary side controller.

15. The isolated switching power converter of claim 14, wherein the secondary side controller is further configured to transmit a first bit of the data signal to indicate to the primary side controller that a data word will come after the first bit.

16. The isolated switching power converter of claim 14 wherein the secondary side controller is further configured to receive information from a device in signal communication with the output.

17. The isolated switching power converter according to claim 14, wherein the transformer further comprises an auxiliary winding in signal communication with the primary side controller, and The data signal is transmitted to the primary side controller through the secondary winding and the auxiliary winding.

18. The isolated switching power converter according to claim 17, wherein the primary side controller communicates signals with the auxiliary winding via a voltage detection circuit, and Wherein the voltage detection circuit is configured to detect a voltage increase during the portion of the second transformer reset cycle in the transformer reset cycle.

19. The isolated switching power converter of claim 18, wherein the voltage increase is caused by a body diode of the secondary side switching crystal.

20. The isolated switching power converter of claim 14, wherein the primary side controller is configured to vary operation of the primary side switch based on the data signal.

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