Device and method for measuring distance to an object, and signal processing device

Abstract

An apparatus and method for filtering false photon counting events for each pixel in a direct time-of-flight sensor array. In some embodiments, the apparatus includes: a light source configured to emit a modulated signal towards an object; a direct time-of-flight (DTOF) sensor array configured to receive reflected signals from the object, wherein the direct time-of-flight sensor array includes a plurality of single photon avalanche diodes (SPADs); and a processing circuitry configured to receive photon event detection signals from a central pixel and a plurality of pixels orthogonally and diagonally adjacent to the central pixel, and output a valid photon detection signal in response to determining whether a sum of the received photon event detection signals is greater than a predetermined threshold.

Description

Technical Field

[0001] The techniques described in embodiments of the present invention generally relate to distance sensing, and more particularly, to devices and methods for measuring the distance to an object and signal processing devices. Background Art

[0002] Range sensors capable of three-dimensional (3D) environmental sensing are used in various applications such as autonomous driving, medicine, robotic vision, security, etc. Current three-dimensional (3D) sensing methods utilize one of stereo matching, light sectioning, or time-of-flight (TOF) approaches. The stereo matching method determines the distance to an object by triangulating features on the object using two cameras that are positioned spatially relative to each other according to a preset spatial configuration. However, if there is a mismatch between the two cameras, the stereo matching method may provide inaccurate 3D distance measurements. Another disadvantage of the stereo matching method is that it requires passive illumination of the object being observed. The light sectioning method is based on triangulation of a laser beam projected onto an object. However, this technique requires expensive moving mechanical components such as lasers and detectors. On the other hand, the time-of-flight (TOF) technique does not require any mechanical components and can capture 3D distance maps at frame rates approaching very high values. In addition, 3D distance measurement sensors based on the time-of-flight (TOF) technique have a small coverage area and relatively low manufacturing costs. In addition, TOF 3D range sensors are based on direct (direct time-of-flight (DTOF)) or indirect (indirect time-of-flight (ITOF)) determination of the delay between a light pulse emitted by an illuminator and a received reflected signal detected by the TOF 3D range sensor.

[0003] The DTOF approach is typically used in applications that require long (kilometer) distance measurements with very high depth resolution, while the ITOF approach is mainly used in applications that require medium-short (tens of meters) distance measurements with a depth resolution of only a few centimeters. Therefore, implementing the DTOF technique in applications that require long distance and high resolution measurements may be superior to the ITOF technique.

[0004] However, in the presence of noise sources such as dark-count rate (DCR) and background illumination noise, the performance of DTOF sensors based on the DTOF technique may degrade due to the high sensitivity of DTOF sensors to noise. For example, thermally generated carriers associated with dark counts may trigger the DTOF sensor to generate false photon counting events, which may lead to inaccurate distance measurements.

[0005] Current methods for reducing false photon counting events in DTOF sensors focus on adding multiple redundant single-photon avalanche diodes (SPADs) to a DTOF sensor array, which sharply increases its coverage area and power consumption and limits the implementation of DTOF sensors to a few pixels, which reduces image resolution. Therefore, current methods for filtering false photon counting events in DTOF sensors are not entirely satisfactory.

[0006] The information disclosed in the background section is only intended to provide background for the various embodiments of the present invention described below, and thus the background section may include information that is not necessarily prior art information (i.e., information known to a person of ordinary skill in the art). Therefore, to the extent that the work of the currently named inventors is described in this background section, that work and aspects of the description that may not qualify as prior art at the time of filing are neither expressly nor implicitly considered prior art to this disclosure. Summary of the Invention

[0007] Embodiments of the present invention provide an apparatus for measuring the distance to an object, the apparatus comprising: a light source configured to emit a modulated signal towards the object; a direct time-of-flight sensor array configured to receive a reflected signal from the object, wherein the direct time-of-flight sensor array includes a plurality of single-photon avalanche diodes; and a processing circuitry coupled to the direct time-of-flight sensor array and configured to: receive photon event detection signals from a central pixel and a plurality of pixels orthogonally and diagonally adjacent to the central pixel, and output a valid photon detection signal in response to determining whether a sum of the received photon event detection signals is greater than a predetermined threshold.

[0008] Embodiments of the present invention provide a signal processing apparatus for processing per-pixel signals received from a direct time-of-flight sensor array, the signal processing apparatus comprising: a per-pixel signal processing circuit coupled to the direct time-of-flight sensor array and configured to: receive photon event detection signals from a central pixel and a plurality of pixels orthogonally and diagonally adjacent to the central pixel, and output a valid photon detection signal in response to determining whether a sum of the received photon event detection signals is greater than a predetermined threshold; a time-to-digital converter configured to quantify a time interval between a rising edge of an emitted modulated signal and a rising edge of a reflected signal incident on the central pixel in response to receiving the valid photon detection signal; and a histogramming logic circuit configured to: accumulate a plurality of quantified time measurements received from the time-to-digital converter during a plurality of acquisition frames, and determine depth information based on a statistical distribution of the plurality of quantified time measurements.

[0009] An embodiment of the present invention provides a method for measuring the distance from a direct time-of-flight sensor array to an object, the method comprising: receiving photon event detection signals from a central pixel and a plurality of pixels orthogonally and diagonally adjacent to the central pixel; outputting a valid photon detection signal in response to determining whether the sum of the received photon event detection signals is greater than a predetermined threshold; in response to receiving the valid photon detection signal, using a time-to-digital converter to quantify the time interval between the rising edges of an emitted modulation signal and a reflected signal incident on the central pixel; accumulating a plurality of quantified time measurement values received from the time-to-digital converter during a plurality of acquisition frames; and determining depth information based on the statistical distribution of the plurality of quantified time measurement values. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Various exemplary embodiments of the present disclosure will be described in detail below with reference to the following figures. The figures are provided for illustrative purposes only and depict only the exemplary embodiments of the present disclosure to facilitate the reader's understanding of the present disclosure. Therefore, the figures should not be regarded as limiting the width, scope, or applicability of the present disclosure. It should be noted that these figures are not necessarily drawn to scale for clarity and ease of illustration.

[0011] Figure 1 A block diagram showing a three-dimensional distance sensing system having a pulsed modulation light source and a DTOF sensor array according to some embodiments of the present disclosure.

[0012] Figure 2 A block diagram showing a DTOF sensor array having a 3×3 pixel-by-pixel cross-correlation photon detection system according to some embodiments of the present disclosure.

[0013] Figure 3A A 3×3 sub-array of a DTOF sensor array is shown according to some embodiments.

[0014] Figure 3B A timing diagram showing a modulation signal emitted from a light source and a reflected signal received at a DTOF sensor array according to some embodiments.

[0015] Figures 4A to 4C A block diagram showing a row or column pixel-by-pixel activation method according to some embodiments.

[0016] Figure 5 A block diagram showing a 3×3 pixel-by-pixel cross-correlation photon detection system according to some embodiments.

[0017] Figure 6 A block diagram showing a 5×5 pixel-by-pixel cross-correlation photon detection system according to some embodiments.

[0018] Figures 7A to 7CShows photon count histograms obtained from a single pixel at various threshold settings, according to some embodiments.

[0019] Figures 8A to 8B Shows a flowchart of a noise filtering method in a DTOF sensor according to some embodiments.

[0020] Figure 9 Shows a block diagram of a DTOF ranging system according to some embodiments.

[0021] Figures 10A to 10B Is a schematic diagram showing a 3D plan view of an exemplary DTOF sensor.

[0022] Figures 11A to 1 1C schematically shows a cross-sectional plan view of an exemplary DTOF sensor.

[0023] Figures 12A to 1 2C schematically shows a cross-sectional plan view of an exemplary DTOF sensor, with a time amplifier connected between the SPAD detector and the associated timestamp circuitry. Detailed Description

[0024] The various exemplary embodiments of the present disclosure are described below with reference to the accompanying drawings, so that those of ordinary skill in the art can make and use the present disclosure. It will be apparent to those of ordinary skill in the art that various changes or modifications can be made to the examples described herein without departing from the scope of the present disclosure after reading the present disclosure. Therefore, the present disclosure is not limited to the exemplary embodiments and applications described and shown herein. In addition, the specific order and / or hierarchy of steps in the methods disclosed herein are merely exemplary approaches. Based on design preferences, the specific order or hierarchy of steps of the disclosed methods or processes can be rearranged while remaining within the scope of the present disclosure. Therefore, those of ordinary skill in the art will understand that the methods and techniques disclosed herein present various steps or actions in a sample order, and the present disclosure is not limited to the specific order or hierarchy presented, unless otherwise expressly stated.

[0025] Figure 1A three-dimensional distance sensing system 100 is shown that measures a distance 111 from a DTOF sensor 117 to a three-dimensional object 109. In one embodiment, a light source 101 emits a modulated signal 105 towards the three-dimensional object 109. In an embodiment, the light source 101 may include an array of light-emitting diodes (LEDs) or solid-state lasers 103 (e.g., vertical-cavity surface-emitting lasers (VCSELs) with wavelengths in the range of 850 nanometers (nm) to 870 nanometers). In some embodiments, the modulated signal 105 may be a square wave or a continuous wave (e.g., a sine wave). In some embodiments, the modulated signal 105 is generated periodically with a predetermined period. In another embodiment, the modulated signal 105 may be generated using digital circuitry including a ring oscillator and a counter.

[0026] A reflected signal 107 is reflected from the three-dimensional object 109 and detected by a DTOF sensor array system 115. In some embodiments, the DTOF sensor array system 115 may include a two-dimensional array of optical receivers 113. In an embodiment, the DTOF sensor array system 115 may be implemented by SPAD optical receivers. As Figure 1 shown, the DTOF sensor 117 operates by measuring the round-trip time T of photons emitted from the light source 101 and captured by the sensor array system 115. d The round-trip time of the photons carried in the modulated signal 105 and the reflected signal 107 is determined by measuring the phase delay of the reflected signal 107 relative to the modulated signal 105. Then the distance D 111 is determined by the following formula:

[0027]

[0028] where c is the speed of light in the material medium where the three-dimensional object 109 and the DTOF sensor 117 are located, and T d is the round-trip time of the photons emitted from the light source 101 and captured by the sensor array system 115.

[0029] Figure 2A block diagram showing a DTOF sensor array system 200 according to some embodiments. The DTOF sensor array system 200 includes a two-dimensional square pixel array 221, the two-dimensional square pixel array 221 including pixels 223 and 225a to 225h, each pixel having a SPAD photodetector. In some embodiments, the SPAD photodetector may be implemented using Complementary Metal Oxide Semiconductor (CMOS) technology. The DTOF sensor array system 200 further includes signal processing circuitry coupled to the DTOF sensor array 221. In some embodiments, the signal processing circuitry includes: row control logic circuitry 201 that selects a row from the two-dimensional pixel array 221; and column readout logic circuitry 203 configured to select a column from the two-dimensional pixel array 221. According to some embodiments, the column readout logic 203 may include a plurality of time to digital converters (TDCs) 211 configured to quantify the time interval between the rising edges of the transmitted signal and the reflected signal. In some embodiments, the DTOF sensor array system 200 provides depth information 207 generated by histogramming logic circuitry 205, the histogramming logic circuitry 205 accumulating the quantified time interval measurements generated by the TDCs 211 into a statistical representation (such as a histogram of photon event detection signals versus quantified time measurements). In some embodiments, the histogramming logic circuitry 205 may be implemented on-chip or off-chip.

[0030] In addition, as Figure 2 shown, the DTOF sensor array system 200 may include per-pixel signal processing circuitry 209 configured to filter spurious photon event detection signals received by pixel 223. In various embodiments, the per-pixel signal processing circuitry 209 may include logic gates 219 configured to transition their binary output states based on receiving photon event detection signals, for example, from any of pixels 225a to 225h or 223. The per-pixel signal processing circuitry 209 may further include counter logic circuitry 217 triggered by transitions of the binary output states of the logic gates 219 and configured to count the number of received photon event detection signals. In some embodiments, as Figure 2As shown, the per-pixel signal processing circuit 209 may include a threshold conversion logic circuit 215 that compares the output of the counter logic 217 with a predetermined threshold N. In various embodiments of the present disclosure, the threshold conversion logic 215 may be a magnitude comparator that compares the input received from the counter logic 217 with the predetermined threshold N to determine whether the input received from the counter logic 217 is greater than the predetermined threshold N. In some embodiments, the predetermined threshold N is an integer greater than 1. In some embodiments, N is an integer value in the range of 2 to 5. Additionally, the per-pixel signal processing circuit 209 may include a dual state machine 213 configured to change its state based on the output of the threshold conversion logic 215. For example, if the output of the threshold conversion logic 215 indicates that the input received from the counter logic 217 is greater than the predetermined threshold N, the dual state machine 213 changes its state to "valid". In some embodiments, an exemplary advantage of the per-pixel signal processing circuit 209 is that it reduces the effects of dark count rate (DCR) and background illumination noise by processing cross-correlated photon detection events received from any of the pixels 225a to 225h or 223.

[0031] Figure 3A Shows a 3×3 sub-array 301 of the DTOF sensor array composed of a central pixel 303, a plurality of pixels 307a diagonally adjacent to the central pixel 303, and a plurality of pixels 305a to 305d orthogonally adjacent to the central pixel 303.

[0032] According to some embodiments of the present disclosure, Figure 3B The timing diagram shown provides a graphical example of the cross-correlated photon detection path. Thus, Figure 3B Shows a timing diagram of the modulation signal 311 and the reflected signal 313 emitted from the light source. Additionally, Figure 3B Also shows the Figure 3A Timing diagrams of the reflected signals 315, 319, and 321 incident on the 3×3 sub-array shown. The reflected signals 315, 319, and 321 generated by the SPAD photoreceivers of the DTOF sensor array have a predetermined pulse width 317. Additionally, Figure 3B Shows examples of false photon event detection signals 323 and 327 generated by the central pixel 303 and the pixels orthogonally adjacent to the central pixel 303. In this regard, the false photon event detection signals 323 and 327 may be due to DCR or background noise.

[0033] Figure 3BAn effective photon event detection signal 325 is also shown. In some embodiments, an effective photon event detection signal is detected when the center pixel 303 and at least two other adjacent pixels generate pulses at any time within the effective window. In this embodiment, when the number of photon event detection signals received from orthogonally adjacent pixels and diagonally adjacent pixels is at least two, the center pixel 303 registers an effective photon event detection signal. In other embodiments, the width of the effective window may be the same as the pulse widths of the reflected signals 315, 319, and 321.

[0034] Figures 4A to 4C A block diagram showing per-pixel activation of pixels for a correlation detection process according to some embodiments is shown. As Figure 4A shown, for each center pixel, a 3×3 per-pixel cross-correlation photon detection system is used to collect photon detections or SPAD avalanche events. In some embodiments of the present invention, the row control logic may select three adjacent rows in the DTOF sensor array. Thus, for the center pixel 411, photon detections or SPAD avalanche events are collected from the pixels 401, 405, 409, and 415 that are orthogonally adjacent to the center pixel 411 and from the pixels 403, 407, 413, and 417 that are diagonally adjacent to the center pixel 411. In this embodiment, for each center pixel in the DTOF sensor array, photon detections or SPAD avalanche events are collected from the orthogonally adjacent pixels and diagonally adjacent pixels associated with the center pixel.

[0035] Figure 4B An alternative method of collecting photon detections or SPAD avalanche events from adjacent pixels is shown. For example, as Figure 4B shown, for each selected pixel row 419, photon detections or SPAD avalanche events are collected from the orthogonally adjacent column pixels 421, 423, 425, 427, and 429. Subsequently, according to Figure 4B , for the pixel 431 of the selected pixel row 419, combined photon detections or SPAD avalanche events from horizontally adjacent pixels are collected from each pixel in the selected pixel row 419. According to another embodiment of the present invention, as Figure 4C shown, the row control logic and column control logic may select a 3×3 sub-array of the DTOF sensor array by activating rows 435, 437, and 439 and columns 436, 438, and 440. In this embodiment, photon detections or SPAD avalanche events are collected from the orthogonally adjacent pixels and diagonally adjacent pixels.

[0036] Figure 5 A block diagram of a 3×3 per-pixel signal processing circuit 500 according to some embodiments of the present invention is shown. In some embodiments, Figure 5The pixel-by-pixel signal processing circuit 500 shown filters the false photon event detection signals. For example, according to one embodiment, the signals generated by the 3×3 sub-array 501 are processed by multiplying a first set of signals generated by pixels 507, 509, 511, and 513 that are orthogonally adjacent to the central pixel 503 by a first predetermined parameter (W1) and multiplying a second set of signals generated by pixels 519, 521, 523, and 529 that are diagonally adjacent to the central pixel 503 by a second predetermined parameter (W2). In some embodiments, the first predetermined parameter W1 and the second predetermined parameter W2 may be scalars. In other embodiments, the first predetermined parameter W1 and the second predetermined parameter W2 may be vectors of length 4 with different or identical elements. For example, the first predetermined parameter W1 may be a vector W1=(w1 1 , w2 1 , w3 1 , w4 1 ) having the same or different elements w1 1 , w2 1 , w3 1 , w4 1 ), and the second predetermined parameter W2 may be a vector W2=(w1 2 , w2 2 , w3 2 , w4 2 ) having the same or different elements w1 2 , w2 2 , w3 2 , w4 2 ).

[0037] As Figure 5 shown, after being scaled by the first predetermined parameter W1 and the second predetermined parameter W2, the first set of signals and the second set of signals are combined in adders 515 and 525, respectively. The respective outputs 517 and 527 of the adders 515 and 525 are transmitted to the pixel-by-pixel cross-correlation photon counter logic 539 implemented in the pixel-by-pixel signal processing circuit 531. In addition, the pixel-by-pixel signal processing circuit 531 may include threshold conversion logic 537. In this regard, the threshold conversion logic 537 compares the output of the counter logic 539 with a predetermined threshold N, and if the output of the counter logic 539 is greater than the predetermined threshold N, it outputs a valid signal. In various embodiments of the present disclosure, the pixel-by-pixel signal processing circuit 531 may further include a delay block 543 that delays the signal 505 received from the central pixel 503 by an amount of time T2. Generally, the delay amount T2 is greater than the pulse window 541 (T1) of the signal 505. In addition, the pixel-by-pixel signal processing circuit 531 may further include an AND gate 535 that outputs a valid photon event detection signal 533 if the central pixel 503 generates a photon event detection signal and the output of the threshold conversion logic 537 is valid.

[0038] Figure 6 A block diagram showing a 5×5 per-pixel signal processing circuit 600 according to some embodiments of the present invention. For example, according to one embodiment, the signals generated by a 5×5 sub-array 601 are processed as follows: multiplying a first set of signals 633 generated by a plurality of pixels 635 that are orthogonally adjacent to the central pixel 603 and are located within an embedded 3×3 sub-array centered on the central pixel 603 and having the central pixel 603 by a first predetermined parameter (W1), and multiplying a second set of signals 631 generated by a plurality of pixels 627 that are diagonally adjacent to the central pixel 603 and are located within the 3×3 sub-array by a second predetermined parameter (W2). In addition, as Figure 6 shown, a third set of signals 605 generated by a plurality of pixels 625 (pixels 602a to 602d) that are orthogonally adjacent to the central pixel 603 and are located on the periphery of the 5×5 sub-array 601 are multiplied by a third predetermined parameter (W3). In some embodiments, the first predetermined parameter W1, the second predetermined parameter W2, and the third predetermined parameter W3 may be scalars. In other embodiments, the first predetermined parameter W1, the second predetermined parameter W2, and the third predetermined parameter W3 may be vectors of length 4 with different or identical elements.

[0039] As Figure 6 shown, after being scaled by the first predetermined parameter W1 and the second predetermined parameter W2, the first set of signals 633 and the second set of signals 631 are combined in an adder 629. In addition, after being scaled by the third predetermined parameter W3, the third set of signals 605 are combined in an adder 621. The outputs of the adders 629 and 621 are transmitted to a per-pixel cross-correlation photon counter logic 611 implemented in a per-pixel signal processing circuit 619. In addition, the per-pixel signal processing circuit 619 may include a threshold conversion logic circuit 613. In this regard, the threshold conversion logic circuit 613 compares the output of the counter logic circuit 611 with a predetermined threshold N. In various embodiments of the present disclosure, the per-pixel signal processing circuit 619 may further include a delay block 609 that delays the signal 604 received from the central pixel 603 by a time amount T2. Generally, the delay amount T2 is greater than the pulse window 607 (T1) of the signal 604. In addition, the per-pixel signal processing circuit 619 may further include an AND gate 615 that outputs a valid photon event detection signal 617 if the central pixel 603 generates a photon event detection signal and the output of the threshold conversion logic 613 is valid.

[0040] Figures 7A to 7C Shows a single-pixel histogram of detected photon events relative to TDC measurements obtained for various predetermined thresholds according to some embodiments. Figure 7AA single-pixel histogram 701a with an effective photon detection peak signal 703a is shown, which is obtained from a DTOF sensor array without a cross-correlation photon detection system. In addition, the false photon event detection signal caused by noise is also shown in Figure 7A . In this regard, the noise floor 707a is lower than the effective photon detection peak signal 703a by an amount 705a. In addition, given the effective photon detection peak signal (703a) and the noise floor 707a, various quality factors such as the signal-to-noise ratio (SNR) can be calculated. Figure 7B A single-pixel histogram 701b with an effective photon detection peak signal 703b according to various embodiments of the present invention is shown, which is obtained from a DTOF sensor array including a cross-correlation photon detection system with a preset threshold N = 2. In addition, the correlation coefficients a1 (W1) and a2 (W2) are set to 1 and 1, respectively. In this embodiment, the noise floor 707b is lower than the effective photon detection peak signal 703b by an amount 705b, and the amount 705b is greater than Figure 7A the amount 705a shown. Therefore, Figure 7B the resulting signal-to-noise ratio in the embodiment shown in Figure 7A is greater than the signal-to-noise ratio in the embodiment shown in Figure 7C A single-pixel histogram 701c with an effective photon detection peak signal 703c according to various embodiments of the present invention is shown, which is obtained from a DTOF sensor array including a cross-correlation photon detection system with a preset threshold N = 4. In addition, in this embodiment, the correlation coefficients a1 (W1) and a2 (W2) are set to 2 and 1, respectively. As Figure 7C shown, the noise floor 707c is lower than the effective photon detection peak signal 703c by an amount 705c, and the amount 705c is greater than Figures 7A to 7B the amount 705a or 705b shown. Therefore, Figure 7C the resulting signal-to-noise ratio in the embodiment shown in Figure 7A or Figure 7B is greater than the signal-to-noise ratio in the embodiment shown in

[0041] Figures 8A to 8B A flowchart of a false photon counting filtering method implemented in a DTOF sensor according to some embodiments is shown. For example, Figure 8AA flowchart showing a method of filtering false photon counts using a 3×3 per-pixel cross-correlation photon detection system. According to various embodiments, in step 801, the DTOF sensor activates three consecutive pixel rows in the two-dimensional DTOF array during each DTOF acquisition frame and senses the reflected signal incident on the activated pixels. In other embodiments, in step 801, the DTOF sensor may activate all pixels in the two-dimensional DTOF array during each DTOF acquisition frame and sense the reflected signal incident on the activated pixels. Next, in step 803, for each pixel, a 3×3 per-pixel cross-correlation photon detection system is used to collect photon event detection signals or SPAD avalanche events. In step 807, for each pixel, when the total number of photon event detection signals or SPAD avalanche events collected by the per-pixel cross-correlation system is greater than a preset threshold, a valid photon event detection signal is reported. In step 809, the TDC digitizes the valid time-of-flight measurements.

[0042] As another example, Figure 8B A flowchart showing a method of filtering false photon counts using a 5×5 per-pixel cross-correlation photon detection system. According to various embodiments, in step 811, the DTOF sensor activates five consecutive pixel rows in the two-dimensional DTOF array during each DTOF acquisition frame and senses the reflected signal incident on the activated pixels. In other embodiments, in step 811, the DTOF sensor may activate all pixels in the two-dimensional DTOF array during each DTOF acquisition frame and sense the reflected signal incident on the activated pixels. Next, in step 813, for each pixel, a 5×5 per-pixel cross-correlation photon detection system is used to collect photon event detection signals or SPAD avalanche events. In step 815, for each pixel, when the total number of photon event detection signals or SPAD avalanche events collected by the per-pixel cross-correlation system is greater than a preset threshold, a valid photon event detection signal is reported. In step 817, the TDC digitizes the valid time-of-flight measurements.

[0043] Figure 9 A block diagram showing a ranging system 901 according to various embodiments of the present invention. In some embodiments, the ranging system 901 may be a Light Detection and Ranging (LiDAR) sensor configured to implement the various methods described herein. In other embodiments, the ranging system 901 may be implemented in an unmanned autonomous ground and air vehicle. Additionally, the ranging system 901 may also be implemented in a three-dimensional object recognition system. As Figure 9 shown, the ranging system 901 includes a processor 905, a memory 903, and a DTOF sensor 907.

[0044] In some embodiments, the DTOF sensor 907 is implemented as one of the DTOF sensors described above in connection with Figure 5 and Figure 6 In some embodiments, the processor 905 controls the general operation of the ranging system 901. Additionally, the processor 905 performs image processing and classification algorithms on the data received from the DTOF sensor 907. The processor 905 may include one or more processing circuits or modules, such as a central processing unit (CPU) and / or a general-purpose microprocessor, a microcontroller, a digital signal processor (DSP), a field-programmable gate array (FPGA), a programmable logic device (PLD), a controller, a state machine, strobe logic, discrete hardware components, a dedicated hardware finite state machine, or any other suitable combination of circuits, devices, and / or structures capable of performing computations or other data manipulation.

[0045] The memory 903, which may include both read-only memory (ROM) and random access memory (RAM), can provide instructions and data to the processor 905. A portion of the memory 903 may also include non-volatile random access memory (NVRAM). The processor 905 generally performs logical and arithmetic operations based on program instructions stored within the memory 903. The instructions stored in the memory 903 (also referred to as software) can be executed by the processor 905 to perform the methods described herein. The processor 905 and the memory 903 together form a processing system that stores and executes software. As used herein, "software" means any type of instructions that can configure a machine or device to perform one or more desired functions or processes, whether referred to as software, firmware, middleware, microcode, etc. The instructions may include code (e.g., in source code format, binary code format, executable code format, or any other suitable code format). When executed by the one or more processors, the instructions cause the processing system to perform the various functions described herein.

[0046] Figure 10A A schematic diagram showing a three-dimensional plan view of an exemplary DTOF sensor. In some embodiments, Figure 10AThe three-dimensional plan view shown includes a SPAD array 1009 composed of a rectangular array of reverse-biased avalanche diodes. In various embodiments, the SPAD array 1009 can be integrated on a silicon substrate of a semiconductor device with auxiliary components, such as a readout control circuitry 1003, a row control circuitry 1007, an associated time-to-digital conversion (TDC) circuitry 1005, and a histogramming circuitry 1001. Although these various auxiliary components 1001, 1003, 1005, and 1007 can be silicon-based components, it should be understood that these silicon-based components can include non-silicon and / or silicon alloy materials, such as various oxides, insulators, or dielectrics (e.g., silicon oxide, silicon nitride, or silicon oxynitride or silicon-free dielectrics), various silicon alloys (e.g., silicon-germanium or silicon-germanium-carbon alloy), metal layers, or metal alloy layers, etc. In addition, in various embodiments, the SPAD array 1009 and the auxiliary components 1001, 1003, 1005, and 1007 can be fabricated on different metal layers. For example, the SPAD array 1009 can be patterned or etched on the top opaque layer of the semiconductor device, while the auxiliary components 1001, 1003, 1005, and 1007 can be patterned or etched on the lower metal layer.

[0047] In other embodiments, the SPAD array 1009 and the auxiliary components 1001, 1003, 1005, and 1007 can be fabricated on stacked wafers bonded together to form a DTOF sensor on the semiconductor device. According to various embodiments, the stacked wafers can include silicon, gallium arsenide, or other semiconductor materials. In the illustrated example, the top wafer can include the SPAD array 1009, and the bottom wafer can include the auxiliary components 1001, 1003, 1005, and 1007. In other embodiments, placing the auxiliary digital components 1001, 1003, 1005, and 1007 on the bottom wafer allows for a very high fill factor to be achieved in the SPAD array 1009 on the top wafer. In addition, since the top wafer can be formed separately from the bottom wafer, a customized fabrication process can be utilized to optimize the formation of the SPAD array 1009 on the top wafer, while traditional CMOS processes can be retained when forming the auxiliary digital components 1001, 1003, 1005, and 1007 on the bottom wafer.

[0048] In some embodiments, the SPAD array 1009 can be coupled to the associated TDC circuitry 1005 through metal traces 1002. In one embodiment, the metal traces 1002 can include micro-through silicon vias (μTSVs). The μTSVs can include conductive materials (e.g., copper, polysilicon, etc.) deposited therein. As Figure 10AAs shown, at least one metal trace can be fabricated for each row of the SPAD array 1009 to transmit the output pulses generated by each row of the SPAD array 1009 to the associated TDC circuitry 1005 of the bottom wafer. In various embodiments, the metal trace 1002 can include a redistribution layer (RDL) comprising a thin film (e.g., aluminum, copper, etc.) for rerouting and redistributing the electrical connections between the SPAD array 1009 and the associated TDC circuitry 1005.

[0049] Figure 10B Schematic diagram of a three-dimensional plan view showing a possible implementation of a DTOF sensor. Figure 10B The exemplary three-dimensional plan view shown is similar to the Figure 10A three-dimensional plan view discussed above. However, Figure 10B the three-dimensional plan view includes additional metal traces 1008 that connect each pixel in the SPAD array 1009 to a TDC integrated within a rectangular array of TDCs 1005. More specifically, in the Figure 10B three-dimensional plan view, each pixel in the SPAD array is connected to the associated TDC via a metal trace 1008. Thus, Figure 10B the three-dimensional plan view provides both personalized readout and personalized timestamping for each SPAD detector.

[0050] Figure 11A Schematically shows a cross-sectional plan view of an exemplary DTOF sensor. In some embodiments, the cross-sectional plan view of the exemplary DTOF sensor can include a two-dimensional (“2D”) SPAD pixel array 1103. As shown, each pixel is arranged in rows and columns to acquire image data of a person, place, or object. Additionally, Figure 11A the cross-sectional plan view shown can include row control circuitry 1101 configured to receive row addresses from row control circuitry 1007 ( Figures 10A to 10B ) and provide corresponding row control signals, such as reset, row select, charge transfer, dual conversion gain, and readout control signals, to the SPAD pixel array 1103 via a row control path 1102. Additionally, Figure 11AThe cross-sectional plan view shown may also include column control circuitry 1105 coupled to each column of the SPAD pixel array 1103 by one or more conductive lines 1104. In this regard, the one or more conductive lines may be used to read out image signals from the SPAD pixel array 1103 and to supply bias signals (e.g., bias current or bias voltage) to the pixels in the SPAD pixel array 1103. In some embodiments, during a pixel readout operation, the row control circuitry 1101 may be used to select a row of pixels in the SPAD pixel array 1103, and the image signals generated by the image pixels in the row of pixels may be read out along the one or more conductive lines 1104.

[0051] In various embodiments, Figure 11A the cross-sectional plan view may include image readout circuitry that includes one or more time-to-digital converter (TDC) circuitry 1107 and a phase-locked loop (PLL)-based timing reference generation module 1106. Additionally, the TDC circuitry 1107 may be configured to measure time-of-flight and generate time stamps for photon detection events at a resolution greater than the reference clock period. In some embodiments, the PLL module 1106 may be adapted to provide a clock signal to the one or more TDC circuitry 1107. The PLL-based timing reference module 1106 is shown in Figure 11A for illustration only, and the timing reference for the one or more TDC circuitry 1107 may be generated using parallel outputs from any suitable timing module; e.g., delay locked loop (DLL), active delay line, passive delay line, etc.

[0052] FIG. 11B shows a cross-sectional plan view of another possible implementation of the DTOF sensor. The exemplary cross-sectional plan view shown in FIG. 11B is similar to the Figure 11ACross-sectional plan view of the slicing bed. However, the cross-sectional plan view of FIG. 11B includes a time-to-amplitude converter (TAC) 1109, which is configured to measure the time difference between a start signal and a stop signal fed to the TAC 1109. In some embodiments, the TAC 1109 outputs an analog voltage signal, and the signal height of the analog voltage signal is proportional to the time difference measured between the received start signal and stop signal. In a further embodiment, the output analog signal can then be further processed in analog form or digitized, for example, by a downstream analog-digital converter (ADC). Additionally, as shown in FIG. 11B, the cross-sectional plan view may include a ramp integrator 1108, which is connected to the TAC 1109 and is configured to start a ramp signal after the TAC 1109 receives the start signal. After receiving the stop signal, the ramp integrator 1108 reaches a fixed voltage value proportional to the time interval between the received start signal and stop signal.

[0053] FIG. 11C shows a cross-sectional plan view of another possible implementation of the DTOF sensor. The exemplary cross-sectional plan view shown in FIG. 11C is similar to the Figure 11A cross-sectional plan view of. However, the cross-sectional plan view of FIG. 11C includes a single TDC 1110 connected to the column control circuitry 1105. In some embodiments, the TDC 1110 can be configured to detect and generate a timestamp for a photon detection event in any pixel from a selected pixel row.

[0054] Figure 12A Schematically shows a cross-sectional plan view of an exemplary DTOF sensor, with a time amplifier (TA) 1207 connected between the SPAD pixel array 1103 and the counter-based TDC 1203. As Figure 12A shown, the cross-sectional plan view may include a reference clock 1201. In this embodiment, the time resolution of each counter-based TDC 1203 is determined by the frequency of the reference clock 1201, and its quantization error depends on the period of the reference clock 1201. Additionally, the counter-based TDC 1203 can be implemented by an asynchronous binary counter controlled by a start pulse and a stop pulse. For example, the asynchronous binary counter of the TDC 1203 can be driven by the reference clock 1201 and reset by the start pulse. The output of the asynchronous binary counter can be sampled by the stop pulse. The sampled data from the asynchronous binary counter is a digital output proportional to the time difference between the start pulse and the stop pulse. In some embodiments, the stop pulse can be triggered by a pixel in the SPAD pixel array 1103 that detects a photon event, and the start pulse can be triggered when the modulated light is emitted.

[0055] Higher resolution DTOF sensors need to be able to measure the time of flight more accurately. Thus, Figure 12A the cross-sectional floor plan shown in may include a TA 1207, which is configured to amplify the input time difference at the output and thus improve the resolution and dynamic range of the counter-based TDC 1203.

[0056] FIG. 12B shows a cross-sectional floor plan of another possible implementation of a DTOF sensor with a time amplifier (TA) 1207. The exemplary cross-sectional floor plan shown in FIG. 12B is similar to the Figure 12A cross-sectional floor plan discussed above. However, the cross-sectional floor plan of FIG. 12B includes a time-to-amplitude converter (TAC) 1109 and a slow ramp integrator 1205 connected to the TAC 1109 and configured to initiate a slow ramp signal after the TAC 1109 receives a start signal.

[0057] FIG. 12C shows a cross-sectional floor plan of another possible implementation of a DTOF sensor with a time amplifier (TA) 1207. The exemplary cross-sectional floor plan shown in FIG. 12C is similar to the Figure 12A cross-sectional floor plan discussed above. However, the cross-sectional floor plan of FIG. 12C includes a single TDC 1110 connected to the column control circuitry 1105 through the TA 1207.

[0058] In some embodiments, the present invention provides an apparatus for measuring the distance to an object, the apparatus including a light source configured to emit a modulated signal towards the object and a direct time-of-flight (DTOF) sensor array configured to receive a reflected signal from the object, wherein the direct time-of-flight sensor array includes a plurality of single-photon avalanche diodes (SPADs). Additionally, in this embodiment, the apparatus for measuring the distance to an object may include processing circuitry coupled to the direct time-of-flight sensor array, the processing circuitry receiving photon event detection signals from a center pixel and a plurality of pixels orthogonally and diagonally adjacent to the center pixel, and outputting a valid photon detection signal in response to determining whether the sum of the received photon event detection signals is greater than a predetermined threshold. Additionally, in other embodiments, the apparatus for measuring the distance to an object may include row control logic circuitry configured to select a row of pixels in the DTOF sensor array and column control logic circuitry configured to select a column of pixels in the DTOF sensor array.

[0059] In related embodiments, the processing circuitry further includes: row control logic circuitry configured to select a row of pixels in the direct time-of-flight sensor array; and column control logic circuitry configured to select a column of pixels in the direct time-of-flight sensor array.

[0060] In related embodiments, the processing circuitry further includes: a time-to-digital converter configured to quantify a time interval between rising edges of the transmitted modulation signal and the reflected signal incident on a pixel selected by the row control logic circuitry and the column control logic circuitry.

[0061] In related embodiments, the processing circuitry further includes: a histogramming logic circuitry configured to accumulate, for each pixel in the direct time-of-flight sensor array, a plurality of quantified time measurements received from the time-to-digital converter during a plurality of acquisition frames.

[0062] In related embodiments, the processing circuitry is further configured to scale a first set of photon event detection signals received from pixels orthogonally adjacent to the central pixel by a first predetermined parameter, and to scale a second set of photon event detection signals received from pixels diagonally adjacent to the central pixel by a second predetermined parameter.

[0063] In related embodiments, the processing circuitry is further configured to scale a third set of photon event detection signals received from pixels located on a periphery of a 5×5 rectangular sub-array centered on the central pixel and orthogonally adjacent to the central pixel by a third predetermined parameter.

[0064] In related embodiments, the predetermined threshold is an integer greater than 1.

[0065] In related embodiments, the processing circuitry further includes a threshold conversion logic circuitry configured to determine whether a sum of the scaled first set of photon event detection signals, the second set of photon event detection signals, and the third set of photon event detection signals is greater than the predetermined threshold.

[0066] In related embodiments, the apparatus further includes: a logical AND gate configured to output a valid photon event detection in response to receiving, from the threshold conversion logic circuitry, a signal indicating that the sum of the scaled first set of photon event detection signals, the second set of photon event detection signals, and the third set of photon event detection signals is greater than the predetermined threshold, and a delayed photon event detection signal from the central pixel.

[0067] In some embodiments, a signal processing device for processing per-pixel signals received from a direct time-of-flight (DTOF) sensor array includes: a per-pixel signal processing circuit coupled to the DTOF sensor array and configured to receive photon event detection signals from a central pixel and a plurality of pixels orthogonally and diagonally adjacent to the central pixel, and output a valid photon detection signal in response to determining whether a sum of the received photon event detection signals is greater than a predetermined threshold; a time-to-digital converter (TDC) configured to quantify a time interval between a rising edge of an emission modulation signal and a reflection signal incident on the central pixel in response to receiving the valid photon detection signal; and a histogramming logic circuit configured to accumulate a plurality of quantified time measurements received from the time-to-digital converter during a plurality of acquisition frames and determine depth information based on a statistical distribution of the plurality of quantified time measurements.

[0068] In further embodiments, the signal processing device may further include a row control logic circuit configured to select a row of pixels in the DTOF sensor array and a column control logic circuit configured to select a column of pixels in the DTOF sensor array.

[0069] In related embodiments, the per-pixel signal processing circuit is further configured to scale a first set of photon event detection signals received from pixels orthogonally adjacent to the central pixel by a first predetermined parameter and scale a second set of photon event detection signals received from pixels diagonally adjacent to the central pixel by a second predetermined parameter.

[0070] In related embodiments, the per-pixel signal processing circuit is further configured to scale a third set of photon event detection signals received from pixels located on a periphery of a 5×5 rectangular sub-array centered on the central pixel and orthogonally adjacent to the central pixel by a third predetermined parameter.

[0071] In related embodiments, the statistical distribution includes an occurrence frequency of the plurality of quantified time measurements.

[0072] In other embodiments, a method for measuring the distance from a direct time-of-flight (DTOF) sensor array to an object includes: receiving photon event detection signals from the central pixel and a plurality of pixels orthogonally and diagonally adjacent to the central pixel; outputting a valid photon detection signal in response to determining whether the sum of the received photon event detection signals is greater than a predetermined threshold; quantifying the time interval between the rising edges of the emitted modulation signal and the reflected signal incident on the central pixel using a time-to-digital converter (TDC) in response to receiving the valid photon detection signal; accumulating a plurality of quantified time measurements received from the time-to-digital converter during a plurality of acquisition frames; and determining depth information based on the statistical distribution of the plurality of quantified time measurements.

[0073] In related embodiments, the predetermined threshold is an integer greater than 1.

[0074] In related embodiments, the method further accumulates the plurality of quantified time measurements received from the time-to-digital converter during the plurality of acquisition frames into a histogram.

[0075] In related embodiments, the method further includes: scaling a first set of photon event detection signals received from pixels orthogonally adjacent to the central pixel using a first predetermined parameter, and scaling a second set of photon event detection signals received from pixels diagonally adjacent to the central pixel using a second predetermined parameter.

[0076] In related embodiments, the method further includes: scaling a third set of photon event detection signals received from pixels located on the periphery of a 5×5 rectangular sub-array centered on the central pixel and orthogonally adjacent to the central pixel using a third predetermined parameter.

[0077] In related embodiments, the method further includes: determining whether the sum of the scaled first set of photon event detection signals, the second set of photon event detection signals, and the third set of photon event detection signals is greater than the predetermined threshold.

[0078] Although various embodiments of the present disclosure have been described above, it should be understood that the embodiments are presented by way of example and not limitation. Similarly, each of the figures may illustrate an exemplary architecture or configuration provided to enable those of ordinary skill in the art to understand the exemplary features and functions of the present disclosure. However, those of ordinary skill in the art should understand that the present disclosure is not limited to the exemplary architecture or configuration shown, but may be implemented using various alternative architectures and configurations. Additionally, as would be understood by those of ordinary skill in the art, one or more features of one embodiment may be combined with one or more features of another embodiment described herein. Therefore, the breadth and scope of the present disclosure should not be limited by any of the above-described exemplary embodiments.

[0079] It should also be understood that whenever terms such as "first", "second", etc. are used herein to refer to elements, they do not generally limit the number or order of the elements. Rather, these terms are used herein as a convenient means of distinguishing between two or more elements or instances of an element. Thus, referring to "a first element" and "a second element" does not mean that only two elements may be employed or that the first element must in some way precede the second element.

[0080] In addition, those of ordinary skill in the art should understand that any of a variety of different technologies and techniques may be used to represent information and signals. For example, data, instructions, commands, information, signals, bits, and symbols (e.g., as may be referred to in the above description) may be represented by voltages, currents, electromagnetic waves, magnetic fields or magnetic particles, optical fields or optical particles, or any combination thereof.

[0081] Those of ordinary skill in the art should also understand that any of the various illustrative logical blocks, modules, processors, components, circuits, methods, and functions described in connection with the various aspects disclosed herein may be implemented by electronic hardware (e.g., digital implementation forms, analog implementation forms, or a combination of both), firmware, various forms of programs or design code containing instructions (which may be referred to herein for convenience as "software" or "software modules"), or any combination of these technologies.

[0082] To clearly illustrate such interchangeability of hardware, firmware, and software, the various illustrative components, blocks, modules, circuits, and steps have been generally described above in terms of their functionality. Whether such functionality is implemented as hardware, firmware, software, or a combination of these techniques depends upon the particular application and design constraints imposed on the overall system. Those of ordinary skill in the art may implement the described functionality in various ways for each particular application, but such implementation decisions do not result in a departure from the scope of the present disclosure. According to various embodiments, a processor, device, component, circuit, structure, machine, module, etc. may be configured to perform one or more of the functions described herein. As used herein, the term "configured to" or "configured for" with respect to a specified operation or function means that a processor, device, component, circuit, structure, machine, module, signal, etc. is physically constructed, programmed, arranged, and / or formatted to perform the specified operation or function.

[0083] In addition, those of ordinary skill in the art will understand that the various illustrative logical blocks, modules, devices, components, and circuits described herein may be implemented within or performed by an integrated circuit (IC), which may include a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic device, or any combination thereof. The logical blocks, modules, and circuits may also include antennas and / or transceivers to communicate with various components within a network or within a device. A processor programmed to perform the functions herein will become a specifically programmed or dedicated processor and may be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, the combination of one or more microprocessors and a DSP core, or any other suitable configuration that performs the functions described herein.

[0084] If implemented in software, the functions may be stored as one or more instructions or code on a computer-readable medium. Accordingly, the steps of the methods or algorithms disclosed herein may be implemented as software stored on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that can transfer a computer program or code from one place to another. The storage media may be any available media that can be accessed by a computer. By way of example and not limitation, such computer-readable media can include random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), compact disk-ROM (CD-ROM) or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired program code in the form of instructions or data structures and which can be accessed by a computer.

[0085] In this document, the term "module" as used herein refers to software, firmware, hardware, and any combination of these elements for performing the related functions described herein. Additionally, for ease of discussion, various modules are presented as discrete modules; however, it will be apparent to those of ordinary skill in the art that two or more modules may be combined to form a single module that performs the related functions according to embodiments of the present disclosure.

[0086] Various modifications to the embodiments described in this disclosure will be apparent to those of skill in the art, and the general principles defined herein may be applied to other embodiments without departing from the scope of the disclosure. Thus, the disclosure is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the novel features and principles disclosed herein as recited in the following claims.

Claims

1. An apparatus for measuring the distance to an object, the apparatus comprising: a light source configured to emit a modulated signal towards the object; a direct time-of-flight sensor array configured to receive reflected signals from the object, wherein the direct time-of-flight sensor array includes a plurality of single-photon avalanche diodes; and a processing circuitry coupled to the direct time-of-flight sensor array and configured to: receive photon event detection signals from a central pixel and a plurality of pixels orthogonally and diagonally adjacent to the central pixel, the photon event detection signals including a first set of photon event detection signals received from pixels orthogonally adjacent to the central pixel scaled by a first predetermined parameter and a second set of photon event detection signals received from pixels diagonally adjacent to the central pixel scaled by a second predetermined parameter, output a valid photon detection signal in response to determining whether the sum of the received photon event detection signals is greater than a predetermined threshold.

2. The apparatus according to claim 1, wherein the processing circuitry further comprises: a row control logic circuit configured to select a row of pixels in the direct time-of-flight sensor array; and a column control logic circuit configured to select a column of pixels in the direct time-of-flight sensor array.

3. The apparatus according to claim 2, wherein the processing circuitry further comprises: a time-to-digital converter configured to quantify the time interval between the rising edges of the transmitted modulated signal and the reflected signal incident on the pixels selected by the row control logic circuit and the column control logic circuit.

4. The apparatus according to claim 3, wherein the processing circuitry further comprises: a histogramming logic circuit configured to accumulate, for each pixel in the direct time-of-flight sensor array, a plurality of quantified time measurements received from the time-to-digital converter during a plurality of acquisition frames.

5. The apparatus according to claim 1, wherein the processing circuitry is further configured to scale a third set of photon event detection signals received from pixels located on the periphery of a 5×5 rectangular sub-array centered on the central pixel and orthogonally adjacent to the central pixel by a third predetermined parameter.

6. The apparatus according to claim 1, wherein the predetermined threshold is an integer greater than 1.

7. The apparatus according to claim 5, wherein the processing circuitry further comprises a threshold conversion logic circuit configured to determine whether the sum of the scaled first set of photon event detection signals, the second set of photon event detection signals, and the third set of photon event detection signals is greater than the predetermined threshold.

8. The apparatus according to claim 7, further comprising: a logic AND gate configured to output a valid photon event detection in response to receiving, from the threshold conversion logic circuit, a signal indicating that the sum of the scaled first set of photon event detection signals, the second set of photon event detection signals, and the third set of photon event detection signals is greater than the predetermined threshold and a delayed photon event detection signal from the central pixel.

9. A signal processing device for processing per-pixel signals received from a direct time-of-flight sensor array, the signal processing device comprising: A per-pixel signal processing circuit coupled to the direct time-of-flight sensor array and configured to: Receive photon event detection signals from a central pixel and a plurality of pixels orthogonally and diagonally adjacent to the central pixel, the photon event detection signals including a first set of photon event detection signals received from pixels orthogonally adjacent to the central pixel scaled by a first predetermined parameter, and a second set of photon event detection signals received from pixels diagonally adjacent to the central pixel scaled by a second predetermined parameter, and Output a valid photon detection signal in response to determining whether the sum of the received photon event detection signals is greater than a predetermined threshold; A time-to-digital converter configured to quantify a time interval between a rising edge of an emission modulation signal and a reflection signal incident on the central pixel in response to receiving the valid photon detection signal; and A histogramming logic circuit configured to: Accumulate a plurality of quantified time measurements received from the time-to-digital converter during a plurality of acquisition frames, and Determine depth information based on a statistical distribution of the plurality of quantified time measurements.

10. The signal processing device according to claim 9, further comprising: A row control logic circuit configured to select a row of pixels in the direct time-of-flight sensor array; And A column control logic circuit configured to select a column of pixels in the direct time-of-flight sensor array.

11. The signal processing device according to claim 9, wherein the per-pixel signal processing circuit is further configured to scale a third set of photon event detection signals received from pixels located on a periphery of a 5×5 rectangular sub-array centered on the central pixel and orthogonally adjacent to the central pixel by a third predetermined parameter.

12. The signal processing device according to claim 9, wherein the statistical distribution includes an occurrence frequency of the plurality of quantified time measurements.

13. A method for measuring a distance from a direct time-of-flight sensor array to an object, the method comprising: Receiving photon event detection signals from a central pixel and a plurality of pixels orthogonally and diagonally adjacent to the central pixel, the photon event detection signals including a first set of photon event detection signals received from pixels orthogonally adjacent to the central pixel scaled by a first predetermined parameter, and a second set of photon event detection signals received from pixels diagonally adjacent to the central pixel scaled by a second predetermined parameter; Outputting a valid photon detection signal in response to determining whether the sum of the received photon event detection signals is greater than a predetermined threshold; Quantifying a time interval between a rising edge of an emission modulation signal and a reflection signal incident on the central pixel using a time-to-digital converter in response to receiving the valid photon detection signal; Accumulating a plurality of quantified time measurements received from the time-to-digital converter during a plurality of acquisition frames; And Determining depth information based on a statistical distribution of the plurality of quantified time measurements.

14. The method according to claim 13, wherein the predetermined threshold is an integer greater than 1.

15. The method according to claim 13, further accumulating a plurality of quantized time measurements received from the time-to-digital converter during a plurality of acquisition frames into a histogram.

16. The method according to claim 13, further comprising: scaling a third set of photon event detection signals received from pixels located on the periphery of a 5×5 rectangular sub-array centered on the central pixel and orthogonally adjacent to the central pixel by a third predetermined parameter.

17. The method according to claim 16, further comprising: determining whether the sum of the scaled first set of photon event detection signals, the second set of photon event detection signals, and the third set of photon event detection signals is greater than the predetermined threshold.

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