Display device and method for manufacturing a display device

Abstract

A display apparatus includes a substrate including a front surface, side surfaces extending from sides of the front surface, and corners between the side surfaces; a first display area at the front surface and including a first pixel electrode, a first emission layer disposed on the first pixel electrode, and a first common electrode disposed on the first emission layer; a second display area at the corner and including a second pixel electrode, a second emission layer on the second pixel electrode, and a second common electrode on the second emission layer; a first inorganic encapsulation layer on the first common electrode and the second common electrode; an organic encapsulation layer on the first inorganic encapsulation layer in the first display area; and a second inorganic encapsulation layer on the organic encapsulation layer in the first display area and on the first inorganic encapsulation layer in the second display area.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to a display apparatus and a method for manufacturing the same. BACKGROUND

[0002] As the information-oriented society develops, various demands for display apparatuses are increasing. Such display apparatuses can be included in various electronic devices, for example, such as smart phones, digital cameras, laptop computers, navigation apparatuses, and smart televisions.

[0003] The display apparatus can be a flat panel display apparatus, such as a liquid crystal display apparatus, a field emission display apparatus, and a light emitting display apparatus. The light emitting display apparatus includes an organic light emitting display apparatus including an organic light emitting element, an inorganic light emitting display apparatus including an inorganic light emitting element such as an inorganic semiconductor, and a micro light emitting display apparatus including an ultra-small light emitting element.

[0004] Since the display apparatus is adopted by various electronic devices, the display apparatus needs to have various designs. In the case where the display apparatus is a light emitting display apparatus, an image can be displayed not only on a front surface but also on side surfaces bent at four edges of the front surface, respectively. SUMMARY

[0005] In a display apparatus displaying an image not only on a front surface but also on side surfaces bent at four edges of the front surface, respectively, the display apparatus can include a corner disposed between a first side surface bent at a first side edge of the front surface and a second side surface bent at a second side edge of the front surface. In such a display apparatus, a high strain can be applied to the corner due to a double curvature, i.e., a curvature of the first side surface and a curvature of the second side surface.

[0006] Embodiments of the present application provide a display apparatus in which a corner of the display apparatus includes a cutout pattern and a cut groove for reducing a strain at the corner, and an organic layer for covering a particle is formed only on the cutout pattern and not on the cut groove.

[0007] Embodiments of the present application provide a method of manufacturing a display apparatus in which a corner of the display apparatus includes a cutout pattern and a cut groove for reducing a strain at the corner, and an organic layer for covering a particle is formed only on the cutout pattern and not on the cut groove.

[0008] Embodiments of the present application provide a display apparatus including a substrate including a front surface, a first side surface extending from a first side of the front surface, a second side surface extending from a second side of the front surface, and a corner disposed between the first side surface and the second side surface; a first display area disposed at the front surface of the substrate, wherein the first display area includes first pixels having first pixel electrodes, first emission layers disposed on the first pixel electrodes, and first common electrodes disposed on the first emission layers; a second display area disposed at the corner of the substrate, wherein the second display area includes second pixels having second pixel electrodes, second emission layers disposed on the second pixel electrodes, and second common electrodes disposed on the second emission layers; a first inorganic encapsulation layer disposed on the first common electrodes in the first display area and the second common electrodes in the second display area; an organic encapsulation layer disposed on the first inorganic encapsulation layer in the first display area; and a second inorganic encapsulation layer disposed on the organic encapsulation layer in the first display area and the first inorganic encapsulation layer in the second display area.

[0009] In one embodiment, the display apparatus can further include an outer coating layer disposed on the second inorganic encapsulation layer in the first display area and the second display area; and a first touch inorganic layer disposed on the outer coating layer in the first display area and the second display area.

[0010] In one embodiment, the organic encapsulation layer can include a material different from a material of the outer coating layer.

[0011] In one embodiment, the display apparatus can further include a connection electrode disposed on the first touch inorganic layer in the first display area; a second touch inorganic layer disposed on the connection electrode in the first display area; and a sensor electrode disposed on the second touch inorganic layer in the first display area.

[0012] In one embodiment, the sensor electrode can include a driving electrode and a sensing electrode, and the driving electrode can be connected to the connection electrode through a touch contact hole defined through the second touch inorganic layer.

[0013] In one embodiment, the display apparatus can further include a touch organic layer disposed on the sensor electrode in the first display area.

[0014] In one embodiment, the display apparatus can further include a cutout pattern disposed at the corner of the substrate separated from another cutout pattern by a cutting slot, wherein the cutout pattern can include the second pixels.

[0015] In one embodiment, the display apparatus can further include a dam disposed on the cutout pattern and surrounding the second pixels.

[0016] In one embodiment, the second inorganic encapsulation layer and the first touch inorganic layer can contact each other on the dam in the second display area.

[0017] In one embodiment, the second pixel can include a plurality of emission areas, and a dam hole is defined between the dam and one of the plurality of emission areas.

[0018] In one embodiment, the dam hole can be filled with an overcoat layer.

[0019] In one embodiment, the display apparatus can further include a transistor disposed on a corner of the substrate in the second display area, a planarization layer disposed on the transistor, and a barrier layer disposed on the planarization layer. In such an embodiment, the dam hole can be defined through the planarization layer and the barrier layer.

[0020] In one embodiment, the dam hole can form an undercut shape.

[0021] In one embodiment, the display apparatus can further include a first floating pattern disposed in the dam hole, and a second floating pattern disposed on the first floating pattern. In such an embodiment, the first inorganic encapsulation layer can be disposed on the second floating pattern in the dam hole.

[0022] In one embodiment, the first floating pattern can be spaced apart from the second emission layer, the first floating pattern can include the same material as a material of the second emission layer, and the second floating pattern can be spaced apart from the second common electrode and include the same material as a material of the second common electrode.

[0023] In one embodiment, at least one selected from the first inorganic encapsulation layer, the second inorganic encapsulation layer, and the first touch inorganic layer can be disposed on a side surface of the cutout pattern.

[0024] Embodiments of the present application provide a method for manufacturing a display apparatus, including: providing a first pixel in a first display area and a second pixel in a second display area on a substrate, wherein the first pixel includes a first pixel electrode, a first emission layer disposed on the first pixel electrode, and a first common electrode disposed on the first emission layer, and the second pixel includes a second pixel electrode, a second emission layer disposed on the second pixel electrode, and a second common electrode disposed on the second emission layer; providing a first inorganic encapsulation layer on the first common electrode and the second common electrode; providing an organic encapsulation layer on the first inorganic encapsulation layer in the first display area; and providing a second inorganic encapsulation layer on the organic encapsulation layer in the first display area and the first inorganic encapsulation layer in the second display area.

[0025] In one embodiment, providing the organic encapsulation layer can include: dropping a first organic material onto the first inorganic encapsulation layer in the first display area by an inkjet process to form the organic encapsulation layer.

[0026] In one embodiment, the method can further include: providing an overcoat layer on the second inorganic encapsulation layer in the first display area and the second display area; and providing a first touch inorganic layer on the overcoat layer in the first display area and the second display area.

[0027] In one embodiment, providing the overcoat layer can include: applying a second organic material to the second inorganic encapsulation layer in the first display area and the second display area using a photolithography process to form the overcoat layer.

[0028] In one embodiment, the first organic material can be different from the second organic material. BRIEF DESCRIPTION OF DRAWINGS

[0029] These and / or other features will become more apparent from the detailed description, including the drawings, in which:

[0030] Figure 1 is a perspective view of a display apparatus according to an embodiment of the disclosure;

[0031] Figure 2 is a plan view illustrating a display apparatus according to an embodiment of the disclosure;

[0032] Figure 3 is an expanded view illustrating a display apparatus according to an embodiment of the disclosure;

[0033] Figure 4 is a cross-sectional view illustrating a display apparatus according to an embodiment of the disclosure;

[0034] Figure 5 is a plan view illustrating a first display area, a second display area, and a third display area, and a non-display area disposed at a first corner of a display panel according to an embodiment of the disclosure;

[0035] Figure 6 is a plan view illustrating an embodiment of the first display area of Figure 5

[0036] Figure 7 is a cross-sectional view illustrating an embodiment of the display panel taken along line II-II' of Figure 6

[0037] Figure 8 is a plan view illustrating an embodiment of the second display area of Figure 5

[0038] ​​​Figure 9 is a plan view showing an alternative embodiment of the second display area of Figure 5

[0039] Figure 10 and Figure 11 is a plan view showing another alternative embodiment of the second display area of Figure 5

[0040] Figure 12 is a cross-sectional view showing an embodiment of the display panel taken along line III-III' of Figure 8

[0041] Figure 13 is a cross-sectional view showing an alternative embodiment of the display panel taken along line III-III' of Figure 8

[0042] Figure 14 is a plan view showing an embodiment of the third display area of Figure 5

[0043] Figure 15 is a cross-sectional view of an embodiment of the display panel taken along line IV-IV' of Figure 14

[0044] Figure 16 is a flowchart for explaining a method of manufacturing a display apparatus according to an embodiment of the present disclosure; and

[0045] Figures 17 to 30 is a cross-sectional view for explaining a method of manufacturing a display apparatus according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0046] The present application will now be described more fully with reference to the accompanying drawings, in which various embodiments of the application are shown. The application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the application to those skilled in the art. Like reference numerals refer to like elements throughout the specification. In the drawings, the thickness of layers and regions are exaggerated for clarity.

[0047] ​​​​​​It should be understood that, although terms hereinafter can be used in the context of describing various embodiments, these terms are non-limiting. For example, terms such as "first", "second", "third", and the like can be used to describe various elements, components, regions, layers and / or sections but do not to limit the scope of the application unless the context clearly indicates otherwise. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a "first element", "component", "region", "layer" or "section" discussed below can be termed a second element, component, region, layer or section without departing from the teachings herein.

[0048] It will also be understood that when a layer is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or intervening layers can also be present. In contrast, when an element is referred to as being "directly on" another element, then there are no intervening elements present.

[0049] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms, including "at least one", unless the content clearly indicates otherwise. "Or" means "and / or". "At least one of A and B" means "A and / or B". As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. It will be further understood that the terms "comprises" and / or "comprising", or "includes" and / or "including" when used in this specification, specify the presence of stated features, regions, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and / or groups thereof.

[0050] In addition, relative terms such as "lower" or "bottom" and "upper" or "top" can be used herein to describe one element's relationship to another element as the device is oriented in the drawing. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the drawings. For example, if the device in one of the figures is turned over, elements described as being on the "lower" side of other elements would then be oriented on "upper" sides and vice versa. Relative terms in

[0051] As used herein, "about" or "approximately" means within a range that is acceptable to one of ordinary skill in the art of the disclosure, given the teaching of the present disclosure, and the error inherent in the measurement of the particular quantity.

[0052] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0053] Embodiments are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are to be expected. Thus, embodiments described herein are not to be construed as being limited to the particular shapes of regions as illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an area illustrated or described as flat can often have rough and / or nonlinear features. Moreover, sharp angles that are illustrated can be rounded. Thus, the regions illustrated in the figures are schematic

[0054] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0055] Figure 1 is a perspective view of a display apparatus according to an embodiment of the present disclosure. Figure 2 is a plan view illustrating a display apparatus according to an embodiment of the present disclosure.

[0056] Referring to Figure 1 and Figure 2Embodiments of display device 10 may be portable electronic devices such as mobile phones, smartphones, tablet PCs (“PCs”), mobile communication terminals, electronic notebooks, e-books, portable multimedia players (“PMPs”), navigation devices, and ultra-mobile PCs (“UMPCs”). Alternatively, display device 10 may be a display unit of a television, laptop computer, monitor, electronic billboard, or Internet of Things (“IoT”) device. Alternatively, display device 10 may be a wearable device such as a smartwatch, watch phone, glasses-type display, and head-mounted display (“HMD”) device. Alternatively, display device 10 may be a central information display (CID) located on the instrument cluster, central dashboard, or instrument panel of a vehicle, an interior mirror display representing the side mirrors of the vehicle, or a display located on the back of each front seat (which is an entertainment system for passengers in the rear seats of the vehicle).

[0057] As used herein, the first direction (X-axis direction) may be parallel to the shorter side of the display device 10, for example, the horizontal direction of the display device 10 when viewed from above. The second direction (Y-axis direction) may be parallel to the longer side of the display device 10, for example, the vertical direction of the display device 10 when viewed from above. The third direction (Z-axis direction) may refer to the thickness direction of the display device 10.

[0058] Embodiments of the display device 10 may include a display panel 300. In one embodiment, such as Figure 1 and Figure 2 As shown, the display panel 300 may include a front surface FS, a first side surface SS1, a second side surface SS2, a third side surface SS3, a fourth side surface SS4, a first corner CS1, a second corner CS2, a third corner CS3, and a fourth corner CS4.

[0059] The display panel 300 may include a substrate SUB (see...) Figure 3 The substrate SUB is flexible enough to be bent, folded, or rolled up. In one embodiment, for example, the substrate SUB may include polyethersulfone (“PES”), polyamide (“PA”), polyacrylate (“PAR”), polyetherimide (“PEI”), polyethylene naphthalate (“PEN”), polyethylene terephthalate (“PET”), polyphenylene sulfide (“PPS”), polyallyl compounds, polyimide (“PI”), polycarbonate (“PC”), cellulose triacetate (“CTA”), cellulose acetate propionate (“CAP”), or combinations thereof. Alternatively, the substrate SUB may include a metallic material. In one embodiment, only a portion of the substrate SUB may be flexible, or the entire area of ​​the substrate SUB may be flexible.

[0060] The front surface FS can have, but is not limited to, a rectangular shape having a shorter side in the first direction (X-axis direction) and a longer side in the second direction (Y-axis direction) when viewed from the top. The front surface FS can have another polygonal shape, a circular shape, or an elliptical shape when viewed from the top or in the third direction (Z-axis direction). In one embodiment, as shown in FIGS. 1A and 1B, the front surface FS can be flat, but the present disclosure is not limited thereto. Alternatively, the front surface FS can include a curved surface. Figure 1 and Figure 2 The front surface FS can be flat, but the present disclosure is not limited thereto. Alternatively, the front surface FS can include a curved surface.

[0061] The first side surface SS1 can extend from a first side of the front surface FS. The first side surface SS1 can be curved along a first bending line BL1 (see FIG. 2) on the first side of the front surface FS, and thus can have a first curvature. The first side of the front surface FS can be a left side of the front surface FS as shown in FIGS. 1A and 1B. Figure 3 Figure 1 and Figure 2 The first side surface SS1 can extend from a first side of the front surface FS. The first side surface SS1 can be curved along a first bending line BL1 (see FIG. 2) on the first side of the front surface FS, and thus can have a first curvature. The first side of the front surface FS can be a left side of the front surface FS as shown in FIGS. 1A and 1B.

[0062] The second side surface SS2 can extend from a second side of the front surface FS. The second side surface SS2 can be curved along a second bending line BL2 (see FIG. 3) on the second side of the front surface FS, and thus can have a second curvature. The second curvature can be different from the first curvature, but the present disclosure is not limited thereto. The second side of the front surface FS can be a lower side of the front surface FS as shown in FIGS. 1A and 1B. Figure 3 Figure 1 and Figure 2 The second side surface SS2 can extend from a second side of the front surface FS. The second side surface SS2 can be curved along a second bending line BL2 (see FIG. 3) on the second side of the front surface FS, and thus can have a second curvature. The second curvature can be different from the first curvature, but the present disclosure is not limited thereto. The second side of the front surface FS can be a lower side of the front surface FS as shown in FIGS. 1A and 1B.

[0063] The third side surface SS3 can extend from a third side of the front surface FS. The third side surface SS3 can be curved along a third bending line BL3 (see FIG. 4) on the third side of the front surface FS, and thus can have a third curvature. The third curvature can be different from the second curvature, but the present disclosure is not limited thereto. The third side of the front surface FS can be a right side of the front surface FS as shown in FIGS. 1A and 1B. Figure 3 Figure 1 and Figure 2 The third side surface SS3 can extend from a third side of the front surface FS. The third side surface SS3 can be curved along a third bending line BL3 (see FIG. 4) on the third side of the front surface FS, and thus can have a third curvature. The third curvature can be different from the second curvature, but the present disclosure is not limited thereto. The third side of the front surface FS can be a right side of the front surface FS as shown in FIGS. 1A and 1B.

[0064] The fourth side surface SS4 can extend from a fourth side of the front surface FS. The fourth side surface SS4 can be curved along a fourth bending line BL4 (see FIG. 5) on the fourth side of the front surface FS, and thus can have a fourth curvature. The fourth curvature can be different from the first curvature, but the present disclosure is not limited thereto. The fourth side of the front surface FS can be an upper side of the front surface FS as shown in FIGS. 1A and 1B. Figure 3 Figure 1 and Figure 2 The fourth side surface SS4 can extend from a fourth side of the front surface FS. The fourth side surface SS4 can be curved along a fourth bending line BL4 (see FIG. 5) on the fourth side of the front surface FS, and thus can have a fourth curvature. The fourth curvature can be different from the first curvature, but the present disclosure is not limited thereto. The fourth side of the front surface FS can be an upper side of the front surface FS as shown in FIGS. 1A and 1B.

[0065] ​​​​The first corner CS1 can be located between the first side surface SS1 and the second side surface SS2. In one embodiment, the first corner CS1 can be in contact with the lower side of the first side surface SS1 and the left side of the second side surface SS2. Due to the first curvature of the first side surface SS1 and the second curvature of the second side surface SS2, the first corner CS1 can have a double curvature. Accordingly, the first corner CS1 can be applied with strain by a bending force caused by the first curvature of the first side surface SS1 and by a bending force caused by the second curvature of the second side surface SS2.

[0066] The second corner CS2 can be located between the second side surface SS2 and the third side surface SS3. In one embodiment, the second corner CS2 can be in contact with the right side of the second side surface SS2 and the lower side of the third side surface SS3. Due to the second curvature of the second side surface SS2 and the third curvature of the third side surface SS3, the second corner CS2 can have a double curvature. Accordingly, the second corner CS2 can be applied with strain by a bending force caused by the second curvature of the second side surface SS2 and by a bending force caused by the third curvature of the third side surface SS3.

[0067] The third corner CS3 can be located between the third side surface SS3 and the fourth side surface SS4. In one embodiment, the third corner CS3 can be in contact with the upper side of the third side surface SS3 and the right side of the fourth side surface SS4. Due to the third curvature of the third side surface SS3 and the fourth curvature of the fourth side surface SS4, the third corner CS3 can have a double curvature. Accordingly, the third corner CS3 can be applied with strain by a bending force caused by the third curvature of the third side surface SS3 and by a bending force caused by the fourth curvature of the fourth side surface SS4.

[0068] The fourth corner CS4 can be located between the first side surface SS1 and the fourth side surface SS4. In one embodiment, the fourth corner CS4 can be in contact with the upper side of the first side surface SS1 and the left side of the fourth side surface SS4. Due to the first curvature of the first side surface SS1 and the fourth curvature of the fourth side surface SS4, the fourth corner CS4 can have a double curvature. Accordingly, the fourth corner CS4 can be applied with strain by a bending force caused by the first curvature of the first side surface SS1 and by a bending force caused by the fourth curvature of the fourth side surface SS4.

[0069] Each of the first corner CS1, the second corner CS2, the third corner CS3, and the fourth corner CS4 can include a cutout pattern CP (see Figure 8 and Figure 9 ), which is separated by a cut groove CG (see Figure 8 and Figure 9 ) to reduce strain due to the double curvature, as Figure 8shown. Reference will be made to Figure 8 The cutout pattern is described in more detail.

[0070] Figure 3 is an expanded view showing a display apparatus according to an embodiment of the disclosure.

[0071] Referring to Figure 3 Embodiments of the display panel 300 can also include a bending area BA and a pad area PA. The display panel 300 can include a first display area DA1, a second display area DA2, and a third display area DA3, a non-display area NDA, the bending area BA, and the pad area PA.

[0072] The first display area DA1, the second display area DA2, and the third display area DA3 include pixels or emission areas for displaying images. The non-display area NDA does not include pixels or emission areas and does not display images. In the non-display area NDA, signal lines or driver circuits for driving the pixels or emission areas embedded in the panel can be provided.

[0073] The first display area DA1 can be a main display area of the display panel 300 and can include a front surface FS, a portion of a first side surface SS1, a portion of a second side surface SS2, a portion of a third side surface SS3, and a portion of a fourth side surface SS4. The portion of the first side surface SS1 extends from a first side of the front surface FS, and the portion of the second side surface SS2 extends from a second side of the front surface FS. The portion of the third side surface SS3 extends from a third side of the front surface FS, and the portion of the fourth side surface SS4 extends from a fourth side of the front surface FS. Each of the corners of the first display area DA1 can be rounded with a predetermined curvature.

[0074] The second display area DA2 can be a first auxiliary display area that assists the first display area DA1 (i.e., the main display area). The resolution of each of the second display areas DA2 can be different from the resolution of the first display area DA1. In one embodiment, for example, in a case where each of the second display areas DA2 is used to assist the first display area DA1, the resolution of each of the second display areas DA2 can be lower than the resolution of the first display area DA1. In such an embodiment, the number of third emission areas EA3 (see Figure 6 ) per unit area in each of the second display areas DA2 can be less than the number of first emission areas EA1 (see Figure 6 ) per unit area in the first display area DA1. However, the disclosure is not limited thereto. In alternative embodiments, the resolution of each of the second display areas DA2 can be substantially equal to the resolution of the first display area DA1.

[0075] The second display areas DA2 can be respectively disposed on the outer sides of the third display areas DA3. Accordingly, the third display areas DA3 can be respectively disposed between the first display area DA1 and the second display areas DA2. At least a portion of each of the second display areas DA2 can be disposed at a respective one of the first to fourth corners CS1 to CS4. Also, at least a portion of each of the second display areas DA2 can be disposed at two of the first to fourth side surfaces SS1 to SS4.

[0076] In one embodiment, for example, at least a portion of the second display area DA2 disposed on the outer side of the corner where the lower side and the left side of the first display area DA1 meet can be disposed at the first corner CS1, the first side surface SS1, and the second side surface SS2. At least a portion of the second display area DA2 disposed on the outer side of the corner where the lower side and the right side of the first display area DA1 meet can be disposed at the second corner CS2, the second side surface SS2, and the third side surface SS3. At least a portion of the second display area DA2 disposed on the outer side of the corner where the upper side and the right side of the first display area DA1 meet can be disposed at the third corner CS3, the third side surface SS3, and the fourth side surface SS4. At least a portion of the second display area DA2 disposed on the outer side of the corner where the upper side and the left side of the first display area DA1 meet can be disposed at the fourth corner CS4, the first side surface SS1, and the fourth side surface SS4.

[0077] Each of the third display areas DA3 can be a second auxiliary display area that assists the first display area DA1 (i.e., a main display area). The resolution of each of the third display areas DA3 can be different from the resolution of the first display area DA1. In one embodiment, for example, in a case where each of the third display areas DA3 is used to assist the first display area DA1, the resolution of each of the third display areas DA3 can be lower than the resolution of the first display area DA1. In such an embodiment, the number of the second emission areas EA2 (see Figure 6 ) per unit area in each of the third display areas DA3 can be less than the number of the first emission areas EA1 (see Figure 6 ) per unit area in the first display area DA1. However, the present disclosure is not limited thereto. Alternatively, the resolution of each of the third display areas DA3 can be substantially equal to the resolution of the first display area DA1.

[0078] Each of the third display areas DA3 can be disposed outside a respective one of the corners of the first display area DA1. At least a portion of each of the third display areas DA3 can be disposed at a respective one of the first corner CS1 to the fourth corner CS4. Also, at least a portion of each of the third display areas DA3 can be disposed on the front surface FS. Also, at least a portion of each of the third display areas DA3 can be disposed at two of the first side surface SS1 to the fourth side surface SS4.

[0079] In one embodiment, for example, at least a portion of the third display area DA3 disposed outside a corner where a lower side and a left side of the first display area DA1 meet can be disposed at the front surface FS, the first corner CS1, the first side surface SS1, and the second side surface SS2. At least a portion of the third display area DA3 disposed outside a corner where a lower side and a right side of the first display area DA1 meet can be disposed at the front surface FS, the second corner CS2, the second side surface SS2, and the third side surface SS3. At least a portion of the third display area DA3 disposed outside a corner where an upper side and a right side of the first display area DA1 meet can be disposed at the front surface FS, the third corner CS3, the third side surface SS3, and the fourth side surface SS4. At least a portion of the third display area DA3 disposed outside a corner where an upper side and a left side of the first display area DA1 meet can be disposed at the front surface FS, the fourth corner CS4, the first side surface SS1, and the fourth side surface SS4.

[0080] The non-display area NDA can include a portion of each of the first side surface SS1, the second side surface SS2, the third side surface SS3, the fourth side surface SS4, the first corner CS1, the second corner CS2, the third corner CS3, and the fourth corner CS4. At the first side surface SS1, the second side surface SS2, the third side surface SS3, and the fourth side surface SS4, the non-display area NDA can be disposed outside the first display area DA1. In one embodiment, for example, the non-display area NDA can be disposed at a left edge of the first side surface SS1, a lower edge of the second side surface SS2, a right edge of the third side surface SS3, and an upper edge of the fourth side surface SS4.

[0081] At the first corner CS1, the second corner CS2, the third corner CS3, and the fourth corner CS4, the non-display area NDA can be disposed outside the second display area DA2. In one embodiment, for example, the non-display area NDA can be disposed at a corner edge where an upper side and a right side of the first corner CS1 meet, at a corner edge where a lower side and a right side of the second corner CS2 meet, at a corner edge where an upper side and a right side of the third corner CS3 meet, and at a corner edge where an upper side and a left side of the fourth corner CS4 meet.

[0082] The bending area BA can extend from a lower side of the second side surface SS2. The bending area BA can be disposed between the second side surface SS2 and the pad area PA. A length of the bending area BA in the first direction (X-axis direction) can be less than a length of the second side surface SS2 in the first direction (X-axis direction). The bending area BA can be bent along a fifth bending line BL5 on the lower side of the second side surface SS2.

[0083] The pad area PA can extend from a lower side of the bending area BA. A length of the pad area PA in the first direction (X-axis direction) can be greater than a length of the bending area BA in the first direction (X-axis direction). However, the present disclosure is not limited thereto. Alternatively, a length of the pad area PA in the first direction (X-axis direction) can be substantially equal to a length of the bending area BA in the first direction (X-axis direction). The pad area PA can be bent along a sixth bending line BL6 on the lower side of the bending area BA. The pad area PA can be disposed on a lower side of the front surface FS.

[0084] The integrated driver circuit IDC and the pad PAD can be disposed on the pad area PA. The integrated driver circuit IDC can be implemented as an integrated circuit (“IC”). The integrated driver circuit IDC can be attached on the pad area PA by a chip on glass (“COG”) technology, a chip on plastic (“COP”) technology, or ultrasonic welding. Alternatively, the integrated driver circuit IDC can be disposed on a circuit board, which is disposed on the pad PAD of the pad area PA.

[0085] The integrated driver circuit IDC can be electrically connected to the pad PAD of the pad area PA. The integrated driver circuit IDC can receive digital video data and timing signals through the pad PAD of the pad area PA. The integrated driver circuit IDC can convert the digital video data into an analog data voltage and output it to the data lines of the first display area DA1, the second display area DA2, and the third display area DA3.

[0086] A circuit board can be attached on the pad PAD of the pad area PA using an anisotropic conductive film. In such an embodiment, the pad PAD of the pad area PA can be electrically connected to the circuit board.

[0087] In one embodiment, as Figure 3As shown, the first display area DA1, the second display area DA2, and the third display area DA3 can be provided at the front surface FS, the first side surface SS1, the second side surface SS2, the third side surface SS3, the fourth side surface SS4, the first corner CS1, the second corner CS2, the third corner CS3, and the fourth corner CS4. Thus, the image can be displayed not only on the front surface FS, the first side surface SS1, the second side surface SS2, the third side surface SS3, and the fourth side surface SS4, but also on the first corner CS1, the second corner CS2, the third corner CS3, and the fourth corner CS4.

[0088] Figure 4 is a cross-sectional view showing a display apparatus according to an embodiment of the disclosure. Figure 4 embodiments of the display apparatus 10 taken along the line I-I' of Figure 2 .

[0089] Referring to Figure 4 , an embodiment of the display panel 300 can include a substrate SUB, a display layer DISL, a sensor electrode layer SENL, a polarizing film PF, and / or a cover window CW.

[0090] The display layer DISL can be provided on the substrate SUB. The display layer DISL can include the first display area DA1, the second display area DA2, and the third display area DA3 (see Figure 3 ) and a non-display area NDA. In such an embodiment, in addition to the emission area, scan lines, data lines, power lines, etc. for driving the light emitting elements can be provided in the first display area DA1, the second display area DA2, and the third display area DA3 of the display layer DISL. In one embodiment, a scan driver circuit for outputting a scan signal to the scan lines, a fan-out line for connecting the data lines with an integrated driver circuit IDC, etc. can be provided in the non-display area NDA of the display layer DISL.

[0091] The display layer DISL can include a thin film transistor layer TFTL in which thin film transistors are provided, an emission material layer EML in which light emitting elements are provided in the emission area, and a encapsulation layer TFEL for encapsulating the emission material layer EML, as Figure 7 shown.

[0092] The sensor electrode layer SENL can be provided on the display layer DISL. The sensor electrode layer SENL can include sensor electrodes. The sensor electrode layer SENL can sense a touch by a person or an object using the sensor electrodes thereon.

[0093] A polarizing film PF can be disposed on the sensor electrode layer SENL. The polarizing film PF can include a first base member, a linear polarizer, a retardation film such as a λ / 4 (quarter wave) plate, a λ / 2 (half wave) plate, and a second base member. In one embodiment, for example, the first base member, the linear polarizer, the λ / 4 plate, the λ / 2 plate, and the second base member can be sequentially stacked on the sensor electrode layer SENL.

[0094] A cover window CW can be disposed on the polarizing film PF. The cover window CW can be attached to the polarizing film PF by a transparent adhesive member such as an optically clear adhesive ("OCA") film and an optically clear resin ("OCR"). The cover window CW can include an inorganic material such as glass or an organic material such as plastic and a polymer material.

[0095] The bending area BA can be bent along the fifth bending line BL5 and can be disposed on a lower surface of the second side surface SS2. The pad area PA can be bent along the sixth bending line BL6 and disposed on a lower surface of the front surface FS. The pad area PA can be attached to the lower surface of the front surface FS by an adhesive member ADH. The adhesive member ADH can be a pressure sensitive adhesive.

[0096] Figure 5 FIG. 1 is a plan view illustrating a first display area, a second display area, and a third display area and a non-display area disposed at a first corner of a display panel according to an embodiment of the disclosure. Figure 5 FIG. 2 is a plan view illustrating a first display area, a second display area, and a third display area and a non-display area disposed at a first corner of a display panel according to an embodiment of the disclosure. Figure 3 FIG. 3 is an enlarged view of a region A of FIG. 2.

[0097] Referring to FIG. 2, Figure 5 In an embodiment of the display panel, the intersection point CRP of the first bending line BL1 and the second bending line BL2 can be located in the first display area DA1. In such an embodiment, the first display area DA1 can be disposed on the front surface FS, the first side surface SS1, the second side surface SS2, and the first corner CS1. The third display area DA3 can be disposed on the first side surface SS1, the second side surface SS2, and the first corner CS1. The second display area DA2 can be disposed on the first side surface SS1, the second side surface SS2, and the first corner CS1. The non-display area NDA can be disposed on the first side surface SS1, the second side surface SS2, and the first corner CS1.

[0098] The position of the intersection point CRP of the first bending line BL1 and the second bending line BL2 is not limited to the position shown in Figure 5 but can be located in the second display area DA2 or the third display area DA3.

[0099] The first display area DA1 can include first pixels PX1 (see Figure 6). In addition, the first display area DA1 can include a sensor electrode SE (see Figure 6 ) for sensing a touch of a user. The sensor electrode SE can include a driving electrode TE and a sensing electrode RE (see Figure 6 ).

[0100] The second display area DA2 can be disposed on the outside of the third display area DA3. The non-display area NDA can be disposed on the outside of the second display area DA2. The second display area DA2 can include second pixels PX2 (see Figures 8 to 11 ) that display an image. In one embodiment, the second display area DA2 can include a cutout pattern CP (see Figure 8 and Figure 9 ) and a cut groove CG (see Figure 8 and Figure 9 ) to reduce strain due to double curvature at the first corner CS1. Alternatively, the second display area DA2 can include an island pattern ISP (see Figure 10 and Figure 11 ), a connection pattern CNP (see Figure 10 and Figure 11 ), and a cut-up portion CUP (see Figure 10 and Figure 11 ) to reduce strain due to double curvature at the first corner CS1.

[0101] The third display area DA3 can be disposed on the outside of the first display area DA1. The third display area DA3 can include third pixels PX3 (see Figure 14 ) that display an image.

[0102] In a case where the non-display area NDA is formed instead of the third display area DA3, a user can recognize the non-display area NDA between the first display area DA1 and the second display area DA2. In this case, the user can recognize a gap between an image displayed by the first display area DA1 and an image displayed by the second display area DA2. In an embodiment of the present disclosure, in a case where the third display area DA3 including the third pixels PX3 (see Figure 14 ) is formed between the first display area DA1 and the second display area DA2, it can be effectively prevented that the user sees the gap between the image displayed by the first display area DA1 and the image displayed by the second display area DA2.

[0103] Figure 3 The first display area DA1, the second display area DA2, and the third display area DA3 disposed at the second corner CS2, the third corner CS3, and the fourth corner CS4, and the non-display area NDA shown in FIG. 1A can be similar to those described above with respect to Figure 5The described regions. Thus, any repetitive detailed description of the second corner CS2, the third corner CS3, and the fourth corner CS4 will be omitted.

[0104] Figure 6 is a plan view showing an embodiment of the first display region of Figure 5

[0105] Figure 6 The first pixel PX1 of the first display region DA1 and the drive electrodes TE and the sense electrodes RE of the sensor electrode layer SENL are shown (see Figure 4 ). In the embodiment shown in Figure 6 , mutual capacitance sensing using two sensor electrodes (i.e., the drive electrodes TE and the sense electrodes RE) is used to sense a touch by a user. For ease of illustration, Figure 6 only two sense electrodes RE adjacent to each other in the first direction (X-axis direction) and two drive electrodes TE adjacent to each other in the second direction (Y-axis direction) are shown.

[0106] Referring to Figure 6 , in one embodiment, the drive electrodes TE can be electrically separated from the sense electrodes RE. The drive electrodes TE and the sense electrodes RE are disposed or formed in the same layer, and the drive electrodes TE and the sense electrodes RE can be spaced apart from each other. In such an embodiment, a gap is defined between the drive electrodes TE and the sense electrodes RE.

[0107] The sense electrodes RE can be electrically connected to each other in the first direction (X-axis direction). The drive electrodes TE can be electrically connected to each other in the second direction (Y-axis direction). In one embodiment, the drive electrodes TE adjacent to each other in the second direction (Y-axis direction) can be connected by a connection electrode BE to electrically separate the sense electrodes RE from the drive electrodes TE at the intersection therebetween.

[0108] The connection electrodes BE can be disposed or formed in a different layer from the drive electrodes TE and the sense electrodes RE, and can be connected to the drive electrodes TE through first touch contact holes TCNT1. One end of each of the connection electrodes BE can be connected to one of the drive electrodes TE adjacent to each other in the second direction (Y-axis direction) through the first touch contact holes TCNT1. The other end of each of the connection electrodes BE can be connected to the other of the drive electrodes TE adjacent to each other in the second direction (Y-axis direction) through the first touch contact holes TCNT1. The connection electrodes BE can overlap the sense electrodes RE in the third direction (Z-axis direction). Since the connection electrodes BE are disposed or formed in a different layer from the drive electrodes TE and the sense electrodes RE, the connection electrodes BE can be electrically separated from the sense electrodes RE even though the connection electrodes BE overlap the sense electrodes RE in the third direction (Z-axis direction). ​

[0109] Each of the connecting electrodes BE can be bent at least once. In one embodiment, for example, the connecting electrode BE is bent as follows: Figure 6 The shape of the angle brackets "<" or ">" is shown, but the shape of the connecting electrodes BE is not limited to this. In one embodiment, where drive electrodes TE adjacent to each other in the second direction (Y-axis direction) are connected by multiple connecting electrodes BE, the drive electrodes TE can be effectively electrically connected to each other even when any of the multiple connecting electrodes BE is disconnected.

[0110] When viewed from a top or planar view in the third direction (Z-axis direction), each of the driving electrode TE and the sensing electrode RE can have a mesh structure. This is because the driving electrode TE and the sensing electrode RE are disposed or formed on the encapsulation layer TFEL (see...). Figure 7 Therefore, from the first common electrode 173 (see...) Figure 7 The distance to the driving electrode TE or sensing electrode RE is small. Therefore, it is possible to use the first common electrode 173 (see...) Figure 7 A parasitic capacitance is formed between the driving electrode TE and the sensing electrode RE. This parasitic capacitance is related to the first common electrode 173 (see...). Figure 7 The area of ​​the driving electrode TE or sensing electrode RE overlapping each other is proportional to the area of ​​the parasitic capacitance. In one embodiment, when viewed from above, it is desirable for the driving electrode TE and sensing electrode RE to have a mesh structure to reduce this parasitic capacitance.

[0111] The first display area DA1 may include a first pixel PX1 for displaying an image. Each of the first pixels PX1 may include a plurality of emission areas EA1, EA2, EA3, and EA4. In one embodiment, for example, each of the first pixels PX1 may include a first emission area EA1, a second emission area EA2, a third emission area EA3, and a fourth emission area EA4. The first emission area EA1 refers to the emission area of ​​a first sub-pixel that emits a first light, and the second emission area EA2 refers to the emission area of ​​a second sub-pixel that emits a second light. The third emission area EA3 refers to the emission area of ​​a third sub-pixel that emits a third light, and the fourth emission area EA4 refers to the emission area of ​​a fourth sub-pixel that emits a fourth light.

[0112] The first emission area EA1, the second emission area EA2, the third emission area EA3, and the fourth emission area EA4 can emit light of different colors from each other. Alternatively, two of the first emission area EA1, the second emission area EA2, the third emission area EA3, and the fourth emission area EA4 can emit light of the same color as each other. In one embodiment, for example, the first emission area EA1 can emit red light, the second emission area EA2 and the fourth emission area EA4 can emit green light, and the third emission area EA3 can emit blue light.

[0113] Each of the first emission area EA1, the second emission area EA2, the third emission area EA3, and the fourth emission area EA4 can have, but is not limited to, a quadrilateral shape such as a rhombus shape when viewed from the top. In one embodiment, for example, the first emission area EA1, the second emission area EA2, the third emission area EA3, and the fourth emission area EA4 can have another polygonal shape other than the quadrilateral shape, a circular shape, or an elliptical shape when viewed from the top. In one embodiment, as shown in FIG. 1A, the third emission area EA3 has the largest area, the first emission area EA1 has the second largest area, and the second emission area EA2 and the fourth emission area EA4 have the smallest area, but is not limited thereto. Figure 6

[0114] In one embodiment, in a case where the driving electrode TE, the sensing electrode RE, and the connection electrode BE form a mesh structure when viewed from the top, the emission areas EA1, EA2, EA3, and EA4 can not overlap the driving electrode TE, the sensing electrode RE, and the connection electrode BE in the third direction (Z-axis direction). In such an embodiment, light emitted from the emission areas EA1, EA2, EA3, and EA4 is not blocked or less blocked by the driving electrode TE, the sensing electrode RE, and the connection electrode BE, and thus it is possible to effectively prevent the luminance of light from being reduced due to the electrodes.

[0115] Figure 7 is a cross-sectional view showing an example of a display panel taken along a line II-II' of Figure 6

[0116] Referring to Figure 7 In one embodiment, a display layer DISL including a thin film transistor layer TFTL, an emission material layer EML, and an encapsulation layer TFEL can be disposed on the substrate SUB, and a sensor electrode layer SENL including a driving electrode TE, a sensing electrode RE, and a connection electrode BE can be disposed on the display layer DISL.

[0117] ​​The substrate SUB can include or be made of an insulating material such as a polymer resin and glass. In one embodiment, for example, the substrate SUB can include PI. In such an embodiment, the substrate SUB can be a flexible substrate that can be bent, folded, or rolled up.

[0118] A thin film transistor layer TFTL including the first thin film transistor ST1 can be provided on the substrate SUB. The thin film transistor layer TFTL can include the first thin film transistor ST1, the capacitor CAP, the first connection electrode ANDE1, the first buffer layer BF1, the gate insulator 130, the first interlayer dielectric layer 141, the second interlayer dielectric layer 142, the first planarization layer 150, the second planarization layer 160, and the barrier layer 161.

[0119] The first buffer layer BF1 can be provided on the substrate SUB. The first buffer layer BF1 can include or be formed of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0120] The first thin film transistor ST1 can be provided on the first buffer layer BF1. The first thin film transistor ST1 can include the first active layer ACT1, the first gate electrode G1, the first source electrode S1, and the first drain electrode D1.

[0121] The first active layer ACT1 of the first thin film transistor ST1 can be provided on the first buffer layer BF1. The first active layer ACT1 can include a silicon semiconductor such as polysilicon, single crystal silicon, low-temperature polysilicon, and amorphous silicon. A portion of the first active layer ACT1 that overlaps the first gate electrode G1 in the third direction (Z-axis direction) can be defined as a channel region. Other portions of the first active layer ACT1 that do not overlap the first gate electrode G1 in the third direction (Z-axis direction) can be defined as conductive regions. The conductive regions of the first active layer ACT1 can have electrical conductivity by doping the silicon semiconductor with ions or impurities.

[0122] The gate insulator 130 can be provided on the first active layer ACT1 of the first thin film transistor ST1. The gate insulator 130 can include or be formed of an inorganic layer such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0123] The first gate electrode G1 of the first thin film transistor ST1 and the first capacitor electrode CAE1 of the capacitor CAP can be provided over the gate insulator 130. The first gate electrode G1 of the first thin film transistor ST1 can overlap with the first active layer ACT1 in the third direction (Z-axis direction). The first capacitor electrode CAE1 of the capacitor CAP can overlap with the second capacitor electrode CAE2 of the capacitor CAP in the third direction (Z-axis direction). The first gate electrode G1 and the first capacitor electrode CAE1 can include or consist of a single layer or a plurality of layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0124] The first interlayer dielectric layer 141 can be provided over the first gate electrode G1 and the first capacitor electrode CAE1. The first interlayer dielectric layer 141 can include or be formed of an inorganic layer, such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The first interlayer dielectric layer 141 can include a plurality of inorganic layers.

[0125] The second capacitor electrode CAE2 can be provided over the first interlayer dielectric layer 141. The second capacitor electrode CAE2 can overlap with the first capacitor electrode CAE1 in the third direction (Z-axis direction). The capacitor CAP can be formed of the first capacitor electrode CAE1, the second capacitor electrode CAE2, and the first interlayer dielectric layer 141 due to the first interlayer dielectric layer 141 having a predetermined dielectric constant. The second capacitor electrode CAE2 can consist of or be defined by a single layer or a plurality of layers each including one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0126] The second interlayer dielectric layer 142 can be provided over the second capacitor electrode CAE2. The second interlayer dielectric layer 142 can include or be formed of an inorganic layer, such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0127] The first source electrode S1 and the first drain electrode D1 of the first thin film transistor ST1 can be provided over the second interlayer dielectric layer 142. The first source electrode S1 and the first drain electrode D1 can consist of or be defined by a single layer or a plurality of layers including one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0128] The first source electrode S1 of the first thin film transistor ST1 can be connected to the conductive region located on one side of the channel region of the first active layer ACT1 through a contact hole defined through the gate insulator 130, the first interlayer dielectric layer 141, and the second interlayer dielectric layer 142. The first drain electrode D1 of the first thin film transistor ST1 can be connected to the conductive region located on the other side of the channel region of the first active layer ACT1 through a contact hole defined through the gate insulator 130, the first interlayer dielectric layer 141, and the second interlayer dielectric layer 142.

[0129] The first planarization layer 150 can be disposed on the first source electrode S1 and the first drain electrode D1 to provide a flat surface on the thin film transistor having different levels or step structures. The first planarization layer 150 can include or be formed of an organic layer such as an acrylic resin, an epoxy resin, a phenol resin, a polyamide resin, and a polyimide resin.

[0130] The first connection electrode ANDE1 can be disposed on the first planarization layer 150. The first connection electrode ANDE1 can be connected to the first source electrode S1 or the first drain electrode D1 of the first thin film transistor ST1 through a contact hole defined through the first planarization layer 150. The first connection electrode ANDE1 can be composed of or defined by a single layer or multiple layers, each layer including one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) or an alloy thereof.

[0131] The second planarization layer 160 can be disposed on the first connection electrode ANDE1. The second planarization layer 160 can include or be formed of an organic layer such as an acrylic resin, an epoxy resin, a phenol resin, a polyamide resin, and a polyimide resin.

[0132] The barrier layer 161 can be disposed on the second planarization layer 160. The barrier layer 161 can include or be formed of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0133] The emission material layer EML is disposed on the thin film transistor layer TFTL. The emission material layer EML can include the first light emitting element 170 and the bank 180.

[0134] Each of the first light emitting elements 170 can include a first pixel electrode 171, a first emission layer 172, and a first common electrode 173. In each of the emission areas EA1, EA2, EA3, and EA4, the first pixel electrode 171, the first emission layer 172, and the first common electrode 173 are sequentially stacked with each other such that holes from the first pixel electrode 171 and electrons from the first common electrode 173 combine with each other in the first emission layer 172 to emit light. In one embodiment, the first pixel electrode 171 can be an anode electrode, and the first common electrode 173 can be a cathode electrode. The first emission area EA1, the second emission area EA2, and the fourth emission area EA4 can be substantially the same as the third emission area EA3 shown. Figure 7

[0135] The first pixel electrode 171 can be disposed on the barrier layer 161. The first pixel electrode 171 can be connected to the first connection electrode ANDE1 through a contact hole defined through the barrier layer 161 and the second planarization layer 160.

[0136] In one embodiment, the first light emitting elements 170 can have a top emission structure in which light is emitted from the first emission layer 172 toward the first common electrode 173, and the first pixel electrode 171 can consist of or be defined by a single layer of molybdenum (Mo), titanium (Ti), copper (Cu), or aluminum (Al), or can consist of a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of ITO and aluminum (ITO / Al / ITO), an APC alloy, or a stacked structure of ITO and APC alloy (ITO / APC / ITO) to increase reflectivity. The APC alloy is an alloy of silver (Ag), palladium (Pd), and copper (Cu).

[0137] The bank 180 functions to define each of the emission areas EA1, EA2, EA3, and EA4 of the pixel. In such an embodiment, the bank 180 can be disposed or formed on the barrier layer 161 to expose a portion of the first pixel electrode 171. The bank 180 can cover an edge of the first pixel electrode 171. The bank 180 can be disposed in a contact hole defined through the barrier layer 161 and the second planarization layer 160. Accordingly, the contact hole defined through the barrier layer 161 and the second planarization layer 160 can be filled with the bank 180. The bank 180 can include or be formed of an organic layer such as an acrylic resin, an epoxy resin, a phenol resin, a polyamide resin, and a polyimide resin.

[0138] ​A first emission layer 172 is disposed on the first pixel electrode 171. The first emission layer 172 can include an organic material and emit light of a predetermined color. In one embodiment, for example, the first emission layer 172 can include a hole transport layer, an organic material layer, and an electron transport layer. The organic material layer can include a host and a dopant. The organic material layer can include a material that emits predetermined light, and can be formed using a phosphor or a fluorescent material.

[0139] A first common electrode 173 is disposed on the first emission layer 172. The first common electrode 173 covers the first emission layer 172. The first common electrode 173 can be a common layer formed across pixels. A capping layer can be formed on the first common electrode 173.

[0140] In an embodiment in which the first light emitting element 170 has a top emission structure, the first common electrode 173 can include or be formed of a transparent conductive material or a semi-transmissive conductive material capable of emitting light, such as indium tin oxide ("ITO") and indium zinc oxide ("IZO"), and magnesium (Mg), silver (Ag), and an alloy of magnesium (Mg) and silver (Ag). In one embodiment, the first common electrode 173 can include or be formed of a semi-transmissive conductive material, so that light extraction efficiency can be improved by a microcavity effect.

[0141] An encapsulation layer TFEL can be disposed or formed on the emission material layer EML. The encapsulation layer TFEL can include an inorganic layer to prevent oxygen or moisture from penetrating into the emission material layer EML. In addition, the encapsulation layer TFEL can further include an organic layer to protect the emission material layer EML from particles.

[0142] In one embodiment, for example, the encapsulation layer TFEL can include a first inorganic encapsulation layer 191 disposed on the first common electrode 173, an organic encapsulation layer 192 disposed on the first inorganic encapsulation layer 191, and a second inorganic encapsulation layer 193 disposed on the organic encapsulation layer 192. The first inorganic encapsulation layer 191 and the second inorganic encapsulation layer 193 can be composed of or defined by a plurality of layers in which one or more inorganic layers among a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer are alternately stacked with each other. The organic layer can include an acrylic resin, an epoxy resin, a phenol resin, a polyamide resin, or a polyimide resin.

[0143] A sensor electrode layer SENL is disposed on the encapsulation layer TFEL. The sensor electrode layer SENL can include a driving electrode TE, a sensing electrode RE, and a connection electrode BE.

[0144] An overcoat layer OC can be disposed on the encapsulation layer TFEL. The overcoat layer OC can include an inorganic layer. In one embodiment, for example, the overcoat layer OC can include or be formed of an organic material such as an acrylic resin, an epoxy resin, a phenol resin, a polyamide resin, and a polyimide resin.

[0145] A first touch inorganic layer TINS1 can be disposed on the overcoat layer OC. The first touch inorganic layer TINS1 can be formed as or defined by a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0146] A connection electrode BE can be disposed on the first touch inorganic layer TINS1. The connection electrode BE can be composed of or defined by a single layer of molybdenum (Mo), titanium (Ti), copper (Cu), or aluminum (Al), or can be composed of a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of aluminum and ITO (ITO / Al / ITO), an APC alloy, or a stacked structure of an APC alloy and ITO (ITO / APC / ITO).

[0147] A second touch inorganic layer TINS2 can be disposed on the connection electrode BE. The second touch inorganic layer TINS2 can be formed as or defined by a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0148] A driving electrode TE and a sensing electrode RE can be disposed on the second touch inorganic layer TINS2. In one embodiment, the driving electrode TE and the sensing electrode RE can not overlap with the emission areas EA1, EA2, EA3, and EA4 to prevent light emitted from the emission areas EA1, EA2, EA3, and EA4 from being blocked by the driving electrode TE and the sensing electrode RE, which can reduce the brightness of the light. The driving electrode TE and the sensing electrode RE can be composed of or defined by a single layer of molybdenum (Mo), titanium (Ti), copper (Cu), or aluminum (Al), or can be composed of a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of aluminum and ITO (ITO / Al / ITO), an APC alloy, or a stacked structure of an APC alloy and ITO (ITO / APC / ITO).

[0149] A touch organic layer TINS3 can be disposed on the driving electrode TE and the sensing electrode RE. The touch organic layer TINS3 can include at least one material selected from an acrylic resin, an epoxy resin, a phenol resin, a polyamide resin, and a polyimide resin.

[0150] Figure 8 is a plan view illustrating an embodiment of the second display area of Figure 5 .Figure 8 is Figure 5 an enlarged view of the area B in

[0151] Referring to Figure 8 , the second display area DA2 can include the cutout pattern CP and the cut groove CG. The cutout pattern CP and the cut connection pattern CBP can be formed by cutting the display panel 300 with a laser. Accordingly, the cut groove CG can exist between the cutout patterns CP adjacent to each other and between the cut connection patterns CBP adjacent to each other.

[0152] One end of each of the cutout patterns CP can be connected to the third display area DA3, and the other end thereof can be connected to the cut connection pattern CBP. Each of the cutout patterns CP can be formed in a shape similar to a quadrilateral shape when viewed from the top.

[0153] The cut connection pattern CBP can be disposed between the respective cutout patterns CP and the non-display area NDA. One end of each of the cut connection patterns CBP can be connected to the respective cutout patterns CP, and the other end thereof can be connected to the non-display area NDA.

[0154] The cut connection pattern CBP can be a serpentine shape including a plurality of bent or curved portions. In such an embodiment, the cut connection pattern CBP can be designed to allow the cutout patterns CP of the second display area DA2 to easily expand and contract. Accordingly, in such an embodiment, a strain applied to the second display area DA2 due to the double curvature can be effectively reduced.

[0155] The second pixel PX2, the second dam DAM2, and the power contact hole PCT can be disposed in each of the cutout patterns CP. The first dam DAM1 can be disposed at an edge of the third display area DA3 adjacent to the second display area DA2.

[0156] The second pixels PX2 can be arranged substantially in a length direction of the predetermined direction DRA or the cutout pattern CP. In one embodiment, each of the second pixels PX2 can include a plurality of emission areas EA1', EA2', and EA3'. The number of the emission areas EA1', EA2', and EA3' of each of the second pixels PX2 can be different from the number of the emission areas EA1, EA2, EA3, and EA4 of each of the first pixels PX1. In an alternative embodiment, the number of the emission areas EA1', EA2', and EA3' of each of the second pixels PX2 can be equal to (but not limited to) the number of the emission areas EA1, EA2, EA3, and EA4 of each of the first pixels PX1. In one embodiment, the number of the emission areas EA1', EA2', and EA3' of each of the second pixels PX2 can be different from the number of the emission areas EA1", EA2", EA3" (see FIG. 6) of each of the third pixels PX3. Figure 14 ) of each of the third pixels PX3.

[0157] In one embodiment, for example, each of the second pixels PX2 can include a first emission area EA1', a second emission area EA2', and a third emission area EA3'. The first emission area EA1' refers to an emission area of a first sub-pixel that emits a first light, the second emission area EA2' refers to an emission area of a second sub-pixel that emits a second light, and the third emission area EA3' refers to an emission area of a third sub-pixel that emits a third light.

[0158] The first emission area EA1', the second emission area EA2', and the third emission area EA3' can emit lights of different colors from each other. In one embodiment, for example, the first emission area EA1' can emit a red light, the second emission area EA2' can emit a green light, and the third emission area EA3' can emit a blue light.

[0159] The first, second, and third emission areas EA1', EA2', and EA3' can be arranged in a predetermined direction DRA. Each of the first, second, and third emission areas EA1', EA2', and EA3' can have a rectangular shape when viewed from the top. In one embodiment, for example, each of the first, second, and third emission areas EA1', EA2', and EA3' can have a rectangular shape having a shorter side in the predetermined direction DRA and a longer side in a direction DRB crossing the predetermined direction DRA when viewed from the top, but is not limited thereto. Alternatively, each of the first, second, and third emission areas EA1', EA2', and EA3' can have another polygonal shape other than a quadrilateral shape, a circular shape, or an elliptical shape when viewed from the top. In one embodiment, the first, second, and third emission areas EA1', EA2', and EA3' have substantially the same area as each other as shown in FIG. 4, but the present disclosure is not limited thereto. Alternatively, at least one of the first, second, and third emission areas EA1', EA2', and EA3' can have a different area from the other emission areas. Figure 8

[0160] The second dam DAM2 can be disposed to surround the second pixel PX2. The second dam DAM2 can be disposed at an edge of each of the cutout patterns CP.

[0161] The power contact hole PCT can be disposed in an area surrounded by the second dam DAM2. In one embodiment, as shown in FIG. 4, the power contact hole PCT can be disposed between the second dam DAM2 and the second pixel PX2 disposed at one edge of the cutout pattern CP, but the present disclosure is not limited thereto. The power contact hole PCT can be a power connector to which the first supply voltage line VSL (see FIG. 3) and the second common electrode 273 (see FIG. 3) are connected. Accordingly, the first supply voltage of the first supply voltage line VSL (see FIG. 3) can be applied to the second common electrode 273 (see FIG. 3). Figure 8 Figure 15 Figure 12 Figure 15 Figure 12

[0162] In one embodiment, as shown in FIG. 4, in the case where the second display area DA2 includes the cutout pattern CP, the cutout connection pattern CBP, and the cut groove CG, the cutout pattern CP can be inflated and deflated. Accordingly, a strain applied to the second display area DA2 due to the double curvature of the first corner CS1 can be reduced. Figure 8

[0163] Figure 9 Figure 5 ​​​​​​​​a plan view of another alternative embodiment of the second display area of FIG. 1.

[0164] Figure 9 The second display area DA2 shown in FIG. 2 is substantially the same as the second display area DA2 shown in FIG. 1, except that the cutout connection pattern CBP is removed, and thus the cutout patterns CP are directly connected to the non-display area NDA, and the area of each of the cutout patterns CP is increased, so that more second pixels PX2 can be provided in the cutout patterns CP. Figure 8 The same or similar elements shown in FIG. 2 have been labeled with the same reference numerals as used above to describe the embodiment of the second display area DA2 shown in FIG. 1, and any repetitive detailed description thereof will be omitted hereinafter. Figure 9 The same or similar elements shown in FIG. 2 have been labeled with the same reference numerals as used above to describe the embodiment of the second display area DA2 shown in FIG. 1, and any repetitive detailed description thereof will be omitted hereinafter. Figure 8 The same or similar elements shown in FIG. 2 have been labeled with the same reference numerals as used above to describe the embodiment of the second display area DA2 shown in FIG. 1, and any repetitive detailed description thereof will be omitted hereinafter.

[0165] Figure 10 and Figure 11 is a plan view of another alternative embodiment of the second display area of FIG. 1. Figure 5

[0166] Referring to FIG. 3 and FIG. 4, the second display area DA2 includes an island pattern ISP, a connection pattern CNP, and a cut portion CUP. The island pattern ISP can include a first island pattern ISP1, a second island pattern ISP2, a third island pattern ISP3, and a fourth island pattern ISP4. The connection pattern CNP can include a first connection pattern CNP1, a second connection pattern CNP2, a third connection pattern CNP3, and a fourth connection pattern CNP4. The cut portion CUP can include a first cut portion CUP1, a second cut portion CUP2, and a third cut portion CUP3. Figure 10 Figure 11

[0167] ​​​The first, second, third, and fourth island patterns ISP1, ISP2, ISP3, and ISP4 can be spaced apart from each other. In one embodiment, for example, a first cut portion CUP1 is defined between the first and second island patterns ISP1 and ISP2 such that the first island pattern ISP1 can be spaced apart from the second island pattern ISP2 in a predetermined direction DRC. In such an embodiment, a second cut portion CUP2 is defined between the first and third island patterns ISP1 and ISP3 such that the third island pattern ISP3 can be spaced apart from the first island pattern ISP1 in a direction DRD crossing the predetermined direction DRC. In such an embodiment, the second cut portion CUP2 is defined between the second and fourth island patterns ISP2 and ISP4 such that the fourth island pattern ISP4 can be spaced apart from the second island pattern ISP2 in the direction DRD crossing the predetermined direction DRC. In such an embodiment, a third cut portion CUP3 is defined between the third and fourth island patterns ISP3 and ISP4 such that the fourth island pattern ISP4 can be spaced apart from the third island pattern ISP3 in the predetermined direction DRC.

[0168] The first, second, third, and fourth connection patterns CNP1, CNP2, CNP3, and CNP4 can extend from each of the first, second, third, and fourth island patterns ISP1, ISP2, ISP3, and ISP4. The first, second, third, and fourth island patterns ISP1, ISP2, ISP3, and ISP4 can have substantially the same structure as each other. Hereinafter, for convenience of description, the first island pattern ISP1 will be described in detail, and any repetitive detailed description of the second, third, and fourth island patterns ISP2, ISP3, and ISP4 can be omitted.

[0169] The first connection pattern CNP1 can extend from the first island pattern ISP1 in the predetermined direction DRC. The first connection pattern CNP1 can connect the first island pattern ISP1 with the second island pattern ISP2.

[0170] The second connection pattern CNP2 can extend from the first island pattern ISP1 in the direction DRD crossing the predetermined direction DRC. The second connection pattern CNP2 can be connected to an island pattern disposed on an upper side of the first island pattern ISP1.

[0171] The third connection pattern CNP3 can extend from the first island pattern ISP1 in the predetermined direction DRC. The third connection pattern CNP3 can be connected to an island pattern disposed on a left side of the first island pattern ISP1.

[0172] The fourth connection pattern CNP4 can extend from the first island pattern ISP1 along a direction DRD crossing the predetermined direction DRC. The fourth connection pattern CNP4 can be connected to the third island pattern ISP3.

[0173] The second pixel PX2 can be disposed in each of the first island pattern ISP1, the second island pattern ISP2, the third island pattern ISP3, and the fourth island pattern ISP4. The second pixel PX2 can include a first emission area EA1' that emits light of a first color, a second emission area EA2' that emits light of a second color, and a third emission area EA3' that emits light of a third color. In one embodiment, for example, the first color can be red, the second color can be green, and the third color can be blue.

[0174] The first emission area EA1', the second emission area EA2', and the third emission area EA3' can be arranged in the predetermined direction DRC. The third emission area EA3' can be disposed between the first emission area EA1' and the second emission area EA2' in the predetermined direction DRC. Each of the first emission area EA1', the second emission area EA2', and the third emission area EA3' can have a rectangular shape when viewed from the top. In one embodiment, for example, each of the first emission area EA1', the second emission area EA2', and the third emission area EA3' can have a rectangular shape having a shorter side in the predetermined direction DRC and a longer side in a direction DRD crossing the predetermined direction DRC when viewed from the top, but the present disclosure is not limited thereto. Alternatively, each of the first emission area EA1', the second emission area EA2', and the third emission area EA3' can have another polygonal shape other than a quadrilateral shape, a circular shape, or an elliptical shape when viewed from the top. In one embodiment, the area of the third emission area EA3' is greater than the area of the first emission area EA1' and the area of the second emission area EA2', as shown in Figure 10 and Figure 11 but the present disclosure is not limited thereto.

[0175] In one embodiment, when the second display area DA2 is applied with strain due to the double curvature of the first corner CS1, the distances between the first island pattern ISP1, the second island pattern ISP2, the third island pattern ISP3, and the fourth island pattern ISP4 can be widened, as shown in Figure 11 In such an embodiment, the first cut portion CUP1, the second cut portion CUP2, and the third cut portion CUP3 can be widened without changing the shapes of the island patterns ISP and the connection patterns CNP, and thus, since the shapes of the island patterns ISP and the connection patterns CNP are maintained, it is possible to effectively reduce the strain applied to the second display area DA2.

[0176] Figure 12 is a cross-sectional view showing an embodiment of a display panel taken along a line III-III' of Figure 8

[0177] In one embodiment, Figure 12 The second thin-film transistor ST2 of the thin-film transistor layer TFTL, the second pixel electrode 271, the second emission layer 272, and the second common electrode 273 of the second light-emitting element 270 can be substantially the same as the first thin-film transistor ST1, the first pixel electrode 171, the first emission layer 172, and the first common electrode 173 of the thin-film transistor layer TFTL described above with reference to FIG. 1, and for ease of description, any repetitive detailed description thereof will be omitted. In such an embodiment, Figure 7 Figure 12 The first emission area EA1' shown in FIG. 1 is substantially the same as the second emission area EA2' and the third emission area EA3'.

[0178] The second display area DA2 includes a cutout pattern CP and a cutting groove CG formed by cutting the display panel 300 with a laser. In such an embodiment, the organic encapsulation layer 192 of the first display area DA1 and the third display area DA3 is formed by an inkjet process. However, the dot positioning accuracy of the inkjet process is generally not high. Therefore, if the length of the cutout pattern CP in a direction DRB crossing the predetermined direction DRA is several tens of micrometers (pm), it can be difficult to precisely deposit the organic encapsulation layer 192 within the second dam D AM2 of the cutout pattern CP. If the organic encapsulation layer 192 is formed in the cutting groove CG, the cutout pattern CP can be connected through the organic encapsulation layer 192, and thus it can not be possible to effectively reduce the strain applied to the second display area DA2 due to the double curvature. Therefore, in an embodiment of the present application, the encapsulation layer TFEL in the first display area DA1 and the third display area DA3 includes the first inorganic encapsulation layer 191, the organic encapsulation layer 192, and the second inorganic encapsulation layer 193, while the encapsulation layer TFEL in the second display area DA2 includes the first inorganic encapsulation layer 191 and the second inorganic encapsulation layer 193, but does not include the organic encapsulation layer 192.

[0179] ​​In such an embodiment, since the organic encapsulation layer 192 of the encapsulation layer TFEL in the first display area DA1 and the third display area DA3 is higher than the first inorganic encapsulation layer 191 and the second inorganic encapsulation layer 193, the organic encapsulation layer 192 can act as a particle covering layer covering the particles. In an embodiment in which the encapsulation layer TFEL does not include the organic encapsulation layer 192 in the second display area DA2, a portion of each of the first inorganic encapsulation layer 191 and the second inorganic encapsulation layer 193 can be damaged by the particles. As a result, moisture or oxygen can be introduced, and thus the second emission layer 272 can be damaged, so that the second pixels PX2 disposed on the cutout pattern CP can be displayed as dark spots.

[0180] In such an embodiment, the overcoat layer OC formable through a photolithography process is disposed on the second inorganic encapsulation layer 193 in the second display area DA2, and the first touch inorganic layer TINS1 is disposed on the overcoat layer OC. In such an embodiment, in which the length of the cutout pattern CP in the direction DRB crossing the predetermined direction DRA is several tens of μm, since the process error of the organic layer formed via the photolithography process is only several μm, the overcoat layer OC can be precisely provided within the second dam DAM2.

[0181] The organic encapsulation layer 192 is formed through an inkjet process, and the overcoat layer OC is formed through a photolithography process, and thus the organic encapsulation layer 192 and the overcoat layer OC can include or be made of different materials from each other.

[0182] Since the first inorganic encapsulation layer 191 and the second inorganic encapsulation layer 193 are disposed on the second dam DAM2, the first touch inorganic layer TINS1 and the second inorganic encapsulation layer 193 can contact each other on the second dam DAM2. Thus, the second light emitting element 270 of the second pixel PX2 can be encapsulated by the second inorganic encapsulation layer 193 and the first touch inorganic layer TINS1. In such an embodiment, since the height of the overcoat layer OC is higher than the height of the second inorganic encapsulation layer 193 and the height of the first touch inorganic layer TINS1, the overcoat layer OC can act as a particle covering layer covering the particles.

[0183] The second dam DAM2 can include a first sub-dam SDAM1' including or made of the same material as the second planarization layer 160, a second sub-dam SDAM2' including or made of the same material as the barrier layer 161, and a third sub-dam SDAM3' including or made of the same material as the bank 180. The second dam DAM2 can further include a fourth sub-dam (not shown) disposed on the third sub-dam SDAM3'.

[0184] A dam hole DMH can be defined at the inner side of the second dam member DAM2. In an embodiment in which the second emission layer 272 is formed using the same mask as the second common electrode 273 in the second display area DA2, a feature for disconnecting the second emission layer 272, such as a dam hole DMH, is needed.

[0185] The dam hole DMH can form an undercut shape. The undercut shape refers to a hole in which the entrance is smaller than the bottom or a hole in which the entrance is smaller than the area between the entrance and the bottom. The hole of the undercut shape can be similar to a gutter of a pot or a roof. In one embodiment, for example, the entrance of the dam hole DMH can be defined by the barrier layer 161. The lower surface of the barrier layer 161 can not be covered by the second planarization layer 160. Thus, the size of the entrance of the dam hole DMH can be smaller than the size of the area between the entrance and the bottom of the dam hole DMH.

[0186] In the dam hole DMH, the first floating pattern FP1, the second floating pattern FP2, the first inorganic encapsulation layer 191, and the second inorganic encapsulation layer 193 are provided. The dam hole DMH can be filled with the overcoat layer OC. In such an embodiment, the second emission layer 272 and the second common electrode 273 can have poor step coverage. Thus, in such an embodiment in which the dam hole DMH forms an undercut shape, the second emission layer 272 and the second common electrode 273 can not be provided on the sidewall of the dam hole DMH. Thus, the second emission layer 272 and the second common electrode 273 can be disconnected at the dam hole DMH. The step coverage refers to the ability of a subsequent layer to uniformly cover a level ("step") already present on the substrate SUB without being disconnected.

[0187] The first floating pattern FP1 can be provided on the first planarization layer 150 in the dam hole DMH. The first floating pattern FP1 can be a residual layer of the second emission layer 272, which is not connected with the second emission layer 272 but is disconnected from the second emission layer 272. The first floating pattern FP1 can include or be made of the same material as the second emission layer 272. In an embodiment in which the size of the dam hole DMH is small, the first floating pattern FP1 can not exist.

[0188] In one embodiment, the second floating pattern FP2 can be provided on the first floating pattern FP1 in the dam hole DMH. The second floating pattern FP2 can be a residual layer of the second common electrode 273, which is not connected with the second common electrode 273 but is disconnected from the second common electrode 273. The second floating pattern FP2 can include or be made of the same material as the second common electrode 273. In an embodiment in which the size of the dam hole DMH is small, the second floating pattern FP2 can not exist.

[0189] In one embodiment, the first inorganic encapsulation layer 191, the second inorganic encapsulation layer 193, and the first touch inorganic layer TINS1 can be disposed on a cut surface or a side surface of the cutout pattern CP. In one embodiment, for example, the first inorganic encapsulation layer 191, the second inorganic encapsulation layer 193, and the first touch inorganic layer TINS1 can be disposed on a cut surface or a side surface of the substrate SUB, the first buffer layer BF1, the gate insulator 130, the first interlayer dielectric layer 141, the second interlayer dielectric layer 142, and the first planarization layer 150 of the cutout pattern CP. Accordingly, damage to the second emission layer 272 that can occur when moisture or oxygen is introduced through the cut surface or the side surface of the cutout pattern CP can be effectively prevented.

[0190] In one embodiment, as shown in FIG. 2A, the organic encapsulation layer 192 is formed on the second inorganic encapsulation layer 193 of the second display area DA2. In one embodiment, the organic encapsulation layer 192 is formed on the second inorganic encapsulation layer 193 of the second display area DA2 by a spin coating process. In one embodiment, the organic encapsulation layer 192 is formed on the second inorganic encapsulation layer 193 of the second display area DA2 by an inkjet process. Figure 7 As shown in FIG. 2A, the second inorganic encapsulation layer 193 is formed on the second display area DA2 of the display panel 200. In one embodiment, the second inorganic encapsulation layer 193 is formed on the second display area DA2 of the display panel 200 by a photolithography process. In one embodiment, the second inorganic encapsulation layer 193 is formed on the second display area DA2 of the display panel 200 by a spin coating process. In one embodiment, the second inorganic encapsulation layer 193 is formed on the second display area DA2 of the display panel 200 by an inkjet process.

[0191] Figure 13 is a cross-sectional view showing an alternative embodiment of the display panel taken along line III-III' of Figure 8 .

[0192] Figure 13 The embodiment of Figure 12 is substantially the same as the embodiment of Figure 13 The same or similar elements shown in FIGS. 1A to 1C have been marked with the same reference numerals as those used above for describing the embodiment of the display panel 300 shown in FIGS. 1A to 1C, and any repetitive detailed description thereof will be omitted hereinafter. Figure 12

[0193] Referring to Figure 13 ​In one embodiment, the second emission layer 272 can be formed in precise alignment with the emission areas EA1', EA2', and EA3' by using a fine metal mask, so that any features for breaking the second emission layer 272 can be omitted. Accordingly, in such an embodiment, the dam hole DMH can be omitted.

[0194] The second emission layer 272 can be disposed on the second pixel electrode 271 and on a portion of the side surface and the top surface of the bank 180. The width of the second common electrode 273 in the direction DRB crossing the predetermined direction DRA can be greater than the width of the second emission layer 272 in the direction DRB crossing the predetermined direction DRA.

[0195] Figure 14 is a plan view illustrating an embodiment of the third display area of Figure 5 . Figure 14 is Figure 5 an enlarged view of the area C in

[0196] Referring to Figure 14 , the touch drive lines TL can extend in a predetermined direction DRE. The predetermined direction DRE can be inclined by about 135 degrees from the first direction (X-axis direction) and by about 45 degrees from the second direction (Y-axis direction). The touch drive lines TL can be arranged in a direction DRF crossing the predetermined direction DRE. The direction DRF crossing the predetermined direction DRE can be inclined by about 45 degrees from the first direction (X-axis direction) and by about 45 degrees from the second direction (Y-axis direction).

[0197] The third pixels PX3 can be disposed between the touch drive lines TL adjacent to each other. The third pixels PX3 disposed between the touch drive lines TL adjacent to each other can be arranged in the predetermined direction DRE. At least one touch drive line TL can be disposed between the third pixels PX3 adjacent to each other in the direction DRF crossing the predetermined direction DRE. The interval distance between the touch drive lines TL in the direction DRF crossing the predetermined direction DRE and the interval distance between the third pixels PX3 in the direction DRF crossing the predetermined direction DRE can be about tens of μm.

[0198] Each of the third pixels PX3 can include a plurality of emission areas EA1'', EA2'', and EA3''. The number of the emission areas EA1'', EA2'', and EA3'' of each of the third pixels PX3 can be different from the number of the emission areas EA1, EA2, EA3, and EA4 of each of the first pixels PX1.

[0199] In one embodiment, for example, each of the third pixels PX3 can include a first emission area EA1", a second emission area EA2", and a third emission area EA3". The first emission area EA1" refers to an emission area of a first sub-pixel that emits first light, the second emission area EA2" refers to an emission area of a second sub-pixel that emits second light, and the third emission area EA3" refers to an emission area of a third sub-pixel that emits third light.

[0200] The first emission area EA1", the second emission area EA2", and the third emission area EA3" can emit light of different colors. In one embodiment, for example, the first emission area EA1" can emit red light, the second emission area EA2" can emit green light, and the third emission area EA3" can emit blue light.

[0201] The first emission area EA1", the second emission area EA2", and the third emission area EA3" can be arranged in the first direction (X-axis direction). Alternatively, the first emission area EA1", the second emission area EA2", and the third emission area EA3" can be arranged in a direction DRF that intersects the predetermined direction DRE.

[0202] When viewed from the top, the shape of each of the emission areas EA1", EA2", and EA3" of the third pixels PX3 can be different from the shape of each of the emission areas EA1, EA2, EA3, and EA4 of the first pixels PX1. In one embodiment, for example, each of the first emission area EA1", the second emission area EA2", and the third emission area EA3" can have a rectangular shape when viewed from the top. Each of the first emission area EA1", the second emission area EA2", and the third emission area EA3" can have a rectangular shape that has a shorter side in the first direction (X-axis direction) and a longer side in the second direction (Y-axis direction) when viewed from the top.

[0203] However, the shape of each of the first emission area EA1", the second emission area EA2", and the third emission area EA3" when viewed from the top is not limited to those described above. Alternatively, each of the first emission area EA1", the second emission area EA2", and the third emission area EA3" can have another polygonal shape other than a quadrilateral shape, a circular shape, or an elliptical shape when viewed from the top. In one embodiment, the first emission area EA1", the second emission area EA2", and the third emission area EA3" can have substantially the same area as each other as shown in FIG. 10, but the present disclosure is not limited thereto. Alternatively, at least one of the first emission area EA1", the second emission area EA2", and the third emission area EA3" can have a different area from the other emission areas. Figure 14 However, the shape of each of the first emission area EA1", the second emission area EA2", and the third emission area EA3" when viewed from the top is not limited to those described above. Alternatively, each of the first emission area EA1", the second emission area EA2", and the third emission area EA3" can have another polygonal shape other than a quadrilateral shape, a circular shape, or an elliptical shape when viewed from the top. In one embodiment, the first emission area EA1", the second emission area EA2", and the third emission area EA3" can have substantially the same area as each other as shown in FIG. 10, but the present disclosure is not limited thereto. Alternatively, at least one of the first emission area EA1", the second emission area EA2", and the third emission area EA3" can have a different area from the other emission areas.

[0204] A first dam D AM1 can be disposed at an edge of the third display area DA3 adjacent to the second display area DA2. The first dam D AM1 can be disposed between the touch driving line TL and the cutout pattern CP of the second display area DA2. The first dam D AM1 can be a feature for preventing overflow of an organic encapsulation layer 192 (see Figure 15 ) of the encapsulation layer TFEL. The first dam D AM1 can extend in a predetermined direction DRE.

[0205] In one embodiment, as Figure 14 illustred, the third display area DA3 including the third pixels PX3 of the display image is disposed between the first display area DA1 and the second display area DA2, thereby making it impossible for a user to recognize a gap between the image displayed on the first display area DA1 and the image displayed on the second display area DA2.

[0206] Figure 15 is a cross-sectional view of an embodiment of the display panel taken along the line IV-IV' of Figure 14 .

[0207] Figure 15 The second thin-film transistor ST2 of the thin-film transistor layer TFTL, the third pixel electrode 371, the third emission layer 372, and the third common electrode 373 of the third light emitting element 370 can be substantially the same as the first thin-film transistor ST1 of the thin-film transistor layer TFTL, the first pixel electrode 171, the first emission layer 172, and the first common electrode 173 described above with reference to Figure 7 ; and thus, any repetitive detailed description thereof will be omitted.

[0208] The third display area DA3 can include the third pixels PX3 and the touch driving line TL. The touch driving line TL can be connected to the driving electrode TE (see Figure 7 ). The third display area DA3 can not only include the touch driving line TL, but also include a touch sensing line (not shown) connected to the sensing electrode RE (see Figure 7 ).

[0209] In one embodiment, the touch driving line TL does not overlap the first emission area EA1", the second emission area EA2", or the third emission area EA3" to prevent a decrease in brightness of light due to the light emitted from the emission areas EA1", EA2", and EA3" of the third display area DA3 being blocked by the touch driving line TL. The touch driving line TL can be disposed on the first touch inorganic layer TINS1. The touch driving line TL can include the same material as or by the same process as the connection electrode BE of Figure 7 . Figure 7The connection electrode BE of the first thin-film transistor ST1 and the connection electrode BE of the second thin-film transistor ST2 can be made of the same material, and can be provided in the same layer as the connection electrode BE. Figure 7 The connection electrode BE of the first thin-film transistor ST1 and the connection electrode BE of the second thin-film transistor ST2 can be made of the same material, and can be provided in the same layer as the connection electrode BE.

[0210] The scan driving transistor SDT of the scan driving circuit (not shown) can include a scan active layer SACT, a scan gate electrode SG, a scan source electrode SS, and a scan drain electrode SD. The scan active layer SACT, the scan gate electrode SG, the scan source electrode SS, and the scan drain electrode SD of the scan driving transistor SDT can be substantially the same as the first active layer ACT1, the first gate electrode G1, the first source electrode S1, and the first drain electrode D1 of the first thin-film transistor ST1; and thus, any repetitive detailed description thereof will be omitted.

[0211] The scan driving transistor SDT is provided in the thin-film transistor layer TFTL together with the second thin-film transistor ST2 for driving the first emission area EA1", the second emission area EA2", and the third emission area EA3" of the third pixel PX3. Accordingly, the scan driving transistor SDT can be provided in a position where the second thin-film transistor ST2 is not provided so as not to overlap the second thin-film transistor ST2. Since the touch driving line TL is provided so as not to overlap the first emission area EA1", the second emission area EA2", and the third emission area EA3", the scan driving transistor SDT can overlap the touch driving line TL in the third direction (Z-axis direction).

[0212] The first voltage connection line VSEL can be provided on the second interlayer dielectric layer 142. The first voltage connection line VSEL can include or be made of the same material as the first source electrode S1 and the first drain electrode D1 of the first thin-film transistor ST1, the second source electrode S2 and the second drain electrode D2 of the second thin-film transistor ST2, and the scan source electrode SS and the scan drain electrode SD of the scan driving transistor SDT.

[0213] The first supply voltage line VSL can be provided on the first planarization layer 150. The first supply voltage line VSL can include or be made of the same material as the first connection electrode ANDE1. The first supply voltage line VSL can be connected to the first voltage connection line VSEL through a contact hole defined through the first planarization layer 150. The first supply voltage line VSL can be applied with a first supply voltage.

[0214] The third common electrode 373 can be connected to a first supply voltage line VSL through a contact hole defined through the second planarization layer 160. A first supply voltage of the first supply voltage line VSL can be applied to the third common electrode 373.

[0215] A first dam D AM1 can be disposed in the third display area DA3 to prevent the organic encapsulation layer 192 of the encapsulation layer TFEL from overflowing. The first dam DAM1 can include a first sub-dam SDAM1 made of the same material as the first planarization layer 150, a second sub-dam SDAM2 made of the same material as the second planarization layer 160, and a third sub-dam SDAM3 made of the same material as the bank 180. Due to the first dam DAM1, an end portion of the organic encapsulation layer 192 can be disposed between the outermost first emission area EA1" and the first dam DAM1. The first inorganic encapsulation layer 191 and the second inorganic encapsulation layer 193 can be disposed on the first dam DAM1. The first inorganic encapsulation layer 191 and the second inorganic encapsulation layer 193 can contact each other on the first dam DAM1.

[0216] Another dam for limiting the organic encapsulation layer 192 flowing through the first dam DAM1 can be disposed on the outer side of the first dam DAM1. The other dam can have substantially the same structure as the first dam DAM1. Alternatively, the other dam can include at least one of the first sub-dam SDAM1, the second sub-dam SDAM2, and the third sub-dam SDAM3 of the first dam DAM1.

[0217] In one embodiment, as shown in FIG. 10, the scan driving transistor SDT of the scan driver circuit (not shown) can be disposed at a position where the second thin-film transistor ST2 is not disposed, so as not to overlap the second thin-film transistor ST2 for driving the first emission area EA1", the second emission area EA2", and the third emission area EA3" of the third pixel PX3. In such an embodiment, since the touch driving line TL is disposed not to overlap the first emission area EA1", the second emission area EA2", and the third emission area EA3", the scan driving transistor SDT can overlap the touch driving line TL in the third direction (Z-axis direction). Figure 15

[0218] Figures 16 is a flowchart for explaining a method of manufacturing a display apparatus according to an embodiment of the present disclosure. Figures 17 to 30 is a cross-sectional view for explaining a method of manufacturing a display apparatus according to an embodiment of the present disclosure.

[0219] Figure 17 、 Figure 19 、 Figure 21 、 Figure 22 、​Figure 24 Figure 26 Figure 28 Figure 30 are cross-sectional views showing an embodiment of the display panel taken along a line II-II' of Figure 6 Figure 18 Figure 20 Figure 23 Figure 25 Figure 27 Figure 29 are cross-sectional views showing an embodiment of the display panel taken along a line III-III' of Figure 8 Figure 17 Figure 19 Figure 20 Figure 16 Figure 21 Figure 16 Figure 22 Figure 23 show a first display area DA1 of the display panel 300. Figure 16 Figures 24 to 27 Figure 16 Figure 24 Figure 25 Figures 24 to 27 show a second display area DA2 of the display panel 300.

[0220] In one embodiment, as shown in Figure 28 Figure 29 Figure 16 a first pixel PX1 including a first thin-film transistor ST1 and a first light emitting element 170 is provided or formed in the first display area DA1, and a second pixel PX2 including a second thin-film transistor ST2 and a second light emitting element 270 is provided or formed in the second display area DA2 (S100 of Figure 30

[0221] The first thin-film transistor ST1 and the second thin-film transistor ST2 are provided or formed on the substrate SUB. The first thin-film transistor ST1 can include a first active layer ACT1, a first source electrode S1, a first drain electrode D1, and a first gate electrode G1. The plurality of inorganic insulating layers can include a first buffer layer BF1, a gate insulator 130, a first interlayer dielectric layer 141, and a second interlayer dielectric layer 142.

[0222] The first active layer ACT1 of the first thin-film transistor ST1 and the second active layer ACT2 of the second thin-film transistor ST2 are simultaneously formed on the first buffer layer BF1 by using a photolithography process.

[0223] An inorganic material is deposited on the first active layer ACT1 of the first thin-film transistor ST1 and the second active layer ACT2 of the second thin-film transistor ST2 to form the gate insulator 130. ​​​​​​​​​​​​​​​​​​​​​​​​​

[0224] The first gate electrode G1 of the first thin film transistor ST1, the second gate electrode G2 of the second thin film transistor ST2, and the first capacitor electrode CAE1 are formed simultaneously on the gate insulator 130 by using a photolithography process.

[0225] An inorganic material is deposited on the first active layer ACT1 and the first gate electrode G1 of the first thin film transistor ST1, the second active layer ACT2 and the second gate electrode G2 of the second thin film transistor ST2, and the first capacitor electrode CAE1 to form a first interlayer dielectric layer 141.

[0226] A second capacitor electrode CAE2 is formed on the first interlayer dielectric layer 141 using a photolithography process.

[0227] An inorganic material is deposited on the second capacitor electrode CAE2 to form a second interlayer dielectric layer 142.

[0228] The first source electrode S1 and the first drain electrode D1 of the first thin film transistor ST1, and the second source electrode S2 and the second drain electrode D2 of the second thin film transistor ST2 are formed simultaneously on the second interlayer dielectric layer 142 using a photolithography process. Each of the first source electrode S1 and the first drain electrode D1 of the first thin film transistor ST1 can be connected to the first active layer ACT1 through a contact hole formed through the gate insulator 130, the first interlayer dielectric layer 141, and the second interlayer dielectric layer 142. Each of the second source electrode S2 and the second drain electrode D2 of the second thin film transistor ST2 can be connected to the second active layer ACT2 through a contact hole formed through the gate insulator 130, the first interlayer dielectric layer 141, and the second interlayer dielectric layer 142.

[0229] An organic material is deposited on the first source electrode S1 and the first drain electrode D1 of the first thin film transistor ST1, and the second source electrode S2 and the second drain electrode D2 of the second thin film transistor ST2 to form a first planarization layer 150.

[0230] A first connection electrode ANDE1 is provided or formed on the first planarization layer 150. In the first display area DA1, the first connection electrode ANDE1 can be connected to the first drain electrode D1 of the first thin film transistor ST1 through a contact hole formed through the first planarization layer 150. In the second display area DA2, the first connection electrode ANDE1 can be connected to the second drain electrode D2 of the second thin film transistor ST2 through a contact hole formed through the first planarization layer 150. An organic material is deposited on the first connection electrode ANDE1 to form a second planarization layer 160.

[0231] A barrier layer 161 is formed by depositing an inorganic material on the second planarization layer 160.

[0232] A first pixel electrode 171 and a second pixel electrode 271 are formed on the barrier layer 161 by a photolithography process. Each of the first pixel electrode 171 and the second pixel electrode 271 can be connected to the first connection electrode ANDE1 by a contact hole formed through the second planarization layer 160 and the barrier layer 161.

[0233] A dam 180 is formed on the first pixel electrode 171, the second pixel electrode 271, and the barrier layer 161 by a photolithography process. The dam 180 can be provided or formed to cover an edge of the first pixel electrode 171, an edge of the second pixel electrode 271, and a contact hole formed through the second planarization layer 160 and the barrier layer 161.

[0234] A first emission layer 172 can be formed on the first pixel electrode 171 by a deposition process using a mask, and a second emission layer 272 can be provided or formed on the second pixel electrode 271.

[0235] A first common electrode 173 can be formed on the first emission layer 172 using a photolithography process, and a second common electrode 273 can be provided or formed on the second emission layer 272.

[0236] In the first display area DA1, the first emission layer 172 can be aligned with each of the emission areas EA1, EA2, EA3, and EA4 using a fine metal mask. In the second display area DA2, the second emission layer 272 can be formed using the same mask as the second common electrode 273. In such an embodiment, a feature for breaking the second emission layer 272, such as a dam hole DMH, is provided in the second display area DA2. Alternatively, in the second display area DA2, the second emission layer 272 can be aligned with each of the emission areas EA1', EA2', and EA3' using a fine metal mask. In such an embodiment, a feature for breaking the second emission layer 272 can not be provided in the second display area DA2, as shown. Figure 16

[0237] The dam hole DMH can be formed by etching a portion of the barrier layer 161 and then etching the second planarization layer 160 using the barrier layer 161 as a mask. In such an embodiment, by adjusting the etching time of the second planarization layer 160, the dam hole DMH can be formed on a lower surface of the barrier layer 161 to have an undercut shape that is exposed without being covered by the second planarization layer 160.

[0238] ​The first floating pattern FP1, the second floating pattern FP2, the first inorganic encapsulation layer 191, and the second inorganic encapsulation layer 193 can be disposed in the dam hole DMH. In such an embodiment, the second emission layer 272 and the second common electrode 273 can have poor step coverage. Thus, in an embodiment in which the dam hole DMH is formed in a undercut shape, the second emission layer 272 and the second common electrode 273 can not be disposed on the sidewall of the dam hole DMH. Thus, the second emission layer 272 and the second common electrode 273 can be broken at the dam hole DMH. Step coverage refers to the ability of a subsequent layer to uniformly cover a level ("step") of layers already on the substrate SUB without being broken.

[0239] The first floating pattern FP1 can be disposed on the first planarization layer 150 in the dam hole DMH. The first floating pattern FP1 can be a residual layer of the second emission layer 272 that is not connected with, but broken from, the second emission layer 272. The first floating pattern FP1 can be made of the same material as the second emission layer 272. In an embodiment in which the size of the dam hole DMH is small, the first floating pattern FP1 can not exist.

[0240] In one embodiment, the second floating pattern FP2 can be disposed on the first floating pattern FP1 in the dam hole DMH. The second floating pattern FP2 can be a residual layer of the second common electrode 273 that is not connected with, but broken from, the second common electrode 273. The second floating pattern FP2 can be made of the same material as the second common electrode 273. In an embodiment in which the size of the dam hole DMH is small, the second floating pattern FP2 can not exist.

[0241] In one embodiment, as shown in FIGS. 1A and 1B, the first inorganic encapsulation layer 191 and the second inorganic encapsulation layer 193 can be disposed on the first and second common electrodes 173 and 273, respectively. Figures 16 to 30 and ​ The first inorganic encapsulation layer 191 and the second inorganic encapsulation layer 193 can be formed by depositing an inorganic material on the first and second common electrodes 173 and 273, respectively (S200 of FIG. 2). ​

[0242] The first inorganic encapsulation layer 191 can be provided or formed on the first and second common electrodes 173 and 273, respectively, in the first and second display areas DA1 and DA2. In such an embodiment, the first inorganic encapsulation layer 191 can be disposed or formed on the cut or side surfaces of the second dam D AM2 and the cutout pattern CP in the second display area DA2. In such an embodiment, the first inorganic encapsulation layer 191 can be disposed on the cut or side surfaces of the substrate SUB, the first buffer layer BF1, the gate insulator 130, the first interlayer dielectric layer 141, the second interlayer dielectric layer 142, and the first planarization layer 150 of the cutout pattern CP.

[0243] ​In one embodiment, as shown in FIG. 1A, the organic encapsulation layer 192 is formed on the first inorganic encapsulation layer 191 in the first display area DA1. ​ The organic encapsulation layer 192 is formed on the first inorganic encapsulation layer 191 in the first display area DA1 by dropping the first organic material on the first inorganic encapsulation layer 191 in the first display area DA1 via an inkjet process. ​

[0244] In one embodiment, as shown in FIG. 1A, the organic encapsulation layer 192 is formed on the first inorganic encapsulation layer 191 in the first display area DA1.

[0245] In one embodiment, as shown in FIG. 1A, the organic encapsulation layer 192 is formed on the first inorganic encapsulation layer 191 in the first display area DA1. ​ and ​ The second inorganic encapsulation layer 193 is formed on the first inorganic encapsulation layer 191 in the second display area DA2. ​

[0246] In one embodiment, as shown in FIG. 1A, the organic encapsulation layer 192 is formed on the first inorganic encapsulation layer 191 in the first display area DA1.

[0247] In one embodiment, as shown in FIG. 1A, the organic encapsulation layer 192 is formed on the first inorganic encapsulation layer 191 in the first display area DA1. ​ The overcoat layer OC is formed on the second inorganic encapsulation layer 193 in the first display area DA1 and the second display area DA2. ​

[0248] In one embodiment, as shown in FIG. 1A, the organic encapsulation layer 192 is formed on the first inorganic encapsulation layer 191 in the first display area DA1. ​ and ​ ​​​As shown, a second organic material OCM is applied over the entire upper surface of the second inorganic encapsulation layer 193 in the first display area DA1 and the second display area DA2, a mask MASK is placed over the second organic material OCM, and then a portion of the second organic material OCM is removed to form the outer coating layer OC. In such an embodiment, the second organic material OCM can also be applied to the areas between the cutout patterns CP.

[0249] ​ The second organic material OCM as shown can be a negative photoresist pattern, i.e., a portion thereof covered by the mask MASK without being irradiated by the light L is removed during the developing process. However, the present disclosure is not limited thereto. Alternatively, the second organic material OCM can be a positive photoresist pattern, i.e., a portion thereof not covered by the mask MASK but irradiated by the light L is removed during the developing process.

[0250] The outer coating layer OC can be provided or formed on the inner side of the second dam D AM2 of the second display area DA2. Since the outer coating layer OC is higher than the second inorganic encapsulation layer 193 and the first touch inorganic layer TINS1, the outer coating layer OC can serve as a particle covering layer covering particles.

[0251] The organic encapsulation layer 192 is formed via an inkjet process, while the outer coating layer OC is formed via a photolithography process, and thus the first organic material and the second organic material OCM can be made of different materials from each other.

[0252] In one embodiment, as shown in FIG. 1A, the first touch inorganic layer TINS1 is formed by depositing an inorganic material on the outer coating layer OC of the first display area DA1 and the second display area DA2. ​ and ​ As shown, the first touch inorganic layer TINS1 is formed by depositing an inorganic material on the outer coating layer OC of the first display area DA1 and the second display area DA2. ​ S600 in FIG. 1B).

[0253] The first touch inorganic layer TINS1 can be disposed on the second dam D AM2 in the second display area DA2. Since the first touch inorganic layer TINS1 and the second inorganic encapsulation layer 193 contact each other on the second dam D AM2, the second light emitting element 270 of the second pixel PX2 can be encapsulated by the second inorganic encapsulation layer 193 and the first touch inorganic layer TINS1.

[0254] In such an embodiment, the first touch inorganic layer TINS1 can be disposed or formed on the cut or side surface of the cutout pattern CP. In one embodiment, for example, the first touch inorganic layer TINS1 can be disposed on the cut or side surface of the substrate SUB, the first buffer layer BF1, the gate insulator 130, the first interlayer dielectric layer 141, the second interlayer dielectric layer 142, and the first planarization layer 150 of the cutout pattern CP.

[0255] In one embodiment, as shown in FIG. 7A, the connection electrode BE is provided or formed on the first touch inorganic layer TINS1 in the first display area DA1, the second touch inorganic layer TINS2 is formed on the connection electrode BE, and the driving electrode TE and the sensing electrode RE are provided or formed on the second touch inorganic layer TINS2. ​ In one embodiment, as shown in FIG. 7A, the connection electrode BE is provided or formed on the first touch inorganic layer TINS1 in the first display area DA1, the second touch inorganic layer TINS2 is formed on the connection electrode BE, and the driving electrode TE and the sensing electrode RE are provided or formed on the second touch inorganic layer TINS2. ​

[0256] The connection electrode BE is formed on the first touch inorganic layer TINS1 using a photolithography process.

[0257] The inorganic material is deposited on the connection electrode BE to form the second touch inorganic layer TINS2.

[0258] The driving electrode TE and the sensing electrode RE are simultaneously formed on the second touch inorganic layer TINS2 using a photolithography process.

[0259] The touch organic layer TINS3 is formed by depositing an organic material on the driving electrode TE and the sensing electrode RE.

[0260] In one embodiment, as shown in FIG. 7A, the connection electrode BE is provided or formed on the first touch inorganic layer TINS1 in the first display area DA1, the second touch inorganic layer TINS2 is formed on the connection electrode BE, and the driving electrode TE and the sensing electrode RE are provided or formed on the second touch inorganic layer TINS2. ​ In one embodiment, as shown in FIG. 7A, the connection electrode BE is provided or formed on the first touch inorganic layer TINS1 in the first display area DA1, the second touch inorganic layer TINS2 is formed on the connection electrode BE, and the driving electrode TE and the sensing electrode RE are provided or formed on the second touch inorganic layer TINS2.

[0261] In such an embodiment, since the overcoat layer OC and the first touch inorganic layer TINS1 are elements for providing the sensor electrode layer SENL, no additional manufacturing process for encapsulating the second light emitting element 270 of the second pixel PX2 through the second inorganic encapsulation layer 193 and the first touch inorganic layer TINS1 in the second display area DA2 is added.

[0262] In such an embodiment, the third pixel PX3, the encapsulation layer TFEL, and the sensor electrode layer SENL in the third display area DA3 can be manufactured in substantially the same manner as the first pixel PX1, the encapsulation layer TFEL, and the sensor electrode layer SENL in the first display area DA1. Therefore, any repeated detailed description of the method of manufacturing the third pixel PX3, the encapsulation layer TFEL, and the sensor electrode layer SENL in the third display area DA3 will be omitted.

[0263] ​In an embodiment of the display apparatus and the method for manufacturing the display apparatus according to the present application, the overcoat layer formed via the photolithography process is formed on the second inorganic encapsulation layer as a particle cover layer in the display area at the corner, instead of the organic encapsulation layer formed by the inkjet process.

[0264] In such an embodiment of the display apparatus and the method for manufacturing the display apparatus, by providing the first touch inorganic layer in contact with the second inorganic encapsulation layer formed on the overcoat layer, the light emitting elements of the pixels arranged in the display area at the corner can be effectively encapsulated.

[0265] In such an embodiment of the display apparatus and the method for manufacturing the display apparatus, the overcoat layer and the first touch inorganic layer are elements for forming a sensor electrode layer in the display area disposed on the front surface, and thus, the particle cover layer and the encapsulation structure in the display area at the corner can be effectively provided without using an additional manufacturing process.

[0266] The present application should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the application to those skilled in the art.

[0267] While the present application has been particularly shown and described with reference to embodiments thereof, it will be understood by those skilled in the art that various changes in form and details can be made therein without departing from the spirit or scope of the application.

Claims

1. A display device, comprising: a substrate comprising a front surface, a first side surface extending from a first side of the front surface, a second side surface extending from a second side of the front surface, and a corner disposed between the first side surface and the second side surface; a first display area disposed at the front surface of the substrate, wherein the first display area comprises first pixels having first pixel electrodes, first emission layers disposed on the first pixel electrodes, and first common electrodes disposed on the first emission layers; a second display area disposed at the corner of the substrate, wherein the second display area comprises second pixels having second pixel electrodes, second emission layers disposed on the second pixel electrodes, and second common electrodes disposed on the second emission layers; a first inorganic encapsulation layer disposed on the first common electrodes in the first display area and the second common electrodes in the second display area; an organic encapsulation layer disposed on the first inorganic encapsulation layer in the first display area; a second inorganic encapsulation layer disposed on the organic encapsulation layer in the first display area and on the first inorganic encapsulation layer in the second display area.

2. The display device of claim 1, further comprising: an overcoat layer disposed on the second inorganic encapsulation layer in the first display area and the second display area; and a first touch inorganic layer disposed on the overcoat layer in the first display area and the second display area. The organic encapsulation layer comprises a material different from a material of the overcoat layer.

4. The display device of claim 2, further comprising:

3. The display device of claim 2, wherein, a connection electrode disposed on the first touch inorganic layer in the first display area; a second touch inorganic layer disposed on the connection electrode in the first display area; and a sensor electrode disposed on the second touch inorganic layer in the first display area.

5. The display device of claim 4, wherein the sensor electrode comprises a drive electrode and a sense electrode, the drive electrode is connected to the connection electrode through a touch contact hole defined through the second touch inorganic layer.

6. The display device of claim 4, further comprising: a touch organic layer disposed on the sensor electrode in the first display area. wherein 7. The display device of claim 2, further comprising: a cutout pattern disposed at the corner of the substrate separated from another cutout pattern by a cut groove, wherein the cutout pattern comprises the second pixels.

8. The display device of claim 7, further comprising: a dam disposed on the cutout pattern and surrounding the second pixels. The second inorganic encapsulation layer and the first touch inorganic layer contact each other on the dam in the second display area.

10. The display device of claim 8, wherein the second pixels comprise a plurality of emission areas, and 9. The display device of claim 8, wherein, a dam hole is defined between the dam and one of the plurality of emission areas. The dam hole is filled with the overcoat layer. ​ wherein ​ 11. The display device of claim 10, wherein, ​ 12.The display device of claim 10, further comprising: a transistor disposed on the corner of the substrate in the second display area; a planarization layer disposed on the transistor; and a barrier layer disposed on the planarization layer, wherein the dam hole is defined through the planarization layer and the barrier layer. The dam hole is formed in an undercut shape.

13. The display device of claim 12, wherein, 14.The display device of claim 12, further comprising: a first floating pattern disposed in the dam hole; and a second floating pattern disposed on the first floating pattern, wherein the first inorganic encapsulation layer is disposed on the second floating pattern in the dam hole. 15.The display device of claim 14, wherein the first floating pattern is spaced apart from the second emission layer, the first floating pattern comprises a same material as a material of the second emission layer, and the second floating pattern is spaced apart from the second common electrode and comprises a same material as a material of the second common electrode. At least one selected from the first inorganic encapsulation layer, the second inorganic encapsulation layer, and the first touch inorganic layer is disposed on a side surface of the cutout pattern. wherein The second display area further comprises a cutout pattern and a cut groove.

16. The display device of claim 7, wherein, 18.The display device of claim 17, further comprising:

17. The display device of any one of claims 1 to 16, wherein, a cutout connection pattern disposed between the cutout pattern and a non-display area, and comprising a serpentine shape including a plurality of bent portions or curved portions. 19.A method of manufacturing a display device, the method comprising: providing first pixels in a first display area and second pixels in a second display area on a substrate, wherein the first pixels comprise a first pixel electrode, a first emission layer disposed on the first pixel electrode, and a first common electrode disposed on the first emission layer, and the second pixels comprise a second pixel electrode, a second emission layer disposed on the second pixel electrode, and a second common electrode disposed on the second emission layer; providing a first inorganic encapsulation layer on the first common electrode and the second common electrode; providing an organic encapsulation layer on the first inorganic encapsulation layer in the first display area; and providing a second inorganic encapsulation layer on the organic encapsulation layer in the first display area and the first inorganic encapsulation layer in the second display area. The providing the organic encapsulation layer comprises: dropping a first organic material on the first inorganic encapsulation layer in the first display area by an inkjet process to form the organic encapsulation layer. 21.The method of claim 20, further comprising:

20. The method of claim 19, wherein, providing an overcoat layer on the second inorganic encapsulation layer in the first display area and the second display area; and providing a first touch inorganic layer on the overcoat layer in the first display area and the second display area. The providing the overcoat layer comprises: applying a second organic material to the second inorganic encapsulation layer in the first display area and the second display area by a photolithography process to form the overcoat layer. The first organic material is different from the second organic material. ​ 22. The method of claim 21, wherein, ​ ​ 23. The method of claim 22, wherein, ​ 24. The method of any of claims 19 to 23, further comprising: forming a cutout pattern and a cut groove in the second display area.

25. The method of claim 24, further comprising: forming a cutout connection pattern between the cutout pattern and the non-display area, the cutout connection pattern comprising a serpentine shape comprising a plurality of bends or curved portions.

Images