Substrate for semiconductor module device and method for manufacturing substrate

Abstract

The present disclosure relates to a substrate for a semiconductor module device and a method for manufacturing a substrate. A method comprises manufacturing a substrate (80), wherein manufacturing the substrate (80) comprises forming a layer of a metallic material and forming at least one first region in the layer of the metallic material, wherein forming the at least one first region comprises locally deforming the layer of the metallic material or locally inducing a stress in the layer of the metallic material, or both, such that a deflection or a local stress or both in the at least one first region differ from a deflection or a local stress or both of those regions of the layer of the metallic material surrounding the at least one first region.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a base plate for a semiconductor module device and a method for manufacturing such a base plate. BACKGROUND

[0002] Power semiconductor module devices typically comprise a base plate within a housing. At least one substrate is provided on the base plate. A semiconductor device comprising a plurality of controllable semiconductor elements, for example two IGBTs in a half-bridge configuration, is arranged on each of the at least one substrate. Each substrate typically comprises a substrate layer, for example a ceramic layer, a first metallization layer deposited on a first side of the substrate layer and a second metallization layer deposited on a second side of the substrate layer. The controllable semiconductor elements are mounted on the first metallization layer, for example. The second metallization layer is typically attached to the base plate by means of a solder layer or a sinter layer. When mounting the at least one substrate to the base plate, for example by means of soldering or sintering techniques, the substrate is under the influence of high temperatures, wherein the temperatures are typically in the range of about 250°C or more, sometimes even in the range of about 500°C or more. The at least one substrate, the connection layer, for example the solder layer, and the base plate typically have different CTEs (coefficients of thermal expansion). When heating and subsequently cooling the different components during the assembly process, the differences between the CTEs of the different materials, for example copper, ceramic, solder, result in a deformation of the base plate, typically resulting in a concave deflection in the direction of the surface on which the substrate is mounted.

[0003] When mounting the base plate to a heat sink, a connection layer, for example a thermal interface material, is arranged between the base plate and the heat sink. Such a connection layer typically completely fills the space between the base plate and the heat sink, thus having an inhomogeneous thickness due to the deflection of the base plate. In comparison to the substrate and the base plate, the connection layer typically has inferior heat conduction properties. Thus, the thickness of the connection layer has a large influence on the heat conduction and other parameters (the thicker the connection layer, the worse the heat conduction). However, during the assembly of the semiconductor module device, the base plate can locally expand or contract, which can result in a local deflection in the area underneath the substrate. This can result in undesired cavities or voids between the base plate and the heat sink, which are not filled by the connection layer material, for example thermal paste, at all. In other areas, the connection layer can be too thick to provide sufficient heat conduction properties. This has a detrimental effect on the heat dissipation from the base plate to the heat sink.

[0004] There is a need for a base plate for a power semiconductor module device and a method for manufacturing such a base plate, which avoids the above-mentioned drawbacks and other drawbacks and which allows for a manufacturing of a power semiconductor module device with improved performance and reliability. SUMMARY

[0005] A method includes fabricating a substrate, where fabricating the substrate includes forming a layer of a metallic material and forming at least one first region in the layer of the metallic material, where forming the at least one first region includes locally deforming the layer of the metallic material or locally inducing stress in the layer of the metallic material, or both, such that a deflection or a local stress or both in the at least one first region is different from a deflection or a local stress or both in those regions of the layer of the metallic material surrounding the at least one first region.

[0006] A substrate for a power semiconductor module includes a layer of a metallic material and at least one first region formed in the layer of the metallic material, where the layer of the metallic material is locally deformed or locally increases in stress or both, such that a deflection or a local stress or both in the at least one first region is different from a deflection or a local stress or both in those regions of the layer of the metallic material surrounding the at least one first region.

[0007] An apparatus includes a substrate and at least one substrate mounted on the substrate, where each of the at least one substrate includes a dielectric insulating layer and a first metallization layer attached to the dielectric insulating layer, and the substrate includes a layer of a metallic material and at least one first region formed in the layer of the metallic material, where the layer of the metallic material is locally deformed or locally increases in stress or both, such that a deflection or a local stress or both in the at least one first region is different from a deflection or a local stress or both in those regions of the layer of the metallic material surrounding the at least one first region.

[0008] The application can be better understood with reference to the following drawings and description. The components in the drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the application. Furthermore, in the drawings, like reference numerals designate corresponding parts throughout the different views. BRIEF DESCRIPTION OF DRAWINGS

[0009] Figure 1 is a cross-sectional view of a power semiconductor module apparatus.

[0010] Figure 2 (including Figures 2A-2C ) shows cross-sectional views of a semiconductor substrate at different steps during a process of mounting the substrate on a substrate.

[0011] Figure 3 (including Figure 3A and Figure 3B ) schematically shows a heavily curved substrate ( Figure 3A ) and a minimally curved substrate ( Figure 3B ).

[0012] Figure 4 (including Figures 4A-4D ) schematically shows cross-sectional and top views of a conventional substrate on which a plurality of substrates is mounted, where Figures 4A-4CA substrate not mounted on a heat spreader is shown, while Figure 4D A substrate mounted on a heat spreader is shown.

[0013] Figure 5 (including Figures 5A-5D ) schematically shows a cross-sectional view and a top view of a substrate on which a plurality of substrates is mounted according to one example, wherein Figures 5A-5C A substrate not mounted on a heat spreader is shown, while Figure 5D A substrate mounted on a heat spreader is shown.

[0014] Figure 6 A cross-sectional view of a substrate and a tool for processing the substrate is schematically shown.

[0015] Figure 7 (including Figure 7A and 7B ) schematically shows a top view of a substrate according to different examples.

[0016] Figure 8 A top view of a substrate according to one example is schematically shown.

[0017] Figure 9 A three-dimensional view of a substrate and a tool for processing the substrate is schematically shown.

[0018] Figure 10 (including Figures 10A to 10C ) schematically shows a cross-sectional view of a tool for processing a substrate according to different examples. DETAILED DESCRIPTION

[0019] In the following detailed description, reference is made to the accompanying drawings. The drawings show specific examples in which the application can be practiced. It is understood that the features and principles described in relation to various examples can be combined with each other unless specifically noted otherwise. In the description and claims, the naming of certain elements as “first element”, “second element”, “third element” and the like should not be understood as counting. Rather, such names are merely used to refer to different “elements”. That is, for example, the presence of a “third element” does not necessarily require the presence of a “first element” and a “second element”. The electrical wires or electrical connections described herein can be a single electrically conductive element, or comprise at least two separate electrically conductive elements connected in series and / or in parallel. The electrical wires and electrical connections can comprise metallic and / or semiconducting material, and can be permanently electrically conductive (i.e. not switchable). The semiconductor body described herein can be made of (doped) semiconductor material, and can be or be comprised in a semiconductor chip. The semiconductor body has electrically connectable pads, and comprises at least one semiconductor element having an electrode.

[0020] Reference is made to Figure 1The diagram shows a cross-sectional view of a power semiconductor module device 100. The power semiconductor module device 100 includes a housing 7 and a substrate 10. The substrate 10 includes a dielectric insulating layer 11, a (structured) first metallization layer 111 attached to the dielectric insulating layer 11, and a (structured) second metallization layer 112 attached to the dielectric insulating layer 11. The dielectric insulating layer 11 is disposed between the first metallization layer 111 and the second metallization layer 112.

[0021] Each of the first metallization layer 111 and the second metallization layer 112 may be composed of or include one of the following materials: copper; copper alloys; aluminum; aluminum alloys; any other metal or alloy that remains solid during operation of the power semiconductor module device. The substrate 10 may be a ceramic substrate, i.e., a substrate in which the dielectric insulating layer 11 is a ceramic substrate, such as a thin ceramic layer. The ceramic may be composed of or include one of the following materials: alumina; aluminum nitride; zirconium oxide; silicon nitride; boron nitride; or any other dielectric ceramic. Alternatively, the dielectric insulating layer 11 may be composed of an organic compound and include one or more of the following materials: Al2O3, AlN, SiC, BeO, BN, or Si3N4. For example, the substrate 10 may be, for example, a direct copper bonding (DCB) substrate, a direct aluminum bonding (DAB) substrate, or an active metal brazing (AMB) substrate. Furthermore, the substrate 10 may be an insulating metal substrate (IMS). The insulating metal substrate typically includes a dielectric insulating layer 11, which may contain (filled) a material such as epoxy resin or polyimide. For example, the material of the dielectric insulating layer 11 may be filled with ceramic particles. Such particles may include, for example, Si2O, Al2O3, AlN, SiN, or BN, and may have a diameter between about 1 μm and about 50 μm. The substrate 10 may also be a conventional printed circuit board (PCB) having a non-ceramic dielectric insulating layer 11. For example, the non-ceramic dielectric insulating layer 11 may be composed of or include a curable resin.

[0022] Substrate 10 is disposed within housing 7. Figure 1 In the example shown, substrate 10 is disposed on substrate 80 forming the base surface of housing 7, while housing 7 itself comprises only sidewalls and a cover. In some power semiconductor module devices 100, more than one substrate 10 is disposed on the same substrate 80 and within the same housing 7. Substrate 80 may comprise a layer of metallic material, such as copper or AlSiC. However, other materials are also possible.

[0023] One or more semiconductor bodies 20 can be arranged on the at least one substrate 10. Each semiconductor body 20 arranged on the at least one substrate 10 can comprise a diode, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), a JFET (Junction Field Effect Transistor), a HEMT (High Electron Mobility Transistor), or any other suitable semiconductor element.

[0024] One or more semiconductor bodies 20 can form a semiconductor device on the substrate 10. In Figure 1 In the example shown, only two semiconductor bodies 20 are exemplarily shown. Figure 1 The second metallization layer 112 of the substrate 10 in the example shown is a continuous layer. According to another example, the second metallization layer 112 can be a structured layer. According to further examples, the second metallization layer 112 can be completely omitted. In Figure 1 In the example shown, the first metallization layer 111 is a structured layer. “Structured layer” in this context means that the respective metallization layer is not a continuous layer, but comprises recesses between different portions of the layer. Figure 1 Such recesses are schematically shown in the example. In this example, the first metallization layer 111 comprises three different portions. Different semiconductor bodies 20 can be mounted to the same or different portions of the first metallization layer 111. The different portions of the first metallization layer can not have an electrical connection, or can be electrically connected to one or more other portions using electrical connections 3 such as bonding wires. The semiconductor bodies 20 can be electrically connected to each other or to the first metallization layer 111, e.g. using electrical connections 3. Instead of bonding wires, the electrical connections 3 can also comprise, for example, bonding ribbons, connection plates, or conductor tracks, to name a few examples. One or more semiconductor bodies 20 can be electrically and mechanically connected to the substrate 10 by means of a conductive connection layer 60. For example, such a conductive connection layer 60 can be a solder layer, a conductive adhesive layer, or a sintered metal powder, e.g. sintered silver (Ag) powder, layer.

[0025] Figure 1The power semiconductor module arrangement 100 shown in Fig. 1 further comprises terminal elements 4. The terminal elements 4 are electrically connected to the first metallization layer 111 and provide an electrical connection between the inside and the outside of the housing 7. The terminal elements 4 can be electrically connected to the first metallization layer 111 with a first end, while a second end 41 of the terminal elements 4 protrudes outside the housing 7. The terminal elements 4 can be electrically contacted from the outside at the second end 41. However, such terminal elements 4 are only an example. The components inside the housing 7 can be electrically contacted from the outside of the housing 7 in any other suitable way. For example, the terminal elements 4 can be arranged closer to or adjacent to a sidewall of the housing 7. It is likewise possible that the terminal elements 4 protrude through a sidewall of the housing 7 vertically or horizontally. It is even possible that the terminal elements 4 protrude through a ground surface of the housing 7. For example, the first end of the terminal elements 4 can be electrically and mechanically connected to the substrate 10 by a conductive connection layer (not explicitly shown in Fig. 1). Such a conductive connection layer can be a solder layer, a conductive adhesive layer or a sintered metal powder, e.g. sintered silver (Ag) powder, layer. For example, the first end of the terminal elements 4 can also be electrically coupled to the substrate 10 via one or more electrical connections 3. Figure 1

[0026] The power semiconductor module arrangement 100 can further comprise a sealant 5. For example, the sealant 5 can consist of or comprise a silicone gel or can be a rigid molding compound. The sealant 5 can at least partially fill the inside of the housing 7, thereby covering the components and electrical connections arranged on the substrate 10. The terminal elements 4 can be partially embedded in the sealant 5. However, at least their second ends 41 are not covered by the sealant 5 and protrude from the sealant 5 through the housing 7 to the outside of the housing 7. The sealant 5 is configured for protecting the components and electrical connections of the power semiconductor module arrangement 100, in particular the components arranged inside the housing 7, from certain environmental conditions and mechanical damage. It is also generally possible to omit the housing 7 and to protect the substrate 10 and any components mounted on the substrate 10 only with the sealant 5. In this case, the sealant 5 can for example be a rigid material.

[0027] At least some of the semiconductor bodies 20 of the power semiconductor module arrangement 100 typically perform a plurality of switching operations during operation of the power semiconductor module arrangement 100. For example, when a number of switching operations is performed within a short time period, the semiconductor bodies 20 generate heat which, in the worst case, can cause a temperature above a certain maximum threshold. A temperature above this maximum threshold can adversely affect the operation of the power semiconductor module or even cause a complete failure of one or more semiconductor bodies (e.g. semiconductor dies) 20. The heat generated during operation of the power semiconductor module arrangement 100 is typically dissipated from the substrate 10 through the base plate 80 to a heat sink (not explicitly shown in Fig. 1). This will be explained in further detail below with reference to Figs. 4 and 5. Figure 1 ​​

[0028] Referring now to Fig. 2, the process of mounting the substrate 10 on the base plate 80 is schematically shown. The substrate 10 can be mechanically connected to the base plate 80 by means of a thermally conductive connection layer 62. That is, referring to Fig. 2, the thermally conductive connection layer 62 can be arranged between the substrate 10 and the base plate 80. For example, the thermally conductive connection layer 62 applied between the substrate 10 and the base plate 80 can be a layer of metallic solder or a sintered layer. However, these are only examples. The thermally conductive connection layer 62 can comprise any other suitable thermally conductive material which is suitable for forming a mechanical connection between the substrate 10 and the base plate 80. When the substrate 10 is mounted on the base plate 80 (at this stage, the at least one semiconductor body 20 can already be mounted on the substrate 10), the substrate 10 is pressed onto the base plate 80 under the influence of high temperatures. This is schematically shown in Fig. 2. During this process, the substrate 10 and the base plate 80 can deform. This is because the semiconductor body 20, the substrate 10, the connection layer 62 and the base plate 80 each comprise different materials. Different materials have different CTEs (coefficients of thermal expansion). Thus, under the influence of high temperatures, each component expands to a different extent, which is indicated in Fig. 2 by different arrows. Subsequently, the components are cooled again, which leads to a contraction of the different materials, which is indicated in Fig. 2 by different arrows. The extent of the contraction also depends on the CTE of the material. Thus, after mounting the substrate 10 on the base plate 80, the base plate 80 typically has a concave flexure in the direction of the surface on which the substrate 10 is mounted. This is schematically shown in Fig. 2. The base plate 80 can flex in only one direction in space. However, as is schematically shown in Fig. 3, the base plate 80 can also flex in two directions in space, resulting in a dished or shell shape of the base plate 80. The flexure of the base plate 80 (or, in other words, the deviation from its original (essentially planar / flat) configuration) can be between, for example, about 20 pm and about 2000 pm or even more (the deviation corresponding to the difference in height between the edge and the center of the base plate 80). In order to compensate for the resulting flexure, the base plate 80 is typically pre-bent in a direction opposite to the direction of the resulting flexure (before mounting the substrate 10 on the base plate 80). Figure 2A Figure 2B Figure 2B Figure 2C Figure 2C

[0029] ​​​​​In a power semiconductor module, one or more substrates 10 are typically disposed on a single substrate 80. For example, substrate 80 may have a thickness between approximately 1 mm and approximately 6 mm. However, substrate 80 may also be thinner than 1 mm or thicker than 6 mm. For example, substrate 80 may include a layer composed of or comprising a metal or metal-based composite material (e.g., metal-based composite MMC, such as aluminum silicon carbide). Suitable materials for the metal substrate 80 are, for example, copper, copper alloys, aluminum, or aluminum alloys. Substrate 80 may be coated with a thin coating (not shown). Such a coating may consist of or include, for example, nickel, silver, gold, or palladium. The coating is optional and may improve the solderability of substrate 80.

[0030] Figure 4A A plurality of substrates 10 mounted on a substrate 80 are illustrated exemplary. In particular, Figure 4A This schematically illustrates the process after the substrate 10 is soldered to the substrate 80 (corresponding to...). Figure 2C The substrate 80 (shown in Figure 4 as the state of substrate 10 and substrate 80) is a semiconductor module device. During operation, the semiconductor body 20 (not specifically shown in Figure 4) generates heat, which is transferred to the substrate 10 and further to the substrate 80. The temperature in the region of the substrate 80 directly below the substrate 10 is typically significantly higher than the temperature in the region of the substrate 80 between the substrates 10. Therefore, the substrate 80 is heated unevenly. When the substrate 80 is heated during operation of the semiconductor device, it may even deform further. Because the substrate 80 is heated unevenly in addition to the different CTEs (CTE mismatch) of different components, some areas of the substrate 80 deform more than other areas. This is in Figure 4A As exemplarily illustrated. In addition to the overall concave deflection, Figure 4A The substrate 80 shown also exhibits multiple local flexures beneath different substrates 10. These local flexures may be convex flexures in the direction of the surface on which the substrate 10 is mounted.

[0031] Figure 4B schematically shown Figure 4A A top view of substrate 80 and substrate 10, while Figure 4C The schematic diagram illustrates the substrate 80 in relation to... Figure 4A (Section A-A') Cross-sectional views in different horizontal directions (Section B-B'). Figure 4D The image schematically shows the device mounted on the radiator 82. Figure 4Asubstrate 80. It can be seen that due to the local flexing, the substrate 80 can only be in direct contact with the heat sink 82 in some areas. In other areas, undesired cavities or gaps can be formed between the substrate 80 and the heat sink 82. Since the cavities or gaps are mainly formed directly underneath the substrate 10 which generates most of the heat, the heat dissipation from the substrate 80 to the heat sink 82 is greatly deteriorated.

[0032] In order to reduce or even prevent such local cavities or gaps from being formed when mounting the substrate 10 on the substrate 80 or possibly also during operation of the power semiconductor module device, the substrate 80 according to one example comprises at least one local stress increasing region. This is illustrated in Figure 6 a cross-sectional view. Figure 6 A cross-sectional view of the substrate 80 is schematically illustrated. A first tool 900 is used to create the stress increasing region in the substrate 80. In particular, the first tool 900 exerts pressure onto the substrate 80 in the desired region. In this way, the material of the substrate 80 is locally compressed and thus the stiffness of the substrate 80 is locally increased. At the same time, the substrate 80 can locally deform. In particular, a local concave deformation is formed in the substrate 80 in the direction of the surface on which the substrate 10 (substrate not specifically illustrated in Figure 6 ) is mounted.

[0033] In this way, the yield strength of the substrate 80 can be locally increased. The yield strength of the substrate 80 in its normal state can typically be for example between 100 and 300 MPa. The yield strength can for example be locally increased by between 5% and 100% of the yield strength of the substrate 80 in the normal state. Typically, within the yield strength increasing region, the yield strength is differently increased for different portions A, B, C. For example, in a first portion A close to the edge of the yield strength increasing region, the yield strength can be for example between 270 and 320 MPa. In a second portion B arranged adjacent to the first portion A, the yield strength can be for example between 320 MPa and 380 MPa. In a third portion C arranged at the center of the yield strength increasing region, the yield strength can be for example between 380 MPa and 500 MPa. This is because the first tool 900 can not be able to create the same yield strength within the entire yield strength increasing region. In the figure, three different portions A, B, C are exemplarily illustrated. However, this is merely an example. For example, the number of portions A, B, C can depend on the kind and form of the first tool 900 used to form the yield strength increasing region, on the size of the yield strength increasing region, on the maximum value of the increased yield strength, or on any other parameter related to the formation of the yield strength increasing region. The transition between the different portions can be fluent, rather than strictly delimited.

[0034] In Figure 7A and Figure 7BThe top view also schematically shows stress-increase regions with different stress-increase portions A, B, and C. The first tool 900 and the resulting stress-increase regions can be, for example, angled (e.g., square or rectangular). Figure 7A ) cross section, elliptical ( Figure 7B The cross-section can be either circular or circular (not specifically shown). However, other shapes are also possible.

[0035] The number of stress or yield strength increased regions on substrate 80 may depend on the number of substrates 10 mounted to substrate 80. If only one substrate 10 is to be mounted to substrate 80, then one stress or yield strength increased region may be formed in substrate 80. If more than one substrate 10 is to be mounted to a single substrate 80, then the number of stress or yield strength increased regions may correspond to the number of substrates 10 to be mounted to substrate 80. Figure 8 The top view schematically shows a substrate 80 having multiple stress or yield strength increasing regions. In this example, six stress or yield strength increasing regions are formed in the substrate 80.

[0036] When a stress-increasing region is formed in the substrate 80, the Young's modulus (also known as e-modulus) in that region can also increase. Young's modulus is a mechanical property that measures the stiffness of a solid material. That is, by increasing the Young's modulus, the stiffness of the substrate 80 is locally increased. By increasing both yield strength and stiffness, the deformation of the substrate 80 is significantly reduced when the substrate 10 is mounted on it. This is schematically illustrated in Figure 5. First, the overall deflection can be significantly reduced (as exemplarily shown in Figure 3). In this context, Figure 3A A substrate 80 with relatively severe or heavy bending is schematically shown, while Figure 3B It schematically shows the relationship with Figure 3A Compared to the substrate 80 with reduced bending, the substrate 80 has a different substrate 80. Figure 3A The substrate 80 shown is a substrate 80 without stress-increased regions, while Figure 3B The substrate 80 shown includes multiple stress-increased regions. Figure 3B (Indicated by dashed lines). Furthermore, as... Figure 5A (See the cross-sectional view along section C-C') Figure 5B As schematically shown, compared to the conventional device shown in Figure 4, the formation of localized deformation of the substrate 80 beneath the substrate 10 is significantly reduced during the process of mounting the substrate 10 to the substrate 80. Furthermore, although in the conventional device, localized deflection can be a convex deflection in the direction of the surface on which the substrate 10 is mounted (the substrate 80 is hollow beneath the substrate 10), Figure 5AThe local flexure in the example shown in Fig. 4 is a concave flexure in the direction of the surface on which the substrate 10 is mounted (under the substrate 10, the substrate 80 is convex). This is due to the local deformation introduced in the substrate 80 during the formation of the stress increasing region (see, for example, Fig. 3). Figure 6 Furthermore, compared to the device of Fig. 4, the direction of the flexure can be reversed. In this way, the contact between those regions of the substrate 80 that are arranged under the substrate 10 and the heat sink 82 is significantly increased. In particular, the contact between those regions of the substrate 80 that are arranged under the central region of the substrate 10 (at which the semiconductor body 20 is usually mounted) and the heat sink 82 is significantly increased.

[0037] The local flexure under the substrate 10 is usually small enough so as not to result in large cavities. That is, the relatively small cavities formed between the substrate 80 and the heat sink 82 can be completely filled with a thermally conductive material, which significantly increases the heat dissipation from the substrate 80 to the heat sink 82. Furthermore, due to the significantly reduced local flexure of the substrate 80, the contact area between the substrate 80 and the heat sink 82 is increased. The direct contact between the substrate 80 and the heat sink 82 can be mainly provided in the region arranged centrally under the substrate 10. This helps to further increase the overall heat dissipation, since the central region of the substrate 10 is usually the region that generates the most heat. Thus, the heat conduction between the substrate 10 and the substrate 80 and between the substrate 80 and the heat sink 82 is satisfactory. Compared to the device of Fig. 4, Figure 4C analogously, Figure 5C a cross section of the substrate 80 along the section D-D' is schematically shown, Figure 5B a cross section of the substrate 80 along the section C-C' is shown. Figure 5A a cross section of the substrate 80 along the section C-C' is shown. Figure 5D a cross section of the substrate 80 along the section C-C' is shown. Figure 5A a cross section of the substrate 80 along the section C-C' is shown.

[0038] In addition to reducing the local flexure (local bending) under the substrate 10, the overall concave flexure of the substrate 80 can also be reduced. The stress increasing region is usually formed before the substrate 10 is mounted to the substrate 80. For example, the stress increasing region can be formed during or immediately after the production of the substrate 80. When the substrate 10 is mounted to the substrate 80 after the formation of such a stress increasing region, the substrate 80 is significantly less deformed at the same time as the substrate 10 is mounted to the substrate 80. This also promotes an increased thermal coupling between the substrate 80 and the heat sink 82.

[0039] The cross-sectional area of the stress increasing region is typically smaller than the cross-sectional area of the substrate 80. That is, there is a region around the stress increasing region in which the properties of the substrate 80 are essentially unchanged. The stress induced in the stress increasing region is higher than the basic stress in the surrounding regions of the substrate 80. The yield strength in the stress increasing region is higher than the yield strength in those regions of the substrate 80 surrounding the stress increasing region. Furthermore, no or no significant deflection is induced in those regions of the substrate 80 surrounding the stress increasing region.

[0040] The cross-sectional area of the stress increasing region can be smaller than the cross-sectional area of the substrate 10 mounted on the respective stress increasing portion. That is, the stress increasing region can be completely covered by the substrate 10 mounted thereon. However, it is equally possible that the cross-sectional area of the stress increasing region is larger than the cross-sectional area of the substrate 10 mounted thereon. According to one example, the cross-sectional area of the stress increasing region can be up to 50% smaller or larger than the cross-sectional area of the substrate 10 mounted on the respective stress increasing portion. However, other dimensions of the stress increasing region are possible as well. If more than one stress increasing region is formed in a single substrate 80, these stress increasing regions can be formed at a certain distance from each other. That is, one stress increasing region can not directly contact any other stress increasing region. However, it is equally possible that different stress increasing regions directly abut each other.

[0041] The dimensions of the local deflection under the substrate 10 can depend on the kind of the first tool 900 used to form the deflection. The depth Ad (deviation from its original flat position, see Figure 6 ) of the local deflection can be between e.g. 5 and 200 pm. The dimensions (cross-sectional area) of the local deflection or stress increasing region can depend on the dimensions and shape of the first tool 900 used to form the deflection. In Figure 10A , Figure 10B and Figure 10C different exemplary geometries of the first tool 900 are exemplarily shown. Figure 10A The shown first tool 900 has a generally flat underside with a circular edge towards its sides. Figure 10B The shown first tool 900 has a generally flat underside with a relatively sharp edge towards its sides. Figure 10C The shown first tool 900 has a generally triangular shape. However, other geometries of the first tool 900 are typically possible as well, resulting in different dimensions and shapes of the stress increasing region.

[0042] Reference is now made to Figure 9Fig. 9 schematically illustrates a first tool 900 configured to simultaneously form a plurality of stress increasing regions in the substrate 80. The first tool 900 comprises a main body and a plurality of stamping tools 902 extending from the main body. The first tool 900 can be pressed onto the substrate 80 such that the plurality of stamping tools 902 contact the substrate 80. Each stamping tool 902 can have a geometry similar to the geometry already explained with reference to Fig. 8. Figures 10A-10C

[0043] However, the first tool 900 described herein is merely an example. In general, the stress increasing regions can be formed in any other suitable way. For example, a laser welding technique, a piezo-peening technique, an embossing technique, a bending technique, or a cold forging technique can also be used to form the stress increasing regions in the substrate 80, just to name a few examples.

[0044] In the above-described example, the stress increasing regions are formed in the substrate 80 and at the same time the local flexures are formed. However, this is merely an example. In general, it is equally possible to form only the local flexures as described above in the substrate 80 without locally increasing the stress. Forming only the local flexures under each of the at least one substrate 10 can be sufficient to reduce the negative effects as described above with reference to Fig. 4. The locally formed concave flexures can counteract the locally formed convex flexures as described above with reference to Fig. 4, even without the need to additionally form stress increasing regions, yield strength increasing regions, and stiffness increasing regions under each of the at least one substrate 10. Thus, forming the concave flexures under the substrate 10 can be sufficient for some applications. Figure 4A

[0045] On the other hand, it is also possible to form stress increasing regions under the substrate 10 without locally deforming the substrate 80. This can also be sufficient for some applications. For other applications, it can be beneficial to form both the local flexures and the stress increasing regions under the substrate 10 as described above. For example, if the substrate 80 and the substrate 10 are relatively large, it can be beneficial to form both the local flexures and the stress increasing regions under the substrate 10.

[0046] Thus, a method according to one example can comprise manufacturing the substrate 80, wherein manufacturing the substrate 80 comprises forming a layer of a metallic material, and forming at least one first region in the layer of the metallic material, wherein forming the at least one first region comprises locally deforming the layer of the metallic material, or locally inducing a stress in the layer of the metallic material, or both, such that a flexure or a local stress or both in the at least one first region is different from a flexure or a local stress or both in those regions of the layer of the metallic material surrounding the at least one first region.​​

Claims

1. A method for manufacturing a substrate (80), comprising: forming a layer of a metallic material; and forming at least one first region in the layer of the metallic material, wherein forming the at least one first region comprises locally inducing a stress in the layer of the metallic material such that the local stress in the at least one first region is different from the local stress of those regions of the layer of the metallic material surrounding the at least one first region, wherein locally increasing the stress in the layer of the metallic material comprises increasing the yield strength in the at least one first region compared to the surrounding regions of the layer of the metallic material, and wherein the yield strength of the regions surrounding the at least one first region is between 100 MPa and 300 MPa, and the yield strength of the at least one first region is increased between 5% and 100% of the yield strength of the regions surrounding the at least one first region.

2. A method for manufacturing a substrate (80), comprising: forming a layer of a metallic material; and forming at least one first region in the layer of the metallic material, wherein forming the at least one first region comprises locally deforming the layer of the metallic material such that the deflection in the at least one first region is different from the deflection of those regions of the layer of the metallic material surrounding the at least one first region, wherein locally deforming the layer of the metallic material comprises forming a local concave deflection relative to a first surface of the substrate (80), and wherein the depth (Ad) of each local concave deflection is between 5 and 200 pm.

3. The method according to claim 1 or 2, further comprising: arranging at least one substrate (10) on a first surface of the substrate (80), wherein arranging at least one substrate (10) on the substrate (80) comprises arranging one substrate (10) adjacent to each of the at least one first region, and wherein each of the at least one substrate (10) comprises a dielectric insulating layer (11) and a first metallization layer (111) attached to the dielectric insulating layer (11).

4. The method of claim 3, wherein, After arranging the at least one substrate (10) on the substrate (80), each of the at least one substrate (10) completely covers one of the at least one first region.

5. The method of claim 1 or 2, wherein, Forming the at least one first region comprises a stamping process, a laser welding process, a piezoelectric shot peening process, an embossing process, a bending process, or a cold forging process.

6. The method of claim 1 or 2, wherein, Forming the at least one first region in the layer of the metallic material comprises locally compressing the material of the layer of the metallic material.

7. The method of claim 1, wherein, Forming the at least one first region further comprises locally deforming the layer of the metallic material such that the deflection in the at least one first region is different from the deflection of those regions of the layer of the metallic material surrounding the at least one first region, and wherein locally deforming the layer of the metallic material comprises forming a concave deflection relative to a first surface of the substrate (80).

8. The method of claim 7, wherein, The depth (Ad) of each local concave deflection is between 5 and 200 pm.

9. The method according to claim 1 or 2, further comprising: mounting the substrate (80) on a heat sink (82).

10. A base plate (80) for a power semiconductor module, the base plate (80) comprising: a layer of a metallic material; and at least one first region formed in the layer of the metallic material, wherein the yield strength is locally increased in the layer of the metallic material such that the yield strength in the at least one first region is different from the yield strength in those regions of the layer of the metallic material surrounding the at least one first region, wherein the yield strength of the regions surrounding the at least one first region is between 100 MPa and 300 MPa and the yield strength of the at least one first region is increased between 5% and 100% of the yield strength of the regions surrounding the at least one first region.

11. A base plate (80) for a power semiconductor module, the base plate (80) comprising: a layer of a metallic material; and at least one first region formed in the layer of the metallic material, wherein the layer of the metallic material is locally deformed such that the deflection in the at least one first region is different from the deflection in those regions of the layer of the metallic material surrounding the at least one first region, wherein the layer of the metallic material is formed with local concave deflections relative to a first surface of the base plate (80) and wherein the depth (Ad) of each local concave deflection is between 5 to 200 pm.

12. The substrate (80) according to claim 10 or 11, wherein Each of the at least one first region has an angular cross-section, a circular cross-section or an elliptical cross-section.

13. A semiconductor module arrangement comprising: a base plate (80); and at least one substrate (10) mounted on the base plate (80), wherein each of the at least one substrate (10) comprises a dielectric insulation layer (11) and a first metallization layer (111) attached to the dielectric insulation layer (11), and the base plate (80) comprises a layer of a metallic material and at least one first region formed in the layer of the metallic material, wherein the yield strength is locally increased in the layer of the metallic material such that the yield strength in the at least one first region is different from the yield strength in those regions of the layer of the metallic material surrounding the at least one first region, wherein the yield strength of the regions surrounding the at least one first region is between 100 MPa and 300 MPa and the yield strength of the at least one first region is increased between 5% and 100% of the yield strength of the regions surrounding the at least one first region.

14. A semiconductor module arrangement comprising: a base plate (80); and at least one substrate (10) mounted on the base plate (80), wherein each of the at least one substrate (10) comprises a dielectric insulation layer (11) and a first metallization layer (111) attached to the dielectric insulation layer (11), and the base plate (80) comprises a layer of a metallic material and at least one first region formed in the layer of the metallic material, wherein the layer of the metallic material is locally deformed such that the deflection in the at least one first region is different from the deflection in those regions of the layer of the metallic material surrounding the at least one first region, wherein the layer of the metallic material is formed with local concave deflections relative to a first surface of the base plate (80) and wherein the depth (Ad) of each local concave deflection is between 5 to 200 pm. The substrate (80) comprises a layer of metallic material and at least one first region formed in the layer of metallic material, wherein the layer of metallic material is locally deformed so that the flexure in the at least one first region is different from the flexure in those regions of the layer of metallic material surrounding the at least one first region, wherein the layer of metallic material is formed with a local concave flexure with respect to a first surface of the substrate (80), and wherein the depth (Ad) of each local concave flexure is between 5 and 200 pm.

15. The apparatus of claim 13 or 14, wherein, Each of the at least one substrate (10) is mounted on one of the at least one first region and completely covers one of the at least one first region.

16. The apparatus of claim 15, wherein, The cross-sectional area of each of the at least one first region is smaller or greater than the cross-sectional area of the corresponding substrate (10) mounted on the respective first region by a maximum of 50%.

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