Power module with metal base plate

Abstract

A method of forming a power semiconductor module includes providing a substrate of planar sheet metal; forming a channel in an upper surface of the substrate, the channel extending partially through a thickness of the substrate and defining a plurality of islands in the substrate; mounting a first semiconductor die on a first one of the islands; forming a molded body of an encapsulant, the molded body covering the substrate, filling the channel, and encapsulating the semiconductor die; forming a hole in the molded body and a recess in the upper surface of the substrate below the hole; and disposing a press-fit connector in the hole and forming a mechanical and electrical connection between an inner end of the press-fit connector and the substrate.

Description

Background Technology

[0001] Semiconductor power modules are widely used in various applications, such as automotive, industrial motor drives, and AC-DC power supplies. A typical semiconductor power module comprises multiple power semiconductor devices mounted on a common substrate, along with other components such as power MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), IGBTs (Insulated-Gate Bipolar Transistors), and HEMTs (High Electron Mobility Transistors), and passive components, bonding wires, etc. The substrate must be designed to withstand the very high voltages and currents associated with the specific power application of the module.

[0002] A popular substrate construction for semiconductor power modules is the so-called DCB (Direct Bonded Copper) substrate. A DCB substrate includes multiple electrically isolated bonding pads formed in a metallization layer of a conductive material (e.g., copper). This metallization layer is bonded to a substrate of an insulating material such as ceramic.

[0003] The cost of manufacturing a semiconductor power module with a DCB substrate is driven by several factors. These factors include material costs (e.g., ceramic for the insulating layer, copper for the metallization layer, adhesives, etc.) and the time and expense associated with each processing step involved in substrate formation (e.g., forming the conductive metal layer and bonding the conductive metal layer to the insulating substrate, riveting the press-fit connector to the conductive metal layer, etc.).

[0004] The goal is to produce semiconductor power modules with similar or better performance characteristics compared to conventional solutions at a lower cost. Summary of the Invention

[0005] According to an embodiment of a method for forming a power semiconductor module, the method includes: providing a substrate of planar sheet metal; forming a channel in an upper surface of the substrate, the channel extending partially through the thickness of the substrate and defining a plurality of islands in the substrate; mounting a first semiconductor die on a first island of the islands; forming a molded body that covers the substrate, fills the channel, and encapsulates the semiconductor die; forming a hole in the molded body and forming a recess in an upper surface of the substrate below the hole; and arranging a press-fit connector in the hole and forming a mechanical and electrical connection between the inner end of the press-fit connector and the substrate.

[0006] Forming holes in a molded body and creating recesses in an upper surface, either individually or in combination, involves performing a single process step that fully penetrates the molded body and subsequently partially penetrates the substrate.

[0007] The single process step may be mechanical or laser drilling, either individually or in combination.

[0008] Forming mechanical and electrical connections, individually or in combination, includes soldering the inner end of a press-fit connector to a substrate.

[0009] Alone or in combination, the method further includes forming a spring contact attachment feature from the substrate, the spring contact attachment feature including a tongue of planar sheet metal and a perforation in the tongue that extends fully through the thickness of the substrate, wherein the tongue and the perforation protrude from the molded body of the encapsulation after the molded body is formed.

[0010] Forming channels individually or in combination includes forming one of the channels as an outer peripheral ring that separates each of the islands from the periphery of the substrate.

[0011] Individually or in combination, after the channel is formed, each of the islands remains connected to each other through a portion of the substrate located directly below the channel, and the method further includes removing said portion of the substrate after forming the molded body to electrically isolate each of the islands from each other.

[0012] Forming a channel, either alone or in combination, includes partially etching the upper surface of the substrate such that the portion of the substrate directly below the channel is thinner than the island, and removing a portion of the substrate includes selectively etching the lower surface of the substrate.

[0013] Forming the channel, either alone or in combination, involves stamping the upper surface of the substrate such that a portion of the substrate directly below the channel is offset perpendicularly to the island, and removing a portion of the substrate involves selectively etching the lower surface of the substrate.

[0014] Forming the channel, either alone or in combination, includes stamping the upper surface of the substrate such that a portion of the substrate directly below the channel is offset perpendicularly to the island, and removing a portion of the substrate includes planarizing the lower surface of the substrate.

[0015] The method further includes forming a recess in the second island of the islands, either individually or in combination, and also includes: mounting a second semiconductor die on the second island of the islands; forming a plurality of holes in a molded body and forming a plurality of recesses in the upper surface of a substrate below each of the respective holes; providing a plurality of press-fit connectors; and arranging one of the press-fit connectors in each of the holes and forming a mechanical and electrical connection between the inner end of each press-fit connector and the substrate, wherein the first and second semiconductor dies are configured as power transistors, and the press-fit connectors are configured as externally accessible electrical contacts to each terminal of the first and second semiconductor dies.

[0016] According to an embodiment of a power semiconductor module, the power semiconductor module includes: a substrate of planar sheet metal comprising a plurality of islands, each island being defined by a channel extending between a upper surface and a lower surface of the substrate; a first semiconductor die mounted on a first island of the islands; a molded body of an encapsulation covering the metal substrate, filling the channel, and encapsulating the first semiconductor die; a hole in the molded body extending into a recess in the upper surface of the substrate; and a press-fit connector disposed in the hole such that an inner end of the press-fit connector is mechanically and electrically connected to the substrate.

[0017] Individually or in combination, the inner end of the press-fit connector is soldered to the substrate.

[0018] Individually or in combination, the inner end of the press-fit connector is fixed in the recess by mechanical pressure.

[0019] Individually or in combination, the power semiconductor module also includes a spring contact attachment feature formed in a substrate, the spring contact attachment feature including a tongue of planar sheet metal and a perforation in the tongue that extends fully through the tongue, and the tongue and the perforation being exposed from the molded body.

[0020] Individually or in combination, one of the channels is arranged as an outer ring that separates each of the islands from the periphery of the substrate.

[0021] Individually or in combination, the lower surface of the substrate is exposed at the lower surface of the molded body, and the power semiconductor module also includes an electrically insulating material layer covering the lower surface of the substrate.

[0022] Individually or in combination, a recess is formed in a second island of the islands, wherein the first semiconductor die includes a terminal on an upper surface opposite to the substrate and electrically connected to the second island via an electrical connector, and wherein a press-fit connector is configured to provide externally accessible electrical contact to the terminal of the semiconductor die.

[0023] Individually or in combination, the power semiconductor module further includes: a second semiconductor die mounted on a second island in the island; a plurality of holes in a molded body, and a plurality of recesses in the upper surface of a substrate below each of the respective holes; a plurality of press-fit connectors, one of which is disposed in each of the holes and forms a mechanical and electrical connection between the inner end of the respective press-fit connector and the substrate, the first and second semiconductor dies being configured as power transistors, and the press-fit connectors being configured as externally accessible electrical contacts to each terminal of the first and second semiconductor dies.

[0024] Those skilled in the art will recognize additional features and advantages after reading the following detailed description and reviewing the accompanying drawings. Attached Figure Description

[0025] The elements in the accompanying drawings are not necessarily proportional to each other. Similar reference numerals refer to corresponding similar parts. Features of various illustrated embodiments can be combined unless they are mutually exclusive. Embodiments are depicted in the accompanying drawings and described in detail below.

[0026] Figure 1 A substrate of planar sheet metal according to an embodiment is shown.

[0027] Figure 2A The diagram illustrates a channel formed in the upper surface of a substrate according to an embodiment.

[0028] Figure 2B A channel is shown formed in the upper surface of a substrate according to another embodiment.

[0029] Figure 3 includes Figures 3A-3B This illustrates, according to an embodiment, mounting a semiconductor die on an island formed in a substrate and electrically connecting the semiconductor die to the substrate. Figure 3A A schematic cross-sectional view of the component is depicted, and Figure 3B The top-side isometric view of the component is depicted.

[0030] Figure 4 includes Figures 4A-4C This illustrates a molded body for forming an encapsulated semiconductor die on a substrate according to an embodiment. Figure 4A A schematic cross-sectional view of the component is depicted. Figure 4B The top-side isometric view of the component is depicted, and Figure 4C The bottom isometric view of the component is depicted.

[0031] Figure 5 The illustration shows a hole formed in a molded body and a corresponding recess formed in a substrate below the hole, according to an embodiment.

[0032] Figure 6 includes Figure 6A and Figure 6B This illustrates a press-fit connector arranged in holes and recesses according to an embodiment. Figure 6A A top-side isometric view of the component is depicted, where the molded body is represented as transparent to reveal the encapsulation features, and Figure 6B The top side isometric view of the component is depicted, where the molded body is opaque, which is typical.

[0033] Figure 7 includes Figures 7A-7C Various techniques for processing the rear side of a substrate to form electrically isolated islands, according to embodiments, are illustrated. Figure 7A and Figure 7B The selective etching technique is described, and Figure 7C The planarization technique is described.

[0034] Figure 8 A bottom isometric view of an assembly following the formation of electrically isolated islands on the rear side of a processing substrate, according to an embodiment, is shown.

[0035] Figure 9 A bottom isometric view of the assembly after an electrically insulating layer has been formed on an electrically isolated island, according to an embodiment, is shown. Detailed Implementation

[0036] This document describes the construction of semiconductor power modules and corresponding methods for forming them, according to various embodiments. Advantageously, compared to other power semiconductor module constructions, the semiconductor power modules can be produced with relatively fewer processing steps and cheaper materials. For example, processing steps such as frame construction, press-fit bonding, and gel dispensing required by DCB-based solutions have been replaced by more cost-effective alternatives. The techniques used herein utilize a metal substrate as the basic building block of the power semiconductor module. The metal substrate can be a planar sheet of metal, such as copper panels or strips commonly used to form lead frames or printed circuit boards. Each feature of the power semiconductor module, such as isolation bonding pads, press-fit connections, insulating materials, etc., can be formed using batch processing tools that can perform these steps on panels or strips with multiple units processed simultaneously. These processing steps are highly developed, well-suited for high-volume parallelization, and utilize inexpensive materials widely available in the semiconductor industry.

[0037] refer to Figure 1 A substrate 100 of planar sheet metal is provided. The substrate 100 may be a conductive metal sheet of relatively uniform thickness, having a generally planar upper surface 102 and a generally planar lower surface 104 opposite to the upper surface 102. The substrate 100 may be formed of one or more conductive metals such as Cu, Ni, and / or Ag. Furthermore, for example, the substrate 100 may include or be plated with Cu, Ni, Ag, Au, Pd, Pt, NiV, NiP, NiNiP, NiP / Pd, Ni / Au, NiP / Pd / Au, or NiP / Pd / AuAg. Generally, the thickness of the substrate 100, measured between the upper surface 102 and the lower surface 104, can range from 0.5 mm to 10 mm. In some embodiments, the thickness of the substrate 100 ranges from 1.0 mm to 2.0 mm.

[0038] Any type of metal substrate typically used in conjunction with a semiconductor die can be used for metal substrate 100. For example, substrate 100 can be a commercially available metal strip used to form lead frames or metal clips for semiconductor packaging. In other embodiments, substrate 100 is a large (e.g., 600mm × 600mm) metal panel used to form a printed circuit board. Although the accompanying drawings depict steps for forming a power semiconductor module, it should be understood that the techniques described herein can be performed in parallel to simultaneously form multiple identical power semiconductor modules. In particular, large metal strips or panels can be used to provide, for example... Figure 1 The plurality of substrates 100 shown herein, and each processing step described below can be performed in parallel with each unit.

[0039] refer to Figure 2A The substrate 100 is processed to form a channel 106 in the upper surface 102 of a planar sheet metal. The channel 106 extends partially through the thickness of the substrate 100 such that a portion 108 of the substrate 100 is held between the bottom of the channel 106 and the lower surface 104 of the substrate 100. The channel 106 is formed to define a plurality of islands 108 in the substrate 100. This means that, viewed from a planar perspective view of the upper surface 102 of the substrate 100, the channel 106 forms a closed shape (e.g., a circle, a rectangle, etc.), wherein the islands 110 correspond to the portions of the substrate 100 completely surrounded by the closed shape.

[0040] Additionally, substrate 100 is processed to form spring contact attachment features 112. Spring contact attachment features 112 are used to attach the completed power semiconductor module to an external device, such as a heat sink. Spring contact attachment features 112 include a tongue 114 portion of a planar sheet metal protruding from a body portion of substrate 100 that includes a channel 106 and a corresponding island 110 surrounded by the channel 106. Furthermore, spring contact attachment features 112 include a through-hole 116 in the tongue 114 that extends completely through the thickness of the planar sheet metal. Through-hole 116 is used to receive fasteners (e.g., spring contacts) to mount the power semiconductor module to the external device.

[0041] Figure 2AThe substrate 100 depicted can be formed using a half-etch technique. In one example of this technique, two masks are provided on both the upper and lower surfaces 102, 104 of the substrate 100. The mask disposed on the upper surface 102 of the substrate 100 is patterned, for example, using photolithography, to a desired geometry having half-etched features (e.g., channel 106) and (if desired) fully etched features (e.g., tongue 114 and through-hole 116). The mask disposed on the lower surface 104 of the substrate 100 is asymmetrically patterned such that the area directly below the half-etched features is covered and the area directly below the fully etched features is exposed. For example, etching is controlled by appropriately using mask geometry, timing, etchant chemicals, etc., such that the etchant removes approximately half the thickness of the substrate 100 from either side. As a result, the depth of channel 106 is approximately half the thickness of the substrate 100, and the remaining portion 108 of the substrate 100 below channel 106 has approximately half the thickness of the substrate 100. At the same time, the etchant removes the full thickness of the substrate 100 to form the tongue 114 and the perforation 116.

[0042] refer to Figure 2B This describes another technique for processing planar sheet metal to form channel 106 and spring contact attachment feature 112. Figure 2B In some embodiments, channels 106 are formed, for example, by punching or embossing the upper surface 102 of a planar sheet of metal. These techniques can form channels 106 with the same closed geometry, thereby forming multiple closed islands 110 in the same manner. Unlike the previously described semi-etching techniques, the portion 108 of the substrate 100 below the channels 106 is not a half-thickness region. Instead, these portions 108 have a thickness approximately the same as the original thickness of the planar sheet of metal and are offset perpendicularly from the non-punched region. As a result, the lower surface 104 of the substrate 100 is undulating. Spring contact attachment features 112, including tongues 114 and perforations 116, can be formed simultaneously with the channels 106, for example, by performing a full punching of the metal. Alternatively, the spring contact attachment features 112 can be formed by a separate cutting process performed before or after the punching process that forms the channels 106.

[0043] Referring to FIG3, a plurality of semiconductor dies 118 are mounted on a substrate 100. In the embodiment shown in FIG3, the substrate 100 is based on a reference... Figure 2A The semi-etched substrate 100 is formed using the described technique. Alternatively, the substrate 100 may be based on the reference... Figure 2B The stamped substrate 100 is formed using the described technique. Apart from Figure 6, which describes the specific techniques used to process each type of substrate 100, it should be understood that each processing step described below is equally applicable to any type of substrate 100.

[0044] In one embodiment, the semiconductor die 118 is mounted using a soldering technique that forms conductive solder joints between the metal surface (e.g., bonding pads) of each semiconductor die 118 and the substrate 100. For example, a solder paste can be provided between the metal surface of the semiconductor die and the upper surface 102 of the substrate 100 and subsequently reflowed to form a typical solder joint; the solder paste is, for example, a tin-based lead-free solder paste comprising Sn / Ag, Sn / Ag / Cu, Sn / Cu, etc. In another example, the semiconductor die 118 can be soldered using a diffusion process, wherein the solder joint comprises a large amount of intermetallic phases having a higher melting point than the bonded components. This diffusion process can be performed to provide a very thin (e.g., less than 30 μm thick) solder layer (e.g., printed or pre-formed solder) between the metal surface of the semiconductor die and the upper surface 102 of the substrate 100 and then reflowed.

[0045] In this embodiment, the semiconductor die 118 is configured as a power device designed to withstand very high voltages (e.g., 600V, 1200V) and / or considerable currents (e.g., approximately 1A, 2A, etc.). Examples of such devices include power transistor dies such as power MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), IGBTs (Insulated Gate Bipolar Transistors), HEMTs (High Electron Mobility Transistors), etc. More generally, the semiconductor die 118 can be configured as a logic die such as a gate driver, microcontroller, memory device, etc., or a passive die such as an inductor, capacitor, etc. The semiconductor die 118 may have a lateral device configuration, wherein each conductive terminal is disposed on the upper side of the die facing away from the substrate 100. In this case, there is no electrical connection between the rear side of the semiconductor die 118 and the substrate 100, and the island 110 can be used for non-electrical purposes, such as heat dissipation. Alternatively, the semiconductor die 118 may have a vertical device configuration, wherein the rear side of the semiconductor die 118 includes conductive bonding pads electrically connected to the upper surface 102 of the substrate 100, for example, via solder connections. In that case, the island 110 may be configured as an electrical terminal, such as a drain, source, etc.

[0046] exist Figure 3BIn the illustrated embodiment, pairs of different semiconductor dies 118 are mounted adjacent to each other on a single island of the island 110. For example, these pairs of different semiconductor dies 118 may include power transistors and corresponding gate drivers for controlling the gate of each transistor. Three of these pairs are mounted on a common island 110, and three of these pairs are mounted on separate islands 110. This arrangement can be used in a half-bridge circuit where the common island 110 accommodating three pairs is configured as a common reference potential terminal, such as GND, for each low-side switch, and the separate island 110 accommodating a single pair of different semiconductor dies 118 is configured as a high-voltage terminal, such as V, for each high-side switch. DS This arrangement represents only one example of a wide variety of configurations in which the geometry of channel 106 is chosen to provide dedicated bonding pads and terminals for devices mounted thereon.

[0047] After the semiconductor die 118 is mounted on the substrate 100, an electrical interconnection step is performed to form an electrical connection 120. The electrical connection 120 may form an electrical interconnect between a terminal of the semiconductor die facing away from the upper surface 102 of the substrate 100 and other islands 110 that do not contain any semiconductor die 118 mounted thereon and / or terminals of different semiconductor dies 118. For example, the electrical connection 120 may include an electrical connection between a source terminal of a power transistor and a separate island 110 that does not contain any semiconductor die 118. In another example, the electrical connection 120 may include an electrical connection between a gate terminal of a driver die and a separate island 110 that does not contain any semiconductor die 118. More generally, the separate island 110 may be configured to provide pad lead-out redistribution for each different terminal of the semiconductor die 118. These electrical connections 120 may be formed using bonding wires (as shown), metal clips, tapes, etc. Figure 3 only depicts some of the necessary electrical connections 120 for a power module implemented using conductive bonding wires.

[0048] Referring to Figure 4, an encapsulation process is performed on the component. The encapsulation process forms a molded body 121 of electrically insulating encapsulating material that covers the substrate 100, fills each channel 106, and encapsulates the semiconductor die 118. Thus, the molded body 121 forms an insulating and protective structure that protects each semiconductor die 118 and its associated electrical connections 120. The molded body 121 can include a variety of electrically insulating encapsulating materials, including ceramics, epoxy resins, and thermosetting plastics, to name just a few. In one embodiment, the molded body 121 is formed by placing the component in a three-dimensional chamber and injecting liquefied encapsulating material into the chamber. Examples of these techniques include injection molding, transfer molding, and compression molding. In another embodiment, the molded body 121 is formed using a lamination technique.

[0049] Channel 106 can be configured to include an annular channel 122 (e.g.) Figure 6A As shown, the annular channel 122 surrounds each of the islands 110 and separates each of the islands 110 from the periphery of the substrate 100. This annular channel 122 is advantageously used to enhance the adhesion of the encapsulating material during the encapsulation process by providing additional interlocking surfaces between the encapsulating material and the substrate 100. More generally, this concept can be used to form external channels 106 or other features that increase the available surface area of ​​the substrate 100 for interaction with the encapsulating material.

[0050] An encapsulation process is performed such that the tongue 114 of the planar sheet metal forming the spring contact attachment feature 112 and the perforation 116 in the tongue 114 protrude from the molding body 121. Therefore, these features are accessible for attachment in the finished module. Optionally, the tongue 114 may be coated with a molding compound in the same encapsulation step or in another step. Furthermore, as... Figure 4C As shown in the rear view, the lower surface 104 of the substrate 100 remains exposed from the molding body 121. In the case where the substrate 100 is a stamped substrate 100 (e.g., as shown in reference...), Figure 2B The complete lower surface 104 of the substrate 100, including the lower side of the island 110 and the vertically offset portion, can be exposed from the molding body 121.

[0051] refer to Figure 5 A plurality of holes 123 are formed in the molding body 121, and a plurality of recesses 124 are formed on the upper surface 102 of the substrate 100. Each recess 124 is disposed below each corresponding hole 123. That is, a single through-hole 116 passing through the molding body 121 and terminating in the substrate 100 is provided by a combination of one of the holes 123 and one of the recesses 124. These holes 123 and corresponding recesses 124 can be formed in any of the islands 110, including islands 110 that house semiconductor dies 118 and islands 110 that do not house semiconductor dies 118 but are electrically connected to semiconductor dies 118.

[0052] According to an embodiment, the holes 123 in the molding body 121 and the corresponding recesses 124 below each hole 123 in the upper surface 102 are formed by a single process step that completely penetrates the molding body 121 and subsequently partially penetrates the substrate 100. For example, this single process step may include mechanical drilling, whereby a drill bit penetrates the molding body 121 and partially penetrates the substrate 100. In another embodiment, the single process step may include laser drilling, whereby highly concentrated energy is directed to the upper surface 102 of the module until the molding body 121 is penetrated and the substrate 100 is partially penetrated.

[0053] Referring to Figure 6, a press-fit connector 126 is arranged in each of the holes 123, such that a mechanical and electrical connection exists between the inner end of the press-fit connector 126 and the substrate 100. The press-fit connector 126 is designed to provide a conductive structure for I / O connections to a power semiconductor module. The press-fit connector 126 may include a conductive metal, such as Cu, Al, etc., and may include one or more corrosion-resistant plating layers, such as Ni, Ag, Au, etc. The press-fit connector 126 provides externally accessible electrical contacts via an electrical connection 120 contained within a molded body 121 to the respective terminals of the second semiconductor die 118. The press-fit connector 126 may be designed to provide a force-fit connection to a circuit interface (e.g., a printed circuit board) by inserting the distal end of the press-fit connector 126 into a correspondingly shaped socket in the circuit interface. The mechanical connection between the press-fit connector 126 and the substrate 100 has sufficient resistance to prevent the press-fit connector 126 from being easily removed by ordinary pulling force and can be inserted and removed from the socket of the circuit interface without damage. Generally, the diameter of the press-fit connector 126 can be in the range of 0.5mm-2mm, and in some embodiments it can be 1mm. The distal end of the press-fit connector 126 can be designed to be plastically deformable and / or may include a spring-loaded contact mechanism to enhance I / O connectivity.

[0054] In one embodiment, a mechanical and electrical connection between the press-fit connector 126 and the substrate 100 is provided by welding the inner end of the press-fit connector 126 to the substrate 100. More specifically, resistance welding can be performed, whereby a very large current is passed through both elements, thereby generating sufficient heat to melt the metal and achieve a weld. In another example, laser welding can be performed, whereby concentrated radiation, for example from a continuous or pulsed laser beam, is directed to the bonding interface until sufficient heat is generated to melt the metal and achieve a weld. More generally, any of a wide variety of welding techniques can be employed.

[0055] In this embodiment, a mechanical and electrical connection between the press-fit connector 126 and the substrate 100 is provided without soldering. For example, the recess 124 may be designed to have a diameter slightly smaller than that of the press-fit connector 126 (e.g., about 5-15% smaller), such that the press-fit connector 126 can be inserted into the recess 124 and then securely held in place by mechanical pressure. In another example, the inner end of the press-fit connector 126 may include protruding features, such as ridges or threads, that engage with the sidewalls of the recess 124 in a manner similar to a screw or bolt.

[0056] In any of the examples above, the substrate 100 acts as an anchor point, providing basic mechanical stability for each press-fit connector 126 while simultaneously providing electrical redistribution. Advantageously, no soldering or additional features (e.g., pins) are required to form the mechanical and electrical connection between the press-fit connector 100 and the substrate 100.

[0057] Instead of forming holes 123 in the molding body 121 and then attaching the press-fit connector 126 to the substrate, the press-fit connector 126 can be attached before forming the molding body 121. For example, the press-fit connector 126 can be mechanically soldered to or attached to the substrate 100 according to the above-described technique, and the molding body 121 can then be formed around the press-fit connector 126.

[0058] Referring to Figure 7, a post-processing step for the electrically isolating island 110 is shown. In either of the techniques described with reference to Figure 2, after the channel 106 is formed, each island 110 is connected to each other by a portion 108 of the substrate 100 located directly below the channel 106. Figure 2A In the case of the described semi-etching technique, the portions 108 of the planar sheet metal located directly below channel 106 are thinner than island 110. (Refer to...) Figure 3A In the case of the described stamping technique, these portions 108 of the planar sheet metal located directly below the channel 106 are vertically offset from the island 110 and have approximately the same thickness as the island 110. In either case, Figure 9 The process steps shown remove these portions 108 of the substrate 100 to eliminate any connection between adjacent islands 110, thereby forming isolated bonding pads.

[0059] refer to Figure 7A Selective etching technology is applied to the lower surface 104 of the substrate 100. Figure 7A In the embodiments, the substrate 100 is based on a reference Figure 2A The described technique forms a semi-etched substrate 100. According to this technique, a mask 128 is provided on the lower surface 104 of the substrate 100, and, for example, with reference to... Figure 2A The semi-etching technique described etches the portion of substrate 100 exposed from mask 128 in a similar manner. Since the geometry of the desired area to be removed is the same as the geometry of channel 106, a common photomask can be used to form two masks (i.e., a mask for forming channel 106 and a mask for removing the portion 108 below channel 106).

[0060] refer to Figure 7B Selective etching technology is applied to the lower surface 104 of substrates 100 with different configurations. Figure 7B In the embodiments, the substrate 100 is based on a reference Figure 2BThe described technique produces a stamped planar sheet of metal. Besides selecting etching conditions to remove the thicker vertically offset portion 108 of the substrate 100, the back-side etching process can be combined with... Figure 7A The technologies are basically similar.

[0061] refer to Figure 7C Planarization technology is applied to the lower surface 104 of the planar sheet metal. Figure 7C In the embodiments, the substrate 100 is based on a reference Figure 2B The described technique produces a stamped planar sheet of metal. The planarization technique uniformly removes material from the stamping substrate 100 until the bottom of the channel 106 is exposed. This can be accomplished, for example, using a chemical polishing process, a mechanical polishing process (e.g., grinding), or a chemical mechanical polishing (CMP) process.

[0062] refer to Figure 8 After the subsequent processing steps, the islands 110 are completely separated and isolated from each other by the encapsulation material of the molded body 121. If desired, these islands 110 can be configured to electrically access the electrical terminals of each terminal of the semiconductor die 118 on the underside of the module.

[0063] like Figure 9 As shown, the lower surface 104 of the substrate 100 can be covered with a layer of electrically insulating material. As a result, the module can be mounted on an external device, such as a heat sink, and the electrically insulating material layer provides electrical isolation for each island 110. Generally, the electrically insulating material layer can be any commercially available high-k encapsulation dielectric. According to an embodiment, the electrically insulating material layer is or comprises a ceramic material. In another embodiment, the electrically insulating material layer is or comprises an oxide layer deposited by oxidation in an electrochemical or chemical process. In another embodiment, the insulating material layer is or comprises particles and a matrix material. The matrix material can be, for example, epoxy resin, silicone resin, or acrylate. The particles can be, for example, derived from ceramics, coated metals, and glass. The particles can be a mixture of two or more materials. The particles can be in the form of spheres, fragments, plates, and nails. For example, the thickness of the electrically insulating material layer can be between 50 μm and 500 μm, and in some embodiments between 150 μm and 250 μm.

[0064] Terms such as "first" and "second" are used to describe various elements, areas, parts, etc., and are not intended to be limiting. Throughout the specification, similar terms refer to similar elements.

[0065] As used herein, the terms “having,” “comprising,” “including,” etc., are open-ended terms that indicate the presence of the stated element or feature, but do not exclude additional elements or features. Unless the context clearly indicates otherwise, the articles “a” and “described” are intended to include both plural and singular forms.

[0066] It should be understood that, unless otherwise specifically indicated, the features of the various embodiments described herein can be combined with each other.

[0067] While specific embodiments have been shown and described herein, those skilled in the art will understand that various alternatives and / or equivalent implementations may be made in place of the specific embodiments shown and described without departing from the scope of the invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, the invention is intended to be limited only by the claims and their equivalents.

Claims

1. A method for forming a power semiconductor module, the method comprising: Provides a substrate of planar sheet metal; A channel is formed in the upper surface of the substrate, the channel extending partially through the thickness of the substrate and defining a plurality of islands in the substrate; The first semiconductor die is installed on the first island of the islands; A molded body forming an encapsulation, the molded body covering the substrate, filling the channels, and encapsulating the semiconductor die; A hole is formed in the molding body and a recess is formed in the upper surface of the substrate below the hole; as well as A press-fit connector is arranged in the hole, and a mechanical and electrical connection is formed between the inner end of the press-fit connector and the substrate.

2. The method according to claim 1, wherein, Forming the hole in the molding body and the recess in the upper surface includes performing a single process step that completely penetrates the molding body and subsequently partially penetrates the substrate.

3. The method according to claim 2, wherein, The single process step includes mechanical or laser drilling.

4. The method according to claim 1, wherein, Forming the mechanical and electrical connection includes welding the inner end of the press-fit connector to the substrate.

5. The method of claim 1, further comprising forming a spring contact attachment feature from the substrate, the spring contact attachment feature including a tongue of the planar sheet metal and a through-hole in the tongue that extends completely through the thickness of the substrate, wherein, After the molded body is formed, the tongue and the perforation protrude from the molded body of the encapsulation.

6. The method according to claim 1, wherein, Forming the channel includes: forming one of the channels as an outer peripheral ring that separates each of the islands from the periphery of the substrate.

7. The method according to claim 1, wherein, After the channel is formed, each island in the islands is connected to each other by a portion of the substrate located directly below the channel, and wherein the method further includes removing the portion of the substrate after the molding body is formed, such that each island in the islands is electrically isolated from each other.

8. The method according to claim 7, wherein, Forming the channel includes: partially etching the upper surface of the substrate such that the portion of the substrate located directly below the channel is thinner than the island, and wherein removing the portion of the substrate includes selectively etching the lower surface of the substrate.

9. The method according to claim 7, wherein, Forming the channel includes: stamping the upper surface of the substrate such that the portion of the substrate directly below the channel is perpendicularly offset from the island, and wherein removing the portion of the substrate includes selectively etching the lower surface of the substrate.

10. The method according to claim 7, wherein, Forming the channel includes: stamping the upper surface of the substrate such that the portion of the substrate located directly below the channel is vertically offset from the island, and wherein removing the portion of the substrate includes planarizing the lower surface of the substrate.

11. The method according to claim 1, wherein, The depression is formed in the second island of the islands, wherein the method further includes: A second semiconductor die is installed on the second island of the islands; A plurality of holes are formed in the molding body and a plurality of recesses are formed in the upper surface of the substrate below each of the corresponding holes; Multiple press-fit connectors are available; and One of the press-fit connectors is arranged in each of the holes, and a mechanical and electrical connection is formed between the inner end of each of the press-fit connectors and the substrate. Wherein, the first semiconductor die and the second semiconductor die are configured as power transistors, and The press-fit connector is configured as an externally accessible electrical contact point to each terminal of the first semiconductor die and the second semiconductor die.

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