Method for removing a carrier plate
By setting through-hole ejector pins and an adhesive layer on the carrier plate, and using a vacuum device and external force to drive the ejector pins to separate the substrate from the carrier plate, the problems of substrate warping and bond breakage are solved, and the effects of simplifying the process and reducing costs are achieved.
Patent Information
- Application Number
- CN202111145749.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-09-28
- Publication Date
- 2026-01-23
- Estimated Expiration
- 2041-09-28
AI Technical Summary
In the semiconductor packaging process, warping of the substrate during the heating process can lead to bond breakage and lack of wetting between the bare chip and the substrate, and make it difficult to separate the substrate from the carrier after bonding.
By setting through holes in ejector pins and an adhesive layer on the carrier plate, the substrate is fixed to the carrier plate, and the ejector pins are driven by a vacuum device and external force to separate the substrate from the adhesive layer, thus achieving the separation of the substrate from the carrier plate.
It simplifies the manufacturing process, reduces material costs, and the adhesive layer is reusable, avoiding the complicated operation of removing the adhesive layer.
Smart Images

Figure CN113948405B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to the technical field of semiconductor packaging, and in particular to a method for removing a carrier plate. BACKGROUND
[0002] In the prior art, in the process of bonding a die to a substrate, a heating process (e.g., flip chip bonding or thermal compression bonding) is usually required. In the heating process, the substrate may be warped due to thermal expansion and contraction, which may cause die bond crack and non-wetting between the die and the substrate.
[0003] In order to prevent the substrate from warping in the heating process, the substrate is usually bonded to a carrier plate using an adhesive or an adhesive film before the heating process, so as to avoid the problems of substrate warping and die cracking. However, since the substrate is bonded to the carrier plate, after the die is bonded to the substrate, the problem of how to separate the substrate from the carrier plate arises. SUMMARY
[0004] The present disclosure provides a method for removing a carrier plate.
[0005] In a first aspect, the present disclosure provides a method for removing a carrier plate, comprising: preparing a carrier plate, a substrate, and at least one semiconductor packaging structure, the carrier plate being provided with at least two through holes, the through holes containing a top pin movable up and down, the surface of the carrier plate being provided with an adhesive layer, the adhesive layer covering each of the through holes; disposing the substrate on the surface of the adhesive layer away from the surface of the carrier plate, and bonding the substrate, the adhesive layer, and the carrier plate using a vacuum device; bonding the at least one semiconductor packaging structure to the surface of the substrate away from the adhesive layer; and driving the top pin contained in the through hole to move towards the adhesive layer by an external force, so as to separate the substrate from the adhesive layer.
[0006] In some optional embodiments, the adhesive layer is a silicone layer.
[0007] In some optional embodiments, the external force is formed under the action of a finger force, a mechanical force, or air pressure.
[0008] In some optional embodiments, the semiconductor packaging structure comprises at least one chip.
[0009] In some optional embodiments, the bonding of the at least one semiconductor packaging structure to the surface of the substrate away from the adhesive layer comprises:
[0010] bonding the at least one semiconductor package structure to the substrate away from the surface of the adhesive layer using a reflow process.
[0011] In some optional embodiments, the using a vacuum device to adhere the substrate, the adhesive layer and the carrier board comprises:
[0012] placing the substrate, the adhesive layer and the carrier board in a cavity of an air pump, and vacuumizing the cavity while closing the cavity to achieve the adhering of the substrate to the carrier board through the adhesive layer.
[0013] In some optional embodiments, before the placing the substrate on the surface of the adhesive layer away from the carrier board, the method further comprises:
[0014] driving the needle contained in the through hole to move away from the adhesive layer by an external force so that the needle does not contact the adhesive layer.
[0015] To solve the problem of how to separate the substrate from the carrier board in the heating process of bonding the bare chip to the substrate, the method for removing the carrier board provided by the present disclosure achieves the fixing of the substrate to the carrier board by sequentially placing the adhesive layer and the substrate on the carrier board before bonding the semiconductor package structure to the substrate, and then using a vacuum device to vacuumize. Then, the up-and-down movable needle contained in the through hole of the carrier board is driven to move towards the adhesive layer by an external force, and finally the substrate is separated from the adhesive layer, and the substrate is separated from the carrier board. Here, the substrate is not adhered to the carrier board by the adhesion of the adhesive layer, but is fixed to the carrier board by vacuumization. After the substrate is separated from the adhesive layer, the adhesive layer does not need to be removed, which simplifies the process and does not need to purchase equipment for removing the adhesive layer, and the adhesive layer can be reused to reduce the cost of consumable materials. BRIEF DESCRIPTION OF DRAWINGS
[0016] Other features, objects, and advantages of the present disclosure will become more apparent from the following detailed description of non-limiting embodiments made with reference to the accompanying drawings:
[0017] Figures 1A-1E is a longitudinal sectional structure schematic diagram of one embodiment of the method for removing the carrier board according to the present disclosure.
[0018] SYMBOL EXPLANATION
[0019] 1-carrier board; 11-through hole; 2-substrate; 2a-surface of the substrate away from the adhesive layer; 3-semiconductor package structure; 4-needle; 5-adhesive layer; 5a-surface of the adhesive layer away from the carrier board. DETAILED DESCRIPTION
[0020] The specific embodiments of the present disclosure will be described below with reference to the accompanying drawings and examples, and those skilled in the art can easily understand the technical problems solved by the present disclosure and the technical effects produced by the present disclosure through the content recorded in the specification. It can be understood that the specific embodiments described herein are only used to explain the related application, and not to limit the application. In addition, only the parts related to the application are shown in the drawings for ease of description.
[0021] It should be noted that the structures, proportions, sizes, etc. shown in the drawings of the specification are only used to cooperate with the content recorded in the specification for the understanding and reading of those skilled in the art, and do not define the limiting conditions for the implementation of the present disclosure, so they do not have technical significance. Any modification of the structure, change of the proportion relationship or adjustment of the size, without affecting the effects produced by the present disclosure and the purposes achieved, should still fall within the scope of the technical content disclosed by the present disclosure. At the same time, the terms such as "upper", "first", "second" and "one" used in the specification are only for the convenience of clear description, and not to limit the scope of the present disclosure, and the change or adjustment of the relative relationship without substantial change of the technical content is also considered as the implementation of the present disclosure.
[0022] It should also be noted that the embodiments of the present disclosure correspond to the longitudinal cross-section in the front view direction, the transverse cross-section in the right view direction, and the horizontal cross-section in the upper view direction.
[0023] In addition, the embodiments in the present disclosure and the features in the embodiments can be combined with each other without conflict. The present disclosure will be described in detail below with reference to the drawings and in combination with the embodiments.
[0024] The following refers to Figures 1A-1E , Figures 1A-1E is a longitudinal cross-sectional structure schematic diagram of one embodiment of the method for removing the carrier plate according to the present disclosure at various stages. In order to better understand the aspects of the present disclosure, the figures have been simplified.
[0025] Referring to Figure 1A , a carrier plate 1, a substrate 2 and at least one semiconductor package structure 3 are prepared.
[0026] Here, the carrier plate 1 can be various carrier plates (Carriers) that play a supporting role, and the present disclosure does not make specific limitations on this.
[0027] Here, the carrier plate 1 can be provided with at least two through holes 11, the through holes 11 containing a top pin 4 that can move up and down, and the surface of the carrier plate 1 is provided with an adhesive layer 5 covering each through hole 11.
[0028] The through holes 11 provided on the carrier plate 1 can be various shapes that can accommodate the corresponding pins 4, and the present disclosure does not make specific limitations thereon. It should be noted that Figure 1A Only six pins 4 are shown here, but this is not a specific limitation on the number of pins 4. In practice, different numbers of pins 4 can be designed as needed. Of course, it can be understood that the more pins 4, the easier it is to separate the substrate 2 from the carrier plate 1.
[0029] The adhesive layer 5 can be various adhesive layers that have a certain adsorption capacity under vacuum adsorption, can be separated from the substrate 2 under the action of the pins 4, and will not be damaged under the action of the pins 4, so as to keep the relative position of the carrier plate 1 and the substrate 2 unchanged and provide a certain supporting force for the substrate 2 when the semiconductor package structure 3 is bonded to the substrate 2, ensure that the position of the substrate 2 remains unchanged, and facilitate accurate positioning of the semiconductor package structure 3 to the corresponding bonding position of the substrate 2 during the bonding process. In turn, the separation of the substrate 2 and the carrier plate 1 can be achieved, and the adhesive layer 5 formed by the silica gel can also be reused in the subsequent process, reducing the cost of consumables, and because there is no residual glue, there is no need for other processes to remove the residual glue, simplifying the process and reducing the economic cost of purchasing the corresponding equipment to remove the residual glue.
[0030] In some optional embodiments, the adhesive layer 5 can be a silica gel layer. The silica gel has adsorption function under vacuum conditions, can improve the positioning accuracy during bonding of the semiconductor structure 3 to the substrate 2, and the adhesive layer 5 formed by the silica gel can be separated from the substrate 2 under the action of the pins 4 without residual glue, and the adhesive layer 5 itself will not be damaged.
[0031] The substrate 2 can be various types of substrates, and the present disclosure does not make specific limitations thereon.
[0032] The substrate 2 can include organic matter and / or inorganic matter, wherein the organic matter can be, for example, polyamide (PA), polyimide (PI), epoxy, poly-p-phenylene benzobisoxazole (PBO) fiber, FR-4 epoxy glass cloth laminate, PP (PrePreg, pre-impregnated material or semi-cured resin, semi-cured sheet), ABF (Ajinomoto Build-up Film), etc., and the inorganic matter can be, for example, silicon (Si), glass, ceramic, silicon oxide, silicon nitride, tantalum oxide, etc.
[0033] The substrate 2 can also be, for example, a printed circuit board, such as a paper-based copper foil laminate, a composite copper foil laminate, or a polymer-impregnated glass fiber-based copper foil laminate, etc.
[0034] The substrate 2 can further include an interconnection, such as a conductive trace, a conductive via, or the like. Here, the conductive via can be a through-hole, a buried hole, or a blind hole, and the through-hole, the buried hole, or the blind hole can be filled with a conductive material, such as a metal or a metal alloy. Here, the metal can be, for example, gold (Au), silver (Ag), aluminum (Al), nickel (Ni), palladium (Pd), copper (Cu), or an alloy thereof.
[0035] The semiconductor package structure 3 can be various semiconductor package structures. In some optional embodiments, the semiconductor package structure 3 can include at least one chip. Here, the chip can be various types of die. The present disclosure does not make a specific limitation on this. For example, a logic chip, a memory chip, a micro-electro-mechanical system (MEMS) chip, a radio frequency chip, or the like can be included.
[0036] Here, the pogo pin 4 can be made of a metal material (for example, stainless steel, aluminum) or a metal plus a non-metal material (for example, rubber, plastic, or the like).
[0037] It should be noted that, Figure 1A Only six pogo pins 4 are shown here, but this is not a specific limitation on the number of pogo pins 4. In practice, different numbers of pogo pins 4 can be designed according to needs. Of course, it can be understood that the more the number of pogo pins 4, the easier it is to separate the substrate 2 from the carrier board 21.
[0038] Reference Figure 1B The substrate 2 is arranged on the surface 5a of the adhesive layer 5 away from the carrier board 1, and the substrate 2, the adhesive layer 5, and the carrier board 1 are bonded using a vacuum device.
[0039] Here, the bonding of the substrate 2, the adhesive layer 5, and the carrier board 1 using the vacuum device is achieved by using the characteristic that the adhesive layer 5 has adsorption ability under vacuum conditions, using the vacuum device to place the substrate 2, the adhesive layer 5, and the carrier board 1 in a vacuum environment, and then the substrate 2 can be bonded to the carrier board 1 under the action of the adhesive layer 5.
[0040] In some optional embodiments, the bonding of the substrate 2, the adhesive layer 5, and the carrier board 1 using the vacuum device can be placing the substrate 2, the adhesive layer 5, and the carrier board 1 in the cavity of an air pump, and vacuumizing the cavity while closing the cavity, so as to achieve the bonding of the substrate 2 to the carrier board 1 through the adhesive layer 5.
[0041] Reference Figure 1C The at least one semiconductor package structure 3 is bonded to the surface 2a of the substrate 2 away from the adhesive layer 5.
[0042] Here, various implementations can be used to bond the at least one semiconductor package structure 3 to the surface 2a of the substrate 2 away from the adhesive layer 5. For example, the at least one semiconductor package structure 3 can be optionally bonded to the surface 2a of the substrate 2 away from the adhesive layer 5 using a bonding method. The bonding method can be, for example, FCB (Flip Chip Bonding) or TCB (Thermal Compression Bonding), followed by a reflow process.
[0043] Referring to Figure 1D , the top pin 4 contained in the through hole 11 is driven by an external force to move towards the adhesive layer 5, eventually contacting and lifting the adhesive layer 5, so as to separate the substrate 2 from the adhesive layer 5, and then Figure 1E , the semiconductor package structure 3 is bonded to the substrate 2, and the substrate 2 has been separated from the carrier board 1, and subsequent operations can be performed.
[0044] In some optional embodiments, the external force can be formed by finger force, mechanical force or air pressure.
[0045] In practice, after the operation shown in Figure 1D is performed, the adhesive layer 5 is lifted by the top pin 4, in order to continue to perform the operation shown in Figures 1A-1E on the next semiconductor package structure 3 on the adhesive layer 5 and the carrier board 1, the following operation can be performed before the substrate 2 is arranged on the surface 5a of the adhesive layer 5 away from the carrier board 1 as shown in Figure 1B , that is, before the operation shown in Figure 1A or after the operation shown in Figure 1A : drive the top pin 4 contained in the through hole 11 to move away from the adhesive layer 5 by an external force, so that the top pin 4 does not contact the adhesive layer 5. Then, the operation shown in Figure 1B of arranging the substrate 2 on the surface 5a of the adhesive layer 5 away from the carrier board 1 and using a vacuum device to bond the substrate 2, the adhesive layer 5 and the carrier board 1 can be continued. Through the above optional way, the adhesive layer 5 and the carrier board 1 can be reused to realize the separation of the substrate 2 from the carrier board 1 after the semiconductor package structure 3 is bonded to the substrate 2, thereby reducing the cost of consumables.
[0046] While the disclosure has been described and illustrated with reference to specific embodiments thereof, these descriptions and illustrations are not intended to limit the disclosure. Those skilled in the art can readily devise various changes that fall within the true spirit and scope of the disclosure, as defined by the appended claims. The drawings can not be to scale. There can be differences between the technology reproduction in the disclosure and the actual implementation due to manufacturing process variations, etc. There can be other embodiments of the disclosure that are not specifically illustrated. The specification and drawings are to be regarded as illustrative in nature and not as restrictive. Modifications can be made to adapt a particular situation, material, composition of matter, method, or process to the objective, spirit and scope of the disclosure. All such modifications are intended to be within the scope of the claims appended hereto. While the methods disclosed herein have been described with reference to particular operations performed in a particular order, it will be understood that these operations can be combined, sub-divided, or re-ordered to form equivalent methods without departing from the teachings of the present disclosure. Accordingly, unless specifically indicated herein, the order and grouping of operations are not a limitation of the present disclosure.
Claims
1. A method for removing a carrier plate, comprising: Prepare a carrier plate, a substrate, and at least one semiconductor packaging structure. The carrier plate is provided with at least two through holes, each through hole containing a vertically movable ejector pin. An adhesive layer is provided on the surface of the carrier plate, and the adhesive layer covers each of the through holes. The substrate is placed on the surface of the adhesive layer away from the carrier plate, and the substrate, the adhesive layer and the carrier plate are bonded together using a vacuum device; The at least one semiconductor package structure is bonded to the surface of the substrate away from the adhesive layer; An external force drives the ejector pins contained within the through-hole to move toward the adhesive layer, and the ejector pins contact and lift the adhesive layer to separate the substrate from the adhesive layer.
2. The method according to claim 1, wherein, The adhesive layer is a silicone layer.
3. The method according to claim 1, wherein, The external force is formed by the application of force by fingers, mechanical force, or air pressure.
4. The method according to claim 1, wherein, The semiconductor package structure includes at least one chip.
5. The method according to claim 1, wherein, The bonding of the at least one semiconductor package structure to the surface of the substrate away from the adhesive layer includes: The at least one semiconductor package structure is bonded to the surface of the substrate away from the adhesive layer using a bonding method; Perform the reflow process.
6. The method according to claim 1, wherein, The method of bonding the substrate, the adhesive layer, and the carrier plate using a vacuum device includes: The substrate, the adhesive layer, and the carrier plate are placed in the cavity of an air pump. The cavity is then evacuated while being closed, so that the substrate can be bonded to the carrier plate through the adhesive layer.
7. The method according to claim 1, wherein, Before placing the substrate on the surface of the adhesive layer away from the carrier plate, the method further includes: An external force is used to drive the ejector pin contained in the through hole to move away from the adhesive layer, so that the ejector pin does not contact the adhesive layer.
Citation Information
Patent Citations
Manufacturing method of carrier-based fan-out 2.5D / 3D package structure
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