Cross-sectional imaging with improved 3D volume image reconstruction accuracy
By utilizing features in cross-sectional images of integrated semiconductor samples for high-precision alignment, the problem of inaccurate 3D volumetric image reconstruction in existing technologies is solved, enabling high-precision measurement of line edge roughness and feature dimensions.
Patent Information
- Application Number
- CN202080042099.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-09-20
- Filing Date
- 2020-05-25
- Publication Date
- 2025-11-11
- Estimated Expiration
- 2040-05-25
AI Technical Summary
Existing technologies struggle to achieve high-accuracy 3D volumetric image reconstruction when measuring integrated circuits with extremely small feature sizes. This is particularly affected by stage drift, imaging pillar drift, and image distortion, leading to inaccurate measurement of line edge roughness.
A feature-based alignment method is adopted to perform high-precision image registration in cross-sectional images of integrated semiconductor samples by utilizing features such as metal lines, vias, and HAR structures. Combined with statistical methods and image processing techniques, errors are reduced and reconstruction accuracy is improved.
It achieves high-precision 3D volumetric image reconstruction of integrated semiconductor samples, reduces the errors of lateral stage drift and scanning charged particle image acquisition methods, and improves the measurement accuracy of line edge roughness and feature size.
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Figure CN113950704B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a three-dimensional circuit pattern inspection and measurement technique using cross-sectional measurements of integrated circuits. More specifically, the invention relates to a method for obtaining a 3D volumetric image of an integrated semiconductor sample, and to a corresponding computer program product and a corresponding semiconductor inspection apparatus. The method, computer program product, and apparatus can be used for edge shape detection, quantitative metrology, defect detection, and defect review of patterns, and for deriving the line edge roughness or surface roughness of fine patterns using a scanning charged particle microscope. Background Technology
[0002] Semiconductor structures are among the most delicate man-made structures, plagued by only a very small number of defects. These rare defects are the signatures that defect detection, defect re-detection, or quantitative metrology devices are looking for. The fabricated semiconductor structures are based on background knowledge. For example, in logic-type samples, metal lines run parallel to each other in metal layers or high aspect ratio (HAR) structures, while metal vias extend perpendicular to the metal layers. The angles between metal lines in different layers are either 0° or 90°. On the other hand, the cross-section of known VNAND-type structures is typically spherical.
[0003] In integrated circuit manufacturing, feature sizes are shrinking. Currently, the smallest feature size, or critical dimension (CD), is below 10 nm, such as 7 nm or 5 nm, and will approach below 3 nm in the near future. Therefore, measuring the edge shape of patterns and determining feature dimensions or line edge roughness with high precision becomes challenging. The edge shape of a pattern or the roughness of a line is affected by several factors. Generally, the edge shape of a pattern or line may be constrained by the properties of the materials involved, photolithography exposure, or any other process steps involved (such as etching, deposition, or implantation). The measurement resolution of charged particle systems is typically limited by the dwell time of each pixel on the sample or the sampling raster of individual image points, as well as the diameter of the charged particle beam (CPB). The sampling raster resolution can be set for the imaging system, but should be adapted to the diameter of the charged particle beam on the sample. Typically, the raster resolution is 2 nm or less, but this limitation can be reduced with the absence of physical constraints. The diameter of a charged particle beam has a finite dimension, depending on the operating conditions and lenses. The beam resolution is generally limited to half the beam diameter. This resolution can be below 2 nm. However, well-known deconvolution techniques can be applied to improve, for example, edge detection. Although high measurement resolution, such as below 2 nm, is rare in practical charged particle systems, achieving accuracy better than 10 nm in 3D volumetric measurements remains challenging. As an example, refer to "Quantitative Three-Dimensional Analysis using Focused Ion Beam Microscopy" by Dunn, Kubis, and Hull in *Introduction to Focused Ion Beams* (2005), edited by Gianuzzi and Stevie. Here, the demonstrated 3D resolution is approximately 30 nm.
[0004] A common method for generating 3D tomographic data from semiconductor samples at the nanometer (nm) scale is a so-called slicing and imaging method, for example, using a sophisticated dual-beam setup. In such an setup, two particle optics systems are positioned at an angle. The first particle optics system can be a scanning electron microscope (SEM). The second particle optics system can be a focused ion beam (FIB) optics system using, for example, gallium (Ga) ions. The Ga ion focused ion beam (FIB) is used to slice off layers one by one at the edges of the semiconductor sample, and each cross-section is imaged using a scanning electron microscope (SEM). The two particle optics systems may be perpendicular or oriented at an angle between 45° and 90°. Figure 1 A schematic diagram of the slicing and imaging method is shown: Using an FIB optical column 50, where a focused ion particle beam 51 is in the y-direction and scans in the xy-plane, a thin layer from the cross-section traversing the semiconductor sample 10 is removed to expose a new front surface 52 as a cross-sectional image plane 11. In the next step, a SEM (not shown) is used to scan and image the front surface of the cross-section 11. In this example, the SEM optical axis is oriented parallel to the z-direction, and the scanning imaging line 82 in the xy-plane scans the cross-sectional image plane 11 and forms a cross-sectional image or slice 100. This method is repeated by traversing, for example, front surfaces 53 and 54, to obtain a sequence of 2D cross-sectional images 1000 traversing the sample at different depths. The distance dz between two subsequent image slices can be from 1 nm to 10 nm. From these sequences of 2D cross-sectional images 1000, a 3D image of the integrated semiconductor structure can be reconstructed.
[0005] As modern integrated circuits become increasingly detailed and feature-sized, the reconstruction of 3D tomographic images presents several challenges. Lateral stage drift or SEM column drift can cause offsets in the lateral position of different slices within the structure. Variations in FIB cutting rates can cause intersecting surfaces to lie at varying distances. Image distortion can result in cross-sectional images exhibiting, for example, pin-cushion or shear distortion. Figure 2 An example of xz-layer reconstruction from a sequence of xy cross-sectional images is shown. For simplicity, the sequence of 2D cross-sectional images 1000 only shows three cross-sectional images 100.1, 100.2, and 100.3 at z positions z1, z2, and z3. Random stage or SEM drift can cause an artificial increase in the roughness of the line edges of the metal lines 101 extending in the z direction, or a large variation in the width of the metal lines 102 extending parallel to the z direction.
[0006] A common approach is to derive the lateral position of each layer and the distance from layer to layer using so-called fiducials. US 9,633,819 B2 discloses an alignment method based on a guide structure (“fiducial”) exposed on the top of the sample. Figure 3a , Figure 3b , Figure 3c Alignment with reference points is illustrated below. As will be explained in more detail below, prior to the FIB cuts at intersections 52, 53, and 54, marker structures 21 and 22 are formed in the deposited material 20 on top of the sample in a direction perpendicular to the cross-section. Following slicing and imaging cross-sections, each cross-sectional image also contains cross-sectional image segments 25 and 27 containing reference points or alignment marks 21 and 22. A first center mark 21 is used to perform lateral alignment within the slices, while the distance between the two outer second marks 22 of the two cross-sectional image segments 27 is used to calculate the distance between each slice.
[0007] US 7,348,556 discloses a method for deriving the roughness of a line edge based on a reference point. Here, the reference point already exists on the surface of the workpiece or probe, or is milled at a location within the field of view.
[0008] However, the accuracy of using reference points is limited by the reference point generation process and the measurement accuracy of the charged particle optical column used to measure the reference point position. Reference point markings are coarse and may measure several 20nm to 100nm, and their shape may be arbitrarily changed from the first to the last slice, making the reconstructed accuracy insufficient for newer semiconductor structures with much smaller dimensions and better overlap accuracy. This will be explained in more detail below. Figure 4 No alignment is displayed. Figure 4 a)) and alignment ( Figure 4 The residual reconstruction in b) results in line edge roughness. The drift problem of the stage or charged particle beam column becomes more severe as the size of the relevant actual structure decreases.
[0009] This, along with other effects, results in artificially non-uniform edge shapes and locations, limiting the accuracy of measurement of interconnected circuit patterns. In 3D reconstruction, undulating metal lines are formed, and measurements, such as line edge roughness, are degraded due to alignment errors. It is impossible to measure the dimensions of fine patterns by cross-sectional measurements, or to derive high-precision line edge roughness or surface roughness of fine 3D patterns. Previous technology solutions have failed to meet the recent demand for high-accuracy measurements of integrated circuits with minimum feature sizes (CD) reduced to 7 nm and below. Summary of the Invention
[0010] Therefore, the object of the present invention is to provide an improved method for obtaining a 3D volumetric image of an integrated semiconductor sample by measuring its cross-section. In particular, this method will allow for improved 3D reconstruction accuracy.
[0011] The objective can be achieved through the independent claims. The dependent claims, on the other hand, pertain to advantageous embodiments.
[0012] This patent application claims priority to German patent application DE 10 2019 006 645.6, the entire contents of which are incorporated herein by reference.
[0013] This invention provides a method for high-accuracy 3D reconstruction of 3D volumetric images for 3D circuit pattern detection by cross-sectional measurement of integrated circuits, and more specifically, a method, computer program product, and apparatus for obtaining 3D volumetric images of integrated semiconductor samples free of measurement artifacts (caused by stage drift, imaging column drift, or image distortion).
[0014] This method allows for the quantitative measurement of line edge location, line edge roughness, feature size, or region, enabling high-precision defect detection or re-inspection. Furthermore, this invention provides a method, computer program product, and apparatus for detecting the edge shape of fine patterns and deriving the line edge roughness or surface roughness of the fine patterns with high precision.
[0015] The basic concept of this invention is to reconstruct a 3D volumetric image based on known and / or characteristic data provided with higher precision than that used to provide a reference point. As explained above, the precision of a reference point itself is limited. Therefore, according to this invention, the characteristic data used for aligning the cross-sectional image for reconstructing the 3D volumetric image is not the positional data of the reference point, but rather characteristic data based on the more precisely known and / or provided internal structure or features of the integrated semiconductor sample. These internal structures or features are, for example, metal lines, interconnects, vias, HAR structures, or gate structures. Therefore, the alignment applied in the method for obtaining a 3D volumetric image of an integrated semiconductor sample according to this invention is referred to as feature-based or structure-based alignment, and the expressions are used synonymously within this patent application.
[0016] More specifically, feature-based alignment applies the accurate alignment of a sequence of inventive cross-sectional images to reconstruct 3D tomographic datasets or 3D volumetric images. This accurate alignment includes a method for applying an alignment correction scheme and adjusting slice positions according to that scheme. The alignment correction scheme is based on image or feature registration. Image registration generally refers to the accurate placement of a cross-sectional image in a 3D volume. Image registration utilizes features of integrated circuits (such as metal lines) present in at least one portion of a cross-sectional image. Using these features present in at least two consecutive cross-sectional images, the relative lateral position and rotation of two consecutive cross-sectional images can be determined with high precision. With this feature-based alignment, high precision can be achieved by positioning features of integrated circuits manufactured with high precision using current integrated semiconductor manufacturing technologies.
[0017] Furthermore, this accuracy can be improved through statistical methods, such as centroid extraction of features present in the integrated semiconductor sample (e.g., gates, metal lines, or HAR structures, particularly HAR channels). Other statistical methods may include averaging the measured locations of several image features, or possibly considering outliers that deviate excessively from the statistical expectation. Thus, subpixel accuracy for image alignment of individual cross-sectional images can be achieved. Consequently, image registration of 2D cross-sectional images is achieved in 3D volumetric images with high subpixel accuracy.
[0018] According to the present invention, the effects of lateral stage drift and errors in the scanning charged particle image acquisition method can be reduced.
[0019] Furthermore, imaging aberrations (such as distortion errors in scanning charged particle imaging methods and devices) can be extracted and removed through image processing that utilizes the characteristics or structure of the integrated semiconductor sample. Low-order distortion aberration variations between consecutive image slices can be extracted and removed from cross-sectional images.
[0020] The invention will now be described in more detail:
[0021] According to a first aspect of the invention, the invention relates to a method for obtaining a 3D volumetric image of an integrated semiconductor sample through feature-based alignment, characterized in that:
[0022] Obtain at least a first cross-sectional image and a second cross-sectional image parallel to the first cross-sectional image.
[0023] Obtaining the first and second cross-sectional images includes subsequently removing the surface layer of the cross-section of the integrated semiconductor sample using a focused ion beam to make the new cross-section available for imaging, and imaging the new cross-section of the integrated semiconductor sample using an imaging device.
[0024] Feature-based alignment of at least the first and second cross-sectional images is obtained by image registration of at least each of the first and second cross-sectional images.
[0025] The image registration is performed based on at least one common feature of the integrated semiconductor sample in at least the first and second cross-sectional images.
[0026] Common features present in at least the first and second cross-sectional images provide high positional accuracy within the integrated semiconductor sample. Therefore, using data from this at least one common feature as a reference for image registration also allows for higher precision in alignment.
[0027] According to a preferred embodiment of the invention, at least one common feature includes at least one of a metal line, a via, a HAR structure, a HAR channel, or a gate structure. All these features are preferably linear or linearly elongated. Their placement in the integrated semiconductor sample and / or their location are known to have very high precision, which can be, for example, in the range of 4 nm to 2 nm or even less than 1 nm accuracy for the lowest and finest layer in the sample.
[0028] Preferably, image registration is performed based on two or more common features. For example, it can be based on three, four, five, ten, twenty, or even more common features. The more common features that facilitate the performed image registration, the better the alignment accuracy can become: the imaging accuracy of imaging a new cross-section of an integrated semiconductor sample using an imaging device is, in principle, limited, but statistical methods can be used to statistically improve imaging accuracy and thus improve the image registration process.
[0029] According to a preferred embodiment, image registration includes a statistical evaluation. This statistical evaluation can be performed on data from individual cross-sectional images and / or on data from 3D volumetric images. The more cross-sectional images obtained, the more effective the statistical evaluation becomes. Preferably, the statistical evaluation includes at least one of centroid calculation, feature detection, or statistical averaging. In these cases, the statistical evaluation is preferably performed on data from individual cross-sectional images.
[0030] According to a preferred embodiment of the invention, the method includes providing reference point-based alignment of at least first and second cross-sectional images by measuring and evaluating the positions of alignment marks prior to feature-based alignment. In this manner, stepwise alignment can be performed. Reference point-based alignment has lower accuracy compared to feature-based alignment of the present invention. However, stepwise alignment is preferred in some cases, such as when the cross-sectional images contain highly repetitive structures / features.
[0031] According to a preferred embodiment of the invention, imaging of a new cross-section of an integrated semiconductor sample is performed using at least one of a charged particle device, an atomic force microscope, or an optical microscope. Different imaging techniques can be combined, for example, to obtain an overview image with a relatively low resolution before capturing an image with a high or highest resolution. An example of a charged particle device operating at high resolution is a scanning electron microscope employing a single electron beam (SEM) or multiple electron beams (multiSEM).
[0032] According to a preferred embodiment, imaging of a new cross-section of an integrated semiconductor sample is performed using an electronically operated charged particle device, wherein a focused ion beam and an electron beam are positioned and operated at an angle to each other, and the beam axis of the focused ion beam intersects the beam axis of the electron beam. The angle between the focused ion beam and the electron beam may be, for example, 90°; however, other angles are also possible.
[0033] According to a preferred embodiment of the invention, at least the first and second cross-sectional images are formed perpendicular to the top surface of the integrated semiconductor sample. Here, the top surface of the integrated semiconductor sample is assumed to be flat, or may be approximately flat, or may be mathematically fitted to a flat surface of the actual surface. The top surface may also include a protective layer and / or a cap, which may provide reference points.
[0034] Preferably, at least the first and second cross-sectional images are perpendicular to the metal lines or gates formed in at least one metal layer of the integrated semiconductor sample. These features are provided in the corresponding layers of the integrated semiconductor sample. Therefore, they intersect with the cross-sectional images and are generally visible in more than one cross-sectional image, thus enabling feature-based alignment with high accuracy. According to the geometry of this embodiment, the positions of these features do not / will not change in different cross-sectional images. Therefore, this geometry is particularly suitable for lateral alignment in the xy-plane.
[0035] According to an alternative embodiment of the invention, at least the first and second cross-sectional images are formed at an angle offset from the metal lines or gates of at least one metal layer of the integrated semiconductor sample by 90°. Preferably, this angle is offset by 90° in several, preferably all, metal layers of the integrated semiconductor sample. When this angle is offset by 90°, the geometric arrangement also applies to accuracy alignment in the z-direction, i.e., to accurately determine the distances of the plurality of cross-sectional images relative to each other in the z-direction. According to a preferred embodiment, this angle is 45°, but it may also be 30° or 60° or another angle.
[0036] According to an alternative embodiment of the invention, at least first and second cross-sectional images are formed at an angle relative to the top surface of the integrated semiconductor sample to reveal cross-sectional images of at least one HAR channel perpendicular to the top surface of the integrated semiconductor sample. These HAR channels are relatively fine, generally pillar-like and elongated structures extending through a significant portion of the integrated semiconductor sample. The finer and more elongated the structure, the more accurate the alignment based on this structure. According to this embodiment, the cross-sectional images are also typically formed at an angle relative to the layers of the integrated semiconductor sample. The top surface and layers are preferably arranged parallel to each other. According to this embodiment, the position of the HAR channels can be determined, the distance dz between subsequent cross-sectional images can be determined, and lateral alignment in the xy plane can be performed.
[0037] According to an alternative embodiment of the invention, at least the first and second cross-sectional images are formed at an angle relative to the top surface of the integrated semiconductor sample, and the distance between at least the first and second cross-sectional images is determined based on the position of a reference point provided on the top surface. As explained above, the accuracy of reference-point-based alignment is, in principle, less than the accuracy of feature-based alignment according to the invention. However, if reference-point-based alignment is applied prior to feature-based alignment, the accuracy of reference-point-based alignment can be improved by a factor of sinβ, where angle β determines the angle between the axis of the focused ion beam and the top surface of the integrated semiconductor circuit. The smaller the angle β and therefore the more glancing, the better the accuracy of reference-point-based alignment becomes.
[0038] Similarly, according to another alternative embodiment of the invention, at least the first and second cross-sectional images are formed at an angle relative to the top surface of the integrated semiconductor sample, and at least the distance between the first and second cross-sectional images is determined based on the location of features, particularly HAR channels, provided inside the integrated semiconductor sample and perpendicular to the top surface. Here, the accuracy of determining the distance between subsequent features, preferably HAR channels, can be improved by a factor of sinβ, where angle β determines the angle between the axis of the focused ion beam and the top surface of the integrated semiconductor circuit.
[0039] According to a preferred embodiment of the invention, image alignment includes subtracting an image distortion deviation between at least the first and second cross-sectional images. Preferably, the subtraction of the image distortion deviation includes an approximation of the image distortion deviation using a base distortion function.
[0040] According to a preferred embodiment of the present invention, the method further comprises the following steps:
[0041] Determine the curtaining signature of the new cross-section; and
[0042] The veil feature code is used to represent the cross-sectional image as a 3D cross-sectional image.
[0043] The material removal rate of a focused ion beam depends on the type of material to be removed. For this reason, surfaces obtained with a constant feed but containing different materials in new cross-sections are not ideally flat, but exhibit a certain topography. This topography is typically undulating, like a veil (“veil effect”). Images of individual undulating surfaces can make lines appear as artifacts that can be mistaken for features or structures. Therefore, veil correction is preferred. According to recent techniques, veil correction is performed by applying some movement of the stage to a so-called wobbling stage method, which removes surface layers using focused ion beams from different directions, thereby averaging the undulating structure. However, this wobbling stage method is unsuitable for tomographic equipment due to the thinness of the slices to be removed and the corresponding errors or excessive stage drift. Therefore, according to the present invention, an alternative approach is adopted: measuring the surface topography and appropriately considering it in further processes. Veil or more commonly, topography effects degrade the quality of 3D reconstruction because, for example, the reconstructed metal line cross-section is not rectangular but sheared or shows protrusions. Topography means that not all points in an image belong to the same plane, but rather they have individual out-of-plane (z) coordinates. If this data is unavailable, the voxels are not correctly placed during reconstruction.
[0044] Therefore, determining the shading signature involves determining the 3D topography of the new cross-section. The signature indicates the undulating topography like a fingerprint / characteristic of the imaged new cross-section. However, the shading signature is not limited to the 3D topography resulting from the shading effect. Generally, the shading signature covers the 3D topography of a cross-sectional image or slice.
[0045] In principle, methods for determining the 3D topography of surfaces are known in the art. Tadao Sugunuma provides an example in "Measurement of Surface Topography Using SEM with Secondary Electron Detectors" in the *Journal of Electron Microscopy*, 1985, Vol. 4, No. 34, pp. 428-337. The occlusion effect of 3D structures during imaging can be overcome. One solution is to use at least two different detectors to detect the same signal from different directions. More specifically, particles emitted from the scanned surface are detected at two different angles. Preferably, the detectors are set symmetrically about the normal to the surface to be imaged. Using differential signals from at least two detectors allows for the determination of the 3D topography with high accuracy. Thus, the 3D topography of a new cross-sectional image is obtained, and the occlusion signature is determined. In the next step of the method according to the invention... In this step, masking features are used to represent cross-sectional images as 3D cross-sectional images. These 3D cross-sectional images are not perfectly flat, but are typically slightly curved, and the location of the image data is characterized in three dimensions: x, y, and z. Image registration is then performed based on the 3D or undulating cross-sectional images. This significantly improves the accuracy of the proposed method. Furthermore, the measured 3D topography can be used for 3D volume reconstruction: if this information is available, the true (x, y, z) position of each point is used, meaning that mathematical corrections for topographic effects can be performed in the reconstruction, rather than simply stacking slices.
[0046] According to a preferred embodiment, the method further includes the following steps:
[0047] Determine the masking feature code of the new cross section; and
[0048] The determined masking feature code is used in the feedback loop used to control the focused ion beam while removing the next cross-sectional surface layer of the integrated semiconductor sample.
[0049] As explained above, the surface of the newly delayed cross-section is not perfectly flat, but rather exhibits a 3D topography that defines the masking feature code. Therefore, this 3D topography can be taken into account when the next cross-section is delayed to present a new cross-section, and the focused ion beam can be individually controlled to obtain a new cross-section that is as flat as possible. The ion beam can be controlled to operate longer and / or more frequently at locations representing the maximum topography value, and shorter and / or less frequently at locations representing the minimum topography value. Therefore, the next new surface itself will be flatter. In fact, the types of control described can be integrated into the method of this invention in terms of feedback loops.
[0050] According to another preferred embodiment of the invention, the method further comprises aligning at least first and second cross-sectional images based on a predetermined cover area shape and / or spatial distribution of features in the cross-sectional images. This alignment is particularly useful when there is background knowledge about the features / structures within the sample under study and these features / structures have a specified known geometry, and / or when these features / structures are regularly arranged in space. Based on the background knowledge about the features / structures, the ideal geometry of these features / structures in the cross-sectional images is known, and reference or cover areas for these features / structures can be defined. If the feature is, for example, a pillar-like feature, such as a pillar-like HAR channel, its cover area in the cross-sectional image perpendicular to the principal axis of the pillar-like feature is ideally circular. If the cross-sectional image was taken at an angle to the principal axis of the pillar-like feature, its cover area is elliptical. If the imaged cover area deviates from the previously known and ideally assumed shape, the cause may be misalignment in a direction perpendicular to the correctable cross-sectional image. In other words, the distance between subsequent cross-sectional images shows a change. Varying the distance between the cross-sectional images in a direction of the virtual image plane can eliminate distortion errors in this direction.
[0051] According to a preferred embodiment, the covered area of the feature is circular or elliptical in shape. These well-defined geometries allow for very accurate determination of deviations from the ideal shape and / or position.
[0052] According to another preferred embodiment, alignment is performed in a direction perpendicular to the image plane of the cross-sectional image, and / or alignment is performed within the image plane of the cross-sectional image. This allows for highly accurate alignment.
[0053] According to a preferred embodiment of the present invention, after image registration, at least the first and second cross-sectional images are combined to form a 3D volumetric image. This 3D volumetric image is a tomographic image.
[0054] According to a second aspect of the invention, the invention relates to a computer program product having program code for performing the methods as described in any of the embodiments above. This code can be written in any possible programming language and can be executed on a computer control system. Such a computer control system may comprise one or more computers or processing systems.
[0055] According to a third aspect of the invention, the invention relates to a semiconductor detection apparatus adapted to perform any of the methods described above.
[0056] According to a preferred embodiment, the semiconductor detection device includes
[0057] Focused ion beam apparatus; and
[0058] A charged particle manipulation device, electronically operated and tuned for imaging new cross-sections of integrated semiconductor samples.
[0059] The focused ion beam and the electron beam are set and operated at an angle to each other, and the beam axis of the focused ion beam intersects with the beam axis of the electron beam.
[0060] Preferably, the beam axis of the focused ion beam and the top surface of the integrated semiconductor sample form an angle of approximately 90° with each other, and the focused ion beam and the electron beam also form an angle of approximately 90° with each other. This geometric setup is one of the standard geometric setups for semiconductor detection devices because the orientation of the cross-sectional image required for image registration is fitted to the geometry of the integrated semiconductor sample, and a 3D volumetric image can be easily determined.
[0061] According to an alternative embodiment, the beam axis of the focused ion beam forms an angle of approximately 25° with the top surface of the integrated semiconductor sample, and the focused ion beam and the electron beam form an angle of approximately 90° with each other. This setup allows the focused ion beam to graze onto the integrated semiconductor sample at an angle β, which allows for higher accuracy when determining the distance between subsequent cross-sectional images using the coefficient sinβ. Other angles (e.g., 30° or 60°) are also possible. Furthermore, the space for the setup of the electronically manipulated charged particle manipulation device becomes larger, which facilitates the overall setup and design of the cross-beam device. In particular, flatter objective lenses can be applied, resulting in a reduced working distance for electron beams that can be, for example, 5 mm or less. The typical working distance of the FIB is then, for example, in the range of 12 mm.
[0062] According to a preferred embodiment, an imaging apparatus for imaging a new cross-section of an integrated semiconductor sample includes at least two detection units positioned at different locations for detecting particles emitted from the new cross-section at different angles. This arrangement can be applied, as described above, to determine the masking feature / 3D topography of the cross-section. Preferably, the detection units are arranged symmetrically about the angle formed with respect to the normal to the surface of the cross-section, and / or the detection units are positioned opposite each other in the scanning direction of the focused ion beam. Preferably, the imaging apparatus includes exactly two or exactly four detection units. Two detectors forming a pair are sufficient to determine the topography of the surface in one direction. Therefore, using four detection units, it is possible to determine the topography of the surface in two preferably orthogonal directions, such as the topography (height, depth) of the xy plane. In principle, the detection units can be of any suitable type. However, it is preferred that at least two detection units forming a pair are of the same type. This facilitates signal processing. The detection units can detect, for example, backscattered electrons or secondary electrons emitted from the surface of the new cross-section.
[0063] According to a fourth aspect of the invention, the invention relates to a method for obtaining a 3D volumetric image of an integrated semiconductor sample, characterized in that...
[0064] Obtain a sequence of N cross-sectional images.
[0065] The sequence for obtaining N cross-sectional images includes subsequently using a focused ion beam to remove the surface layer of the integrated semiconductor sample across its cross-section, making the new cross-section available for imaging, and then using a charged particle imaging device to image the new cross-section of the integrated semiconductor sample.
[0066] Each of the N cross-sectional image planes in the sequence is oriented perpendicular to the z-direction, and the integrated semiconductor sample is configured such that the orientation of a set of L metal lines parallel to at least one metal layer Mk of the integrated semiconductor sample forms an angle with the cross-sectional image plane.
[0067] At least a subset of the sequence of N cross-sectional images contains cross-sectional image segments of L metal lines.
[0068] Extract the position P(x,y;l) of each cross-sectional image segment of the metal lines from l=1 to L.
[0069] The z-direction traversing at least a subset of a sequence of N cross-sectional images forms a trace T(x,y;z;l) at position P(x,y;l).
[0070] The trace T(x,y;z;l) is decomposed into the average common undulation structure TA(x,y;z) and the residual deviation dT(x,y;z;l).
[0071] By employing a common undulating structure TA(x,y;z) to shift a subset of the sequence of N cross-sectional images, the position of at least that subset of the sequence of N cross-sectional images within a 3D volumetric image is corrected.
[0072] According to a preferred embodiment, the extraction of at least one location P(x,y;l) includes at least one of edge extraction, corner localization, or feature localization of the cross-sectional image of the metal line 1.
[0073] According to a preferred embodiment, the extraction of at least one position P(x,y;l) includes centroid or centripetal calculation.
[0074] According to a fifth aspect of the invention, the invention relates to a computer program product having program code for performing the method as described in the fourth aspect of the invention.
[0075] According to a sixth aspect of the invention, the invention relates to a semiconductor detection apparatus adapted to perform any of the methods described in the fourth aspect of the invention.
[0076] The embodiments described above can be combined completely or partially with each other, as long as no technical contradictions occur. This also applies to embodiments illustrating different aspects of the invention. Attached Figure Description
[0077] The invention will be more fully understood by referring to the following figures:
[0078] Figure 1 This is an example diagram of cross-sectional imaging technology.
[0079] Figure 2 These are example illustrations of two images: a cross-sectional image and an intersecting image that crosses a 3D volumetric image.
[0080] Figures 3a to 3c This is an example diagram of a reference point alignment process as described in the prior art.
[0081] Figure 4 This is an example diagram illustrating the alignment results based on reference points, using the example of metal layer M1 and the example of intersecting images.
[0082] Figures 5a to 5d This is an example diagram utilizing feature-based alignment cross-sectional image technology.
[0083] Figure 6 This is an example of a trace of image features traversing a stack of cross-sectional images containing 400 cross-sectional images.
[0084] Figure 7 This is an example diagram illustrating an improvement achieved through a feature-based alignment embodiment, using the example of metal layer M1.
[0085] Figure 8 This is an illustrative diagram illustrating an improvement achieved through embodiments of the present invention, using an example of a gate layer.
[0086] Figure 9 This is an illustrative diagram illustrating the derivation of the improved line edge roughness through embodiments of the present invention.
[0087] Figure 10 This is an example diagram illustrating the slice-to-slice distortion deviation.
[0088] Figures 11a to 11b This is an illustrative diagram of another embodiment of feature-based alignment for cross-sectional imaging (using a cross-section tilted relative to a metal line in at least one metal layer).
[0089] Figure 12 This is an illustrative diagram of another embodiment of feature-based alignment for cross-sectional imaging (using a cross-section tilted relative to the orientation of the HAR channels in a sample (such as a memory device) to reveal a cross-sectional image of the HAR channels).
[0090] Figure 13This is an example of comparing the accuracy of distance determination between a subsequent cross-sectional image perpendicular to the top surface of the integrated semiconductor sample and a subsequent cross-sectional image with the aforementioned oriented tilt.
[0091] Figure 14 This is an example diagram illustrating the shading effect of the imaging VNAND structure.
[0092] Figure 15 The illustration shows the setup used to determine the 3D topography of a surface.
[0093] Figure 16 This is an example of a 3D cross-sectional image.
[0094] Figure 17 This is an example diagram of pillar-shaped HAR channels on a regular hexagonal grid of VNAND memory probes.
[0095] Figure 18 This is an example diagram of alignment based on the shape of the footprint.
[0096] Figure 19 Further illustrative examples Figure 18 Details of alignment based on the shape of the covered area. Detailed Implementation
[0097] Figure 12This diagram illustrates a cross-sectional imaging method for obtaining a 3D volumetric image of an integrated semiconductor sample. Using this cross-sectional method, the acquisition of a three-dimensional (3D) volumetric image is achieved through a “step-by-step and repetitive” process. First, the integrated semiconductor sample is prepared for the subsequent cross-sectional imaging method using methods known in the art. In this document, “cross-sectional image” and “slice” will be used synonymously. Grooves are milled in the top surface of the integrated semiconductor such that the cross-section is substantially perpendicular to the top surface, or a bulk-shaped integrated semiconductor sample 10 is cut and removed from the integrated semiconductor wafer. This process step is sometimes referred to as a “lift-out”. In this step, a thin surface layer or “slice” of material is removed. For simplicity, this description is shown with such a bulk-shaped integrated semiconductor sample 10, but the invention is not limited to the bulk-shaped sample 10. This material slice may be removed in several ways known in the art, including milling or polishing with a focused ion beam at an off-angle, but occasionally closer to normal incidence through the focused ion beam (FIB) 50. For example, the focused ion beam 51 scans along direction x to form a cross-section 52. As a result, a new cross-sectional surface 11 can be used for imaging. In subsequent steps, the newly available cross-sectional surface layer 11 is raster-scanned using a charged particle beam (CPB) (such as a scanning electron microscope (SEM) or a fiducial imager (FIB, not shown)). The imaging system's optical axis can be set parallel to the z-direction or tilted at an angle to the z-direction. CPB systems have been used to image small regions of samples at high resolutions below 2 nm. Secondary electrons and backscattered electrons are collected by a detector (not shown) to reveal the material contrast within the integrated semiconductor sample, which is visible as different gray levels in the cross-sectional image 100. Metallic structures produce brighter measurement results. The surface layer removal and cross-sectional imaging process is repeated across surfaces 53 and 54 and another surface at equal distances, obtaining a sequence of 2D cross-sectional images 1000 traversing the sample at different depths to establish a three-dimensional 3D dataset. Representative cross-sectional images 100 were obtained through measurements using a commercially available Intel processor integrated semiconductor chip employing 14nm technology.
[0098] Using this method, at least the first and second cross-sectional images include subsequent removal of the cross-sectional surface layer of the integrated semiconductor sample using a focused ion beam to make the new cross-section available for imaging, and imaging of this new cross-section of the integrated semiconductor sample using a charged particle beam. From this sequence of 1000 2D cross-sectional images, a 3D image of the integrated semiconductor structure can be reconstructed. The distance dz of the cross-sectional images 100 can be controlled by a FIB milling or polishing process and can be between 1 nm and 10 nm, preferably about 3-5 nm.
[0099] Figure 2Examples of two intersecting xz images of a reconstructed 3D volumetric image or 3D dataset obtained from a sequence of N = 400 image slices or 1000 cross-sectional images acquired in the xy direction are shown, separated by a distance dz in the z direction. For simplicity, only three cross-sectional images 100.1, 100.2, and 100.3 are illustrated. Random stage or SEM drift between the acquisition of N = 400 image slices can cause an artificial increase in the roughness of the line edges in the z direction, which is visible in the metal line 101 extending in the z direction, or can cause a large variation in the width of the metal line 102 oriented perpendicular to the z direction.
[0100] Figures 3a to 3c This example illustrates alignment with a reference point based on existing technology. Figure 3a As illustrated, the marking structure or reference points are formed on the top of the sample in a direction perpendicular to the cross-section before the FIB cutting begins at the intersection. For the marking structure, material 20 is first placed on the top surface 55 of the integrated semiconductor sample. In this material, alignment marks (such as parallel lines 21 and slanted lines 22) are formed by FIB processing. Figure 3b Images showing the general alignment structure of the prior art. After progressive scanning slices and imaging cross-sections 11 along the raster scan line 82, each cross-sectional image 100 also contains a cross-sectional image segment with reference points or alignment marks. Figure 3c The example shown is a representative cross-section 100. The center marker is visible via its cross-sectional image segment 25 and is used to perform lateral alignment in the x and y directions within the slice; however, alignment in the y direction is generally less precise. The distance between the two cross-sectional image segments 27 of the two outer markers 22 is used to calculate the distance dz between each slice.
[0101] Figure 4 This shows the results of reconstructing the M1 layer of an integrated semiconductor sample, resulting in roughness of the remaining circuit edges. (As shown in...) Figure 2 In this context, the image is an xz intersection image derived from a sequence of N=400 image slices or cross-sectional images, each obtained in the xy plane. Figure 4 a) shows the result of the xz intersection image without image slice alignment, while Figure 4 Figure b) shows the results of image alignment based on reference points. Random stage or SEM drift between the acquisition of N=400 image slices can artificially increase the line edge roughness in the z-direction. The improvement by reference point alignment is clearly visible through the reduction of image blur and the reduction of line edge roughness of the gate structure in the gate layer.
[0102] The present invention provides embodiments for fine alignment based on features or structures in integrated semiconductor samples. Figures 5a to 5d This will be explained in the text. For example... Figure 1 The integrated semiconductor sample shown consists of (K+1) metal layers (often referred to as M0, M1, M2…MK, counted from the silicon substrate level to the top of the wafer) and via layers (often referred to as V0, V1, V2) for connecting the metal layers through the columnar structure.
[0103] Figure 5a A simplified example showing two cross-sectional images of an integrated semiconductor sample with metal layers is presented here, with only three metal layers M0, M1, and M2 illustrated for simplicity. Metal layers M0 and M2 contain metal lines 62.1 and 62.2, which are parallel to N cross-sectional images, two of which are illustrated as n and n+1. Metal layer M1 contains metal line 61, which forms a 90° angle with cross-sectional images n and n+1. The coordinate system is chosen to form the subsequent first and second cross-sectional images 110 and 111 in the xy direction and perpendicular to the z direction. Thus, the integrated semiconductor probe is oriented such that at least a plurality of L metal lines are oriented parallel to the z direction and therefore perpendicular to the cross-sectional image plane parallel to the xy plane. Generally, at least a plurality of L metal lines form a predetermined angle with the cross-sectional image plane such that a cross-sectional image segment of each of the L metal lines is formed in at least one sequence of N cross-sectional images. Figures 5a to 5d In one embodiment, the predetermined angle is 90°.
[0104] Figure 5b Examples are given for two cross-sectional images with z-indices n(110) and n+1(111). Generally, cross-sectional images 110 and 111 are oriented in the xy plane, and the sequence of cross-sectional images or slices is stacked or shifted in the z-direction at a distance dz between 1 nm and 7 nm. Since the cross-sectional cuts or slices are performed at a predetermined angle of 90° to the metal lines 61 in layer M1, it is possible to identify the cross-sectional image segment 64 of the corresponding metal line 61 in layer M1 in each slice image. Furthermore, its position P(x,y; l) can be extracted, for example, by the centroid operation or the centroid C(x,y) operation of each cross-sectional image segment of each of the l = 1...L metal lines. In the case where cross-sectional image 110 intersects with the corresponding metal lines 62.1 or 62.2 parallel to cross-sectional images 110 or 111, metal layers M0 and M2 are only visible as cross-sectional image segments 63.
[0105] Figure 5cThis example shows a cross-sectional image of an integrated semiconductor sample with a logic structure. Metal layers (M0-M7) alternating with via layers (V0-V6) are indicated. Below M0, the gate layer GL is visible. The metal and gate layers contain metal traces that are parallel or perpendicular to the cross-sectional image. Because the cross-sectional cuts or slices are performed perpendicular to the metal traces in layers M1, M3, M5…, it is possible to identify the cross-sections of corresponding metal traces in the layers within a larger focus of subsequent cross-sectional images or slices, and the centroid of the metal traces can be calculated. At least a major portion of the metal traces perpendicular to the cross-sectional image (e.g., in M1, M3, M5, or M7) remains unchanged in a large number of subsequent cross-sectional images. Cross-sectional images across the sample show only a few vias; one example is marked with a white circle 65.
[0106] Cross-sectional image segments of vertical metal lines in layers M1, M3, ..., M7 can be extracted through image processing (such as corner or edge detection, threshold setting, or shape manipulation). The position of the detected metal lines can be calculated based on centroid calculation or centroid calculation. Alternatively, the position of the metal lines can be determined, for example, through feature-based registration. Generally, pattern recognition and position detection techniques (also known as feature registration) can employ a comparison between a designed shape and a cross-sectional image segment of the metal line or a reference cross-sectional image segment of the metal line. Feature registration can employ image correlation with, for example, a reference cross-sectional image segment of the metal line, or can be based on, for example, the Euclidean image distance between the cross-sectional image of the metal line and the reference cross-sectional image segment. Those skilled in the art will be able to perform position calculations of the cross-sectional image segments of the metal lines using methods equivalent to those described above.
[0107] exist Figure 5d In the diagram, the boundary lines of the cross-sections of the metal lines are indicated by white dashed lines. The position P(x,y;l) of each metal line is evaluated (indicated by a point) as the centroid within each boundary line. Figure 5d The results of extracting the edge shape or boundary line of the metal lines in layers M1, M3, M5, and M7, as well as their centroid C(x,y;l) (points), are shown. One example is highlighted (the edge shape or boundary line of the metal lines in layer M7 66 and the centroid 67).
[0108] By connecting the centroids of the metal lines from slice to slice, a sequence of traces or cross-sectional images of the centroid T(x,y;z;l) across the z-direction can be generated. Figure 6This displays traces of the centroids of the metal lines in layers M1, M3, and M7 for N = 400 cross-sectional images (z-direction). Two examples, 68 and 69, of several traces T(x,y;z;l) in metal layers M1 and M7 are prominently shown. Since the metal lines are manufactured with high precision, they are expected to be very straight. The traces show some common undulation structures T_x(z) and T_y(z) caused by misalignments that should be corrected. After correcting for misalignments by subtracting T_x(z) and T_y(z), there will still be residual undulation structures for each trace caused by common or average undulation structures TA(x,y;z). This has the random benefit from, for example, statistical errors in centroid determination, and the systematic benefit from, for example, changes in SEM image distortion from slice to slice. The larger common or average undulation structure TA(x,y;z) represents the measurement error caused by stage drift or imaging aberrations and is contained in a 3D dataset of N = 400 cross-sectional images, representing the common shift vector and rotation angle error at each z position. For simplicity, only the shift error is illustrated here, and the rotation error can be considered, for example, by a rotation matrix. By extracting the common undulation components TA(x,y;z) of the traces, for example by statistical evaluation of at least a subset of L traces T(x,y;z;l), the major portion of the xy misalignment of each cross-sectional image slice at position z can be corrected by fine alignment correction and slice registration within the 3D volumetric image dataset.
[0109] The common undulation component TA(x,y;z) is extracted by extracting the xy shift vector (x,y) of each cross-sectional image slice at the exposed position z, based on a statistical evaluation of lateral cross-sectional image shift. This statistical evaluation improves accuracy and reduces errors from a few individual structures or alignment markers (such as reference points). The statistical evaluation includes, for example, averaging, centroid operations, and may consider outliers. Examples include averaging line edges by averaging multiple line edge points, centroid operations, feature-based registration, or statistical averaging of a set of multiple centroid points. To remove artifacts or outliers by comparing feature or structure sets between two consecutive cross-sectional images, image processing algorithms and registration algorithms can be applied.
[0110] It should be mentioned that the metal wiring does not need to traverse the entire measured volume. For example... Figure 6As illustrated, not all metal traces extend through all N cross-sectional images. Gaps in the metal traces (such as in trace 68 of M1) can be identified and bridged, for example, by trace 69 of M7. Generally, gaps can be bridged by other metal traces, making alignment of the entire measured volume possible. Only in the rare case where all metal traces terminate at the same location will the reconstruction fail to correctly align the portions before and after the gaps. However, in these cases, registration is unnecessary. Because one method of the present invention relies on the structure present in the integrated semiconductor sample to be extracted from the cross-sectional image or the original 3D stack, the method of the present invention is called "structure-based" alignment in contrast to the "fiducial-based" alignment of the prior art. Accurate alignment of 2D cross-sectional image slices in a 3D volumetric image is also called registration or image registration.
[0111] A comparison between reference-point-based alignment and structure-based alignment is shown in Figure 2 and Figure 8 middle. Figure 7 Display as shown Figure 4 a) and Figure 4 The same cross section in the xz direction traversing layer M1 is illustrated in b), but shown as a cross section after alignment based on the structure. Figure 8 a) shows the cross-section in the xz direction of the gate layer reconstructed from N=400 cross-sectional images (each obtained in the xy direction) after alignment based on the reference point. Figure 8 b) shows the same cross-section across the gate layer after structure-based alignment. The improvement in line edge roughness reduction caused solely by misalignment or coarse alignment based on reference points is... Figure 7 and Figure 8 It is clearly visible in both images of b), and becomes even more visible in lower layers with finer structures (such as the gate layer).
[0112] This improved quantitative comparison can be achieved by extracting the profile and calculating the standard deviation of the profile from its mean. Figure 9 The example in the image shows that measurements of line edge roughness are extracted from two images. Figure 9 a) shows an example of line segment 91 undergoing reference point-based alignment. Figure 9 Example b) shows the result of structure-based alignment for line segment 92. In the example of reference-point-based alignment, the standard deviation of line edge 91 is 24.26 nm, while... Figure 9In b), using structure-based alignment, the standard deviation of the line edge 92 is reduced to 12.8 nm by a factor of 2. Generally, this standard deviation can be reduced by a factor of 1.5–3 using structure-based alignment. Therefore, the remaining measured line edge roughness is reduced from the artificial misplacements of the residual aberrations or alignment errors of the reference point measurement. In an equivalent manner, the surface roughness value is reduced from the artificial misplacements, and the accuracy of measurements of, for example, the size or dimension of the metal line width or gate size can be improved by a factor of 1.5–3 using feature-based alignment. Another embodiment is illustrated in… Figure 10 After correcting the xy alignment using image registration based on structure-based or feature-based alignment, some residual drift may still exist in the slice-to-slice traces. These drifts may be attributed to drift SEM image distortion. Using the residual shift vector 300 of the centroid (exemplified as 302 in one example), image distortion may be determined by approximation or fitting to some reasonable fundamental functions of image distortion (such as low-order pincushion, annular, shear, or keystone distortion). These fundamental functions can be described by xy vector polynomials. Using the extracted fundamental functions for distortion, each cross-sectional image can be corrected by subtracting the image distortion to obtain slice-to-slice or absolute relative image distortion correction. Distortion correction can be obtained on a slice-to-slice basis, or it can involve two or more image slices to derive the average distortion and residual distortion bias for each individual image slice. Figure 10 An example illustrating the extraction of the distortion field includes a distortion vector 300 around the centroid (one of which is labeled 302). The centroid of the cross section may generate some outliers. Two examples are indicated by number 301. Outliers can be removed, for example, through image comparison or statistical analysis, or suppressed by polynomial fitting of a low-order distortion polynomial. The systematic distortion change in the y-direction from slice n=80 to slice n=81 can be fitted to a reasonable distortion basis function and applied to correct the relative distortion from slice to slice. In this example, the low distortion is dominated by symmetric barrel distortion in the y-direction, where the image field dependence is proportional to y and constant in the x-direction. The maximum relative change in distortion between slice n=80 and slice n=81 is approximately 19 nm. Generally, the typical relative distortion change from image to image can be 0-30 nm. Distortion correction can be performed before, after, or as an integral part of feature-based alignment, where the alignment shift vector TA(x,y;z) or rotation vector is the lowest-order distortion vector for each cross-sectional image at position z.
[0113] Another embodiment of the method is illustrated in Figure 11aIn this embodiment, the integrated semiconductor sample is cut at a predetermined angle. The predetermined angle refers to, for example, the angle between a metal line 71 in layer M0 and the cross-sectional xy plane. This predetermined angle may be, for example, 45°, but other angles (such as 30° or 60°) are also possible. Therefore, cross-sectional images 210 and 211 traversing the metal line 71 in layers M0-M2 form a predetermined angle with the metal line or interconnect, and the position of each metal line in metal layers M0-M2 is determined by the slice distance dz and the predetermined angle of the metal line in that layer of the integrated semiconductor sample, changing in a controlled and equal manner for each slice 210, 211. Metal line 72 extends perpendicularly to metal line 71 and forms a second angle of 90° minus a predetermined angle with the cross-sectional image plane; in this example with a predetermined angle of 45°, this second angle is also 45° (=90°-45°). Metal lines 71 of layers M0 and M2 "move" in bulk to the left from slice 210 to slice 211, while metal line 72 of layer M1 "moves" in bulk to the right. Traces of the metal lines' locations extracted according to any of the methods described above result in clusters of traces traveling from right to left (metal lines in layers M0 and M2 in cross-sections 210 and 211), and traces traveling from left to right (metal lines in layer M1 in 210 and 211). This is illustrated in... Figure 11b Two examples of cross-sectional images 210 and 211 are shown. The slice thickness dz can be derived with high accuracy by changing the relative distance (which changes its position in the relative direction) between cross-sectional image segments 73.1 and 73.2 of metal line 71 in layer M0 or M2 and cross-sectional image segments 74.1 and 74.2 of metal line 72 in layer M1. As explained above, the z-position determination is achieved with high accuracy, similar to alignment based on a reference point, due to the high accuracy obtained using, for example, statistical evaluation of a large number of metal traces and the manufacturing accuracy of the metal lines. From the traces of the detected metal line positions as explained above, the linear displacement of the metal lines according to a predetermined angle and a second angle can be extracted, and the remaining common undulation feature code of the traces can be extracted. This common undulation feature code is used for feature-based alignment as explained above. Therefore, the method of using cross-sectional imaging at a predetermined angle to the metal lines allows for structure-based alignment in the x, y, and z directions to have better accuracy than alignment based entirely on a reference point. Furthermore, in the case of cross-sectional imaging at an angle to the metal line, the regular and predetermined positional changes of the metal line in each cross-sectional image can be separated and isolated from distortion as described above, and the registration of the 2D cross-sectional image in the 3D volumetric image can be obtained with high precision.
[0114] In the above embodiments, the cross-sectional image plane is oriented perpendicular to the top surface 55 of the integrated semiconductor wafer, wherein the normal to the top surface 55 of the wafer is oriented parallel to the y-direction, as shown below. Figure 1As shown in the diagram. This results in a 2D cross-sectional image oriented parallel to the y-direction, or in other words, the cross-sectional image plane includes the y-axis or wafer normal axis, and the slicing direction z is perpendicular to the y-axis or wafer normal axis. In another embodiment of the invention, the intersection angle of the cross-sectional image planes is tilted at a predetermined angle to the wafer normal, and the slicing direction z is not perpendicular, but tilted at a predetermined angle to the y-axis or wafer normal axis. Figure 12 In the example illustrated in section a), the pillar-like HAR structure extending through a significant portion of the sample (such as a memory chip), “such as a channel or channel aperture (one example referred to as number 75)” becomes visible in the cross-sectional image. As in the example above, the HAR channel is oriented at a predetermined angle to the plane of the cross-sectional image, such that the cross-sectional image of the HAR channel becomes visible in the cross-sectional image. The position of the HAR channel can be detected, for example, from its centroid using the image processing method described above. Low-order distortions from imaging can be analyzed and subtracted as described above, and slice-to-slice image shifting can be performed with high precision, thereby obtaining registration of each 2D cross-sectional image slice in the 3D volumetric image with high accuracy. Figure 12 Figure b) shows two examples of two consecutive 2D cross-sectional images with indices n and n+1, where the cross-sectional image segments of the HAR channels are indicated by 77.1 and 77.2. Top boundary surface of the integrated semiconductor structure (see Figure b). Figure 12 Reference number 55 in a) is indicated by reference number 76.
[0115] Figure 13 It compares subsequent cross-sectional images perpendicular to the top surface of the integrated semiconductor sample. Figure 13 a)) and subsequent cross-sectional images with the aforementioned directional tilt ( Figure 13 An example diagram illustrating the precision required to determine the distance between points b) in the diagram. Based on... Figure 13 The geometry of a) is as follows: cross-sectional images are provided in the xy plane, with a distance of ds between them in the z direction. Furthermore, reference points 22 are provided on the top surface of the integrated semiconductor sample in the xz plane. Reference points 22 are not parallel, but are tilted at an angle of 2α to each other, and have distances in the x direction of numerical values x and x-dx, respectively, at the locations of subsequent cross-sectional images. Figure 13 The local plot in a) shows these geometric conditions in more detail. Based on trigonometric functions, the distance ds between subsequent cross-sectional images is as follows:
[0116]
[0117] The distance dx is measured, and the angle α is known in principle, so ds can be calculated. This is known in principle in this field.
[0118] Now, referring to Figure 13 In b), according to the present invention, the cross-sectional image is tilted at an angle β to the top surface (describing the grazing incidence of the focused ion beam onto the top surface of the sample). Nevertheless, the reference point is located at its position on the top surface, at a distance ds in the z-direction. z Given by the following formula
[0119]
[0120] On the other hand, the current tilt distance ds with respect to the z-direction is
[0121] ds=ds z sinβ
[0122] This led to
[0123]
[0124] exist Figure 13 In b), it can be used again with Figure 13 The same precision is used in measuring distance dx as in a). However, any error, including in dx itself or in measuring dx, is now reduced by the coefficient sinβ. This also applies to any determination / accuracy used to measure or provide angle α. Therefore, by means of... Figure 13 In section b), tilting the cross-sectional image improves the overall accuracy of determining the distance between subsequent cross-sectional images. This also applies if vertical structures (e.g., HAR channels) included in the integrated semiconductor sample are used for position determination. Importantly, any position determination using position information from a plane tilted to the sample's principal axis is more accurate than one using position information from a plane parallel to the sample's principal axis.
[0125] Figure 14 This is an example of the masking effect in imaging a VNAND structure. Line C (which is an artifact due to the masking) is visible in the cross-sectional image. The masking occurs due to the presence of different materials. The masking is very pronounced in the case of repetitive structures, i.e., very fine VNAND structures. The intensity of the masking varies depending on the imaging method. If secondary electrons are detected as the imaging signal, the masking effect is stronger compared to a setting where backscattered electrons are detected as the signal. This is because secondary electrons are more sensitive to surface topography and image topography contrast.
[0126] However, when backscattered electrons are detected as a signal for imaging, shading remains a problem because image information is still caused by different depths on the surface. Standard image reconstruction assumes that the cross-sectional image obtained from the backscattered electron signal is flat. However, this is not entirely true. This discrepancy leads to errors in image reconstruction and limits the resolution of 3D images in the virtual (i.e., mathematically reconstructed) image plane.
[0127] Therefore, according to the present invention, the resolution of the 3D image in the virtual image plane is improved by performing masking correction. More specifically, the masking feature code of the new cross-section is determined. Figure 15 The illustration illustrates a corresponding setup for determining the 3D topography of a surface. The imaging device 90 can be, for example, a charged particle device operating electronically. In the illustrated example, the imaging device 90 is a SEM. The SEM 90 uses a focused ion beam to image the surface 93 of a new cross-section resulting from a subtractive integrated semiconductor sample. The surface 93 is not flat but has undulations with maximum and minimum values. In the illustrated example, the scanning direction of the SEM 90 is the x-direction. Two detection units 95, 96 forming a pair of detection units are provided to detect backscattered electrons as signals. However, secondary electrons emitted from the surface 93 may also be imaged, or additionally. The geometry of the detection units 95, 96 is such that they detect signals / particles emitted from the surface 93 at different angles. However, in the illustrated embodiment, the setup of the two detection units 95, 96 is symmetrical about the point or region currently being imaged: the angle with the normal to the surface 93 (equivalent in this case to the direction of the electron beam axis) is + / -δ, and the detection units 95, 96 are provided on the same line x (in other words, in the scanning direction x). However, other angles and positions are also possible.
[0128] When using the SEM 90 imaging maximum value 94, the signal intensities received by detection units 95 and 96 from particles emitted from the same location differ slightly due to occlusion effects caused by the topography. For example, when a particle is emitted from position x1, detection unit 95 receives a slightly stronger signal than detection unit 96. Similarly, when a particle is detected from position x2, the detection signal from detection unit 96 is slightly stronger than the detection signal from detection unit 95. This difference in signal intensity can be easily analyzed in the differential signals from the two detection units 95 and 96. Therefore, the 3D topography of surface 93 can be determined, for example, by progressively scanning surface 93. Thus, the occlusion feature code of surface 93 can be determined and used for the reconstruction of the cross-sectional image. The obtained cross-sectional image is itself a 3D image. Figure 16 An example is depicted in the text. Figure 16The cross-sectional image exhibits an undulating 3D structure. Quantitative 3D information can be used to reconstruct the 3D volumetric image from the overall 3D image with improved accuracy. Alternatively, quantitative 3D information can be used to control the feedback loop of the focused ion beam while removing the next cross-sectional surface layer of an integrated semiconductor sample.
[0129] Figure 17 This is an example diagram of a pillar-like structure on a regular hexagonal lattice in a VNAND memory probe. The VNAND memory sample is composed of many pillar-like structures that travel parallel to each other. In this embodiment of the invention, the sample is cut parallel to... Figure 18 The illustration shows a slice of the "pillar". The image plane of this illustration is perpendicular to the slice and includes the pillar coverage area, shown as a framed region. The actual shape of the coverage area is expected to be close to a circle. The centroid of the coverage area is expected to form a regular (e.g., hexagonal) grid. Inaccuracies in determining the slice position along the direction perpendicular to the slice, and / or deviations from the nominal slice thickness, cause the image scale to drift along this direction. As a result, the pillar cross-section appears distorted (see the left side of the illustration), and its centroid no longer forms a regular grid.
[0130] According to embodiments of the present invention, it is proposed to adjust the position / thickness of individual slices to minimize the aforementioned distortion, thereby allowing the study of the actual geometry of individual pillars. The idea behind this method is to use data, for example, from design data or other considerations (such as symmetry), regarding the actual shape and the spatial layout of the available pillar coverage area. For example, it is sufficient to assume that the actual pillar cross-section is essentially a perfect circle of its centroid forming a regular hexagonal grid (a common design for VNAND chips), as explained above. Then, the position / thickness of the individual slices is adjusted until the pillar coverage area matches... Figure 18 The right-hand side shows the assumed geometry (circles on a regular grid). Any other more complex pillar cover shape and / or spatial distribution of the cover centroid can be assumed. Furthermore, the concepts described can also be applied to structures other than VNAND structures, and the cross-sectional shape of the structure is not necessarily circular or elliptical.
[0131] Because actual probes may deviate from the design or assumptions about feature shapes may be imprecise, the reconstructed strut cross-sections obtained after slice position adjustments may still deviate from reality. However, in most cases, deviations from the design are expected to be fairly localized (defects!). For example, a strut might have a shape or radius that deviates from that of its neighboring struts. Furthermore, its centroid might be offset relative to a corresponding position on a regular grid of other centroids. Such localized deviations or defects will be retained after the illustrated slice position adjustments and can therefore be investigated. In fact, the adjusted position of each slice is affected by all strut cross-sections that the slice "contacts." The effect of a single strut cross-section on the adjusted slice position is expected to be relatively small. That is, the proposed adjustments allow for the search for localized defects while significantly reducing image distortion due to incorrect slice position determination.
[0132] Generally, data from any chip containing features of spatial distribution in cross-sections (or multiple cross-sections) perpendicular to the actual slice can be processed using the proposed method. VNAND memory chip layouts are only used as examples with relatively simple feature coverage areas.
[0133] The method described can also be extended to cases where the slice / cross-sectional image is affected by a small lateral offset. That is, the slice can also be adjusted in a direction parallel to the slice plane (cross-sectional image plane), which can further improve the lateral alignment.
[0134] Figure 19 Further illustrative examples Figure 18 The alignment details are based on the shape of the covered area. The position of individual slices S along the X direction is adjusted based on a reference image containing the cross-section of the pillar with the expected shape, and the expected spatial grid points (it should be noted that...). Figure 19 The X direction in this diagram is not the same as the X direction (z direction) in other diagrams; it is a slightly different term chosen for ease of understanding of the following content.
[0135] A specific example of the workflow for adjusting the proposed slice position is as follows: Available information about the actual shape of the pillar coverage area (e.g., a circle) and its spatial distribution (e.g., a regular grid) is used to construct a "reference image" R in a plane perpendicular to the expected pillar (and perpendicular to the actual slice) without any distortion. An example of such a reference image is shown below. Figure 19In this image, the cross-section of each individual slice is a 1D line along the Y direction, labeled S. Slice S needs to be adjusted along the X direction to match the reference image R, which consists of perfect circles (shown in gray) located at perfect grid points. The reference image and all individual slices are binarized such that all pixels belonging to the strut coverage area are set to 1, and all other pixels are set to 0. The pixel size in the reference image R is set to equal the pixel size in the individual slice S. Pixel indices i and k are introduced along the X and Y directions respectively, thus the reference image can be represented as a 2D matrix R. (i,k) =R(x) i ,y k Individual slice cross-sections S can be represented as 1D vectors S. k =S(y k The goal of this method is to find the x-axis at the best matching reference image R for slice S. i (see Figure 19 To do this, a certain range of possible X positions can be tested around the nominal position of slice S. For each x position outside this range... i Calculate the evaluation function M(x) i The value of ) is used to depict slice S at position x. i The goodness-of-match characteristic of the reference image R:
[0136]
[0137] Alternatively, other evaluation functions can be specified.
[0138] If the range of the tested X positions is not too large (i.e., the uncertainty in determining the initial slice position is not too high), then M will be at some position x that can be used as the last position of an individual slice S. 经调整 The unique minimum value is reached at this point. The described process is repeatable so that each individual slice S obtains the final aligned (adjusted) 3D stack.
[0139] The superior alignment accuracy of the embodiments of the invention becomes apparent when considering several advantages of the embodiments. First, the metal lines, gates, vias, and HAR channels all proceed in a known plane and at known angles of 90° to each other, and are manufactured using a far more sophisticated manufacturing technique than any reference point marking can produce. Semiconductor manufacturing techniques (such as immersion lithography, metal deposition or ion implantation, directional RIE etching, and polishing for integrated circuits) will soon be adapted to critical dimensions of a few nm (e.g., 7 nm, 5 nm, or 3 nm), resulting in general patterning or overlay accuracy of less than 2 nm or even less than 1 nm for the lowest and finest layers (such as the gate layer) and lower metal layers (such as MO). Generally, the overlay accuracy of the metal lines is better than the shortest metal line dimension by a factor of 1 / 3, so the overlay accuracy of the lower metal layers and gate layers is on the order of 1 nm or less. Therefore, the positioning accuracy or placement and size of gate or metal lines are far superior to those of typical reference points generated by coarse FIB-assisted deposition processes, where the FIB beam diameter is on the order of 20 nm and the FIB scan positioning accuracy is above 3-5 nm. Thus, metal lines in recently integrated semiconductor samples with a minimum feature size (CD) of a few nm (e.g., 5 or 3 nm) allow feature-based alignment, which is at least a factor of 3 better than prior art reference point-based alignment. As a result, position operations (such as centroid operations for metal lines or gates) lead to much higher accuracy, and the displacement of the cross-sectional image can be determined much more accurately than the position of the reference point. Metal lines are extracted using image processing techniques, incorporating image distortion assessment and subtraction as needed, resulting in improved accuracy alignment of the cross-sectional image via feature-based or structure-based registration.
[0140] Secondly, the positions of metal lines, vias, HAR channels, or gates are derived from the cross-sectional image, for example, from the contour lines. For instance, the calculation of the centroid of a single common feature in two subsequent slices involves statistical averaging, thus being more stable against, for example, image noise, and thereby improving the alignment accuracy of the two image slices. Thirdly, the generally large number L of metal lines (e.g., 2, 5, 10, or up to 100 lines) further improves the statistics of position determination for image registration and alignment purposes. The derivation of line edge roughness can be improved, easily achieving a factor of 2-3. Since defects are rare, the overall quality of alignment methods using many structures simultaneously is not affected. Therefore, the statistical evaluation of feature-based alignment demonstrates an improvement of at least 1.5 times over existing reference-point-based alignment techniques.
[0141] In addition, outliers can be detected through statistical evaluation.
[0142] In another embodiment, or in addition to those described above, the integrated semiconductor structure is a previously known structure. Design data or 3D computer-aided design (CAD) data can be used to improve edge extraction, location extraction, and image registration of metal lines and HAR channels. For example, CAD data can be used to identify locations that are ends of metal lines and should therefore no longer be visible in cross-sectional images. This reduces outliers in the image processing method. Furthermore, defect candidates can be detected as outliers from statistical evaluation.
[0143] In another embodiment, structural or feature-based alignment is combined with reference point-based alignment. Integrated semiconductor samples may include highly repetitive features (such as gates in a gate layer), which may lead to ambiguity in image registration. Generally, coarse registration using reference points formed on top of the integrated semiconductor sample can reduce ambiguity and improve the speed of fine image registration through feature-based or structural-based alignment according to any embodiment of the invention.
[0144] Image processing methods as described above (such as corner or edge detection, threshold setting, or morphological manipulation, or similar operations) are known in the art. Recently, image processing has been improved through increased computational speed, for example, by using computer clusters containing hundreds of processors. Image processing methods for extracting features or structures from integrated semiconductor samples may also involve or be replaced by machine learning algorithms.
[0145] The embodiments described above are merely illustrative. Although the embodiments are illustrated as probes in the example of semiconductor structures, the method may also be applied to materials or probes of comparable structures that allow for accurate image registration. Variations, modifications, alterations, and combinations may be made by those skilled in the art with respect to particular embodiments without departing from the scope defined by the appended claims.
[0146] Symbol Explanation
[0147] Numbers: Project
[0148] 10: Sample
[0149] 11: Cross-sectional surface
[0150] 20: Surface Deposition Materials
[0151] 21: First reference point mark
[0152] 22: Second reference point mark
[0153] 25: Cross-sectional image segment marked by the first reference point
[0154] 27: Cross-sectional image segment marked by the second reference point
[0155] 50: FIB column
[0156] 51: Focused Ion Particle Beam
[0157] 52: First cross-sectional surface
[0158] 53: Second cross-sectional surface
[0159] 54: Third cross-sectional surface
[0160] 55: Top surface of the sample
[0161] 61: The first metal line extending in the z-direction
[0162] 62.1, 62.2: Second metal lines extending in the x-direction
[0163] 63: Cross-section of the second metal circuit
[0164] 64: Cross-section of the first metal circuit
[0165] 65: Cross-section of the via
[0166] 66: Boundary line of a cross-sectional image segment of a metal circuit.
[0167] 67: Centroid of a cross-sectional image segment of a metallic circuit
[0168] 68: Traces of the centroid of a cross-sectional image segment of a metal circuit traversing layer M1 in the z-direction. 69: Traces of the centroid of a cross-sectional image segment of a metal circuit traversing layer M7 in the z-direction.
[0169] 71: A first metal line extending in a direction forming a predetermined angle with the z-direction perpendicular to the cross-sectional image.
[0170] 72: A second metal line extending in a direction forming a second angle with the z-direction perpendicular to the cross-sectional image.
[0171] 73.1, 73.2: Cross-sectional image segments of the first metal line 71
[0172] 74.1, 74.2: Cross-sectional image segments of the second metal line 72
[0173] 75: HAR channel or metal line perpendicular to the top surface 55
[0174] 77.1, 77.2: Cross-sectional image of HAR channels or metal lines perpendicular to the top surface. Segment 91: Line edge of metal line after alignment based on reference points.
[0175] 92: Line edges of metal lines after feature-based alignment
[0176] 93: Undulated surface of cross-section
[0177] 94: Maximum value in morphology
[0178] 95: First Detection Unit
[0179] 96: Second Detection Unit
[0180] 100, 100.1, 100.2, 100.3: Cross-sectional images
[0181] 101: Metallic circuit extending in the z-direction
[0182] 102: Metallic lines extending in the x-direction
[0183] 110: First cross-sectional image
[0184] 111: Second cross-sectional image
[0185] 210: First cross-sectional image
[0186] 211: Second cross-sectional image
[0187] 300: Image distortion vector
[0188] 301: Outliers in the image distortion vector
[0189] 302: Centroid of a cross-sectional image segment of a metallic circuit in a cross-sectional image.
[0190] 1000: A sequence of cross-sectional images
[0191] ±δ: Angle between the surface normal and the detection unit
Claims
1. A method for obtaining a 3D volumetric image of an integrated semiconductor sample by alignment based on features of the integrated semiconductor sample, characterized in that: Obtain at least a first cross-sectional image and a second cross-sectional image, wherein the second cross-sectional image is parallel to the first cross-sectional image. Obtaining the first and second cross-sectional images involves subsequently removing the surface layer of the cross-section of the integrated semiconductor sample using a focused ion beam to create a new cross-section available for imaging, and then imaging this new cross-section of the integrated semiconductor sample using an imaging device. Feature-based alignment of the at least first cross-sectional image and the second cross-sectional image is obtained by image registration of each of the at least first cross-sectional image and the second cross-sectional image. The image registration is performed based on at least one common feature of the integrated semiconductor sample in at least the first cross-sectional image and the second cross-sectional image. Wherein, the at least one common feature includes at least one of a metal line, a via, a HAR structure, a HAR channel, or a gate structure, and The method includes providing a reference point-based alignment of the at least first cross-sectional image and the second cross-sectional image by measuring and evaluating the position of the alignment markers prior to the feature-based alignment.
2. The method as described in claim 1, wherein, Image registration is performed based on two or more common features.
3. The method as described in claim 1 or 2, wherein, This image registration includes statistical evaluation.
4. The method of claim 3, wherein, The statistical evaluation includes at least one of centroid calculation, feature detection, or statistical averaging.
5. The method as described in claim 1 or 2, wherein, Imaging of the new cross-section of the integrated semiconductor sample was performed using one of a charged particle device, an atomic force microscope, or an optical microscope.
6. The method of claim 5, wherein, Imaging of the new cross-section of the integrated semiconductor sample was performed using an electronically operated charged particle device, wherein the focused ion beam and the electron beam were set and operated at an angle to each other, and the beam axis of the focused ion beam intersected the beam axis of the electron beam.
7. The method as described in claim 1 or 2, wherein, The at least first cross-sectional image and the second cross-sectional image are formed perpendicular to the top surface of the integrated semiconductor sample.
8. The method of claim 7, wherein, The at least first cross-sectional image and the second cross-sectional image are formed perpendicular to at least one metal layer of the integrated semiconductor sample, forming metal lines or gates.
9. The method of claim 7, wherein, The at least first cross-sectional image and the second cross-sectional image are formed at an angle that is 90° away from the metal lines or gates of at least one metal layer of the integrated semiconductor sample.
10. The method of claim 7, wherein, The at least first cross-sectional image and the second cross-sectional image are formed at an angle that is 90° away from all metal lines or all gates of at least one metal layer of the integrated semiconductor sample.
11. The method as claimed in claim 1 or 2, wherein, The at least first cross-sectional image and the second cross-sectional image are formed at an angle relative to the top surface of the integrated semiconductor sample to reveal a cross-sectional image of at least one HAR channel perpendicular to the top surface of the integrated semiconductor sample.
12. The method as claimed in claim 1 or 2, wherein, The at least first cross-sectional image and the second cross-sectional image are formed at an angle relative to the top surface of the integrated semiconductor sample, and the distance between the at least first cross-sectional image and the second cross-sectional image is determined based on the position of a reference point provided on the top surface.
13. The method as claimed in claim 1 or 2, wherein, The at least first cross-sectional image and the second cross-sectional image are formed at an angle relative to the top surface of the integrated semiconductor sample, and wherein the distance between the at least first cross-sectional image and the second cross-sectional image is determined based on the position of a feature provided by the top surface perpendicular to the integrated semiconductor sample.
14. The method as claimed in claim 1 or 2, wherein, The at least first cross-sectional image and the second cross-sectional image are formed at an angle relative to the top surface of the integrated semiconductor sample, and wherein the distance between the at least first cross-sectional image and the second cross-sectional image is determined based on the position of the HAR channel provided by the top surface perpendicular to the integrated semiconductor sample.
15. The method as claimed in claim 1 or 2, wherein, Image alignment includes subtracting the image distortion bias between the at least first cross-sectional image and the second cross-sectional image.
16. The method of claim 15, wherein, Subtracting the image distortion bias includes an approximation of the image distortion bias using the underlying distortion function.
17. The method of claim 1 or 2, comprising the following steps: Determine the shading feature code of the new cross-section; and The veil feature code is used to represent the cross-sectional image as a 3D cross-sectional image.
18. The method of claim 1 or 2, comprising the following steps: Determine the masking feature code of the new cross-section; and The determined masking feature code is used in the feedback loop used to control the focused ion beam while removing the surface layer of the next cross section of the integrated semiconductor sample.
19. The method of claim 1 or 2, comprising aligning at least a first cross-sectional image and a second cross-sectional image based on a predetermined coverage area shape and / or a predetermined spatial distribution of the features in the cross-sectional image.
20. The method of claim 19, wherein, The covered area of the feature is circular or elliptical in shape.
21. The method of claim 19, wherein, The alignment is performed in a direction perpendicular to the image plane of the cross-sectional image, and / or the alignment is performed within the image plane of the cross-sectional image.
22. The method as claimed in claim 1 or 2, wherein, After image registration, the at least first cross-sectional image and the second cross-sectional image are combined to form a 3D volumetric image.
23. A computer program product having program code for performing the method as described in any one of claims 1 to 22.
24. A semiconductor testing apparatus, comprising the computer program product as described in claim 23.
25. The semiconductor detection apparatus of claim 24, comprising: Focused ion beam apparatus; and A charged particle manipulation device, which is electronically operated and tuned for imaging a new cross-section of the integrated semiconductor sample. in, The focused ion beam and the electron beam are set and operated at an angle to each other, and the beam axis of the focused ion beam intersects with the beam axis of the electron beam.
26. The semiconductor detection apparatus as described in claim 24, in, The beam axis of the focused ion beam and the top surface of the integrated semiconductor sample form a 90° angle with each other, and The focused ion beam and the electron beam form a 90° angle with each other.
27. The semiconductor detection apparatus as described in claim 24, in, The beam axis of the focused ion beam and the top surface of the integrated semiconductor sample form a 25° angle with each other, and The focused ion beam and the electron beam form a 90° angle with each other.
28. The semiconductor detection apparatus as claimed in claim 24, wherein, The imaging device for imaging a new cross-section of the integrated semiconductor sample includes at least two detection units located at different positions for detecting particles emitted from the new cross-section at different angles.
29. A method for obtaining a 3D volumetric image of an integrated semiconductor sample, characterized in that: Obtain a sequence of N cross-sectional images. The sequence of obtaining N cross-sectional images includes subsequently removing the surface layer of the cross-section of the integrated semiconductor sample using a focused ion beam to make the new cross-section usable for imaging, and imaging the new cross-section of the integrated semiconductor sample using a charged particle imaging device. In this sequence of N cross-sectional images, each of the cross-sectional image planes is oriented perpendicular to the z-direction, and the integrated semiconductor sample is configured such that the orientation of a set of L metal lines parallel to at least one metal layer Mk of the integrated semiconductor sample forms an angle with the cross-sectional image plane. Wherein, at least a subset of the sequence of N cross-sectional images contains cross-sectional image segments of the L metal lines. Extract the position P(x,y;l) of each of the cross-sectional image segments of the metal lines from l=1 to L. The z-direction traversing at least a subset of a sequence of N cross-sectional images forms the trace T(x,y;z;l) at the position P(x,y;l). The trace T(x,y;z;l) is decomposed into an average common fluctuation structure TA(x,y;z) and a residual deviation dT(x,y;z;l). By shifting a subset of the sequence of N cross-sectional images using the common undulation structure TA(x,y;z), the position of at least one subset of the sequence of N cross-sectional images within the 3D volumetric image is corrected.
30. The method of claim 29, wherein, Extraction of at least one location P(x,y;l) includes at least one of edge extraction, corner localization, or feature localization of a cross-sectional image of the metal line l.
31. The method of claim 30, wherein, Extraction of at least one position P(x,y;l) involves centroid or centripetal operation.
32. A computer program product having program code for performing the method as described in any one of claims 29 to 31.
33. A semiconductor testing apparatus, comprising the computer program product as described in claim 32.
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