Method for manufacturing a display device

Abstract

A method for manufacturing a display device includes providing a panel substrate including a panel area, a peripheral area at least partially surrounding the panel area, and a dummy pattern disposed at a boundary between the panel area and the peripheral area. A protective member is disposed on the panel substrate. A first processing line overlaps a first contour line of the panel area extending from a first point of a contour line of the panel area. A second processing line overlaps a second contour line of the panel area extending from the first point in a different direction from the first contour line. The protective member is partially cut along the first processing line. The protective member is completely cut along the second processing line. The dummy pattern overlaps the first point.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2020-0091546, filed on July 23, 2020, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to display devices, and more specifically, to panel substrates and methods for manufacturing display devices including panel substrates. Background Technology

[0004] Various display devices have been developed for use in multimedia devices such as televisions, mobile phones, tablet computers, navigation units, and game consoles. These display devices include various functional components such as display panels, input sensors, windows, and optical films.

[0005] Functional components that have undergone manufacturing or processing are coupled to each other. Display devices with a stacked structure are manufactured through multiple coupling processes. Summary of the Invention

[0006] A method for manufacturing a display device includes: providing a panel substrate, the panel substrate including a panel region, a peripheral region at least partially surrounding the panel region, and a dummy pattern disposed at a boundary between the panel region and the peripheral region; disposing a protective member on the panel substrate; the protective member including a first processing line and a second processing line; the first processing line overlapping a first profile line of the panel region extending from a first point of the panel region's outline; the second processing line overlapping a second profile line of the panel region extending from the first point in a direction different from the first profile line; partially cutting the protective member along the first processing line; and completely cutting the protective member along the second processing line. When viewed in a plane, the dummy pattern overlaps with the first point.

[0007] A method for manufacturing a display device includes: providing a substrate comprising a panel region and a peripheral region surrounding the panel region; forming a pixel layer on the panel region; forming a dummy pattern at the boundary between the panel region and the peripheral region; disposing a protective member on the panel region and the peripheral region; and irradiating the protective member with a laser beam to overlap it with the outline of the panel region.

[0008] The panel substrate includes a panel area thereon and a base substrate that at least partially surrounds a peripheral region of the panel area. A pixel layer is disposed on the panel area. A thin-film encapsulation layer is disposed on the pixel layer. A dummy pattern is disposed on the base substrate, and when viewed in a plane, the dummy pattern overlaps with the boundary between the panel area and the peripheral region.

[0009] A method for manufacturing a display device includes: forming a dummy pattern on a panel substrate; cutting the panel substrate to a partial thickness from a first point along a first processing line; and cutting the panel substrate to its full thickness from the first point along a second processing line. Attached Figure Description

[0010] The accompanying drawings are included to provide a further understanding of the inventive concept, and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the inventive concept and, together with the description, serve to explain the principles of the inventive concept. In the drawings:

[0011] Figure 1 This is a perspective view showing a panel substrate and a protective member disposed on the panel substrate, according to an exemplary embodiment of the present invention.

[0012] Figure 2 It is shown Figure 1 A plan view of the panel substrate;

[0013] Figure 3 It is shown Figure 2 An enlarged plan view of one of the multiple unit regions in the diagram;

[0014] Figure 4 It is shown Figure 3 A plan view of the outline of the virtual patterns and panel areas in the diagram;

[0015] Figure 5 It is along Figure 3 A cross-sectional view taken from line I-I';

[0016] Figure 6 It is along Figure 3 A cross-sectional view taken from line II-II';

[0017] Figure 7 It is shown Figure 1 A plan view of the protective components;

[0018] Figure 8 It is shown Figure 7 An enlarged view of one of the processing lines;

[0019] Figure 9 It is along Figure 8A cross-sectional view taken from line III-III';

[0020] Figure 10 This is a flowchart illustrating a method for manufacturing a display device according to an exemplary embodiment of the present invention;

[0021] Figures 11 to 16 This is an explanation Figure 10 A view of each of the multiple steps described in the document; and

[0022] Figures 17 to 18 This is a view illustrating a method of manufacturing a display device according to an exemplary embodiment of the present invention. Detailed Implementation

[0023] In this specification, it will also be understood that when a component (or region, layer, portion) is referred to as being "on" another component, "connected to" or "coupled to" another component, the component may be directly disposed on / directly connected to / directly coupled to the other component, or there may be an intermediate third component.

[0024] Throughout the specification and accompanying drawings, the same reference numerals may indicate the same elements. Furthermore, in the drawings, the thickness, proportions, and dimensions of components may be exaggerated for clarity.

[0025] The term “and / or” includes any and all combinations of one or more of the related listed items.

[0026] It will be understood that although terms such as “first” and “second” are used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one component from other components. For example, an element referred to as a first element in one embodiment may be referred to as a second element in another embodiment without departing from the scope of this disclosure. Unless otherwise stated, singular terms may include plural forms.

[0027] The meaning of "includes" or "contains" is to list attributes, fixed numbers, steps, operations, elements, components, or combinations thereof, but does not exclude other attributes, fixed numbers, steps, operations, elements, components, or combinations thereof.

[0028] In the following, embodiments of the inventive concept will be described in detail with reference to the accompanying drawings.

[0029] Figure 1 This is a perspective view showing a panel substrate and a protective member disposed on the panel substrate, according to an exemplary embodiment of the present invention.

[0030] Reference Figure 1The panel substrate PS can include multiple display panels DP for displaying images (see...). Figure 3 Display panel DP (see) Figure 3 They can be separated from each other by cutting the panel substrate PS.

[0031] The panel substrate PS may include two sides extending in the first direction DR1 and two sides intersecting the first direction DR1. When viewed in a plane (i.e., in a plan view), the panel substrate PS may have a rectangular shape. In this specification, the feature "when viewed in a plane" refers to the view when viewed in a third direction DR3, which is perpendicular to the plane defined by the first direction DR1 and the second direction DR2.

[0032] A protective component PP can be disposed on the panel substrate PS. The protective component PP protects the display panel of the panel substrate PS. When viewed in a flat surface, multiple processing lines PRL can be defined on the protective component PP. The processing lines PRL can be paths irradiated by a laser beam during the peeling step described later.

[0033] When viewed on a flat surface, the protective component PP can have the same area as the panel substrate PS. However, embodiments of the present invention are not limited to this. The protective component PP can have an area smaller than that of the panel substrate PS. The protective component PP can be large enough to cover the area of ​​the display panel of the panel substrate PS.

[0034] Figure 2 It is shown Figure 1 A plan view of the panel base.

[0035] Reference Figure 2 The panel substrate PS may include multiple unit regions CA. Unit regions CA may be arranged in a first direction DR1 and a second direction DR2. Unit regions CA may be divided by cutting lines defined in the panel substrate PS. After performing the peeling steps described later, the unit regions CA may be cut along the cutting lines, and the unit regions CA may be separated from each other.

[0036] For example, the cutting line may include a first cutting line CL1 and a second cutting line CL2. The first cutting line CL1 may extend in a first direction DR1. The second cutting line CL2 may extend in a second direction DR2. The first cutting line CL1 and the second cutting line CL2 may intersect each other.

[0037] Despite Figure 2 The panel substrate PS is divided into nine unit regions CA, but this is illustrative and embodiments of the inventive concept are not necessarily limited thereto. For example, the panel substrate PS may be divided into more than nine unit regions CA or fewer than nine unit regions CA.

[0038] Each unit region CA may include a panel region PA and a peripheral region BA. The panel region PA may be located at the center of the unit region CA. When viewed in a plane, the panel region PA may have a generally rectangular shape. The peripheral region BA may at least partially surround the panel region PA. For example, the peripheral region BA may completely surround the panel region PA.

[0039] Figure 3 It is shown Figure 2 An enlarged plan view of one of the multiple cell regions in the diagram.

[0040] Reference Figure 3 The display panel DP can be set in the panel area PA. The display panel DP can be formed by removing a portion of the panel area PA through a scribing process.

[0041] When viewed on a plane, the panel area PA may include a first area AE1 and a second area AE2. The first area AE1 and the second area AE2 may be arranged in a first direction DR1.

[0042] The first region AE1 may include a display area DA and a non-display area NDA. The display area DA may be an area on which pixels PX are disposed, which will be described later as the display panel DP. The display area DA may be the central portion of the first region AE1.

[0043] The non-display area NDA can be a region on which no pixel PX is set. In the first region AE1, the non-display area NDA can be a region that at least partially surrounds the display area DA.

[0044] The display panel (DP) may include a driver circuit (GDC), multiple signal lines (SGL), multiple pixels (PX), and multiple signal pads (PD). Pixels (PX) can be set on the display area (DA) to generate images.

[0045] The drive circuit GDC can be located in the non-display area NDA of the first region AE1. The drive circuit GDC may include a scan drive circuit. The scan drive circuit can generate multiple scan signals and can sequentially output the scan signals to multiple scan lines SL, which will be described later.

[0046] The scan drive circuit may include multiple thin-film transistors manufactured using the same process as the drive circuit (e.g., low-temperature polycrystalline silicon (LTPS) process).

[0047] Signal lines SGL can be set in the first region AE1. For example, signal lines SGL may include scan line SL, data line DL, power line PL, and control signal line CSL.

[0048] Each scan line SL can extend along the second direction DR2. Each scan line SL can be connected to the corresponding pixel PX. Each data line EL can extend along the first direction DR1. Each data line EL can be connected to the corresponding pixel PX. The power line PL is connected to the pixel PX. The control signal line CSL provides control signals to the scan drive circuit.

[0049] Signal pads (PDs) can be set on the second area AE2. Each signal pad (PD) can be electrically connected to the corresponding signal line (SGL).

[0050] For example, each data line DL can extend from the first area AE1 to the second area AE2. Each data line DL can be connected to the corresponding signal pad PD. Similarly, each power line PL and control signal line CSL can extend from the first area AE1 to the second area AE2. Each power line PL and control signal line CSL can be connected to the corresponding signal pad PD.

[0051] Figure 4 It is shown Figure 3 A plan view of the virtual patterns and outlines in the panel area. For ease of description, in Figure 4 Other components, except for the dummy pattern DU and outline OUL of the panel area PA, are omitted. However, it can be understood that these components are still actually part of the panel area PA.

[0052] Reference Figure 4 The outline OUL of the panel area PA can define the boundary between the panel area PA and the peripheral area BA. The outline OUL can include a first outline OUL1 and a second outline OUL2. Figure 4 In the diagram, the first outline OUL1 is shown by a dashed line, and the second outline OUL2 is shown by alternating long dashes and two short dashes to distinguish the first outline OUL1 and the second outline OUL2 from each other.

[0053] The first outline OUL1 may include a first section SE1 extending from a first point PO1 in a first direction DR1, a second section SE2 extending from one end of the first section SE1 in a second direction DR2, and a third section SE3 extending from one end of the second section SE2 in the first direction DR1. The first point PO1 may define the panel area PA and the second area AE2 (see...). Figure 3 Adjacent vertices. When viewed in a plane, the first outline OUL1 may have a rectangular shape with an opening at the bottom.

[0054] The second contour line OUL2 can extend from the first point PO1 in the second direction DR2. The second contour line OUL2 can intersect the first contour line OUL1 at the second point PO2, which is defined as one end of the third segment SE3. The second point PO2 can be spaced apart from the first point PO1 in the second direction DR2 to define the vertex of the panel area PA adjacent to the second area AE2.

[0055] The first outline OUL1 and the second outline OUL2 may intersect at the first point PO1 and the second point PO2. However, the inventive concept is not limited to the above-described shape of each of the first outline OUL1 and the second outline OUL2. The shape of each of the first outline OUL1 and the second outline OUL2 may be varied depending on the shape of the display panel DP.

[0056] According to an embodiment of the present invention, the dummy pattern DU may include a first dummy pattern DU1 and a second dummy pattern DU2. The first dummy pattern DU1 may be disposed at a first point PO1. When viewed on a plane, the first dummy pattern DU1 may be aligned with the second region AE2 of the panel region PA (see [reference]). Figure 3 The portion of the outer region BA adjacent to the first point PO1 overlaps with the portion of the outer region BA adjacent to the first point PO1.

[0057] When viewed on a flat surface, the first dummy pattern DU1 may have a rectangular shape. However, the inventive concept is not limited to this. For example, the shape of the first dummy pattern DU1 may be changed.

[0058] The second dummy pattern DU2 can be set at the second point PO2. The second dummy pattern DU2 can be spaced apart from the first dummy pattern DU1 in the second direction DR2. When viewed in a plane, the second dummy pattern DU2 can be aligned with the second region AE2 (see...). Figure 3 The portion of the region adjacent to the second point PO2 and the portion of the outer region BA adjacent to the second point PO2 overlap.

[0059] When viewed on a flat surface, the second dummy pattern DU2 may have a rectangular shape. However, the inventive concept is not limited to the shape of the second dummy pattern DU2.

[0060] Figure 5 It is along Figure 3 The cross-sectional view taken from line I-I'.

[0061] Reference Figures 3 to 5 When viewed in cross-section, the panel area PA may include a substrate BS, a pixel layer PXL, a thin-film encapsulation layer TFE, and signal pads PD.

[0062] According to embodiments of the present invention, the substrate BS can be a rigid substrate that is not designed to be curved. For example, the substrate BS can include glass.

[0063] The substrate BS can extend from the panel region PA to the peripheral region BA. For example, the substrate BS can be set throughout the entire cell region CA. The substrate BS can also be the panel substrate PS (see reference). Figure 2 ) the base layer.

[0064] According to an embodiment of the present invention, the pixel layer PXL can be disposed on the substrate BS. The pixel layer PXL may include... Figure 3 The pixel PX is shown in the diagram. For example, the pixel layer PXL may include a circuit element layer CL and a display element layer OL.

[0065] The circuit element layer CL can be disposed on the substrate BS. The circuit element layer CL can overlap with the panel area PA. The circuit element layer CL can extend to the portion of the peripheral area BA adjacent to the panel area PA.

[0066] The circuit element layer CL may include at least one insulating layer and circuit elements. For example, the circuit element layer CL may include... Figure 3 The scan line SL and the data line DL are shown in the diagram. When viewed in cross-section, an insulating layer may be disposed between the scan line SL and the data line DL. The scan line SL can be separated from the data line DL via the insulating layer.

[0067] The display element layer OL can be set on the circuit element layer CL. The display element layer OL can overlap with the display area DA of the first area AE1 of the panel area PA. The display element layer OL can also not overlap with the non-display area NDA of the first area AE1.

[0068] The display element layer OL may include multiple light-emitting elements and a pixel-defining layer. For example, each of the light-emitting elements may include an organic light-emitting diode (OLED). The light-emitting elements may be disposed in a pixel opening defined by the pixel-defining layer.

[0069] The thin-film encapsulation layer TFE can be disposed on a portion of the circuit element layer CL and the display element layer OL. The thin-film encapsulation layer TFE can overlap with a first region AE1 of the panel region PA. For example, the thin-film encapsulation layer TFE can overlap with the display region DA and the non-display region NDA of the first region AE1.

[0070] The thin-film encapsulation layer TFE may include a first inorganic layer, an organic layer, and a second inorganic layer sequentially stacked on a third-direction DR3. However, this is merely illustrative, and embodiments of the inventive concept are not necessarily limited to the thin-film encapsulation layer TFE of embodiments of the inventive concept. For example, the thin-film encapsulation layer TFE of embodiments of the inventive concept may also include multiple inorganic layers and multiple organic layers.

[0071] According to an embodiment of the present invention, a signal pad PD can be disposed on the circuit element layer CL. The signal pad PD can overlap with the second region AE2. The signal pad PD can be connected to a signal line of the circuit element layer CL.

[0072] Figure 6 It is along Figure 3 The cross-sectional view taken from line II-II'. Figure 6 The diagram shows cross-sections of the second region AE2 and the non-display region NDA of the first region AE1 within the panel region PA. Therefore, the thin-film encapsulation layer TFE is disposed on the circuit element layer CL instead of on... Figure 5 On the display element layer OL in the middle. Figure 6 The virtual pattern DU in the middle can be Figure 3 The first dummy pattern DU1 in the diagram.

[0073] Reference Figure 6 A dummy pattern DU can be set in the circuit element layer CL. For example, a dummy pattern DU can be associated with a scan line SL (see reference). Figure 3 The dummy pattern DU can be provided along with the scan line SL by providing the scan line SL.

[0074] However, embodiments of the present invention are not limited thereto. For example, the dummy pattern DU can be disposed between the circuit element layer CL and the substrate BS, or it can be disposed on the circuit element layer CL.

[0075] According to embodiments of the present invention, the dummy pattern DU may include a material that satisfies predetermined characteristics. For example, the dummy pattern DU may include a material having a coefficient of thermal expansion similar to that of the substrate BS and a melting temperature higher than that of the substrate BS. Furthermore, the dummy pattern DU may include a material having low absorptivity, low transmittance, and high reflectivity relative to the laser beam.

[0076] For example, when the substrate BS comprises glass, the dummy pattern DU may comprise molybdenum. Molybdenum has a coefficient of thermal expansion similar to that of glass, a high melting temperature (approximately 2100°C), and high reflectivity relative to a laser beam.

[0077] However, embodiments of the present invention are not limited to the material of the dummy pattern DU. For example, the material of the dummy pattern DU can be changed according to the material of the substrate BS.

[0078] According to an embodiment of the present invention, when viewed in cross-section, a dummy pattern DU can be disposed around the boundary between the panel area PA and the peripheral area BA. The effect caused by the dummy pattern DU will become clear when the method for manufacturing the display device is described later.

[0079] Figure 7 It is shown Figure 1 A plan view of the protective components. Figure 8 It is shown Figure 7 An enlarged view of one of the processing lines. Figure 9 It is along Figure 8 The cross-sectional view taken from line III-III'. For ease of description, in Figure 8 In the diagram, the first processing line PRL1 is shown by a dashed line, and the second processing line PRL2 is shown by alternating long dashes and two short dashes.

[0080] Reference Figure 7 and Figure 8 A machining line PRL can be defined on the protective component PP. When viewed in a flat plane, the machining line PRL can have a generally rectangular shape. The machining line PRL can be... Figure 4 The panel area PA overlaps.

[0081] A processing line PRL may include a first processing line PRL1 and a second processing line PRL2. For example, the first processing line PRL1 may include a first part PP1, a second part PP2, and a third part PP3.

[0082] The first part PP1 can extend from the first machining point MA1 along the first direction DR1. The first machining point MA1 can be a virtual point defined at the vertex of the machining line PRL. The first machining point MA1 can be connected with... Figure 4 The first point PO1 overlaps. It will be understood that, as used herein, the term “virtual” can refer to a reference point or reference line and does not necessarily correspond to an actual structural landmark.

[0083] The second part PP2 may extend from one end of the first part PP1 in the second direction DR2. The third part PP3 may extend from one end of the second part PP2 in the first direction DR1. The third part PP3 may be spaced apart from the first part PP1 in the second direction DR2.

[0084] When viewed on a flat surface, the first processing line PRL1 can be compared with... Figure 4 The first outline OUL1 of the panel area PA overlaps.

[0085] The first processing line PRL1 may also include a fourth section PP4. The fourth section PP4 can be positioned between the first section PP1 and the third section PP3. When viewed in a planar plane, the fourth section PP4 can be aligned with... Figure 3 The boundary between the first region AE1 and the second region AE2 overlaps.

[0086] The second machining line PRL2 can extend from the first machining point MA1 in the second direction DR2. The second machining line PRL2 can intersect with the second machining point MA2 of the third part PP3. The second machining point MA2 can be defined as a virtual point that defines another vertex of the machining line PRL and one end of the third part PP3. The second machining point MA2 can be spaced apart from the first machining point MA1 in the second direction DR2.

[0087] When viewed in a plane, the second machining line PRL2 can be aligned with the second contour line OUL2 (see...). Figure 4 The first processing line PRL1 and the second processing line PRL2 can intersect at the first processing point MA1 and the second processing point MA2.

[0088] According to an embodiment of the present invention, the second processing line PRL2 may include a first extension portion PRL2-E1 and a second extension portion PRL2-E2 extending in an inclined direction. The first extension portion PRL2-E1 may extend from the first processing point MA1 in the first inclined direction. When viewed in a plane, the first extension portion PRL2-E1 may be connected to the peripheral area BA (refer to...). Figure 4 (overlap). The first extension PRL2-E1 can be relative to... Figure 8 It extends in the direction of the upper left.

[0089] The second extension, PRL2-E2, can extend from the second processing point MA2 in the second inclined direction. When viewed in a plane, the second extension, PRL2-E2, can be connected to the outer region BA (refer to...). Figure 4 The second extension, PRL2-E2, can overlap. Figure 8 It extends in the direction of the upper right.

[0090] Reference Figure 9 The protective component PP may include a protective film PF and an adhesive layer ADL.

[0091] The protective film PF can include plastic film. The protective film PF can include polyethylene terephthalate (PET).

[0092] like Figure 9As shown, the adhesive layer ADL can be disposed beneath the protective film PF. The adhesive layer ADL may include an adhesive material. The adhesive layer ADL may include a material having low adhesive strength and high viscoelasticity. For example, the adhesive layer ADL may include a silicone-based adhesive material. However, this is merely illustrative, and embodiments of the inventive concept are not necessarily limited to the adhesive material of the adhesive layer ADL according to embodiments of the inventive concept. For example, the adhesive layer ADL may include a urethane-based adhesive material.

[0093] The following describes a method for manufacturing a display device according to an embodiment of the present invention. The method for manufacturing a display device according to an embodiment of the present invention involves a step of peeling off a protective member PP disposed on a panel substrate PS comprising a plurality of display panels during the manufacturing of the display device.

[0094] Figure 10 This is a flowchart illustrating a method for manufacturing a display device according to an exemplary embodiment of the present invention.

[0095] Figures 11 to 16 This is an explanation Figure 10 A view of each of the multiple steps described in the document. Figure 13 and Figure 14 It is along Figure 12 The cross-sectional view taken from line IV-IV' in the diagram.

[0096] Reference Figure 10 and Figure 11 In step S1, a panel substrate PS can be provided. Step S1 may include a substrate BS (see...) Figure 5 The steps of forming the circuit element layer CL on the circuit element layer CL, and forming the display element layer OL on the circuit element layer CL (see...) Figure 5 The steps, and in the display element layer OL (refer to) Figure 5 The step of forming a thin film encapsulation layer TFE on the surface.

[0097] The panel substrate PS may include multiple unit regions CA. Each of the multiple unit regions CA may include a panel region PA, a peripheral region BA, and a dummy pattern DU. The peripheral region BA may be positioned around the panel region PA to surround the panel region PA. The outline OUL may be defined as the boundary between the panel region PA and the peripheral region BA.

[0098] A dummy pattern DU can be set on the boundary between the panel area PA and the peripheral area BA. For example, a first dummy pattern DU1 can be set at a first point OP1 in the panel area PA. A second dummy pattern DU2 can be set at a second point PO2, which is spaced apart from the first point PO1 in the second direction DR2 and is defined as another vertex of the panel area PA.

[0099] When viewed on a flat surface, the thin-film encapsulation layer TFE can be disposed on the first region AE1 of the panel area PA, and the signal pad PD can be disposed on the second region AE2 of the panel area PA.

[0100] Figure 11 The panel substrate PS in the middle can have the same as Figures 3 to 5 It has the same structure as the panel base PS mentioned above.

[0101] Reference Figure 10 and Figure 12 In step S2, the protective component PP can be disposed on the panel substrate PS. Multiple processing lines PRL can be defined on the protective component PP. Each of the processing lines PRL can be connected to... Figure 11 The outline of panel area PA overlaps with the OEL.

[0102] According to an exemplary embodiment of this disclosure, a method of manufacturing a display device includes: setting a dummy pattern on a panel substrate. The panel substrate is cut to a partial thickness from a first point along a first processing line, and the panel substrate is cut to its full thickness from the first point along a second processing line. The dummy pattern may be set at the boundary between a panel area and a peripheral area of ​​the panel substrate, and the dummy pattern may overlap with the first point. The first processing line may overlap with a first contour line of the panel area extending from the first point, and the second processing line may overlap with a second contour line of the panel area extending from the first point. Cutting of the panel substrate along the first processing line may be performed in a first direction, and cutting of the panel substrate along the second processing line may be performed in a second direction different from the first direction. The first processing line and the second processing line may be portions of a protective member disposed on the panel substrate.

[0103] Reference Figure 10 In step S3, the protective component PP can be partially cut along the first processing line PRL1 (e.g., the cut can reach approximately half the depth). In step S3, a portion of the protective component PP can be cut along the thickness direction of the protective component PP (e.g., the third direction DR3).

[0104] For example, refer to Figure 12 The first laser device LD1 (see Figure 13 The protective component PP can be irradiated along the first processing line PRL1 using the first laser beam LZ1. The first laser device LD1 (see...) Figure 13 The first laser device LD1 can move along either the first direction DR1 or the second direction DR2 while continuously irradiating the first processing line PRL1 with the first laser beam LZ1. (See also: First laser device LD1) Figure 13The first machining line PRL1 can be processed by using the first machining point MA1 as the starting point and the second machining point MA2 as the ending point (see reference). Figure 12 ).

[0105] Reference Figure 13 The first laser beam LZ1 can cut a portion of the protective component PP. For example, with respect to the third-party DR3, the first laser beam LZ1 can cut the entire protective film PF and a portion of the adhesive layer ADL disposed beneath the protective film PF (see reference). Figure 13 Therefore, a first cutting groove CH1 extending along the first processing line PRL1 can be defined in the protective component PP.

[0106] Refer again Figure 10 and Figure 12 In step S4, the protective component PP can be completely cut along the second processing line PRL2 (e.g., cut to the full depth of the protective component PP). In step S4, the entire protective component PP can be cut relative to the thickness direction of the protective component PP (e.g., the third direction DR3).

[0107] The second laser device LD2 can irradiate the protective component PP along the second processing line PRL2 using the second laser beam LZ2. The second laser device LD2 can continuously irradiate the protective component PP using the second laser beam LZ2 in the section between the first processing point MA1 and the second processing point MA2. The second laser device LD2 can irradiate the extension portion located at each of the two endpoints of the second processing line PRL2 using the second laser beam LZ2.

[0108] Reference Figure 14 The second laser beam LZ2 can have a greater energy than the first laser beam LZ1. Therefore, the second laser beam LZ2 can cut the entire thickness of the protective component PP relative to the third direction DR3. Thus, a second cutting groove CH2 extending along the second processing line PRL2 can be defined in the protective component PP.

[0109] According to an embodiment of the present invention, steps S3 and S4 can be performed simultaneously. However, the embodiments of the present invention are not limited to this. For example, step S4 can be performed, and then step S3 can be performed.

[0110] Reference Figure 11 , Figure 12 and Figure 14 The first laser beam LZ1 and the second laser beam LZ2 can irradiate the first processing point MA1 and the second processing point MA2, where the first processing line PRL1 and the second processing line PRL2 intersect, in an overlapping manner.

[0111] Therefore, the heat generated by the first laser beam LZ1 and the heat generated by the second laser beam LZ2 can be applied in a dual manner to the portions of the panel substrate PS adjacent to the first point PO1 and the second point PO2, respectively, with the first point PO1 and the second point PO2 overlapping the first processing point MA1 and the second processing point MA2.

[0112] When heat is applied to the same point in a dual manner, the substrate BS of the panel substrate PS may be damaged. For example, cracks may form in the portion of the substrate BS that overlaps with the first point PO1 and the second point PO2.

[0113] To address this limitation, according to an embodiment of the present invention, the panel substrate PS may include a first dummy pattern DU1 and a second dummy pattern DU2 that overlap with the first point PO1 and the second point PO2 and are disposed on the substrate substrate BS.

[0114] The first dummy pattern DU1 and the second dummy pattern DU2 can absorb heat applied to the substrate BS. As described above, when the substrate BS is glass, each of the first dummy pattern DU1 and the second dummy pattern DU2 may include molybdenum.

[0115] Since each of the first dummy pattern DU1 and the second dummy pattern DU2 has a high melting temperature, neither the first dummy pattern DU1 nor the second dummy pattern DU2 will melt during laser processing. Furthermore, since each of the first dummy pattern DU1 and the second dummy pattern DU2 has a coefficient of thermal expansion similar to that of glass, the stress applied to the substrate BS can be minimized despite the temperature gradient generated between the dummy patterns DU1 and DU2 and the substrate BS. Moreover, since the dummy patterns DU1 and DU2 have high reflectivity relative to the laser beams LZ1 and LZ2, the thermal energy applied to the substrate BS by the laser beams LZ1 and LZ2 can be minimized.

[0116] As a result, according to an embodiment of the present invention, since the first dummy pattern DU1 and the second dummy pattern DU2 are disposed in an overlapping manner on the portion irradiated by the first laser beam LZ1 and the second laser beam LZ2, the substrate BS will not be damaged.

[0117] Reference Figure 15 and Figure 16 In step S5, a portion of the protective component PP can be peeled off. The non-peeled region NPEA and the peeled region PEA can be defined in the protective component PP by the first cutting groove CH1 and the second cutting groove CH2.

[0118] The non-stripping region NPEA refers to the area surrounded by the first cutting groove CH1 and the second cutting groove CH2. The non-stripping region NPEA can be compared with... Figure 11 The panel region PA overlaps with the non-peeled region NPEA. The peeled region PEA can refer to the region surrounding the non-peeled region NPEA. The peeled region PEA can be... Figure 11 The outer regions BA overlap. In step S5, the non-stripped region NPEA can be retained, and the stripped region PEA can be removed.

[0119] Step S5 can be performed using a peeling device. The peeling device may include a peeling belt, a peeling adhesive disposed at one end of the peeling belt, and a head connected to the other end of the peeling belt.

[0120] The release adhesive can be attached to a portion of the PEA area to be released. The adhesive strength between the release adhesive and the protective component PP can be greater than the adhesive strength between the panel substrate PS and the adhesive layer ADL of the protective component PP.

[0121] The head can be relative to Figure 15 Moving in one direction (e.g., the first direction DR1). Therefore, the peeling region PEA and the non-peeling region NPEA can be easily separated from each other by the first cutting groove CH1 and the second cutting groove CH2. Furthermore, the peeling region PEA and the non-peeling region NPEA can be further easily separated from each other by the second cutting groove CH2, which cuts the entire thickness of the protective component PP.

[0122] like Figure 16 As shown, after performing step S5, only the non-peeled area NPEA of the protective component PP can be retained on the panel substrate PS. Here, a portion of each of the first dummy pattern DU1 and the second dummy pattern DU2 can be exposed.

[0123] A panel substrate PS can be divided into multiple display panels through the following steps. For example, the panel substrate PS can be divided into multiple unit regions CA by a cutting step performed along a first cutting line CL1 and a second cutting line CL2. Each of the multiple unit regions CA can be manufactured into a display panel through pixel inspection and scribing steps. Dummy patterns DU1 and DU2 on the panel substrate PS can be removed through a scribing step.

[0124] Figures 17 to 18 This is a view illustrating a method of manufacturing a display device according to an exemplary embodiment of the present invention. When compared to the panel substrate PS according to the above embodiment, except for the placement positions of the dummy patterns DU1-1 and DU2-1, Figure 18 The panel substrate PS-1 can have the same structure as the panel substrate PS.

[0125] In this embodiment, the dummy patterns DU1-1 and DU2-1 may overlap with the portion of the curved shape being processed.

[0126] Reference Figure 17 and Figure 18 The first processing line PRL1-1 and the second processing line PRL2-1 can be defined on the protective component PP-1. Each of the first processing line PRL1-1 and the second processing line PRL2-1 can be a virtual line indicating the irradiation path of the laser beam.

[0127] When viewed in a plane, the first machining line PRL1-1 may include a linear portion. For example, the first machining line PRL1-1 may include a first portion PP1-1 extending in the second direction DR2 and a second portion PP2-1 extending in the first direction DR1.

[0128] When viewed in a planar plane, the second machining line PRL2-1 may include a curved portion. The second machining line PRL2-1 and the first machining line PRL1-1 may intersect at the first machining point MA1-1 and the second machining point MA2-1. The first machining point MA1-1 and the second machining point MA2-1 may be virtual points defined on the protective component PP-1.

[0129] The first dummy pattern DU1-1 and the second dummy pattern DU2-1 can be disposed on the panel substrate PS-1. When viewed in a flat plane, the first dummy pattern DU1-1 can overlap with the first processing point MA1-1 of the protective component PP-1. The second dummy pattern DU2-1 can overlap with the second processing point MA2-1 of the protective component PP-1.

[0130] The first processing line PRL1-1 and the second processing line PRL2-1 can be irradiated with a first laser beam and a second laser beam, respectively. For example, the first laser beam can partially cut the portion of the protective component PP-1 that overlaps with the first processing line PRL1-1, and the second laser beam can partially cut the portion of the protective component PP-1 that overlaps with the second processing line PRL2-1.

[0131] Each of the first processing point MA1-1 and the second processing point MA2-1 can be irradiated in an overlapping manner using a first laser beam and a second laser beam. However, according to an embodiment of the present invention, since the first dummy pattern DU1-1 overlapping with the first processing point MA1-1 and the second dummy pattern DU2-1 overlapping with the second processing point MA2-1 are disposed on the panel substrate PS-1, the substrate of the panel substrate PS-1 will not be damaged.

[0132] According to embodiments of the present invention, since the dummy pattern is configured to overlap with points repeatedly irradiated by a laser beam, the dummy pattern can protect the substrate of the panel substrate. Alternatively, according to embodiments of the present invention, the dummy pattern may not be located at a specific point. For example, the dummy pattern may be located at any point on the panel substrate where the substrate may be damaged by the laser beam.

[0133] According to an embodiment of the present invention, since the dummy pattern is set at a first point on the panel substrate, which overlaps with the point where the first cutting line and the second cutting line intersect, the portion of the substrate that overlaps with the first point will not be damaged even if the first point is irradiated by a laser beam in an overlapping manner.

[0134] Although exemplary embodiments of the invention have been described, it will be understood that the invention should not be limited to these exemplary embodiments, but that various changes and modifications can be made by those skilled in the art within the spirit and scope of this disclosure.

Claims

1. A method for manufacturing a display device, wherein, The method includes: A panel substrate is provided, the panel substrate including a panel area, a peripheral area at least partially surrounding the panel area, and a dummy pattern disposed at the boundary between the panel area and the peripheral area; A protective component is provided on the panel substrate. The protective component includes a first processing line and a second processing line. The first processing line overlaps with a first contour line of the panel region extending from a first point of the panel region's contour line. The second processing line overlaps with a second contour line of the panel region extending from the first point in a direction different from the first contour line. The protective component is partially cut along the first processing line using a laser beam; and The protective component is completely cut along the second processing line using a laser beam. Wherein, the dummy pattern overlaps with the first point. The panel substrate further includes a base substrate, and the dummy pattern is disposed on the base substrate. The dummy pattern includes a material having a melting temperature higher than that of the substrate.

2. The method according to claim 1, wherein, The partial cutting includes cutting a portion of the protective component in the thickness direction of the protective component.

3. The method according to claim 1, wherein, The complete cutting includes cutting the entire protective component in the thickness direction of the protective component.

4. The method according to claim 1, wherein, The first processing line includes: The first part extends in a first direction from a first processing point of the protective component that overlaps with the first point; The second portion extends from one end of the first portion in a second direction intersecting the first direction; and The third part extends from one end of the second part in the first direction.

5. The method according to claim 4, wherein, The second processing line extends from the first processing point in the second direction, and Wherein, one end of the second processing line intersects with the third part at the second processing point.

6. The method according to claim 5, wherein, The second processing line includes: A first extension portion, the first extension portion extending from the first processing point in a first inclined direction; and The second extension portion extends from the second processing point in the second inclined direction.

7. The method according to claim 4, wherein, The panel area includes: A first region, the first region including pixels and a signal line having a first end connected to the pixels; and The second region includes pads connected to the second end of the signal line. The first processing line further includes a fourth portion that overlaps with the boundary between the first region and the second region.

8. The method according to claim 7, wherein, The first point is defined as the vertex of the contour line of the panel region that is adjacent to the second region.

9. The method according to claim 1, wherein, The panel substrate also includes: A pixel layer is disposed on the substrate, the pixel layer overlaps with the panel area, and the pixel layer includes an organic light-emitting element.

10. The method according to claim 9, wherein, The pixel layer includes: A scan line, wherein the scan line is disposed on the substrate and extends in a second direction intersecting the first direction; Data lines, the data lines being disposed on the scan lines and extending in the first direction; and An insulating layer is disposed between the scan line and the data line. The dummy pattern and the scan line are disposed on the same layer.

11. The method according to claim 9, wherein, The substrate comprises glass, and The dummy pattern includes a material having a melting temperature higher than that of the glass.

12. The method according to claim 11, wherein, The dummy pattern includes molybdenum.

13. The method according to claim 1, wherein, The partial cutting and the complete cutting are performed simultaneously.

14. The method according to claim 1, wherein, The method further includes: peeling off a peeling area defined outside the first processing line and the second processing line in the protective component.

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