A method for detecting power input voltage

Abstract

The present invention discloses a power supply input voltage detection method, which relates to the technical field of voltage detection. It includes four steps: judging whether a PFC control chip is waving; if the PFC control chip is in a non-waving state, obtaining an AC voltage, passing it through an EMC circuit and a bridge rectifier circuit, and then filtering it through a bus electrolytic capacitor to become a bus voltage; calculating and obtaining an input voltage based on the bus voltage; and judging whether the input voltage is over-voltage or under-voltage. When the PFC control chip is not waving, the AC voltage passes through an EMC circuit and a bridge rectifier circuit, and then passes through a bus electrolytic capacitor to become a bus voltage. The input voltage can be calculated based on the bus voltage, and finally, it can be judged whether the input voltage is over-voltage or under-voltage, which completely solves the problem of inaccurate input voltage sampling when the PFC control chip is not waving and the problem of inaccurate input voltage sampling when the PFC control chip is not waving, and has broad application prospects.

Description

Technical Field

[0001] The present invention relates to the technical field of voltage detection, and in particular to a method for detecting a power supply input voltage. Background Art

[0002] Traditional power supplies include PFC control chips and PFC circuits. The PFC control chip has an input over-voltage and under-voltage detection function. The input voltage value of the power supply can be detected by setting the resistance value of the RIAC in the PFC circuit.

[0003] For example, when the RIAC in the PFC circuit is 12M, the input voltage detection range can reach 180Vac-264Vac; when the RIAC in the PFC circuit is 6M, the input voltage detection range can reach 90Vac-264Vac. After the input voltage sampling signal is processed internally by the PFC control chip, it can provide relevant peak voltage information to the DSP main control chip of the module through the LPK pin. However, this function is only limited to the case where the PFC control chip is emitting waves normally, in order to accurately detect the input voltage. When the chip driver of the PFC control chip is turned off (the PFC control chip does not emit waves), the input voltage detection will be higher than the actual value, and as the temperature rises, the higher the input voltage detection value, the more serious it is. Summary of the invention

[0004] To achieve the above object, the present invention provides the following technical solution: a method for detecting a power input voltage, comprising the following steps:

[0005] S1, determine whether the PFC control chip is emitting waves;

[0006] S2: If the PFC control chip is in a non-wave state, the AC voltage is obtained and passed through the EMC circuit and the bridge rectifier circuit, and then filtered through the bus electrolytic capacitor to become the bus voltage;

[0007] S3, calculating and obtaining an input voltage according to the bus voltage;

[0008] S4. Determine whether the input voltage is overvoltage or undervoltage.

[0009] As a preferred technical solution of the present invention, the bus voltage in S3 is equal to the product of the input voltage and 1.44.

[0010] As a preferred technical solution of the present invention, in S1, judging whether the PFC control chip is transmitting is divided into the following steps:

[0011] S11, within a preset time period, detecting and counting the working state of the PFC control chip, the working state including a non-wave generating state and a wave generating state;

[0012] S12, if the number of times of the non-wave state is greater than the preset number, the PFC control chip is in the non-wave state;

[0013] S13, if the number of times of the non-wave generating state is less than the preset number of times, and the number of times of the wave generating state is greater than the preset number of times, the PFC control chip is in the wave generating state.

[0014] As a preferred technical solution of the present invention, in S4, judging whether the input voltage is over-voltage or under-voltage is divided into the following steps:

[0015] S41, if the input voltage is greater than a first input overvoltage standard value, the input voltage is overvoltage;

[0016] S42: If the input voltage is less than a first input overvoltage recovery standard value, the input voltage is overvoltage recovered, and the first input overvoltage recovery standard value is greater than the first input overvoltage recovery standard value.

[0017] As a preferred technical solution of the present invention, in S3, the step of calculating and obtaining the input voltage according to the bus voltage is divided into the following steps:

[0018] S31, if the PFC control chip is in the wave generating state, obtaining an input voltage sampling peak signal obtained by sampling the AC voltage through the IAC pin of the PFC control chip after the AC voltage passes through the EMC circuit and the bridge rectifier;

[0019] S32, obtaining the input voltage by calculation according to the input voltage sampling peak signal.

[0020] As a preferred technical solution of the present invention, in S32, the input voltage sampling peak signal is equal to the product of the input voltage and 1.44.

[0021] As a preferred technical solution of the present invention, in S4, if the input voltage is greater than the second input overvoltage standard value, the input voltage is overvoltage; if the input voltage is less than the second input overvoltage recovery standard value, the input overvoltage is overvoltage recovery, and the second input overvoltage standard value is greater than the second input overvoltage recovery standard value.

[0022] A power supply input voltage detection device using a power supply input voltage detection method, comprising:

[0023] A PFC control chip state judgment module is configured to judge whether the PFC control chip is emitting a wave;

[0024] The bus voltage acquisition module is configured to obtain the bus voltage obtained by filtering the AC voltage through the EMC circuit and the bridge rectifier circuit and then through the bus electrolytic capacitor if the PFC control chip is in a non-wave state;

[0025] An input voltage calculation module is configured to calculate and obtain an input voltage according to the bus voltage;

[0026] The over-voltage or under-voltage judgment module is configured to judge whether the input voltage is over-voltage or under-voltage.

[0027] A power supply device using a power supply input voltage detection method, comprising:

[0028] EMC circuit, capable of handling input AC voltage;

[0029] A bridge rectifier circuit, connected to the EMC circuit, capable of rectifying the AC voltage;

[0030] The PFC circuit is connected to the bridge rectifier circuit. After the AC voltage passes through the EMC circuit and the bridge rectifier circuit, it can be filtered into a bus voltage through the bus electrolytic capacitor of the PFC circuit.

[0031] A PFC control chip connected to the PFC circuit;

[0032] The DSP controller is connected to the PFC control chip, and can obtain the bus voltage, calculate the input voltage according to the bus voltage, and determine whether the input voltage is over-voltage or under-voltage.

[0033] A computer-readable storage medium adopting a power input voltage detection method stores a computer program therein, and when the computer program is executed by a processor, any one of the steps S1, S2, S3 and S4 is implemented.

[0034] Compared with the prior art, the present invention provides a method for detecting power input voltage, which has the following beneficial effects:

[0035] The power input voltage detection method, when the PFC control chip does not generate waves, the AC voltage passes through the EMC circuit and the bridge rectifier circuit, and then passes through the bus electrolytic capacitor to filter into the bus voltage. The input voltage can be calculated based on the bus voltage, and finally, it can be judged whether the input voltage is over-voltage or under-voltage, which completely solves the problem of inaccurate input voltage sampling when the PFC control chip does not generate waves and the problem of inaccurate input voltage sampling when the PFC control chip does not generate waves, and has broad application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 A flow chart of a power input voltage detection method proposed by the present invention;

[0037] Figure 2 A hardware block diagram of a power input voltage detection device of a power input voltage detection method proposed by the present invention;

[0038] Figure 3 A power supply device flow chart of a power supply input voltage detection method proposed by the present invention;

[0039] Figure 4 A schematic diagram of a power supply device circuit for a power supply input voltage detection method proposed by the present invention;

[0040] Figure 5 This is a logic block diagram of the data processing flow of a power input voltage detection method proposed by the present invention. DETAILED DESCRIPTION

[0041] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0042] For example, see Figure 1-5 , a power input voltage detection method, comprising the following steps:

[0043] S1, determine whether the PFC control chip is emitting waves;

[0044] S2: If the PFC control chip is in a non-wave state, the AC voltage is obtained and passed through the EMC circuit and the bridge rectifier circuit, and then filtered through the bus electrolytic capacitor to become the bus voltage;

[0045] S3, calculating and obtaining an input voltage according to the bus voltage;

[0046] S4. Determine whether the input voltage is overvoltage or undervoltage.

[0047] As a specific technical solution of this embodiment, the bus voltage in S3 is equal to the product of the input voltage and 1.44.

[0048] As a specific technical solution of this embodiment, in S1, judging whether the PFC control chip is transmitting is divided into the following steps:

[0049] S11, within a preset time period, detecting and counting the working state of the PFC control chip, the working state including a non-wave generating state and a wave generating state;

[0050] S12, if the number of times of the non-wave state is greater than the preset number, the PFC control chip is in the non-wave state;

[0051] S13, if the number of times of the non-wave generating state is less than the preset number of times, and the number of times of the wave generating state is greater than the preset number of times, the PFC control chip is in the wave generating state.

[0052] In the step S1, whether the PFC control chip generates a wave refers to whether the working state of the PFC control chip is in an off state or an on state. When the PFC control chip generates a wave, the PFC control chip is in an on state, and when the PFC control chip does not generate a wave, the PFC control chip is in an off state.

[0053] The working state of the PFC control chip may include two kinds, one is a non-wave generating state, and the other is a wave generating state. The type of the PFC control chip is not limited, and it may be various control chips for controlling the PFC circuit, such as the FAN9673 control chip.

[0054] As a specific technical solution of this embodiment, in S4, judging whether the input voltage is over-voltage or under-voltage is divided into the following steps:

[0055] S41, if the input voltage is greater than a first input overvoltage standard value, the input voltage is overvoltage;

[0056] S42: If the input voltage is less than a first input overvoltage recovery standard value, the input voltage is overvoltage recovered, and the first input overvoltage recovery standard value is greater than the first input overvoltage recovery standard value.

[0057] In S41, the first input overvoltage standard value is a preset value. When the first input overvoltage standard value is 373V, when the input voltage is greater than 373V, the input voltage is overvoltage.

[0058] In the step S42, the first input overvoltage recovery standard value is a preset value, the first input overvoltage recovery standard value is greater than the first input overvoltage recovery standard value, when the first input overvoltage recovery standard value may be 359V, when the input voltage is less than 359V, the input voltage is overvoltage recovered.

[0059] As a specific technical solution of this embodiment, in S3, the step of calculating and obtaining the input voltage according to the bus voltage is divided into the following steps:

[0060] S31, if the PFC control chip is in the wave-generating state, obtain the input voltage sampling peak signal V obtained by sampling the AC voltage through the IAC pin of the PFC control chip after the AC voltage passes through the EMC circuit and the bridge rectifier. LPK ;

[0061] S32, sampling the peak signal V according to the input voltage LPKThe input voltage is obtained by calculation.

[0062] In the above 31, when the PFC control chip is in the wave-generating state, the PFC control chip can obtain the input voltage sampling peak signal VLPK through its own peak voltage sampling circuit, the PFC control chip can send the input voltage sampling peak signal to the DSP controller, the DSP controller can obtain the input voltage sampling peak signal VLPK from the PFC control chip, and judge the working state of the PFC control chip.

[0063] In 32, the DSP controller can calculate the input voltage through the input voltage sampling peak signal VLPK. When the input voltage sampling peak signal VLPK is equal to the product of the input voltage and 1.44, the DSP controller can calculate the input voltage through the relationship between the input voltage sampling peak signal VLPK and the input voltage.

[0064] As a specific technical solution of this embodiment, in S32, the input voltage sampling peak signal is equal to the product of the input voltage and 1.44.

[0065] As a specific technical solution of this embodiment, in S4, when the PFC control chip is in a wave-generating state, if the input voltage is greater than a second input overvoltage standard value, the input voltage is overvoltage; if the input voltage is less than a second input overvoltage recovery standard value, the input overvoltage is overvoltage recovery, and the second input overvoltage standard value is greater than the second input overvoltage recovery standard value.

[0066] In S4, the second input overvoltage standard value is a preset value. When the second input overvoltage standard value is 264V and when the input voltage is greater than 264V, the input voltage is overvoltage.

[0067] In S4, the second input overvoltage recovery standard value is a preset value, the second input overvoltage recovery standard value is greater than the second input overvoltage recovery standard value, when the second input overvoltage recovery standard value can be 254V and when the input voltage is less than 254V, the input voltage is overvoltage recovered.

[0068] A power input voltage detection device using a power input voltage detection method comprises: a PFC control chip state judgment module, configured to judge whether the PFC control chip is pulsating, a bus voltage acquisition module, configured to obtain the bus voltage obtained by filtering the AC voltage through an EMC circuit and a bridge rectifier circuit and then through a bus electrolytic capacitor if the PFC control chip is in a non-pulsating state, an input voltage calculation module, configured to obtain the input voltage according to the bus voltage calculation, and an over-voltage or under-voltage judgment module, configured to judge whether the input voltage is over-voltage or under-voltage.

[0069] The power input voltage detection device is implemented in whole or in part by software, hardware, or a combination thereof. The above modules may be embedded in or independent of a processor in a computer device in the form of hardware, or may be stored in a memory in the computer device in the form of software, so that the processor can call and execute operations corresponding to the above modules.

[0070] A power supply device using a power supply input voltage detection method, comprising:

[0071] EMC circuit, capable of handling input AC voltage;

[0072] A bridge rectifier circuit, connected to the EMC circuit, capable of rectifying the AC voltage;

[0073] The PFC circuit is connected to the bridge rectifier circuit. After the AC voltage passes through the EMC circuit and the bridge rectifier circuit, it can be filtered into a bus voltage through the bus electrolytic capacitor of the PFC circuit.

[0074] A PFC control chip connected to the PFC circuit;

[0075] The DSP controller is connected to the PFC control chip, and is capable of obtaining the bus voltage, calculating the input voltage based on the bus voltage, and determining whether the input voltage is over-voltage or under-voltage;

[0076] A computer-readable storage medium adopting a power input voltage detection method stores a computer program therein, and when the computer program is executed by a processor, any one of the steps S1, S2, S3 and S4 is implemented.

[0077] In S2, if the PFC control chip is in a non-wave state, the input single-phase AC power passes through the EMC circuit and the bridge rectifier circuit and then enters the PFC circuit. The single-phase AC power is then filtered into a smooth DC voltage by the bus electrolytic capacitor of the PFC circuit. This DC voltage is the bus voltage Vbus. The DSP controller can obtain the bus voltage Vbus by sampling the voltage divider resistor. The DSP controller can be a DSP main control chip. The DSP controller can determine the state of the PFC control chip. The DSP controller can also be various chips, terminals or computers with DSP functions.

[0078] In S3, the DSP controller can obtain the bus voltage Vbus by sampling the voltage divider resistor. Figure 4 The sampling voltage-dividing resistor can be connected in parallel at both ends of the bus electrolytic capacitor of the PFC circuit. The DSP controller can obtain the input voltage through the bus voltage Vbus. The bus voltage Vbus is equal to the product of the input voltage and 1.44. Through the above relationship, the DSP controller can calculate the input voltage after obtaining the bus voltage Vbus.

[0079] In S4, the DSP controller can determine whether the input voltage is over-voltage or under-voltage. The determination of whether the input voltage is over-voltage or under-voltage is to compare the input voltage with a standard voltage. When the input voltage is greater than the standard voltage, the input voltage is over-voltage; when the input voltage is less than the standard voltage, the input voltage is under-voltage.

[0080] In S11, the DSP controller can detect the working state of the PFC control chip. The DSP controller can record the number of times the PFC control chip is in the working state within a preset time period. For example, the preset time is 1 minute. The DSP controller can record the number of times the PFC control chip is in the non-wave-generating state within one minute, and the number of times the PFC control chip is in the wave-generating state within one minute.

[0081] The preset time can be set according to actual needs, and the preset time can be 5 minutes. Detecting the working state of the PFC control chip and counting can be achieved by a counter. For example, a non-wave state counter and a wave state counter can be set separately. Every time the non-wave state appears, the non-wave state counter increases by 1, and every time the wave state appears, the wave state counter increases by 1.

[0082] In S12 and S13, the preset number of times is a preset integer, and the DSP controller can judge the working state of the PFC control chip by comparing the number of times the PFC control chip is in two working states within a preset time with the preset number of times. When the preset number of times is 500 and the number of times the non-wave state is greater than 500, the PFC control chip is in the non-wave state; when the number of times the non-wave state is less than 500 and the number of times the wave state is greater than 500, the PFC control chip is in the wave state.

[0083] When the PFC control chip is not turned on, the input voltage can be obtained and it can be determined whether the input voltage is over-voltage or under-voltage. In the traditional technical solution, when the PFC control chip is turned off and is in a non-wave state, the input voltage detection value will be higher than the actual value. As the temperature rises, the higher the detection value, the stricter it is. This method completely solves the problem through the power input voltage detection method. The power input voltage detection method calculates the input voltage value by detecting the rectified bus voltage Vbus, which solves the problem of inaccurate input voltage detection when the PFC control chip is in a non-wave state (chip drive is turned off).

[0084] Example 2, see Figure 5 The power input voltage detection method is applied to a power supply product. The power supply product shuts down when there is no fault, but does not shut down the drive wave of the PFC control chip. The power supply product shuts down the drive wave of the PFC control chip only when there is a fault. As mentioned above, when the drive wave of the PFC control chip is not shut down, the DSP controller can detect the input voltage sampling peak signal VLPK and obtain the input voltage by conversion. When the drive wave of the PFC control chip is shut down, the DSP controller can detect the bus voltage Vbus and convert it to obtain the input voltage. When the power supply product is powered on for the first time (initialized startup), the PFC control chip shuts down the drive wave. The DSP controller 140 also detects the bus voltage Vbus to convert the input voltage. When the power supply product inputs voltage, the DSP controller needs to determine the working state of the PFC control chip.

[0085] U_01_Style=1 means that the DSP controller detected by the DSP controller is in the non-wave state, U_bus_vin_delay is the non-wave state counter corresponding to the non-wave state, U_01_Style=2 means that the power supply product detected by the DSP controller is in the shutdown or initialization startup state, corresponding to the DSP controller is in the wave state, U_ac_vin_delay is the wave state counter corresponding to the wave state, within a preset time, the DSP controller detects the state of the DSP controller, the U_bus_vin_delay will accumulate the number of the non-wave state, and the U_ac_vin_delay will accumulate the number of the wave state.

[0086] When the U_bus_vin_delay is greater than 500, the DSP controller determines that the PFC control chip 150 is in a non-wave state, and the DSP controller 140 obtains the bus voltage Vbus and converts it to obtain the input voltage. Figure 5 In the description, "bus>373V" means that the input voltage at this time is obtained by converting the bus voltage Vbus, and the input voltage is greater than 373V, 373V is the first input overvoltage standard value, when the input voltage is greater than 373V, the input voltage is overvoltage, when the input voltage is less than 359V, the input voltage is overvoltage recovery, 359V is the first input overvoltage recovery standard value.

[0087] When the U_ac_vin_delay is greater than 500, the DSP controller determines that the PFC control chip is in a wave-generating state, and the DSP controller obtains the input voltage sampling peak signal VLPK from the PFC control chip and converts it to obtain the input voltage. Figure 5 In the specification, "input>264V" means that the input voltage is obtained by converting the input voltage sampling peak signal VLPK, and the input voltage is greater than 264V, 264V is the second input overvoltage standard value, when the input voltage is greater than 364V, the input voltage is overvoltage, when the input voltage is less than 254V, the input voltage is overvoltage recovery, 254V is the second input overvoltage recovery standard value.

[0088] Embodiment three, this embodiment provides a computer device, which can be a server, and the computer device includes a processor, a memory and a network interface connected through a system bus, wherein the processor of the computer device can provide computing and control capabilities, the memory of the computer device includes a non-volatile storage medium and an internal memory, the non-volatile storage medium stores an operating system, a computer program and a database, the internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium, the database of the computer device can store data, the network interface of the computer device can communicate with an external terminal through a network connection, and the computer program is executed by the processor to implement the power input voltage detection method.

[0089] Embodiment 4. This embodiment provides a computer device, which may be a terminal. The computer device includes a processor, a memory, a communication interface, a display screen, and an input device connected through a system bus, wherein the processor of the computer device can provide computing and control capabilities, the memory of the computer device includes a non-volatile storage medium and an internal memory, the non-volatile storage medium stores an operating system and a computer program, the internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium, the communication interface of the computer device can communicate with an external terminal in a wired or wireless manner, and the wireless manner can be implemented through WIFI, an operator network, NFC (near field communication) or other technologies, when the computer program is executed by the processor, a power input voltage detection method is implemented, the display screen of the computer device may be a liquid crystal display screen or an electronic ink display screen, the input device of the computer device may be a touch layer covering the display screen, or may be a button, trackball or touchpad provided on the computer device housing, or may be an external keyboard, touchpad or mouse, etc.

[0090] In summary, the power input voltage detection method, when the PFC control chip does not generate waves, the AC voltage passes through the EMC circuit and the bridge rectifier circuit, and then passes through the bus electrolytic capacitor to filter into the bus voltage. The input voltage can be calculated based on the bus voltage, and finally, it can be judged whether the input voltage is over-voltage or under-voltage, which completely solves the problem of inaccurate input voltage sampling when the PFC control chip does not generate waves and the problem of inaccurate input voltage sampling when the PFC control chip does not generate waves, and has broad application prospects.

[0091] It should be noted that, in this article, terms such as "comprises", "includes" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of more restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0092] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A method for detecting a power input voltage, characterized in that: The following steps are involved: S1, determine whether the PFC control chip is emitting waves; S2: If the PFC control chip is in a non-wave state, the AC voltage is obtained and passed through the EMC circuit and the bridge rectifier circuit, and then filtered through the bus electrolytic capacitor to become the bus voltage; S3, calculating and obtaining an input voltage according to the bus voltage; S4, determining whether the input voltage is overvoltage or undervoltage; In S1, judging whether the PFC control chip is transmitting a wave is divided into the following steps: S11, within a preset time period, detecting and counting the working state of the PFC control chip, the working state including a non-wave generating state and a wave generating state; S12, if the number of times of the non-wave state is greater than the preset number, the PFC control chip is in the non-wave state; S13, if the number of times of the non-wave generating state is less than the preset number of times, and the number of times of the wave generating state is greater than the preset number of times, the PFC control chip is in the wave generating state.

2. A power input voltage detection method according to claim 1, characterized in that: The bus voltage in S3 is equal to the product of the input voltage and 1.

44.

3. A power input voltage detection method according to claim 1, characterized in that: In S4, judging whether the input voltage is over-voltage or under-voltage is divided into the following steps: S41, if the input voltage is greater than a first input overvoltage standard value, the input voltage is overvoltage; S42: If the input voltage is less than a first input overvoltage recovery standard value, the input voltage is overvoltage recovered, and the first input overvoltage recovery standard value is greater than the first input overvoltage recovery standard value.

4. A power input voltage detection method according to claim 1, characterized in that: In S3, the input voltage is obtained by calculating according to the bus voltage and is divided into the following steps: S31, if the PFC control chip is in the wave generating state, obtaining an input voltage sampling peak signal obtained by sampling the AC voltage through the IAC pin of the PFC control chip after the AC voltage passes through the EMC circuit and the bridge rectifier; S32, obtaining the input voltage by calculation according to the input voltage sampling peak signal.

5. A power input voltage detection method according to claim 4, characterized in that: In S32, the input voltage sampling peak signal is equal to the product of the input voltage and 1.

44.

6. A power input voltage detection method according to claim 1, characterized in that: In S4, if the input voltage is greater than the second input overvoltage standard value, the input voltage is overvoltage; if the input voltage is less than the second input overvoltage recovery standard value, the input overvoltage is overvoltage recovery, and the second input overvoltage standard value is greater than the second input overvoltage recovery standard value.

7. A power input voltage detection device based on the power input voltage detection method according to any one of claims 1 to 6, characterized in that: include: A PFC control chip state judgment module is configured to judge whether the PFC control chip is emitting a wave; The bus voltage acquisition module is configured to obtain the bus voltage obtained by filtering the AC voltage through the EMC circuit and the bridge rectifier circuit and then through the bus electrolytic capacitor if the PFC control chip is in a non-wave state; An input voltage calculation module is configured to calculate and obtain an input voltage according to the bus voltage; The over-voltage or under-voltage judgment module is configured to judge whether the input voltage is over-voltage or under-voltage.

8. A power supply device based on the power supply input voltage detection method according to any one of claims 1 to 6, characterized in that: include: EMC circuit, capable of handling input AC voltage; A bridge rectifier circuit, connected to the EMC circuit, capable of rectifying the AC voltage; The PFC circuit is connected to the bridge rectifier circuit. After the AC voltage passes through the EMC circuit and the bridge rectifier circuit, it can be filtered into a bus voltage through the bus electrolytic capacitor of the PFC circuit. A PFC control chip connected to the PFC circuit; The DSP controller is connected to the PFC control chip, and can obtain the bus voltage, calculate the input voltage according to the bus voltage, and determine whether the input voltage is over-voltage or under-voltage.

9. A computer-readable storage medium based on the power input voltage detection method according to any one of claims 1 to 6, wherein a computer program is stored therein, wherein: When the computer program is executed by a processor, any one of steps S1, S2, S3 and S4 is implemented.

Images