High voltage integrated circuit, semiconductor circuit and method for manufacturing the same

Abstract

The application relates to a high-voltage integrated circuit, a semiconductor circuit and a preparation method thereof. When the output voltage of a first low-voltage side power port meets a preset threshold range and a basic circuit of an HVIC is in a non-protection state, a pre-charge control circuit transmits a pre-charge signal to a bootstrap circuit, so that the basic circuit of the HVIC enters a pre-charge state; and when the basic circuit of the HVIC is in the pre-charge state, the pre-charge control circuit transmits a stop enabling signal to the basic circuit of the HVIC, so that the basic circuit of the HVIC stops outputting a driving signal; and then the bootstrap circuit can control the first low-voltage side power port to charge a first high-voltage side floating power port according to the acquired pre-charge signal, so as to realize pre-charge of the basic circuit of the HVIC. The integrated HVIC does not need an additional bootstrap circuit, the product application cost is reduced, the pre-charge time does not need to be designed in the MCU program design; the integrated HVIC can better guarantee the bootstrap capacitor voltage under the condition of power-off and power-on, and the product reliability is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to a high-voltage integrated circuit, a semiconductor circuit and a preparation method thereof, and belongs to the technical field of semiconductor circuit application. BACKGROUND

[0002] The semiconductor circuit is a power drive product combining power electronics and integrated circuit technology. The high-voltage integrated circuit, i.e. the HCIC, is a main component in the semiconductor circuit. The HCIC is an integrated circuit product converting the MCU signal into a driving IGBT signal. The HCIC integrates the PMOS tube, NMOS tube, transistor, diode, voltage stabilizing tube, resistor and capacitor together to form the Smith, low-voltage LEVELSHIFT, high-voltage LEVELSHIFT, pulse generating circuit, dead zone circuit, interlocking circuit, delay circuit, filter circuit, over-current protection circuit and over-heat protection circuit, under-voltage protection circuit and the like. The HCIC receives the control signal of the MCU on one hand and drives the subsequent IGBT or MOS to work, and sends the state detection signal of the system back to the MCU on the other hand. It is the key chip inside the IPM.

[0003] In the implementation process, the inventor found that at least the following problems exist in the prior art: At present, the HCIC generally does not integrate the bootstrap function and needs to be connected to the external bootstrap circuit, which includes the bootstrap diode (BSD), current limiting resistor, bootstrap capacitor, filter capacitor, voltage stabilizing diode and the like. This increases the application cost of the product. In addition, the HCIC does not set the pre-charge time, which easily causes the problem of low bootstrap capacitor voltage and cannot work, and the MCU needs to perform the software pre-charge when the product is powered on. When the VCC is powered on again after power off due to some reasons, the MCU generally does not perform the pre-charge, which reduces the product reliability. SUMMARY

[0004] Therefore, it is necessary to provide a high-voltage integrated circuit, a semiconductor circuit and a preparation method thereof in view of the problems in the prior art that the HCIC needs to be connected to the external bootstrap circuit, the product application cost is increased, the MCU does not set the pre-charge time, the bootstrap capacitor voltage is low and cannot work, and the product reliability is reduced.

[0005] Specifically, the present application discloses a high-voltage integrated circuit, comprising:

[0006] The HCIC basic circuit includes a first low-voltage side power supply port and a first high-voltage side floating power supply port.

[0007] The bootstrap circuit is connected with the HVIC basic circuit; the bootstrap circuit is configured to obtain a pre-charge signal, and control the first low-voltage side power port of the HVIC basic circuit to charge the first high-voltage side floating power port of the HVIC basic circuit according to the pre-charge signal;

[0008] The pre-charge control circuit is connected with the HVIC basic circuit and the bootstrap circuit respectively, and is configured to transmit the pre-charge signal to the bootstrap circuit when it is detected that the output voltage of the first low-voltage side power port of the HVIC basic circuit meets a preset threshold range and the HVIC basic circuit is in a non-protection state, so that the HVIC basic circuit enters a pre-charge state; the pre-charge control circuit is further configured to transmit a stop enable signal to the HVIC basic circuit when the HVIC basic circuit is in the pre-charge state; the stop enable signal is used to instruct the HVIC basic circuit to stop driving signal output.

[0009] Optionally, the bootstrap circuit comprises a charge pump circuit, a bootstrap MOS, a bootstrap MOS driving circuit and a bootstrap logic control circuit.

[0010] The charge pump circuit and the bootstrap logic control circuit are connected with the bootstrap MOS driving circuit respectively; the bootstrap MOS driving circuit is connected with the gate of the bootstrap MOS; the source of the bootstrap MOS is connected with the first low-voltage side power port of the HVIC basic circuit; the drain of the bootstrap MOS is connected with the first high-voltage side floating power port of the HVIC basic circuit; the bootstrap logic control circuit is connected with the pre-charge control circuit and the HVIC basic circuit respectively.

[0011] Optionally, the pre-charge control circuit comprises a voltage rising edge detection circuit, a charging timing circuit and a pre-charge logic control circuit.

[0012] The voltage rising edge detection circuit, the charging timing circuit and the pre-charge logic control circuit are connected with each other in pairs; the voltage rising edge detection circuit is connected with the first low-voltage side power port of the HVIC basic circuit; the voltage rising edge detection circuit is connected with the pre-charge control circuit and the HVIC basic circuit respectively.

[0013] Optionally, the charge pump circuit comprises an oscillator, a first driver, a second driver, a first capacitor, a second capacitor, a third capacitor, a first diode, a second diode and a voltage stabilizing tube.

[0014] The input end of the oscillator is connected with the first driver; the output end of the first driver is connected with the input end of the second driver and the first end of the first capacitor respectively; the output end of the second driver is connected with the first end of the second capacitor; the power supply end of the first driver and the power supply end of the second driver are connected with the first low-voltage side power port of the HVIC basic circuit respectively; the grounding end of the first driver and the grounding end of the second driver are connected with the ground wire respectively; the second end of the first capacitor and the second end of the second capacitor are connected with the first end of the third capacitor respectively; the negative electrode of the first diode is connected with the second end of the first capacitor, the negative electrode of the second diode is connected with the second end of the second capacitor, and the positive electrode of the first diode, the positive electrode of the second diode and the second end of the third capacitor are connected with the first low-voltage side power port of the HVIC basic circuit respectively; the positive electrode of the voltage stabilizing tube is connected with the ground wire, and the negative electrode of the voltage stabilizing tube is connected with the first end of the third capacitor; the first end of the third capacitor is connected with the bootstrap MOS drive circuit.

[0015] Optionally, the HVIC basic circuit further comprises an interlocking and dead zone circuit; the interlocking and dead zone circuit comprises a positive logic high-voltage side drive end point and a positive logic low-voltage side drive end point; the bootstrap logic control circuit comprises a first NOT gate logic, a second NOT gate logic, a third NOT gate logic, a fourth NOT gate logic, a fifth NOT gate logic, a first NAND gate logic, a second NAND gate logic and a first NOR gate logic;

[0016] The input end of the first NOT gate logic is connected with the positive logic high-voltage side drive end point, and the output end of the first NOT gate logic is connected with the second input end of the first NAND gate logic; the first input end of the first NAND gate logic is connected with the positive logic low-voltage side drive end point, and the output end of the first NAND gate logic is connected with the input end of the second NOT gate logic; the output end of the second NOT gate logic is connected with the first input end of the second NAND gate logic; the input end of the third NOT gate logic is connected with the first high-voltage side floating power bias voltage port of the HVIC basic circuit, and the output end of the third NOT gate logic is connected with the second input end of the second NAND gate logic; the output end of the second NAND gate logic is connected with the input end of the fourth NOT gate logic, and the output end of the fourth NOT gate logic is connected with the second input end of the first NOR gate logic; the first input end of the first NOR gate logic is connected with the pre-charge control circuit, the output end of the first NOR gate logic is connected with the input end of the fifth NOT gate logic, and the output end of the fifth NOT gate logic is connected with the bootstrap MOS drive circuit.

[0017] Optionally, the voltage rising edge detection circuit comprises a first logic control sub-circuit, a first comparator, a second comparator, a first resistor, a second resistor, a first power supply and a second power supply.

[0018] The first end of the first resistor is connected to a first low-voltage side power port of the HVIC basic circuit, the second end of the first resistor is connected to the first end of the second resistor, and the second end of the second resistor is connected to a ground wire; the first input end of the first comparator is connected to the second end of the first resistor, and the second input end of the first comparator is connected to the positive pole of the first power supply; the first input end of the second comparator is connected to the first end of the second resistor, and the second input end of the second comparator is connected to the positive pole of the second power supply; the negative pole of the first power supply and the negative pole of the second power supply are respectively connected to the ground wire; the output end of the first comparator and the output end of the second comparator are respectively connected to the first logic control sub-circuit; and the first logic control circuit is respectively connected to the charging timing circuit and the pre-charge logic control circuit.

[0019] Optionally, the charging timing circuit comprises an input logic control sub-circuit, an output logic control sub-circuit, a third comparator, a third resistor, a third power supply, a fourth capacitor, a sixth NOT gate logic and a seventh NOT gate logic.

[0020] The input end of the input logic control sub-circuit is connected to the first logic control sub-circuit, the output end of the input logic control sub-circuit is connected to the input end of the sixth NOT gate logic, the output end of the sixth NOT gate logic is connected to the input end of the seventh NOT gate logic, the output end of the seventh NOT gate logic is connected to the first end of the third resistor, the second end of the third resistor is connected to the first input end of the third comparator; the second input end of the third comparator is connected to the positive pole of the third power supply; the first end of the fourth capacitor is connected to the second end of the third resistor, and the second end of the fourth capacitor and the negative pole of the third power supply are respectively connected to the ground wire; the output end of the third comparator is connected to the input end of the output logic control sub-circuit, and the output end of the output logic control sub-circuit is connected to the pre-charge logic control circuit.

[0021] Optionally, the HVIC basic circuit further comprises a protection signal detection port and an enable port; and the pre-charge logic control circuit comprises an eighth NOT gate logic, a ninth NOT gate logic, a tenth NOT gate logic, an eleventh NOT gate logic, a third NAND gate logic and a fourth NAND gate logic.

[0022] The first input end of the third NAND gate logic device is connected with the first logic control sub-circuit, the second input end of the third NAND gate logic device is connected with the output end of the eighth NOT gate logic device, and the output end of the third NAND gate logic device is connected with the input end of the ninth NOT gate logic device; the input end of the eighth NOT gate logic device is connected with the output logic control sub-circuit; the output end of the ninth NOT gate logic device is connected with the first input end of the fourth NAND gate logic device, the second input end of the fourth NAND gate logic device is connected with the output end of the tenth NOT gate logic device, and the output end of the fourth NAND gate logic device is connected with the input end of the eleventh NOT gate logic device; the input end of the tenth NOT gate logic device is connected with the protection signal detection port of the HVIC basic circuit; the output end of the eleventh NOT gate logic device is connected with the bootstrap logic control circuit; and the output end of the fourth NAND gate logic device is connected with the enable port of the HVIC basic circuit.

[0023] The application further discloses a semiconductor circuit, comprising:

[0024] A circuit substrate, wherein an insulating layer is arranged on the circuit substrate;

[0025] A circuit layer, wherein the circuit layer is arranged on the insulating layer;

[0026] A plurality of pins, wherein the first ends of the plurality of pins are respectively electrically connected with the circuit layer;

[0027] A sealing body, wherein the sealing body wraps the circuit substrate and the circuit layer connected with the pins;

[0028] The second ends of the pins are respectively led out from the first side of the sealing body; the circuit layer comprises a bridge arm module and the high-voltage integrated circuit in any one of the above; and the bridge arm module is coupled with the high-voltage integrated circuit.

[0029] The application further discloses a preparation method of the semiconductor circuit, comprising the following steps:

[0030] Providing a circuit substrate;

[0031] Preparing an insulating layer on the circuit substrate;

[0032] Preparing a circuit layer on the insulating layer; wherein the circuit layer comprises a bridge arm module and the high-voltage integrated circuit in any one of the above; and the bridge arm module is connected with the high-voltage integrated circuit through a bonding wire;

[0033] Arranging a plurality of pins on the circuit layer, and connecting the first ends of the plurality of pins with the circuit layer through metal wires;

[0034] Injecting the circuit substrate provided with the circuit layer and the plurality of pins through a packaging mold to form a sealing body, and leading the second ends of the pins out from the first side of the sealing body to form a semiconductor circuit.

[0035] One of the above technical solutions has the following advantages and beneficial effects:

[0036] In the above-mentioned embodiments of the high-voltage integrated circuit, by designing the bootstrap circuit and the pre-charge control circuit on the basis circuit of the HVIC, that is, by connecting the bootstrap circuit to the basis circuit of the HVIC, and connecting the pre-charge control circuit to the basis circuit of the HVIC and the bootstrap circuit, when the output voltage of the first low-voltage side power port of the basis circuit of the HVIC meets the preset threshold range and the basis circuit of the HVIC is in a non-protection state, the pre-charge control circuit transmits a pre-charge signal to the bootstrap circuit, so that the basis circuit of the HVIC enters a pre-charge state; and when the basis circuit of the HVIC is in the pre-charge state, the pre-charge control circuit transmits a stop enable signal to the basis circuit of the HVIC, so that the basis circuit of the HVIC stops driving signal output according to the stop enable signal, and then the bootstrap circuit can obtain the pre-charge signal and control the first low-voltage side power port of the basis circuit of the HVIC to charge the first high-voltage side floating power port of the basis circuit of the HVIC, thereby realizing integrated design of the bootstrap circuit, the pre-charge control circuit and the basis circuit of the HVIC, and realizing pre-charge of the basis circuit of the HVIC. The HVIC integrated with the bootstrap circuit and the pre-charge control circuit of the present application does not need an additional bootstrap circuit, reduces the product application cost, and does not need to design a pre-charge time in the MCU program design; in addition, the HVIC integrated with the bootstrap circuit and the pre-charge circuit can better guarantee the bootstrap capacitor voltage in the power-down and power-up condition, thereby improving the product reliability. BRIEF DESCRIPTION OF DRAWINGS

[0037] Figure 1 FIG. 1 is a first circuit structure schematic diagram of the high-voltage integrated circuit of the embodiment of the present application;

[0038] Figure 2 FIG. 2 is a second circuit structure schematic diagram of the high-voltage integrated circuit of the embodiment of the present application;

[0039] Figure 3 FIG. 3 is a circuit structure schematic diagram of the charge pump circuit of the embodiment of the present application;

[0040] Figure 4 FIG. 4 is a circuit structure schematic diagram of the bootstrap logic control circuit of the embodiment of the present application;

[0041] Figure 5 FIG. 5 is a circuit structure schematic diagram of the voltage rising edge detection circuit of the embodiment of the present application;

[0042] Figure 6 FIG. 6 is a circuit structure schematic diagram of the charging timing circuit of the embodiment of the present application;

[0043] Figure 7 FIG. 7 is a circuit structure schematic diagram of the pre-charge logic control circuit of the embodiment of the present application;

[0044] Figure 8 A topology diagram of a half-bridge driving circuit for a traditional HVIC application;

[0045] Figure 9 A preparation step flow chart of the semiconductor circuit of the embodiment of the present application.

[0046] Reference signs:

[0047] HVIC base circuit 100, bootstrap circuit 200, charge pump circuit 210, oscillator 212, first driver 214, second driver 216, bootstrap MOS 220, bootstrap MOS driving circuit 230, bootstrap logic control circuit 240, pre-charge control circuit 300, voltage rising edge detection circuit 310, first logic control sub-circuit 312, charge timing circuit 320, input logic control sub-circuit 322, output logic control sub-circuit 324, pre-charge logic control circuit 330, first capacitor C1, second capacitor C2, third capacitor C3, fourth capacitor C4, first diode D1, second diode D2, voltage stabilizing tube G1, first comparator B1, second comparator B2, third comparator B3, first resistor R1, second resistor R2, third resistor R3, first power supply V1, second power supply V2, third power supply V3, first NOT gate logic F1, second NOT gate logic F2, third NOT gate logic F3, fourth NOT gate logic F4, fifth NOT gate logic F5, sixth NOT gate logic F6, seventh NOT gate logic F7, eighth NOT gate logic F8, ninth NOT gate logic F9, tenth NOT gate logic F10, eleventh NOT gate logic F11, first NAND gate logic Y1, second NAND gate logic Y2, third NAND gate logic Y3, fourth NAND gate logic Y4, first NOR gate logic H1. DETAILED DESCRIPTION

[0048] In order to enable those skilled in the art to better understand the scheme of the present application, the technical scheme in the embodiments of the present application will be described clearly and completely below in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative efforts should fall within the protection scope of the present application.

[0049] It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other without structural or functional conflicts. The present application will be described in detail below with reference to the drawings and in combination with the embodiments.

[0050] The traditional HVIC does not have an integrated bootstrap function, and needs to be connected to an external bootstrap circuit, which includes a bootstrap diode (BSD), a current-limiting resistor, a bootstrap capacitor, a filter capacitor, a voltage stabilizing diode, and the like. This increases the application cost of the customer, and also requires the MCU to perform software pre-charging during power-on. The pre-charging process is as follows: after power-on, the MCU does not output a PWM waveform, but needs to input a high-level signal to the lower bridge communication signal (LIN). This signal can be a plurality of short-duration square wave signals, or a long-duration square wave signal. The lower bridge MOS / IGBT is turned on, the VS level is pulled low, and thus the 15V power supply can charge the bootstrap capacitor through the bootstrap diode (BSD). After the bootstrap capacitor voltage approaches 15V, the MCU starts to normally output the PWM signal to the HVIC, which reduces the product reliability.

[0051] The semiconductor circuit mentioned in the present application is a circuit module integrating power switching devices and high-voltage driving circuits, and sealed and packaged on the outside, which is widely used in the field of power electronics, such as frequency converters for driving motors, various inverter voltages, frequency conversion speed regulation, metallurgical machinery, electric traction, frequency conversion household appliances, and the like. The semiconductor circuit here also has many other names, such as modular intelligent power system (MIPS), intelligent power module (IPM), or hybrid integrated circuit, power semiconductor module, power module, and the like. In the following embodiments of the present application, it is uniformly referred to as a semiconductor circuit.

[0052] In one embodiment, as Figures 1-9As shown, the application provides a high-voltage integrated circuit, which comprises an HVIC basic circuit 100, a bootstrap circuit 200 and a pre-charge control circuit 300; the HVIC basic circuit 100 comprises a first low-voltage side power supply port and a first high-voltage side floating power supply port. The bootstrap circuit 200 is connected to the HVIC basic circuit 100; the bootstrap circuit 200 is configured to obtain a pre-charge signal, and according to the pre-charge signal, control the first low-voltage side power supply port of the HVIC basic circuit 100 to charge the first high-voltage side floating power supply port of the HVIC basic circuit 100. The pre-charge control circuit 300 is connected to the HVIC basic circuit 100 and the bootstrap circuit 200 respectively, and is configured to, when detecting that the output voltage of the first low-voltage side power supply port of the HVIC basic circuit 100 meets a preset threshold range and the HVIC basic circuit 100 is in a non-protection state, transmit the pre-charge signal to the bootstrap circuit 200, so as to make the HVIC basic circuit 100 enter a pre-charge state; the pre-charge control circuit 300 is further configured to, when the HVIC basic circuit 100 is in the pre-charge state, transmit a stop enable signal to the HVIC basic circuit 100; the stop enable signal is used to instruct the HVIC basic circuit 100 to stop driving signal output.

[0053] Among them, the HVIC basic circuit 100 integrates PMOS, NMOS, triode, diode, voltage stabilizing tube G1, resistance and capacitor together to form a Smith circuit, a low-voltage LEVELSHIFT (level shift) circuit, a high-voltage LEVELSHIFT (level shift) circuit, a pulse generating circuit, a dead zone and interlocking circuit, a delay circuit, a filter circuit, an overcurrent protection circuit and an overheat protection circuit, an under-voltage protection circuit and the like.

[0054] The HVIC basic circuit 100 can include a first low-voltage side power port (i.e., a VCC port) and a first high-voltage side floating power port (i.e., a VB port). The HVIC circuit further integrates a bootstrap circuit 200 and a pre-charge control circuit 300. The pre-charge control circuit 300 is used to detect the working state of the HVIC basic circuit 100, and when the working state of the HVIC basic circuit 100 meets the preset condition, a pre-charge signal is generated and transmitted to the bootstrap circuit 200, and then the bootstrap circuit 200 controls the first low-voltage side power port (i.e., the VCC port) of the HVIC basic circuit 100 to charge the first high-voltage side floating power port (i.e., the VB port) of the HVIC basic circuit 100 according to the received pre-charge signal. Specifically, the pre-charge control circuit 300 can detect the output state of the first low-voltage side power port of the HVIC basic circuit 100, and when it is detected that the output voltage of the first low-voltage side power port of the HVIC basic circuit 100 meets the preset threshold range, it is determined that the first low-voltage side power port is powered normally. For example, the pre-charge control circuit 300 can detect the rising edge of the VCC voltage of the first low-voltage side power port of the HVIC basic circuit 100 to determine whether the VCC is in a power-on state and whether the VCC voltage is normal.

[0055] The pre-charge control circuit 300 can also detect whether the HVIC basic circuit 100 is in a non-protection state. If it is detected that the HVIC basic circuit 100 is in a protection state, the charging process will not be started even if the first low-voltage side power port has been powered on. The pre-charge control circuit 300 determines that the HVIC basic circuit 100 is running normally when it is detected that the HVIC basic circuit 100 is in a non-protection state, i.e., there is no overcurrent, overtemperature, undervoltage, or other abnormal running conditions. The pre-charge control circuit 300 transmits a stop enable signal to the HVIC basic circuit 100 when the HVIC basic circuit 100 is in a pre-charge state, so that the HVIC basic circuit 100 stops driving signal output according to the stop enable signal. For example, the pre-charge control circuit 300 transmits a stop enable signal to the HVIC basic circuit 100 when it is in a pre-charge state, so that the enable port of the HVIC basic circuit 100 is at a low level, and then the HVIC basic circuit 100 will not work even if there is an input signal, ensuring that the pre-charge process of the circuit is carried out normally. The pre-charge control circuit 300 integrates the logic and timing of pre-charge, so that the pre-charge time does not need to be additionally increased on the application software, improving the product reliability.

[0056] The bootstrap circuit 200 can integrate the bootstrap diode, the current limiting resistor, the filter capacitor and the energy storage capacitor on the HVIC basic circuit 100, realizing high integration of the circuit. In one example, considering that the energy storage capacitor has a large volume, in order to reduce the overall volume of the high-voltage integrated circuit, the bootstrap circuit 200 can integrate the bootstrap diode, the current limiting resistor and the filter capacitor on the HVIC basic circuit 100, and set the energy storage capacitor outside the high-voltage integrated circuit, that is, only the energy storage capacitor needs to be set in the application circuit to realize the bootstrap function of the high-voltage integrated circuit. The bootstrap circuit 200 obtains the pre-charge signal transmitted by the pre-charge control circuit 300, and controls the first low-voltage side power port of the HVIC basic circuit 100 to charge the first high-voltage side floating power port of the HVIC basic circuit 100 according to the pre-charge signal, thereby realizing pre-charge of the HVIC basic circuit 100.

[0057] In the above embodiment, by designing the bootstrap circuit 200 and the pre-charge control circuit 300 on the HVIC basic circuit 100, that is, by connecting the HVIC basic circuit 100 through the bootstrap circuit 200, and connecting the HVIC basic circuit 100 and the bootstrap circuit 200 through the pre-charge control circuit 300, when the pre-charge control circuit 300 detects that the output voltage of the first low-voltage side power port of the HVIC basic circuit 100 meets the preset threshold range and the HVIC basic circuit 100 is in a non-protection state, the pre-charge control circuit 300 transmits a pre-charge signal to the bootstrap circuit 200, so that the HVIC basic circuit 100 enters a pre-charge state; and when the HVIC basic circuit 100 is in the pre-charge state, the pre-charge control circuit 300 transmits a stop enable signal to the HVIC basic circuit 100, so that the HVIC basic circuit 100 stops outputting a drive signal according to the stop enable signal, and then the bootstrap circuit 200 can obtain the pre-charge signal and control the first low-voltage side power port of the HVIC basic circuit 100 to charge the first high-voltage side floating power port of the HVIC basic circuit 100 according to the pre-charge signal, realizing integrated design of the bootstrap circuit 200, the pre-charge control circuit 300 and the HVIC basic circuit 100, and realizing pre-charge of the HVIC basic circuit 100. By integrating the bootstrap circuit 200 and the pre-charge control circuit 300 in the HVIC, the bootstrap circuit 200 does not need to be added externally, reducing the application cost of the product, and the pre-charge time does not need to be designed in the MCU program design; in addition, the HVIC integrated with the bootstrap circuit 200 and the pre-charge circuit can better guarantee the bootstrap capacitor voltage in the case of power failure and power on, improving the reliability of the product.

[0058] In one example, as shown in FIG. 6, the bootstrap circuit 200 and the pre-charge control circuit 300 are integrated on the HVIC basic circuit 100. Figure 2In the embodiment, the bootstrap circuit 200 comprises a charge pump circuit 210, a bootstrap MOS 220, a bootstrap MOS driving circuit 230, and a bootstrap logic control circuit 240. The charge pump circuit 210 and the bootstrap logic control circuit 240 are connected to the bootstrap MOS driving circuit 230 respectively; the bootstrap MOS driving circuit 230 is connected to the gate of the bootstrap MOS 220; the source of the bootstrap MOS 220 is connected to the first low-voltage side power supply port of the HVIC basic circuit 100; the drain of the bootstrap MOS 220 is connected to the first high-voltage side floating power supply port of the HVIC basic circuit 100; the bootstrap logic control circuit 240 is connected to the pre-charge control circuit 300 and the HVIC basic circuit 100 respectively.

[0059] The charge pump circuit 210 can be used to supply power to the bootstrap MOS driving circuit 230. The bootstrap MOS 220 is the abbreviation of Metal-Oxide-Semiconductor Field-Effect Transistor. When the bootstrap MOS 220 is turned on, the charging path between the first low-voltage side power supply port of the HVIC basic circuit 100 and the first high-voltage side floating power supply port of the HVIC basic circuit 100 is turned on; when the bootstrap MOS 220 is turned off, the charging path between the first low-voltage side power supply port of the HVIC basic circuit 100 and the first high-voltage side floating power supply port of the HVIC basic circuit 100 is turned off. The bootstrap MOS driving circuit 230 can be used to drive the bootstrap MOS 220 to turn on or turn off. The bootstrap logic control circuit 240 can be used to obtain the pre-charge signal transmitted by the pre-charge control circuit 300, and control the bootstrap MOS driving circuit 230 to work according to the pre-charge signal; for example, the bootstrap logic control circuit 240 can transmit a driving control signal to the bootstrap MOS driving circuit 230 according to the pre-charge signal, so that the bootstrap MOS driving circuit 230 turns on the bootstrap MOS 220 according to the driving control signal, and then realizes the charging from the first low-voltage side power supply port (i.e. the VCC port) of the HVIC basic circuit 100 to the first high-voltage side floating power supply port (i.e. the VB port) of the HVIC basic circuit 100; when the bootstrap MOS 220 is turned off, the VB-VCC voltage resistance (when the high-side driving floating works, the VB-VCC has high voltage) is realized.

[0060] Specifically, the charge pump circuit 210 and the bootstrap logic control circuit 240 are connected to the bootstrap MOS drive circuit 230, respectively, and the bootstrap MOS drive circuit 230 is connected to the gate of the bootstrap MOS 220 to control the turn-on and turn-off of the bootstrap MOS; the source of the bootstrap MOS 220 is connected to the first low-voltage side power port of the HVIC basic circuit 100; the drain of the bootstrap MOS 220 is connected to the first high-voltage side floating power port of the HVIC basic circuit 100; the bootstrap logic control circuit 240 is connected to the pre-charge control circuit 300 and the HVIC basic circuit 100, respectively; when the bootstrap logic control circuit 240 receives a pre-charge signal, the bootstrap logic drive circuit is controlled to work, and the bootstrap logic drive circuit is powered based on the charge pump circuit 210, so that the bootstrap logic drive circuit drives the bootstrap MOS 220 to turn on, and then the pre-charge of the VCC port to the VB port is realized through the turn-on of the bootstrap MOS.

[0061] In one example, as Figure 2 The pre-charge control circuit 300 includes a voltage rising edge detection circuit 310, a charging timing circuit 320, and a pre-charge logic control circuit 330. The voltage rising edge detection circuit 310, the charging timing circuit 320, and the pre-charge logic control circuit 330 are connected to each other in pairs; the voltage rising edge detection circuit 310 is connected to the first low-voltage side power port of the HVIC basic circuit 100; the voltage rising edge detection circuit 310 is connected to the pre-charge control circuit 300 and the HVIC basic circuit 100, respectively.

[0062] The voltage rising edge detection circuit 310 can be used to detect the process of the VCC voltage jump, that is, the voltage rising edge detection circuit 310 is used to detect the VCC voltage of the first low-voltage side power port of the HVIC basic circuit 100 to detect whether the VCC is in the power-on state and whether the VCC voltage is normal. In one example, when the voltage rising edge detection circuit 310 detects a rising edge signal, a timing start signal and a charging start signal are generated, and the timing start signal is transmitted to the charging timing circuit 320; the charging start signal is transmitted to the pre-charge logic control circuit 330. The charging timing circuit 320 can be composed of an RC delay circuit; when the charging timing circuit 320 receives the timing start signal transmitted by the voltage rising edge detection circuit 310, the timing function is started, and after the timing ends, the charging end signal is output to the pre-charge logic control circuit 330.

[0063] Specifically, by the rising edge detection circuit 310, charging timing circuit 320 and pre-charge logic control circuit 330 three two two mutual connection between each other; voltage rising edge detection circuit 310 connection HVIC basic circuit 100 of the first low-voltage side power port; voltage rising edge detection circuit 310 are connected to the pre-charge control circuit 300, HVIC basic circuit 100; when the voltage rising edge detection circuit 310 real-time detection detection HVIC basic circuit 100 of the first low-voltage side power port VCC voltage, in the detection of VCC rising edge, will generate timing start signal transmission to the charging timing circuit 320, inform the charging timing circuit 320 start timing; and will generate the charging start signal transmission to the pre-charge logic control circuit 330, inform the pre-charge logic control circuit 330 start pre-charge logic judgment, and in the pre-charge logic decision to meet the pre-set condition, to the bootstrap circuit 200 of the pre-charge control circuit 300 output pre-charge signal, so that the bootstrap circuit 200 pre-charge operation. When the charging timing circuit 320 timing is complete, to the pre-charge logic control circuit 330 transmission charging end signal, inform the pre-charge logic control circuit 330 to the bootstrap circuit 200 of the pre-charge control circuit 300 output specified signal, so that the bootstrap circuit 200 stop charging.

[0064] For example, the pre-charge logic control circuit 330 in the charging start signal is valid and the charging end signal is invalid, and at this time there is no protection signal (no overcurrent, overtemperature, undervoltage, etc.), then to the bootstrap circuit 200 output pre-charge signal, let the bootstrap circuit 200 inside start charging bootstrap capacitor; at the same time to the enable end of HVIC basic circuit 100 send not stop enable signal, HVIC even have input signal, no output, until the charging end, stop enable signal to restore normal, this time output will restore, HVIC restore normal working state.

[0065] In one example, as Figure 3In the circuit 210, the charge pump circuit includes an oscillator 212, a first driver 214, a second driver 216, a first capacitor C1, a second capacitor C2, a third capacitor C3, a first diode D1, a second diode D2, and a Zener diode G1. The oscillator 212 is connected to the input terminal of the first driver 214; the output terminal of the first driver 214 is connected to the input terminal of the second driver 216 and the first terminal of the first capacitor C1; the output terminal of the second driver 216 is connected to the first terminal of the second capacitor C2; the power supply terminals of the first driver 214 and the second driver 216 are connected to the first low-voltage side power supply port of the HVIC base circuit 100; the ground terminals of the first driver 214 and the second driver 216 are connected to the ground wire; the second terminal of the first capacitor C1 and the second driver C2 are connected to the ground wire; the second terminal of the first capacitor C1 and the second driver C2 are connected to the ground wire. The second terminal of capacitor C2 is connected to the first terminal of capacitor C3; the cathode of diode D1 is connected to the second terminal of capacitor C1, the cathode of diode D2 is connected to the second terminal of capacitor C2, and the anodes of diodes D1, D2, and C3 are connected to the first low-voltage side power supply port of HVIC basic circuit 100; the anode of Zener diode G1 is connected to ground, and the cathode of Zener diode G1 is connected to the first terminal of capacitor C3; the first terminal of capacitor C3 is connected to bootstrap MOS drive circuit 230.

[0066] The oscillator 212 generates a square wave signal of a certain frequency (around 100kHz). Under the square wave signal, the driver periodically charges the two capacitors (i.e., the first capacitor C1 and the second capacitor C2), and then charges the third capacitor (i.e., the third capacitor C3) from the two capacitors to bring the voltage to a predetermined voltage value (such as around 30V) to supply power to the bootstrap MOS drive circuit 230.

[0067] In one example, such as Figure 4 In the HVIC basic circuit 100, interlocking and dead-time circuits are also included; the interlocking and dead-time circuits include positive logic high-voltage side drive terminals and positive logic low-voltage side drive terminals; the bootstrap logic control circuit 240 includes a first NOT gate logic F1, a second NOT gate logic F2, a third NOT gate logic F3, a fourth NOT gate logic F4, a fifth NOT gate logic F5, a first NAND gate logic Y1, a second NAND gate logic Y2, and a first NOR gate logic H1.

[0068] The input end of the first NAND gate logic F1 is connected with the positive logic high voltage side driving end point, the output end of the first NAND gate logic F1 is connected with the second input end of the first NAND gate logic Y1; the first input end of the first NAND gate logic Y1 is connected with the positive logic low voltage side driving end point, the output end of the first NAND gate logic Y1 is connected with the input end of the second NAND gate logic F2; the output end of the second NAND gate logic F2 is connected with the first input end of the second NAND gate logic Y2; the input end of the third NAND gate logic F3 is connected with the first high voltage side floating power supply bias voltage port of the HVIC basic circuit 100, the output end of the third NAND gate logic F3 is connected with the second input end of the second NAND gate logic Y2; the output end of the second NAND gate logic Y2 is connected with the input end of the fourth NAND gate logic F4, the output end of the fourth NAND gate logic F4 is connected with the second input end of the first NOR gate logic H1; the first input end of the first NOR gate logic H1 is connected with the pre-charge control circuit 300, the output end of the first NOR gate logic H1 is connected with the input end of the fifth NAND gate logic F5, the output end of the fifth NAND gate logic F5 is connected with the bootstrap MOS drive circuit 230.

[0069] The positive logic high voltage side driving end point of the interlocking and dead zone circuit can be used to output a high voltage side signal (i.e. H-signal signal); the positive logic low voltage side driving end point of the interlocking and dead zone circuit can be used to output a low voltage side signal (i.e. L-signal signal). The bootstrap logic control circuit 240 can receive the high voltage side signal output by the positive logic high voltage side driving end point of the interlocking and dead zone circuit and the low voltage side signal output by the positive logic low voltage side driving end point of the interlocking and dead zone circuit; the bootstrap logic control circuit 240 can also receive the VS signal transmitted by the first high voltage side floating power supply bias voltage port of the HVIC basic circuit 100, and process the received high voltage side signal, low voltage side signal and VS signal; when the high voltage side signal is invalid, the low voltage side signal is valid and the voltage value of the VS signal is not higher than a preset value (such as 15V), the bootstrap logic control circuit 240 outputs a driving control signal to the bootstrap MOS drive circuit 230, so that the bootstrap MOS drive circuit 230 drives the bootstrap MOS 220 to conduct, thereby realizing the pre-charge of the bootstrap circuit 200. In addition, the bootstrap logic control circuit 240 can also receive the pre-charge signal transmitted by the pre-charge control circuit 300, and when the pre-charge signal is valid, the bootstrap logic control circuit 240 outputs a driving control signal to the bootstrap MOS drive circuit 230, so that the bootstrap MOS drive circuit 230 drives the bootstrap MOS 220 to conduct, thereby realizing the pre-charge of the bootstrap circuit 200.

[0070] For example, the bootstrap circuit 200 is enabled to turn on the bootstrap MOS 220 upon receiving some signals of the HVIC base circuit 100. The bootstrap logic control circuit 240 gives a signal to the bootstrap MOS drive circuit 230 to turn on the bootstrap MOS 220, and the bootstrap MOS 220 is driven by the bootstrap MOS drive circuit 230. For example, when the bootstrap logic control circuit 240 receives a low-voltage side signal valid and a high-voltage side signal invalid (i.e., L-signal signal valid and H-signal signal invalid) of the HVIC base circuit 100, and the VS signal is not higher than 15V, the bootstrap MOS 220 is driven to be turned on by the bootstrap MOS drive circuit 230. Alternatively, when the bootstrap logic control circuit 240 receives a pre-charge signal and the pre-charge signal is valid, the bootstrap MOS 220 is driven to be turned on by the bootstrap MOS drive circuit 230, and the first low-voltage side power port of the HVIC base circuit 100 charges the first high-voltage side floating power port of the HVIC base circuit 100, i.e., the pre-charge of the HVIC base circuit 100 is realized.

[0071] In one example, as shown in Figure 5 The voltage rising edge detection circuit 310 includes a first logic control sub-circuit 312, a first comparator B1, a second comparator B2, a first resistor R1, a second resistor R2, a first power supply V1 and a second power supply V2. The first end of the first resistor R1 is connected to the first low-voltage side power port of the HVIC base circuit 100, the second end of the first resistor R1 is connected to the first end of the second resistor R2, and the second end of the second resistor R2 is connected to the ground wire; the first input end of the first comparator B1 is connected to the second end of the first resistor R1, and the second input end of the first comparator B1 is connected to the positive electrode of the first power supply V1; the first input end of the second comparator B2 is connected to the first end of the second resistor R2, and the second input end of the second comparator B2 is connected to the positive electrode of the second power supply V2; the negative electrode of the first power supply V1 and the negative electrode of the second power supply V2 are respectively connected to the ground wire; the output end of the first comparator B1 and the output end of the second comparator B2 are respectively connected to the input end of the first logic control sub-circuit 312; the charge start signal output end and the count start signal output end of the first logic control circuit are respectively connected to the pre-charge logic control circuit 330 and the charge timing circuit 320.

[0072] The voltage rising edge detection circuit 310 can be used to detect the process of the VCC voltage jump. The double comparator (i.e. the first comparator B1 and the second comparator B2) and the first logic control sub-circuit 312 are composed of two levels of comparison. When the monitoring point voltage is lower than a certain lower level V1 at time t1, and the monitoring point voltage is higher than a certain higher level V2 after a very short period of time t2, it is considered that it is a rising edge signal. Both t1 and t2 are detection times generated by the RC delay circuit inside the first logic control sub-circuit 312. After t1 detection, the RC delay At1 is performed, and then t2 detection is performed. By adjusting the values of R (i.e. resistance) and C (i.e. capacitance), a suitable At1 can be obtained. After detecting the rising edge signal, the first logic control sub-circuit 312 generates two signals: a timing start signal and a charging start signal. The first logic control sub-circuit 312 transmits the generated timing start signal to the charging timing circuit 320, informs the charging timing circuit 320 to start timing; and transmits the generated charging start signal to the pre-charge logic control circuit 330, informs the pre-charge logic control circuit 330 to start the pre-charge logic judgment, and when the pre-charge logic judgment meets the preset condition, outputs a pre-charge signal to the pre-charge control circuit 300 of the bootstrap circuit 200, so that the bootstrap circuit 200 performs the pre-charge operation.

[0073] In one example, as Figure 6 The charging timing circuit 320 includes an input logic control sub-circuit 322, an output logic control sub-circuit 324, a third comparator B3, a third resistor R3, a third power supply V3, a fourth capacitor C4, a sixth NOT gate logic F6, and a seventh NOT gate logic F7.

[0074] The input end of the input logic control sub-circuit 322 is connected to the first logic control sub-circuit 312. The output end of the input logic control sub-circuit 322 is connected to the input end of the sixth NOT gate logic F6. The output end of the sixth NOT gate logic F6 is connected to the input end of the seventh NOT gate logic F7. The output end of the seventh NOT gate logic F7 is connected to the first end of the third resistor R3. The second end of the third resistor R3 is connected to the first input end of the third comparator B2. The second input end of the third comparator B2 is connected to the positive pole of the third power supply V3. The first end of the fourth capacitor C4 is connected to the second end of the third resistor R3. The second end of the fourth capacitor C4 and the negative pole of the third power supply V3 are respectively connected to the ground. The output end of the third comparator B2 is connected to the input end of the output logic control sub-circuit 324. The output end of the output logic control sub-circuit 324 is connected to the pre-charge logic control circuit 330.

[0075] The input logic control sub-circuit 322 is used to receive the timing start signal transmitted by the first logic control sub-circuit 312. The output logic control sub-circuit 324 is used to transmit a charging end signal to the pre-charge logic control circuit 330.

[0076] For example, the charging timing circuit 320 can also be composed of an RC delay circuit, and the RC constant is generally set to 5-10 ms, i.e., Δt2 is 5-10 ms. After detecting the start charging signal, the input logic circuit starts charging the RC delay circuit, and the time for the capacitor voltage to rise from 0 V to the V3 comparison voltage is Δt2. When the capacitor voltage rises to be higher than the V3 voltage, the third comparator B2 (CMP) outputs a high level, and after processing by the output logic control sub-circuit 324, outputs a charging end signal to the pre-charging logic control circuit 330. The total time Δt2 from the start charging signal to the charging end signal can be adjusted by adjusting the RC parameters, and is adjusted according to the charging speed of the bootstrap circuit 200. The longer Δt2 is, the higher the charging voltage of the bootstrap circuit 200 is. Generally, the charging voltage of the bootstrap circuit 200 should be higher than 14 V.

[0077] In one example, as Figure 7 In the example, the HVIC basic circuit 100 further includes a protection signal detection port and an enable port; and the pre-charging logic control circuit 330 includes an eighth non-inverter F8, a ninth non-inverter F9, a tenth non-inverter F10, an eleventh non-inverter F11, a third NAND logic Y3, and a fourth NAND logic Y4.

[0078] The first input end of the third NAND logic Y3 is connected to the first logic control sub-circuit 312, the second input end of the third NAND logic Y3 is connected to the output end of the eighth non-inverter F8, and the output end of the third NAND logic Y3 is connected to the input end of the ninth non-inverter F9; the input end of the eighth non-inverter F8 is connected to the output logic control sub-circuit 324; the output end of the ninth non-inverter F9 is connected to the first input end of the fourth NAND logic Y4, the second input end of the fourth NAND logic Y4 is connected to the output end of the tenth non-inverter F10, and the output end of the fourth NAND logic Y4 is connected to the input end of the eleventh non-inverter F11; the input end of the tenth non-inverter F10 is connected to the protection signal detection port of the HVIC basic circuit 100; the output end of the eleventh non-inverter F11 is connected to the bootstrap logic control circuit 240; and the output end of the fourth NAND logic Y4 is connected to the enable port of the HVIC basic circuit 100.

[0079] The pre-charge logic control circuit 330 can receive the charge start signal transmitted by the voltage rising edge detection circuit 310 and the charge end signal transmitted by the charge timing circuit 320, and can also obtain the protection signal transmitted by the protection signal detection port of the HVIC basic circuit 100. When the pre-charge logic control circuit 330 obtains the protection signal transmitted by the protection signal detection port of the HVIC basic circuit 100, it indicates that the HVIC has overcurrent, overtemperature, or undervoltage at this time. When the pre-charge logic control circuit 330 does not receive the protection signal transmitted by the protection signal detection port of the HVIC basic circuit 100, it indicates that the HVIC has no overcurrent, overtemperature, or undervoltage at this time.

[0080] For example, based on the logic device inside the pre-charge logic control circuit 330, when the charge start signal is valid and the charge end signal is invalid, and there is no protection signal at this time (no overcurrent, overtemperature, or undervoltage), the pre-charge signal is valid, and the pre-charge signal is output to the bootstrap circuit 200, so that the bootstrap capacitor inside the bootstrap circuit 200 starts to charge; at the same time, the enable end of the HVIC basic circuit 100 is sent a non-stop enable signal, and the HVIC has no output even if there is an input signal until the charging is completed and the stop enable signal returns to normal, at which time the output returns to normal and the HVIC returns to normal working state.

[0081] In the above embodiment, by designing the bootstrap circuit 200 and the pre-charge control circuit 300 on the HVIC basic circuit 100, the bootstrap circuit 200, the pre-charge control circuit 300, and the HVIC basic circuit 100 are integrated and designed, without the need for external bootstrap diode (BSD), current limiting resistor, filter capacitor, voltage stabilizing diode, etc., such as only the bootstrap capacitor needs to be externally connected; and the pre-charge of the HVIC basic circuit 100 is realized, and thus the MCU program does not need to set the pre-charge time. The HVIC integrated with the bootstrap circuit 200 and the pre-charge control circuit 300 of the present application does not need an additional bootstrap circuit 200, reduces the product application cost, and the MCU program does not need to design the pre-charge time; in addition, the HVIC integrated with the bootstrap circuit 200 and the pre-charge circuit can better guarantee the bootstrap capacitor voltage in the case of power failure and power on, and improves the product reliability.

[0082] In one example, the specific setting process of the high-voltage integrated circuit is as follows: first, the bootstrap circuit and the pre-charge control circuit are designed, and MATLAB is used for logic simulation. Then, the charge pump circuit, the bootstrap MOS drive circuit, the bootstrap logic control circuit, the voltage rising edge detection circuit, the charging timing circuit, and the pre-charge logic control circuit are designed, CADENCE is used for circuit design, and SPECTRE is used for circuit function simulation. Then, the bootstrap circuit and the pre-charge control circuit are integrated into the HVIC basic circuit, and the circuit function simulation of the complete HVIC circuit is performed. Secondly, the layout of the bootstrap circuit and the pre-charge control circuit is designed, CADENCE's VIRTUOSO is used for layout design, and MMSIM is used for DRC and LVS error checking. The layout of the bootstrap circuit and the pre-charge control circuit is integrated into the HVIC basic circuit layout, wherein the VCC of the bootstrap circuit and the pre-charge control circuit is connected to the VCC line of the HVIC basic circuit layout; the VB and VS of the bootstrap circuit are connected to the VB and VS of the HVIC basic circuit layout; the Hsignal and Lsignal of the pre-charge control circuit are connected to the Hsignal line and Lsignal line of the dead zone and interlock circuit in the HVIC basic circuit; the stop enable signal line of the pre-charge control circuit is connected to the stop enable signal line of the HVIC basic circuit layout; the pre-charge signal line of the pre-charge control circuit is connected to the control line of the bootstrap circuit; and the protection signal line of the pre-charge control circuit is connected to the protection signal line of the FAULT circuit in the HVIC basic circuit.

[0083] In one embodiment, a semiconductor circuit is also provided, comprising a circuit substrate, a circuit layer, a plurality of pins, and a sealing body; the circuit substrate is provided with an insulating layer; the circuit layer is arranged on the insulating layer; first ends of the plurality of pins are respectively electrically connected to the circuit layer; the sealing body wraps the circuit substrate and the circuit layer connected with the pins; wherein second ends of the pins are respectively led out from a first side of the sealing body; the circuit layer comprises a bridge arm module and the high-voltage integrated circuit of any one of the preceding items; the bridge arm module is coupled to the high-voltage integrated circuit.

[0084] The circuit substrate can be used to carry the entire semiconductor circuit and corresponding components. The circuit substrate can be made of a metal material, such as an aluminum rectangular plate with a thickness of 0.8 mm to 2 mm, and a commonly used thickness of 1.5 mm, mainly for heat conduction and heat dissipation. For example, the circuit substrate can also be made of other metal materials with good heat conductivity, such as a copper rectangular plate. It should be noted that the shape of the circuit substrate is not limited to a rectangular shape, but can also be a circular or trapezoidal shape.

[0085] The insulating layer can be used to prevent the circuit layer from conducting with the circuit substrate. The insulating layer is arranged on the surface of the circuit substrate, and has a relatively thin thickness, generally 50-150um, and commonly 110um. The circuit layer is arranged on the insulating layer, so that the circuit layer is insulated from the circuit substrate, and the high-voltage integrated circuit and the bridge arm module are arranged on the circuit layer. The high-voltage integrated circuit and the bridge arm module are electrically connected through the metal wires.

[0086] The pins can be used to transmit signals to the corresponding internal circuits on the circuit layer, and can also be used to transmit signals output by the corresponding internal circuits on the circuit layer to external modules. The plurality of pins can be used as pin terminals for transmitting low-voltage logic control signals, and the plurality of pins are arranged at at least one side edge of the circuit substrate and are electrically connected to the circuit layer on the circuit substrate. The plurality of pins are welded to the pads of the circuit layer on the circuit substrate by welding such as tin paste welding, so as to realize electrical connection with the circuit layer on the circuit substrate. The plurality of pins can also be used as pin terminals for transmitting high-voltage power output signals, and the plurality of pins are arranged at at least one side edge of the circuit substrate and are electrically connected to the circuit layer on the circuit substrate. The plurality of pins are welded to the pads of the circuit layer on the circuit substrate by welding such as tin paste welding, so as to realize electrical connection with the circuit layer on the circuit substrate.

[0087] The material of the pins can be C194 (-1 / 2H) sheet material (chemical composition: Cu (≧97.0), Fe: 2.4, P: 0.03, Zn: 0.12) or KFC (-1 / 2H) sheet material (chemical composition: Cu (≧99.6), Fe: 0.1 (0.05-0.15), P: 0.03 (0.025-0.04)). The 0.5mm C194 or KFC sheet material is processed by stamping or etching process, and then the surface is plated with nickel with a thickness of 0.1-0.5um and then plated with tin with a thickness of 2-5um. The excess webs of the pins are cut off by a specific device and formed into the required shape.

[0088] It should be noted that after each pin passes out of the first side surface of the sealing body, each pin is bent by a bending process to obtain a first bent end, and then the end of the first bent end is bent to obtain a second bent end. The first bent end can be parallel to the circuit substrate.

[0089] The bridge arm module can include a high-voltage side bridge arm (i.e., an upper bridge arm module) and / or a low-voltage side bridge arm (i.e., a lower bridge arm module). The bridge arm module can include an IGBT and a fast recovery diode, which are respectively bonded to a circuit substrate by silver glue or soldering. The IGBT and the fast recovery diode are respectively connected to a circuit layer by a bonding wire made of gold, copper, or aluminum, etc. In one example, the fast recovery diode is a high-voltage fast recovery diode. The power MOS tube and the fast recovery diode are respectively bonded to the circuit substrate by silver glue or soldering. The power MOS tube and the fast recovery diode are respectively connected to the circuit layer by a bonding wire made of gold, copper, or aluminum, etc. The high-voltage integrated circuit is bonded to the circuit substrate by silver glue or soldering. The high-voltage integrated circuit can be connected to the circuit layer by a bonding wire made of gold, copper, or aluminum, etc., and can be connected to the power MOS tube and the IGBT by a bonding wire made of gold, copper, or aluminum, etc.

[0090] The sealing body can be used to encapsulate the circuit substrate electrically connected with the plurality of pins and the circuit layer, so that the circuit substrate and the circuit layer connected with each pin, bridge arm module, and voltage integrated circuit are wrapped in the sealing body, thereby protecting the internal circuit and providing insulation and voltage resistance. In the preparation process, the circuit substrate electrically connected with the plurality of pins, bridge arm module, and voltage integrated circuit can be encapsulated in the sealing body by a plastic encapsulation process using a plastic encapsulation mold. The material of the sealing body can be a thermosetting polymer, such as epoxy resin, phenolic resin, silica gel, amino, and unsaturated resin. In order to improve the heat dissipation capacity, the sealing body can be a composite material containing metal, ceramic, silicon oxide, graphene, or the like. In one example, the material of the sealing body can be a molding compound prepared by mixing epoxy resin as a base resin, high-performance phenolic resin as a curing agent, silica powder as a filler, and various additives.

[0091] Different shapes of plastic encapsulation molds can be designed according to different design requirements, and thus sealing bodies with different shapes and structures can be obtained. For example, the sealing body can be a cuboid structure. The circuit substrate and the circuit layer connected with each pin, bridge arm module, and high-voltage integrated circuit are wrapped to provide protection by using an injection mold molding method of thermoplastic resin or a transfer mold molding method of thermosetting resin.

[0092] In one example, compared with the application circuit of the traditional HVIC (such as Figure 8The high-voltage integrated circuit of the application has integrated bootstrap circuit and pre-charge control circuit, wherein the bootstrap circuit can include at least six ports: VCC port, VB port, VS port, Hsignal port, Lsignal port and pre-charge signal port. VCC port is connected to 15V power supply of the basic circuit of the high-voltage integrated circuit; VB port and VS port are connected to VB port and VS port of high-side drive of the basic circuit of the high-voltage integrated circuit; Hsignal port and Lsignal port are connected to positive logic high-side drive port and positive logic low-side drive port of the interlock (dead zone circuit) of the high-voltage integrated circuit; the pre-charge signal port is connected to the pre-charge control circuit, and the bootstrap circuit automatically performs pre-charge after receiving the pre-charge signal.

[0093] In one example, the circuit layer includes a circuit wiring layer (not shown) and circuit elements arranged on the circuit wiring layer; the circuit wiring layer is arranged on the insulating layer. The circuit elements include corresponding circuit elements of the bridge arm module (such as IGBT and fast recovery diode), corresponding circuit elements of the high-voltage integrated circuit (such as diode, transistor, resistor, capacitor and the like) and energy storage capacitor and the like.

[0094] In one example, the circuit wiring layer is made of copper and is insulated from the circuit substrate, and the circuit wiring layer includes circuit lines made of etched copper foil, and the line layer is also relatively thin, such as about 70um. In one example, the circuit wiring layer also includes pads arranged near the side edge of the circuit substrate, and the above-mentioned circuit wiring layer can be formed by using 2oz copper foil. Finally, a thin layer of green oil can be coated on the circuit wiring layer to play a line isolation role and cut off the electrical connection between the circuit lines. A plurality of circuit elements are arranged on the circuit wiring layer, and the plurality of circuit elements or the circuit elements and the circuit wiring layer can be electrically connected by metal wires; the circuit elements can be fixed to the circuit wiring layer by welding.

[0095] In one example, the circuit layer includes a high-voltage integrated circuit, a bridge arm module, and an energy storage capacitor. The device chips of the high-voltage integrated circuit, the bridge arm module, and the energy storage capacitor are respectively attached to the corresponding component mounting positions of the circuit layer by brushing tin paste or dispensing silver glue. The resistors and capacitors corresponding to the high-voltage integrated circuit, the bridge arm module, and the energy storage capacitor are respectively attached to the corresponding component mounting positions of the circuit layer by an automatic chip mounting (SMT) device. Then, the entire semi-finished product is passed through a reflow furnace to weld all the components to the corresponding mounting positions. The welding quality of the components is detected by an automatic optical inspection (AOI) device. The flux and aluminum scraps and other foreign matters remaining on the circuit substrate are removed by spraying and ultrasonic cleaning. The high-voltage integrated circuit, the bridge arm module, and the energy storage capacitor are connected to the circuit layout by bonding wires, thereby achieving the installation of the high-voltage integrated circuit, the bridge arm module, and the energy storage capacitor, and further achieving the integrated semiconductor circuit of the high-voltage integrated circuit and the bridge arm module.

[0096] In the above-described embodiments, the bootstrap circuit and the pre-charge control circuit are integrated on the HVIC basic circuit to form the high-voltage integrated circuit. The bootstrap function is integrated in the high-voltage integrated circuit by arranging the high-voltage integrated circuit and the bridge arm module in the circuit layer of the semiconductor circuit. Therefore, no external bootstrap diode (BSD), current limiting resistor, filter capacitor, voltage stabilizing diode, and the like are needed, and only an energy storage capacitor needs to be externally connected. The pre-charge time does not need to be set in the MCU program, thereby achieving the pre-charge of the HVIC basic circuit. The HVIC integrated with the bootstrap circuit and the pre-charge control circuit in the semiconductor circuit of the present application does not need an additional bootstrap circuit, thereby reducing the product application cost and eliminating the need for designing the pre-charge time in the MCU program design. In addition, the HVIC integrated with the bootstrap circuit and the pre-charge circuit can better ensure the bootstrap capacitor voltage in the case of power failure and power on, thereby improving the product reliability.

[0097] In one embodiment, as Figure 9 described above, a preparation method of the semiconductor circuit is also provided, which includes the following steps:

[0098] Step S100, providing a circuit substrate.

[0099] Step S200, preparing an insulating layer on the circuit substrate.

[0100] Step S300, preparing a circuit layer on the insulating layer; wherein the circuit layer includes a bridge arm module and the high-voltage integrated circuit of any one of the above-described embodiments; the bridge arm module is connected to the high-voltage integrated circuit by bonding wires.

[0101] Step S400, arranging a plurality of pins on the circuit layer, and the first ends of the plurality of pins are respectively connected to the circuit layer by metal wires.

[0102] Step S500, the circuit substrate provided with the circuit layer, the plurality of pins is injected by the packaging mold to form the sealing body, and the second end of each pin is respectively led out from the first side of the sealing body to form a semiconductor circuit.

[0103] Specifically, the specific preparation process of the semiconductor circuit is as follows: according to the required circuit layout, a suitable circuit substrate is designed; the prepared circuit substrate is placed into a special carrier (the carrier can be aluminum, synthetic stone, ceramic, PPS and other materials resistant to high temperature above 200℃), an insulating layer is prepared on the circuit substrate, then a copper foil is pressed on the surface of the insulating layer, and then the copper foil is etched to locally remove the copper foil to form a circuit wiring layer; the corresponding electronic components (IGBT, power MOS tube, fast recovery diode, etc.) of the bridge arm module and the high-voltage integrated chip (HVIC) are respectively adhered to the component mounting position on the circuit layer by silver glue or soldering tin through brushing tin paste or dotting silver glue, the resistor and capacitor components are attached to the component mounting position by automatic patch SMT equipment, the pins are placed in the corresponding mounting position by mechanical hand or artificial and fixed by the carrier; then the whole semi-finished product including the carrier is put into a reflow oven to weld all the components to the corresponding mounting position, the component welding quality is detected by visual inspection AOI equipment, the flux and aluminum chips and other foreign matters remaining on the metal aluminum substrate are removed by spraying, ultrasonic cleaning and other cleaning methods, the high-voltage integrated circuit, IGBT, power MOS tube, fast recovery diode and other circuit components are connected with the circuit wiring through bonding wires, and then the circuit layer is formed on the circuit substrate.

[0104] All the pins (such as each low-voltage pin and each high-voltage pin) are made of metal base material such as copper base material, such as a long strip with a length C of 25mm, a width K of 1.5mm and a thickness H of 1mm. In order to facilitate assembly, a certain arc can be pressed and shaped at one end, and then a nickel layer is formed on the surface of the pin by chemical plating: a mixed solution of nickel salt and sodium hypophosphite is added with a suitable complexing agent to form a nickel layer on the surface of the copper material with a specific shape. The metal nickel has strong passivation ability and can quickly form an extremely thin passivation film to resist atmospheric corrosion, alkali and some acids. The nickel layer has a thickness of generally 0.1μm; then through the acid sulfate process, the copper material with the shape and the nickel layer is immersed in the plating solution with positive tin ions at room temperature, and a nickel-tin alloy layer is formed on the surface of the nickel layer. The thickness of the nickel layer is generally controlled at 5μm, and the formation of the nickel layer greatly improves the protection and weldability. In this way, the preparation of the pin is completed. Then the first end of each pin is prepared on the circuit layer by reflow soldering, tin paste or silver paste solidification.

[0105] The circuit substrate electrically connected with the plurality of pins, the bridge arm module and the high-voltage integrated circuit is plasticized in the plasticizing mold by the plasticizing process in the preparation process, and finally, the demolding is performed, and after the demolding, the plasticizing material forms a sealing body, and the circuit substrate electrically connected with the plurality of pins, the bridge arm module and the high-voltage integrated circuit is plasticized in the sealing body, and only the pins are exposed.

[0106] Finally, after the marking, the PMC post-curing, the cutting rib forming and other processes, the packaging semi-finished product is formed; the product is tested for electrical performance by the electrical parameter testing machine, and then the semiconductor circuit is formed.

[0107] In the above embodiment, based on the preparation of the semiconductor circuit of the application, by arranging the high-voltage integrated circuit and the bridge arm module in the circuit layer of the semiconductor circuit, the self-boosting function is integrated in the high-voltage integrated circuit, without external connection of a self-boosting diode (BSD), a current-limiting resistor, a filter capacitor, a voltage stabilizing diode and the like, only an external energy storage capacitor is needed; the MCU program does not need to set a pre-charging time, and the pre-charging of the HVIC basic circuit is realized. The HVIC integrated with the self-boosting circuit and the pre-charging control circuit in the semiconductor circuit of the application does not need an additional self-boosting circuit, reduces the product application cost, and the MCU program does not need to be designed for pre-charging time; in addition, the HVIC integrated with the self-boosting circuit and the pre-charging circuit can better ensure the self-boosting capacitor voltage in the case of power failure and power on, and improves the product reliability.

[0108] In the description of the present specification, the description referring to the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" and the like means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0109] In the description of the present application, it should be understood that the orientations or positional relationships indicated by the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like are based on the orientations or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0110] In addition, the terms "first", "second", etc. are used only for the purpose of description and do not imply or imply relative importance or imply the number of the technical features indicated. Therefore, the features defined as "first", "second" can explicitly or implicitly include at least one of the features. In the description of the present application, the meaning of "a plurality of" is at least two, such as two, three, etc., unless otherwise explicitly specified and limited.

[0111] In the present application, unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connecting", "fixing" and the like should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements, unless otherwise explicitly limited. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0112] In the present application, unless otherwise explicitly specified and limited, the first feature is "on" or "under" the second feature. The first and second features can be in direct contact, or the first and second features can be indirectly contacted through an intermediate medium. Moreover, the first feature "above", "above" and "above" the second feature can be the first feature directly above or obliquely above the second feature, or only indicates that the first feature is higher than the second feature in horizontal height. The first feature "below", "below" and "below" the second feature can be the first feature directly below or obliquely below the second feature, or only indicates that the first feature is lower than the second feature in horizontal height.

[0113] Although the embodiments of the present application have been shown and described above, it can be understood that the above-mentioned embodiments are exemplary and cannot be understood as limiting the present application, and those skilled in the art can make changes, modifications, replacements and variations to the above-mentioned embodiments within the scope of the present application.

Claims

1. A high-voltage integrated circuit, characterized in that, include: The HVIC basic circuit includes a first low-voltage side power supply port and a first high-voltage side floating power supply port. The HVIC basic circuit includes a Schmitt circuit, a low-voltage LEVEL SHIFT circuit, a high-voltage LEVEL SHIFT circuit, a pulse generation circuit, a dead-time and interlock circuit, a delay circuit, a filter circuit, an overcurrent protection circuit, an overheat protection circuit, and an undervoltage protection circuit. A bootstrap circuit, which is connected to the HVIC base circuit; The bootstrap circuit is configured to acquire a pre-charge signal and, based on the pre-charge signal, control the first low-voltage side power port of the HVIC base circuit to charge the first high-voltage side floating power port of the HVIC base circuit. A pre-charge control circuit, connected to both the HVIC base circuit and the bootstrap circuit, is configured to transmit a pre-charge signal to the bootstrap circuit when the output voltage of the first low-voltage side power port of the HVIC base circuit meets a preset threshold range and the HVIC base circuit is in a non-protected state (i.e., normal operation, without overcurrent, overtemperature, or undervoltage conditions), so that the HVIC base circuit enters a pre-charge state. The pre-charge control circuit is also configured to transmit a stop enable signal to the HVIC base circuit when it is in the pre-charge state. The stop enable signal is used to instruct the HVIC base circuit to stop driving signal output; The bootstrap circuit includes a charge pump circuit, a bootstrap MOS, a bootstrap MOS driving circuit, and a bootstrap logic control circuit; The charge pump circuit and the bootstrap logic control circuit are respectively connected to the bootstrap MOS drive circuit; The bootstrap MOS driving circuit is connected to the gate of the bootstrap MOS; The source of the bootstrap MOS is connected to the first low-voltage side power supply port of the HVIC base circuit. The drain of the bootstrap MOS is connected to the first high-voltage side floating power supply port of the HVIC base circuit. The bootstrap logic control circuit is connected to the precharge control circuit and the HVIC base circuit, respectively. The pre-charge control circuit includes a voltage rising edge detection circuit, a charging timing circuit, and a pre-charge logic control circuit. The voltage rising edge detection circuit, the charging timing circuit, and the pre-charging logic control circuit are interconnected in pairs; the voltage rising edge detection circuit is connected to the first low-voltage side power supply port of the HVIC base circuit; the voltage rising edge detection circuit is connected to the pre-charging control circuit and the HVIC base circuit respectively. The voltage rising edge detection circuit includes a first logic control sub-circuit, a first comparator, a second comparator, a first resistor, a second resistor, a first power supply, and a second power supply. The first end of the first resistor is connected to the first low-voltage side power supply port of the HVIC basic circuit, the second end of the first resistor is connected to the first end of the second resistor, and the second end of the second resistor is connected to ground. The first input of the first comparator is connected to the second end of the first resistor, and the second input of the first comparator is connected to the positive terminal of the first power supply. The first input of the second comparator is connected to the first end of the second resistor, and the second input of the second comparator is connected to the positive terminal of the second power supply. The negative terminals of the first power supply and the second power supply are respectively connected to ground. The outputs of the first comparator and the second comparator are respectively connected to the first logic control sub-circuit. The first logic control circuit is respectively connected to the charging timing circuit and the pre-charging logic control circuit.

2. The high-voltage integrated circuit according to claim 1, characterized in that, The charge pump circuit includes an oscillator, a first driver, a second driver, a first capacitor, a second capacitor, a third capacitor, a first diode, a second diode, and a Zener diode; The oscillator is connected to the input terminal of the first driver; the output terminal of the first driver is connected to the input terminal of the second driver and the first terminal of the first capacitor, respectively; the output terminal of the second driver is connected to the first terminal of the second capacitor. The power supply terminals of the first driver and the second driver are respectively connected to the first low-voltage side power supply port of the HVIC base circuit; the ground terminals of the first driver and the second driver are respectively connected to the ground wire; the second terminals of the first capacitor and the second capacitor are respectively connected to the first terminal of the third capacitor; the cathode of the first diode is connected to the second terminal of the first capacitor, the cathode of the second diode is connected to the second terminal of the second capacitor, and the anodes of the first diode, the anodes of the second diode, and the second terminal of the third capacitor are respectively connected to the first low-voltage side power supply port of the HVIC base circuit; the anode of the Zener diode is connected to the ground wire, and the cathode of the Zener diode is connected to the first terminal of the third capacitor; the first terminal of the third capacitor is connected to the bootstrap MOS drive circuit.

3. The high-voltage integrated circuit according to claim 2, characterized in that, The HVIC basic circuit also includes an interlock and dead-time circuit; the interlock and dead-time circuit includes a positive logic high-voltage side drive terminal and a positive logic low-voltage side drive terminal; the bootstrap logic control circuit includes a first NOT gate logic unit, a second NOT gate logic unit, a third NOT gate logic unit, a fourth NOT gate logic unit, a fifth NOT gate logic unit, a first NAND gate logic unit, a second NAND gate logic unit, and a first NOR gate logic unit. The input terminal of the first NOT gate logic is connected to the positive logic high-voltage side drive terminal, and the output terminal of the first NOT gate logic is connected to the second input terminal of the first NAND gate logic. The first input terminal of the first NAND gate logic is connected to the positive logic low-voltage side drive terminal, and the output terminal of the first NAND gate logic is connected to the input terminal of the second NOT gate logic. The output terminal of the second NOT gate logic is connected to the first input terminal of the second NAND gate logic. The input terminal of the third NOT gate logic is connected to the first high-voltage side floating power supply bias voltage port of the HVIC basic circuit, and the output terminal of the third NOT gate logic is connected to the second input terminal of the second NAND gate logic. The output terminal of the second NAND gate logic is connected to the input terminal of the fourth NOT gate logic, and the output terminal of the fourth NOT gate logic is connected to the second input terminal of the first NOR gate logic. The first input terminal of the first NOR gate logic is connected to the precharge control circuit, the output terminal of the first NOR gate logic is connected to the input terminal of the fifth NOT gate logic, and the output terminal of the fifth NOT gate logic is connected to the bootstrap MOS drive circuit.

4. The high-voltage integrated circuit according to claim 3, characterized in that, The charging timing circuit includes an input logic control sub-circuit, an output logic control sub-circuit, a third comparator, a third resistor, a third power supply, a fourth capacitor, a sixth NOT gate logic unit, and a seventh NOT gate logic unit. The input terminal of the input logic control sub-circuit is connected to the first logic control sub-circuit. The output terminal of the input logic control sub-circuit is connected to the input terminal of the sixth NOT gate logic device. The output terminal of the sixth NOT gate logic device is connected to the input terminal of the seventh NOT gate logic device. The output terminal of the seventh NOT gate logic device is connected to the first terminal of the third resistor. The second terminal of the third resistor is connected to the first input terminal of the third comparator. The second input terminal of the third comparator is connected to the positive terminal of the third power supply. The first terminal of the fourth capacitor is connected to the second terminal of the third resistor. The second terminal of the fourth capacitor and the negative terminal of the third power supply are respectively connected to ground. The output terminal of the third comparator is connected to the input terminal of the output logic control sub-circuit. The output terminal of the output logic control sub-circuit is connected to the pre-charge logic control circuit.

5. The high-voltage integrated circuit according to claim 4, characterized in that, The HVIC basic circuit also includes a protection signal detection port and an enable port; the pre-charge logic control circuit includes an eighth NOT gate logic unit, a ninth NOT gate logic unit, a tenth NOT gate logic unit, an eleventh NOT gate logic unit, a third NAND gate logic unit, and a fourth NAND gate logic unit. The first input terminal of the third NAND gate logic is connected to the first logic control sub-circuit; the second input terminal of the third NAND gate logic is connected to the output terminal of the eighth NOT gate logic; the output terminal of the third NAND gate logic is connected to the input terminal of the ninth NOT gate logic; the input terminal of the eighth NOT gate logic is connected to the output logic control sub-circuit; the output terminal of the ninth NOT gate logic is connected to the first input terminal of the fourth NAND gate logic; the second input terminal of the fourth NAND gate logic is connected to the output terminal of the tenth NOT gate logic; the output terminal of the fourth NAND gate logic is connected to the input terminal of the eleventh NOT gate logic; the input terminal of the tenth NOT gate logic is connected to the protection signal detection port of the HVIC basic circuit; the output terminal of the eleventh NOT gate logic is connected to the bootstrap logic control circuit; and the output terminal of the fourth NAND gate logic is connected to the enable port of the HVIC basic circuit.

6. A semiconductor circuit, characterized in that, include: A circuit board, wherein an insulating layer is provided on the circuit board; A circuit layer disposed on the insulating layer; Multiple pins, the first ends of which are electrically connected to the circuit layer respectively; A sealed body that encloses the circuit board and the circuit layer to which each of the pins is connected; The second end of each pin is led out from the first side of the sealed body; the circuit layer includes a bridge arm module and a high-voltage integrated circuit according to any one of claims 1 to 5; the bridge arm module is coupled to the high-voltage integrated circuit.

7. A method for fabricating a semiconductor circuit according to claim 6, characterized in that, Includes the following steps: Provide a circuit board; An insulating layer is prepared on the circuit board; A circuit layer is fabricated on the insulating layer; wherein the circuit layer includes a bridge arm module and a high-voltage integrated circuit according to any one of claims 1 to 5; the bridge arm module is connected to the high-voltage integrated circuit via bonding wires; The circuit layer is provided with a plurality of pins, and the first ends of the plurality of pins are respectively connected to the circuit layer through metal wires; The circuit board having the circuit layer and the plurality of pins is injection molded using a packaging mold to form a sealed body, and the second end of each of the pins is led out from the first side of the sealed body to form the semiconductor circuit.

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