Memory storage device
By dividing the access partition and hidden partition in the storage device, and using the mapping table mechanism of the memory controller, automatic data backup and recovery without third-party software is achieved, and the slow and unrestrained data recovery speed in the existing technology is solved. Stable problems ensure fast and complete data recovery results.
Patent Information
- Application Number
- CN202010884832.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-08-05
- Filing Date
- 2020-08-28
- Publication Date
- 2025-01-14
- Estimated Expiration
- 2040-08-28
AI Technical Summary
Existing storage devices are slow and unstable during data recovery, especially when users misuse incompatible third-party software, which may lead to data corruption, and existing data recovery software needs to match the file management format of the operating system. Causes poor results.
Non-volatile memory chip is used to divide it into access partitions and hidden partitions, and logical blocks are configured through the memory controller to establish mapping tables to automatically perform data backup and recovery operations, avoiding dependence on third-party software and realizing Fast and complete data recovery.
Data backup and recovery can be automatically triggered without third-party software, ensuring that data is quickly and completely restored in unstable situations, improving the reliability and user experience of storage devices.
Smart Images

Figure CN114064352B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a semiconductor device, and more particularly to a memory storage device. Background Art
[0002] With the advancement of technology, the storage space of storage devices is getting larger and larger, and the management of storage devices is becoming more and more complicated. Users may mistakenly change the storage device before wanting to restore the original data, or misuse incompatible third-party software, causing the storage device to be unstable or data to be damaged. In related technologies, data recovery software often needs to be used with the file management format of the operating system to restore data. The data recovery speed is slow or cannot be used because it does not conform to the file management system format, resulting in poor data recovery effect. Summary of the invention
[0003] An embodiment of the present invention provides a memory storage device, including a non-volatile memory chip, a connector and a memory controller. The non-volatile memory chip has a plurality of physical blocks, and the plurality of physical blocks are at least divided into an access partition and a hidden partition. The connector is electrically connected to a host system. The memory controller is electrically connected to the non-volatile memory chip and the connector, and the memory controller is used to configure a plurality of first logical blocks to map the physical blocks on the access partition. The memory controller provides the configured first logical blocks to the host system, and maintains a first mapping table to record the first logical blocks and the mapped physical blocks. When performing a data backup operation, the memory controller copies the data on the mapped physical blocks to the hidden partition according to the first mapping table to form a backup physical block, and at the same time establishes a second mapping table, and configures a plurality of second logical blocks thereon to map the backup physical block. When performing a data restoration operation, the memory controller maps the second logical blocks on the second mapping table to the backup physical block, and the host system is restored to the environment when the data backup operation is performed according to the second mapping table. BRIEF DESCRIPTION OF THE DRAWINGS
[0004] Figure 1 A block diagram of a memory storage system according to an embodiment of the present invention.
[0005] Figure 2 for Figure 1 Schematic diagram of a write operation of a memory storage device in FIG.
[0006] Figure 3 for Figure 1 A schematic diagram of a data backup operation of a memory storage device in FIG.
[0007] Figure 4 for Figure 1 A schematic diagram of a data restoration operation of a memory storage device in FIG.
[0008] Figure 5 for Figure 1 A schematic diagram of another data backup operation of a memory storage device in FIG.
[0009] Description of reference numerals:
[0010] 1: Memory storage system
[0011] 10: Host system
[0012] 12: Memory storage device
[0013] 120: Non-volatile memory chip
[0014] 121: Access partition
[0015] 122: Hide partition
[0016] 124: Connector
[0017] 126: Memory Controller
[0018] T21: First mapping table
[0019] T22: Second mapping table
[0020] LBA: Logical Block Address
[0021] PBA: Physical Block Address DETAILED DESCRIPTION
[0022] Figure 1 1 is a block diagram of a memory storage system 1 according to an embodiment of the present invention. The memory storage system 1 includes a host system 10 and a memory storage device 12. The memory storage device 12 includes a non-volatile memory chip 120, a connector 124, and a memory controller 126. Accessing the memory storage device 12 can automatically trigger data backup operations and data restoration operations without the need for third-party software, and quickly and completely restore the data on the access memory storage device 12 without the user noticing.
[0023] The host system 10 may be a computer, the memory storage device 12 may be a solid state drive, a USB flash drive, or a memory card, and the non-volatile memory chip 120 may be a NAND flash memory. The host system 10 may access the memory storage device 12 to perform boot and other data access operations. The non-volatile memory chip 120 may have a plurality of physical blocks, and the plurality of physical blocks may be divided into at least an access partition 121 and a hidden partition 122. In some embodiments, the plurality of physical blocks may be divided into an access partition 121, a hidden partition 122, and a reserved (over-provisioning, OP) area. The connector 124 may be electrically connected to the host system 10. The memory controller 126 may be electrically connected to the non-volatile memory chip 120 and the connector 124. The host system 10 can read one of the access partition 121 and the hidden partition 122 through the connector 124 and the memory controller 126 to perform boot operations and other data operations, and use the reserved area to execute background processing programs to be processed during normal operation, and the background processing programs include data backup operations, bad block management operations and other data operations. In some embodiments, the size of the storage space of the access partition 121 and the hidden partition 122 can be the same. In other embodiments, the size of the storage space of the access partition 121 and the hidden partition 122 can be different. The size of the storage space of the reserved area can be smaller than the size of the storage space of the access partition 121 or the size of the storage space of the hidden partition 122. For example, the storage space of the access partition 121 can be 100MB, or the storage space of the hidden partition 122 can be 100MB, and the storage space of the reserved area can be 16MB.
[0024] The memory controller 126 may be loaded with firmware to control the boot operation, data backup operation, data restoration operation and other data access operations of the memory storage device 12. The memory storage device 12 may further include a memory (internal memory, internal memory), which may store firmware. When performing a data write operation or a data copy operation, the memory controller 126 may use a predetermined write algorithm, such as a wear leveling algorithm, to write data to the non-volatile memory chip 120, so that the data is evenly written to all physical blocks of the non-volatile memory chip 120, to avoid writing data and erasing data only in a specific physical block, thereby causing the specific physical block to be damaged early, resulting in the non-volatile memory chip 120 being unable to continue to be used due to too many bad blocks.
[0025] Figure 21 is a schematic diagram of a write operation of the memory storage device 12, showing an embodiment in which the host system 10 can only access the access partition 121 of the non-volatile memory chip 120. When the host system 10 performs a write operation on the memory storage device 12, the memory controller 126 can receive data from the host system 10 via the connector 124, and write the data to multiple physical blocks of the access partition 121 according to a predetermined write algorithm. The data can be a system file, user data or other data used when booting. The memory controller 126 can configure multiple first logical blocks to map the physical blocks on the access partition 121. The memory controller 126 can provide the configured first logical blocks to the host system 10, and maintain a first mapping table T21 to record the first logical blocks and the mapped physical blocks. The first mapping table T21 may be stored in the access partition 121, and may be a logical block address to physical block address (L2P) table for mapping the logical block addresses (LBA) of the first logical blocks to the physical block addresses (PBA) of the physical blocks of the access partition 121. For example, the first mapping table T21 may be used to map the logical block address "0" to the physical block address "0x100", the logical block address "1" to the physical block address "0x101", the logical block address "2" to the physical block address "0x103", and the logical block address "3" to the physical block address "0x104". The hidden partition 122 does not have any data, and the host system 10 cannot access the hidden partition 122.
[0026] Figure 31 is a schematic diagram of a data backup operation of the memory storage device 12. When performing the data backup operation, the memory controller 126 can copy the data on the mapped physical blocks to the hidden partition 122 according to the first mapping table T21 using a predetermined write algorithm to form a plurality of backup physical blocks, and at the same time establish a second mapping table T22, and configure a plurality of second logical blocks on the second mapping table T22 to map the backup physical blocks. The second mapping table T22 can be stored in the hidden partition 122, and can be a logical block address to physical block address table, used to map the logical block addresses of the second logical blocks to the physical block addresses of the physical blocks of the hidden partition 122. The second mapping table T22 can be used to map the logical block address "100" to the physical block address "0x200", the logical block address "101" to the physical block address "0x201", the logical block address "102" to the physical block address "0x202", and the logical block address "103" to the physical block address "0x203". Each first logical block can be converted to one of the second logical blocks with a fixed address difference. For example, the logical block addresses "0", "1", "2", and "3" of the first logical block can be converted to the logical block addresses "100", "101", "102", and "103" of the second logical blocks with a fixed address difference of "100", respectively.
[0027] In some embodiments, the data backup operation can be triggered by the user. The user can execute a preset backup command on the host system 10. When the memory controller 126 receives the backup command through the host system 10 and the connector 124, the memory controller 126 can back up the data on the access partition 121 to the hidden partition 122 according to the data backup operation. In other embodiments, the data backup operation can be automatically triggered by the memory storage device 12 according to the number of successful boots. When the memory storage device 12 is powered on, the memory controller 126 can record a boot sequence. When powered on, the memory controller 126 can receive a boot sequence from the host system 10. The boot sequence can include a set of logical block addresses corresponding to a set of logical blocks of the first logical blocks. For example, the boot sequence can include {0, 1, 0, 1, 2, 3}. The memory controller 126 can record the boot sequence in the memory storage device 12, such as the non-volatile memory chip 120, the memory controller 126, or other memories in the memory storage device 12. The memory controller 126 may map the group of logical blocks of the first logical blocks to a group of physical blocks of the physical blocks on the access partition 121 according to the first mapping table T21 to execute the boot process. For example, the memory controller 126 may map the boot process {0, 1, 0, 1, 2, 3} to the corresponding group of physical block addresses {0x100, 0x101, 0x100, 0x101, 0x103, 0x104} of the group of physical blocks according to the first mapping table T21 to boot according to the data on the corresponding group of physical block addresses {0x100, 0x101, 0x100, 0x101, 0x103, 0x104}. When the memory controller 126 successfully executes the boot procedure according to the mapping of the first logical blocks to the physical blocks on the access partition 121 for the second time, the memory controller 126 can determine that the data on the corresponding set of physical block addresses {0x100, 0x101, 0x100, 0x101, 0x103, 0x104} is correct and can perform a data backup operation. The second time can be, for example, 1 time.
[0028] In some embodiments, if a power outage occurs during the data backup operation, after the power is restored, the memory controller 126 again copies the data on the physical blocks in the access partition 121 to the backup physical blocks in the hidden partition 122 according to the first mapping table T21, and updates the second mapping table T22 accordingly. It is worth mentioning that in the above-mentioned data backup operation after power restoration, data backup can be continued from the address in the first mapping table T21 that was interrupted due to power failure, without having to copy all the physical blocks mapped in the entire first mapping table T21 from the beginning, thereby preventing the memory storage device of the present invention from affecting its efficiency during backup due to power failure. The address that was interrupted can be a logical address or a physical address in the first mapping table T21. In some embodiments, the memory controller 126 can perform data backup operations in a background program.
[0029] Figure 4Schematic diagram of a data restoration operation of the memory storage device 12. The physical block address with slashes in the first mapping table T21 indicates that the data stored thereon has been partially or completely overwritten or partially or completely destroyed. When the host system 10 performs a write operation on the access partition 121 of the memory storage device 12, the data on the access partition 121 may be partially or completely overwritten or partially or completely destroyed. If the overwritten or destroyed data is important data, such as a system file used for booting, the memory storage device 12 needs to perform a data restoration operation. When performing a data restoration operation, the memory controller 126 can map the second logical blocks on the second mapping table T22 to the backup physical blocks, so that the host system 10 can be restored to the environment when the data backup operation was performed according to the second mapping table T22. For example, the first mapping table T21 shows that the data at the physical block addresses "0x101" and "0x104" have been overwritten or destroyed. The data at the physical block addresses "0x101" and "0x104" are system files for booting, so the memory controller 126 can perform a data recovery operation. Specifically, when performing a data recovery operation, the memory controller 126 can convert a group of addresses of a group of logical blocks of the first logical blocks to a group of addresses of a group of logical blocks of the second logical blocks, and then map the group of addresses of the group of logical blocks of the second logical blocks to a group of addresses of a group of physical blocks of the backup physical blocks according to the second mapping table T22 to execute a boot procedure. For example, the memory controller 126 may convert the boot program {0,1,0,1,2,3} to a group of logical addresses {100,101,100,101,102,103} of a group of logical blocks of the second logical blocks, and map the group of logical addresses {100,101,100,101,102,103} of the group of logical blocks of the second logical blocks to corresponding group of physical block addresses {0x200,0x201,0x200,0x201,0x202,0x203} of the group of physical blocks of the backup physical blocks according to the second mapping table T22 to boot according to the data on the corresponding group of physical block addresses {0x200,0x201,0x200,0x201,0x202,0x203}.
[0030] In some embodiments, the data restoration operation may be triggered by a user. The user may execute a preset restoration instruction on the host system 10. When the memory controller 126 receives the restoration instruction through the host system 10 and the connector 124, the memory controller 126 may read the previously backed-up data and perform corresponding operations according to the data restoration operation. In other embodiments, the data backup operation may be automatically triggered by the memory storage device 12 according to the number of boot failures. When booting, the memory controller 126 may receive a boot program from the host system 10 to access the group of logical blocks of the first logical blocks. The memory controller 126 may map the group of logical blocks of the first logical blocks to the group of physical blocks of the physical blocks on the access partition 121 according to the first mapping table T21 and execute the boot program. When the memory controller 126 still fails to successfully execute the boot program after executing the boot program for the first number of times, the memory controller 126 may perform a data restoration operation. The first number of times may be, for example, 3 times. For example, since the data at the physical block addresses "0x101" and "0x104" have been overwritten or destroyed, the memory controller 126 cannot successfully boot according to the corresponding set of physical block addresses {0x100, 0x101, 0x100, 0x101, 0x103, 0x104}. After failing to successfully boot according to the corresponding set of physical block addresses {0x100, 0x101, 0x100, 0x101, 0x103, 0x104} for three times, the memory controller 126 may perform a data recovery operation and boot with the data at the corresponding set of physical block addresses {0x200, 0x201, 0x200, 0x201, 0x202, 0x203} instead.
[0031] Once the boot procedure is successfully executed using the data recovery operation, the memory storage device 12 can subsequently use the data recovery operation to boot until the boot procedure fails again. In some embodiments, if the memory storage device 12 still fails to successfully execute the boot procedure after executing the boot procedure using the data recovery operation for the first time, the memory controller 126 can switch to the first mapping table T21 to execute the boot procedure. The memory storage device 12 can set a data recovery flag to indicate whether the memory storage device 12 is using the data recovery operation. When the data recovery operation is used, the memory controller 126 can set the data recovery flag to a first logic level, such as a logic level "H", and first convert the group of logical blocks of the first logical block to the group of logical blocks of the second logical blocks, and then execute the boot procedure according to the second mapping table T22; when the data recovery operation is not used, the memory controller 126 can set the data recovery flag to a second logic level, such as a logic level "L", and execute the boot procedure according to the first mapping table T21.
[0032] Figure 51 is a schematic diagram of another data backup operation of the memory storage device 12. When the memory controller 126 maps the second logical blocks to the backup physical blocks and successfully executes the boot procedure using the data restoration operation for the third time, the memory controller 126 may perform a data backup operation, copy the data located on the backup physical blocks to the access partition 121 using a predetermined write algorithm according to the second mapping table T22, and update the first mapping table T21 accordingly. For example, when performing the data backup operation, the memory controller 126 may copy the data on the physical block addresses "0x200", "0x201", "0x202", and "0x203" of the hidden partition 122 to the physical block addresses "0x110", "0x111", "0x112", and "0x113" of the access partition 121, and update the first mapping table T21 accordingly. The third number of times may be the same as or different from the second number of times. For example, the third number of times may be 1 time. In some embodiments, the data restoration operation can also be triggered by the user. The user can execute a preset backup command on the host system 10. When the memory controller 126 receives the backup command through the host system 10 and the connector 124, the memory controller 126 can back up the data on the hidden partition 122 to the access partition 121 according to the data backup operation.
[0033] In some embodiments, if a power outage occurs during the data backup operation, after the power is restored, the memory controller 126 again copies the data on the physical blocks located in the access partition 121 to the backup physical blocks in the hidden partition 122 according to the second mapping table T22, and updates the second mapping table T22 accordingly. In some embodiments, the memory controller 126 can perform the data backup operation in the background program. In the above-mentioned data backup operation after power restoration, data backup can be continued from the address in the second mapping table T22 where the processing was interrupted due to the power outage, without having to copy all the physical blocks mapped in the entire second mapping table T22 from the beginning, thereby preventing the efficiency of the memory storage device of the present invention from being affected by the power outage when performing the backup. The address where the processing was interrupted can be a logical address or a physical address in the second mapping table T22.
[0034] Although Figures 1 to 5The embodiment in the embodiment only divides the non-volatile memory chip 120 into an access partition 121 and a hidden partition 122. In some embodiments, the non-volatile memory chip 120 can also be divided into an access partition and multiple hidden partitions. When performing a data backup operation, the memory controller 126 can copy the data on the partition that is being used and successfully executing the boot program to other unused partitions according to the principle of the aforementioned data backup operation. When performing a data recovery operation, the memory controller 126 can switch to one of the other unused partitions according to a fixed order or a random order to perform a data recovery operation.
[0035] Since the access memory storage device 12 can automatically trigger the data backup operation and the data restoration operation without the need for third-party software, the data on the access memory storage device 12 can be restored quickly and completely without the user noticing.
[0036] The above descriptions are only preferred embodiments of the present invention. All equivalent changes and modifications made according to the claims of the present invention should fall within the scope of the present invention.
Claims
1. A memory storage device, comprising: A non-volatile memory chip has a plurality of physical blocks, wherein the plurality of physical blocks are divided into at least an access partition area and a hidden partition area; a connector electrically connected to a host system; as well as a memory controller electrically connected to the nonvolatile memory chip and the connector, the memory controller being used to configure a plurality of first logical blocks to map the plurality of physical blocks on the access partition area; The memory controller provides the configured multiple first logical blocks to the host system, and maintains a first mapping table to record the multiple first logical blocks and the mapped multiple physical blocks. When performing a data backup operation, the memory controller copies the data on the mapped multiple physical blocks to the hidden partition area according to the first mapping table to form multiple backup physical blocks, and simultaneously establishes a second mapping table and configures multiple second logical blocks thereon to map the multiple backup physical blocks. When performing a data restoration operation, the memory controller maps the multiple second logical blocks to the multiple backup physical blocks according to the second mapping table, and the host system can be restored to the environment when the data backup operation was performed according to the second mapping table.
2. The memory storage device of claim 1, wherein: When accessing a group of logical blocks of the plurality of first logical blocks, the memory controller further maps the group of logical blocks of the plurality of first logical blocks to a group of physical blocks of the plurality of physical blocks on the access partition according to the first mapping table to execute a startup procedure, and if the startup procedure cannot be successfully executed after the group of logical blocks is converted to the group of physical blocks of the plurality of physical blocks on the access partition for a first number of times, the data recovery operation is performed.
3. The memory storage device of claim 2, wherein: When performing the data restoration operation, the memory controller converts a group of addresses of the first logical blocks to a group of addresses of the second logical blocks, and then maps the group of addresses of the second logical blocks to a group of addresses of the backup physical blocks to execute the boot procedure.
4. The memory storage device as claimed in claim 2 or 3, wherein the startup procedure is recorded in the memory storage device.
5. The memory storage device of claim 2, wherein: When the memory controller successfully executes the boot procedure for a second time according to mapping the first logical blocks to the physical blocks on the access partition, the data backup operation is performed.
6. The memory storage device of claim 5, wherein if a power outage occurs during the data backup operation, then after power is restored, the memory controller copies the data on the multiple physical blocks located in the access partition to the multiple backup physical blocks in the hidden partition according to the first mapping table, and updates the second mapping table accordingly.
7. The memory storage device of claim 6, wherein if a power outage occurs during the data backup operation, then after power is restored, the memory controller continues to copy the data on the multiple physical blocks located in the access partition area from an address in the first mapping table whose processing was interrupted due to the power outage to the multiple backup physical blocks in the hidden partition area, and updates the second mapping table accordingly.
8. The memory storage device of claim 2, wherein: When the memory controller maps the second logical blocks to the backup physical blocks and successfully executes the boot procedure for a third time, the memory controller copies the data on the backup physical blocks to the access partition according to the second mapping table and updates the first mapping table accordingly.
9. The memory storage device of claim 8, wherein if a power outage occurs while the memory controller is copying the data located on the plurality of backup physical blocks to the access partition according to the second mapping table and correspondingly updating the first mapping table, then after power is restored, the memory controller is copying the data located on the plurality of backup physical blocks to the access partition according to the second mapping table and correspondingly updating the first mapping table.
10. The memory storage device of claim 9, wherein if a power outage occurs while the memory controller is copying the data located on the plurality of backup physical blocks to the access partition according to the second mapping table and correspondingly updating the first mapping table, then after power is restored, the memory controller continues to copy the data located on the plurality of backup physical blocks to the access partition and correspondingly update the first mapping table from an address in the second mapping table whose processing was interrupted due to the power outage.
11. The memory storage device as claimed in any one of claims 1 to 3 and 5 to 10, wherein the access partition and the hidden partition are of the same size.
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