Computing device and computing method
By introducing a data preprocessing unit into the computing device, a control signal is generated based on the data of the input matrix, indicating the working state of the calculation unit, the problem of power consumption and temperature increase in sparse matrix multiplication operation is solved, and energy consumption reduction and heat dissipation design are simplified.
Patent Information
- Application Number
- CN202010766668.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-08-03
- Publication Date
- 2025-03-18
- Estimated Expiration
- 2040-08-03
AI Technical Summary
In neural network operations, matrix multiplication operations occupy a large amount of computing resources. The prior art will also calculate elements with a value of 0 when processing sparse matrices, resulting in increased power consumption, increased temperature and increased the difficulty and cost of heat dissipation design.
A computing device is designed, including a computing unit array and a data preprocessing unit. The data preprocessing unit generates a control signal based on the data of the input matrix to indicate the working state of the calculation unit, so as to perform matrix multiplication without calculating elements with a value of 0.
It effectively reduces the energy consumption of the calculation unit during matrix computing, reduces the working temperature of the chip, reduces the difficulty and cost of heat dissipation design in board-level design, and achieves the purpose of saving energy.
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Figure CN114065124B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure belongs to the technical field of matrix calculation, and in particular relates to a calculation device and a calculation method. Background Art
[0002] In neural network operations, matrix multiplication operations (including convolution operations, because convolution operations can be converted into matrix multiplication operations) account for the majority of the total amount of operations. To improve the throughput of neural network tasks, reduce latency, and reduce power consumption, the focus is on increasing the speed of matrix multiplication operations and reducing the power consumption of computing circuits.
[0003] like Figure 1 As shown in the figure, M1 is the first input matrix, M2 is the second input matrix, and M is the output matrix. In order to improve the speed of matrix calculation and the efficiency of data utilization, a computing unit array is often used to implement matrix operations. Taking an array composed of MxN (M>1, N>1) computing units as an example, the computing unit matrix is shown in Figure 1. Figure 2 As shown. Through the computing unit array, data can be fully utilized. For example, an element in M1 can be reused by N computing units in the same row at the same time, and an element in M2 can be reused by M computing units in the same column at the same time. Each time, the calculation of one column of M1 and one row of M2 can be completed.
[0004] However, elements with values of 0 in M1 and M2 (in neural network calculations, data matrices and parameter matrices may be sparse matrices, that is, the proportion of 0 elements in the matrix is very large) will also be calculated as normal elements, which will waste power consumption, increase the operating temperature of the chip, and increase the difficulty and cost of heat dissipation design in board-level design. Summary of the invention
[0005] The present disclosure aims to solve at least one of the technical problems existing in the prior art and provide a computing device and a computing method.
[0006] In one aspect of the present disclosure, a computing device is provided, comprising a computing unit array and at least one data pre-processing unit connected to the computing unit array; wherein:
[0007] The data preprocessing unit is used to read the data of the input matrix and generate a control signal according to the data, wherein the control signal is used to indicate the working state of the calculation unit that performs calculation on the data.
[0008] In some optional implementations, the data preprocessing unit generates a control signal according to the data, wherein the control signal is used to indicate a working state of a computing unit that performs calculations on the data, including:
[0009] The data preprocessing unit is specifically used for:
[0010] When the data value of the data is a first preset value, a first control signal is generated, wherein the first control signal is used to instruct all the computing units that perform computing on the data to perform computing; or,
[0011] When the data value of the data is a second preset value, a second control signal is generated, wherein the second control signal is used to instruct all the calculation units that perform calculations on the data not to perform calculations.
[0012] In some optional implementations, the first preset value is a non-zero value, and the second preset value is a zero value.
[0013] In some optional implementations, the control signal is used to indicate the working state of a computing unit that performs calculations on the data, including:
[0014] The control signal is used to indicate the working status of all the computing units in the row corresponding to the data or all the computing units in the corresponding column.
[0015] In some optional implementations, the control signal is used to indicate the working state of a computing unit that performs calculations on the data, including:
[0016] The data preprocessing unit is used to control the working state of the calculation unit that performs calculation on the data according to the control signal; or
[0017] The calculation unit is used to control its own working state according to the control signal.
[0018] In some optional embodiments, the data preprocessing unit includes a plurality of zero detection control modules arranged in a column vector manner, the number of the zero detection control modules is the same as the number of rows of the computing unit array, and each of the zero detection control modules is connected to a computing unit of a corresponding row; or,
[0019] The data preprocessing unit includes a plurality of zero detection control modules arranged in a row vector manner, the plurality of zero detection control modules have the same number of columns as the computing unit array, and each of the zero detection control modules is connected to a computing unit of a corresponding column.
[0020] Another aspect of the present disclosure provides a calculation method, comprising:
[0021] Read the data of the input matrix;
[0022] A control signal is generated based on the data, wherein the control signal indicates an operating state of a computing unit that performs a calculation on the data.
[0023] In some optional implementations, generating a control signal according to the data, wherein the control signal indicates a working state of a computing unit that performs calculations on the data, includes:
[0024] When the data value of the data is a first preset value, a first control signal is generated, wherein the first control signal instructs all the computing units that perform calculations on the data to perform calculations; or,
[0025] When the data value of the data is a second preset value, a second control signal is generated, wherein the second control signal instructs all the calculation units that perform calculations on the data not to perform calculations.
[0026] In some optional implementations, the first preset value is a non-zero value, and the second preset value is a zero value.
[0027] In some optional implementations, the control signal indicates a working state of a computing unit that performs calculations on the data, including:
[0028] The control signal indicates the working status of all the computing units in the row corresponding to the data or all the computing units in the column corresponding to the data.
[0029] Another aspect of the present disclosure provides an electronic device, comprising: at least one computing device as described above;
[0030] A storage unit is used to store one or more programs, which, when executed by the one or more computing devices, can enable the one or more computing devices to implement the computing method described above.
[0031] Another aspect of the present disclosure provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, can implement the calculation method described above.
[0032] Another aspect of the present disclosure provides a computer program, which, when executed by a processor, can implement the calculation method described above.
[0033] The computing device and computing method disclosed in the present invention, by setting a data preprocessing unit before the computing unit, generates a control signal according to the data of the read input matrix, and the control signal is used to indicate the working state of the computing unit that performs calculations on the data, thereby effectively reducing the energy consumption of the control unit during the matrix operation process, reducing the operating temperature of the chip, and further reducing the difficulty and cost of the heat dissipation design in the board-level design, thereby achieving the purpose of saving energy. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] Figure 1Schematic diagram of matrix multiplication operation;
[0035] Figure 2 A schematic diagram of the structure of a computing unit array for performing matrix multiplication operations in the related art;
[0036] Figure 3 A schematic block diagram of the composition of an electronic device according to an embodiment of the present disclosure;
[0037] Figure 4 is a schematic diagram of the structure of a computing device according to another embodiment of the present disclosure;
[0038] Figure 5 A schematic diagram of matrix multiplication operation according to another embodiment of the present disclosure;
[0039] Figure 6 A schematic diagram of a matrix multiplication operation according to another embodiment of the present disclosure;
[0040] Figures 7a to 7f A schematic diagram of a matrix multiplication operation process according to another embodiment of the present disclosure;
[0041] Figure 8 The figure is a flow chart of a calculation method according to another embodiment of the present invention. DETAILED DESCRIPTION
[0042] In order to enable those skilled in the art to better understand the technical solution of the present disclosure, the present disclosure is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.
[0043] First, refer to Figure 3 An example electronic device for implementing the computing device and computing method of the embodiments of the present disclosure is described below.
[0044] like Figure 3 As shown, the electronic device 100 includes one or more processors 110, one or more storage devices 120, one or more input devices 130, one or more output devices 140, etc. These components are interconnected via a bus system 150 and / or other forms of connection mechanisms. It should be noted that Figure 3 The components and structures of the electronic device shown are merely exemplary and non-limiting. The electronic device may also have other components and structures as required.
[0045] The processor 110 may be a central processing unit (CPU), or may be composed of multiple processing cores, or other forms of processing units with data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device 100 to perform desired functions. The processor includes one or more computing devices.
[0046] The storage device 120 may include one or more computer program products, which may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, random access memory (RAM) and / or cache memory (cache), etc. The non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage medium, and the processor may run the program instructions to implement the client functions (implemented by the processor) and / or other desired functions in the embodiments of the present disclosure described below. Various applications and various data may also be stored in the computer-readable storage medium, such as various data used and / or generated by the application.
[0047] The input device 130 may be a device used by a user to input instructions, and may include one or more of a keyboard, a mouse, a microphone, a touch screen, and the like.
[0048] The output device 140 may output various information (eg, images or sounds) to the outside (eg, a user), and may include one or more of a display, a speaker, and the like.
[0049] Next, we will refer to Figure 4 A computing device according to an embodiment of the present disclosure is described.
[0050] like Figure 4 As shown, a computing device includes a computing unit array (PU 1,1 , PU 1,2 …PU 1,N …PU M,N ) and the computing unit array (PU 1,1 , PU 1,2 …PU 1,N …PU M,N ), wherein M is an integer greater than or equal to 2, and N is an integer greater than or equal to 2. The data preprocessing unit Pre_P is used to read the data of the input matrix and generate a control signal according to the data, wherein the control signal is used to indicate the working state of the calculation unit that performs calculation on the data.
[0051] It should be noted that, in addition to Figure 4 Only the first input matrix M1 and the computation unit array (PU 1,1 , PU 1,2 …PU 1,N …PU M,N) is provided between the second input matrix M2 and the computing unit array (PU 1,1 , PU 1,2 …PU 1,N …PU M,N ) is used to read and pre-process the data of the second input matrix M2; or, between the first input matrix M1 and the computing unit array (PU 1,1 , PU 1,2 …PU 1,N …PU M,N ), and between the second input matrix M2 and the computing unit array (PU 1,1 , PU 1,2 …PU 1,N …PU M,N ) are respectively provided with a data preprocessing unit Pre_P for reading and preprocessing the data of the first input matrix M1 and the second input matrix M2. The working principles of each data preprocessing unit Pre_P are the same. Figure 4 The illustrated case is used as an example to describe the present disclosure in detail.
[0052] For example, Figure 4 As shown, the computing unit array (PU 1,1 , PU 1,2 …PU 1,N …PU M,N ) includes M×N computing units, namely computing unit PU 1,1 , computing unit PU 1,2 , ..., computing unit PU 1,N , ..., computing unit PU M,N , where M and N are positive integers greater than or equal to 2. The specific values of M and N can be determined according to the sizes of the first input matrix M1 and the second input matrix M2 to be operated. For example, Figure 5 As shown, the first input matrix M1 is 2×3 in size, the second input matrix M2 is 3×2 in size, and the output matrix M is 2×2 in size. Figure 6 , in this case the computing unit array size should be at least 2×2.
[0053] Specifically, Figure 4 As shown, when the computing device is used to perform matrix multiplication, the data preprocessing unit Pre_P reads each column data of the first input matrix M1 one by one, and generates a control signal according to the read data, which is used to indicate the working state of the computing unit that performs calculations on the read data.
[0054] The computing device of this embodiment, by setting a data preprocessing unit before the computing unit, generates a control signal according to the data of the read input matrix, and the control signal is used to indicate the working state of the computing unit that performs calculations on the data, thereby effectively reducing the energy consumption of the control unit during the matrix operation process, reducing the operating temperature of the chip, and further reducing the difficulty and cost of the heat dissipation design in the board-level design, thereby achieving the purpose of saving energy.
[0055] For example, Figure 4 As shown, the data preprocessing unit Pre_P can generate a first control signal when the data value of the data is a first preset value, and the first control signal is used to instruct all the calculation units that perform calculations on the data to perform calculations. Alternatively, the data preprocessing unit Pre_P can also generate a second control signal when the data value of the data is a second preset value, and the second control signal is used to instruct all the calculation units that perform calculations on the data not to perform calculations. In addition, the data preprocessing unit Pre_P can also generate control signals based on other parameters of the data. For example, the data preprocessing unit Pre_P can also generate control signals based on high and low level signals of the data, etc. This embodiment does not limit this.
[0056] It should be noted that after the data preprocessing unit generates a control signal, it can control whether the calculation unit performs calculation according to the control signal; or, after the data preprocessing unit generates a control signal, the calculation unit reads the control signal and determines whether to perform calculation according to the control signal.
[0057] Exemplarily, the first preset value may be a non-zero value, and the second preset value may be a zero value. Of course, those skilled in the art may also select other data values according to actual needs, and this embodiment does not limit this.
[0058] The computing device of this embodiment, through the data preprocessing unit that is set, generates a first control signal when the data value of the input matrix is a non-zero value, and the first control signal instructs all computing units that perform calculations on the non-zero data to perform calculations, and generates a second control signal when the data value of the input matrix is a zero value, and the second control signal instructs all computing units that perform calculations on the zero data not to perform calculations, thereby effectively reducing the energy consumption in matrix operations, reducing the operating temperature of the chip, and further reducing the difficulty and cost of heat dissipation design in board-level design, thereby achieving the purpose of saving energy.
[0059] Preferably, the input matrix of this embodiment is suitable for a sparse matrix. A so-called sparse matrix refers to a matrix in which the number of elements with an index value of 0 is far greater than the number of non-zero elements, and the distribution of non-zero elements is irregular. Obviously, for the multiplication operation of the sparse matrix, the power consumption of the computing device provided by the embodiment of the present disclosure can be greatly reduced by performing the calculation using the computing device.
[0060] For example, Figure 4 As shown, the data preprocessing unit Pre_P generates a control signal according to the data of the first input matrix M1 read, and the control signal is used to indicate the working status of all the computing units in the rows corresponding to the data. For example, when the data value of the first input matrix M1 read is a non-zero value, a first control signal is generated, and the first control signal instructs all the computing units in the rows corresponding to the data to perform calculations. On the contrary, when the data value of the first input matrix M1 read is a zero value, a second control signal is generated, and the second control signal instructs all the computing units in the rows corresponding to the data not to perform calculations.
[0061] In addition, assuming that a data preprocessing unit Pre_P is set between the second input matrix M2 and the computing unit array, the data preprocessing unit Pre_P generates a control signal based on the data read from the second input matrix M2, which is used to indicate the working status of all computing units in the column corresponding to the data. The specific control process is similar to that of the first input matrix M1 and will not be repeated here.
[0062] The computing device of this embodiment controls the working status of all computing units in the rows corresponding to the data or all computing units in the corresponding columns according to the instructions of the control signal, thereby further effectively reducing the energy consumption in matrix operations, reducing the operating temperature of the chip, and further reducing the difficulty and cost of heat dissipation design in board-level design, thereby achieving the purpose of saving energy.
[0063] For example, Figure 4 As shown, after the data preprocessing unit Pre_P generates a control signal according to the data of the read input matrix, the data preprocessing unit Pre_P may control the working state of the computing unit that performs the calculation on the data according to the control signal, or the computing unit may control its own working state according to the control signal. That is, the execution subject of the control signal may be the data preprocessing unit Pre_P or the computing unit, and this embodiment does not limit this.
[0064] For example, Figure 4 As shown, the data preprocessing unit Pre_P includes a plurality of zero detection control modules Z_Det arranged in a column vector manner, the number of the zero detection control modules Z_Det is the same as the number of rows of the computing unit array, and each of the zero detection control modules is connected to the computing unit of the corresponding row.
[0065] As a specific example, Figure 4 As shown, the data preprocessing unit Pre_Pt is used to preprocess the data of the first input matrix M1 to generate a control signal, then the data preprocessing unit Pre_P may include M zero detection control modules Z_Det arranged in a column vector manner, each zero detection control module Z_Det is used to read the data of the corresponding row of the first input matrix M1, and corresponds to a row of calculation units, so that each zero detection control module Z_Det can be used to control the working state of the calculation unit of the corresponding row.
[0066] Correspondingly, when the data preprocessing unit Pre_Pt is used to preprocess the data of the second input matrix M2 to generate a control signal, the data preprocessing unit Pre_Pt may include N zero detection control modules Z_Det arranged in a row vector manner, each zero detection control module Z_Det is used to receive the data of the corresponding column of the second input matrix M2, and corresponds to a column of calculation units, so that each zero detection control module Z_Det can be used to control the working state of the calculation unit of the corresponding column.
[0067] The following will use a specific example to explain in detail the process of the computing device of the present disclosure performing a matrix multiplication operation.
[0068] like Figure 5 As shown, the size of the first input matrix M1 is 2×3, the size of the second input matrix M2 is 3×2, and the size of the output matrix M is 2×2.
[0069] like Figure 6 As shown, in order to meet Figure 5 For the multiplication operation between the first input matrix M1 and the second input matrix M2, the computing device may use a 2×2 computing unit array, that is, the computing unit array includes computing units PU 0,0 , PU 0,1 , PU 1,0 and PU 1,1 The data preprocessing unit Pre_P includes two zero detection control modules Z_Det arranged in a column vector manner, the number of which is the same as the number of rows of the first input matrix M1. Each zero detection control module Z_Det is used to read a row of data of the first input matrix M1 and control the working state of the calculation unit of the corresponding row.
[0070] When the data of the read first input matrix M1 is zero, the zero detection control module Z_Det corresponding to the zero data will generate a control signal D_Rx = "0", and when the data of the first input matrix M1 is non-zero, the corresponding zero detection control module Z_Det will generate a control signal C_Rx = "1", where x represents the number of rows of the data in the first input matrix M1.
[0071] like Figure 7a As shown, in the first calculation, each data in the 0th column of the first input matrix M1 will be sent to the corresponding zero detection control module Z_Det in the data preprocessing unit Pre_P, and the zero detection module will generate a control signal according to whether the value of the data is zero. Since the data in the 0th column and the 0th row of the first input matrix M1 is 1, the control signal C_Rx=“1” generated by the zero detection control module Z_Det corresponding to the data indicates that each of the calculation units in the row corresponding to the data will perform calculations, and the data of this element will be sent to the calculation units in that row. Since the data in the 0th column and the 1st row of M1 is 0, the control signal D_Rx=“0” generated by the zero detection control module Z_Det corresponding to the data indicates that each of the calculation units in the row corresponding to the data will not perform calculations, and this data will not be sent to the calculation units in that row.
[0072] It should be noted that the control signal indication method also includes: after the zero detection control module generates the control signal, a row of computing units can also read the control signal from the zero detection control module, and determine whether to read data from the zero detection control module based on the control signal. Which indication method of the control signal is used can be determined according to actual needs, and is not limited in the present invention. The following description is based on the example that the zero detection module determines whether the corresponding row of computing units needs to work based on the control signal, and sends data to a row of computing units based on the result of the calculation that needs to be performed.
[0073] like Figure 7b As shown, according to the instruction of the control signal, the calculation unit of the 0th row and the 0th column receives the data "1" of the 0th row and the 0th column of the first input matrix M1, and reads the data "1" of the 0th row and the 0th column of the second input matrix M2, and performs a 1*1 calculation to obtain an intermediate result 1; the calculation unit of the 0th row and the 1st column receives the data "1" of the 0th row and the 0th column of the first input matrix M1, reads the data "2" of the 0th row and the 1st column of the second input matrix M2, and performs a 1*2 calculation to obtain an intermediate result 2, and the obtained data is added to the original initial value 0, thereby obtaining the intermediate result of the 0th row of the output matrix M. According to the instruction of the control signal, the value of the data of the 0th column and the 1st row of M1 represented by the shaded part in the figure is 0, so each calculation unit of the 1st row of the calculation unit array does not work, that is, does not receive data and does not perform calculations, so the intermediate result of the 1st row of the output matrix is the initial value unchanged (0 and 0). The intermediate result is represented by the intermediate matrix M_temp in the figure.
[0074] like Figure 7cAs shown, during the second calculation, since the data in the 1st column, 0th row and 1st row of the first input matrix M1 are both 0, the two rows of calculation units corresponding to these two data do not work, and the intermediate result of the output matrix remains unchanged, as shown in Figure 7d For the specific calculation process, refer to Figure 7a and 7b Description.
[0075] like Figure 7e As shown, when performing the third calculation, each data in the second column of the first input matrix M1 will be sent to the corresponding zero detection control module Z_Det in the data preprocessing unit Pre_P, and the zero detection module will generate a control signal according to whether the value of the data is zero. Since the data value of the second column and the 0th row of the first input matrix M1 is 0, the control signal D_Rx="0" generated by the zero detection control module Z_Det corresponding to the data indicates that each of the calculation units in that row corresponding to the data does not perform calculations, and this data will not be sent to the calculation units in that row, so the calculation is not performed in the 0th row of the calculation unit array, and the intermediate result of the 0th row of the output matrix remains unchanged (1 and 2). Since the data value of the 1st row of the 2nd column in the first input matrix M1 is "2", the control signal C_Rx = "1" generated by the zero detection control module Z_Det corresponding to the data, the control signal instructs each of the calculation units in the row corresponding to the data to perform calculations, and the data of this element will be sent to the calculation units in that row. Specifically, according to the instruction of the control signal, the calculation unit in the 1st row and 0th column receives the data "2" in the 1st row and 2nd column of the first input matrix M1, and reads the data "1" in the 2nd row and 0th column of the second input matrix M2, performs a 2*1 calculation to obtain an intermediate result 2, and the obtained data is added to the data "0" calculated last, thereby obtaining the output result "2" of the 1st row and 0th column of the output matrix M; the calculation unit in the 1st row and 1st column receives the data "2" in the 1st row and 2nd column of the first input matrix M1, reads the data "2" in the 2nd row and 1st column of the second input matrix M2, performs a 2*2 calculation to obtain an intermediate result 4, and the obtained data is added to the data "0" calculated last, thereby obtaining the output result "4" of the 1st row and 2nd column of the output matrix M, as shown Figure 7f As shown, the matrix calculation is completed, and finally the result of the output matrix is written into the storage area as the final calculation result.
[0076] Next, we will refer to Figure 8 A calculation method according to another embodiment of the present disclosure is described.
[0077] like Figure 8As shown, a calculation method S100 can be applied to the calculation device described above. For the related contents not mentioned below, please refer to the related records in the above text, and no further description is given here. The calculation method S100 includes:
[0078] S110, read the data of the input matrix.
[0079] S120. Generate a control signal according to the data, wherein the control signal indicates a working state of a computing unit that performs calculations on the data.
[0080] The calculation method of this embodiment generates a control signal according to the data of the input matrix and uses the control signal to control the working state of the corresponding calculation unit. For example, when the data value is zero, the calculation unit can be controlled not to work, and when the data value is non-zero, the calculation unit can be controlled to work. This can effectively reduce the energy consumption in the matrix operation, reduce the operating temperature of the chip, and further reduce the difficulty and cost of the heat dissipation design in the board-level design, thereby achieving the purpose of saving energy.
[0081] In some optional implementations, generating a control signal according to the data, wherein the control signal indicates a working state of a computing unit that performs calculations on the data, includes:
[0082] When the data value of the data is a first preset value, a first control signal is generated, wherein the first control signal instructs all the computing units that perform calculations on the data to perform calculations; or,
[0083] When the data value of the data is a second preset value, a second control signal is generated, wherein the second control signal instructs all the calculation units that perform calculations on the data not to perform calculations.
[0084] In some optional implementations, the first preset value is a non-zero value, and the second preset value is a zero value.
[0085] In some optional implementations, the control signal indicates a working state of a computing unit that performs calculations on the data, including:
[0086] The control signal indicates the working status of all the computing units in the row corresponding to the data or all the computing units in the column corresponding to the data.
[0087] Another aspect of the present disclosure provides an electronic device, comprising: at least one computing device as described above;
[0088] A storage unit is used to store one or more programs, which, when executed by the one or more computing devices, can enable the one or more computing devices to implement the computing method described above.
[0089] Another aspect of the present disclosure provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, can implement the calculation method described above.
[0090] The computer-readable medium may be included in the apparatus, device, or system of the present disclosure, or may exist independently.
[0091] Among them, computer-readable storage media can be any tangible media that contains or stores a program, which can be an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or equipment. More specific examples include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, an optical fiber, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof.
[0092] The computer-readable storage medium may also include a data signal propagated in a baseband or as part of a carrier wave, which carries a computer-readable program code, specific examples of which include but are not limited to electromagnetic signals, optical signals, or any suitable combination thereof.
[0093] Another aspect of the present disclosure provides a computer program, which can implement the calculation method described above when executed by a processor.
[0094] It is understandable that a computer program can be stored in a computer storage medium, such as the random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), portable compact disk read-only memory (CD-ROM), etc. mentioned above.
[0095] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present disclosure, but the present disclosure is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and substance of the present disclosure, and these modifications and improvements are also considered to be within the scope of protection of the present disclosure.
Claims
1. A computing device, characterized in that: It includes a computing unit array and at least one data pre-processing unit connected to the computing unit array; wherein, The data preprocessing unit is used to read the data of the input matrix and generate a control signal according to the data, wherein the control signal is used to indicate the working state of the calculation unit that performs calculation on the data; The data preprocessing unit includes a plurality of zero detection control modules arranged in a column vector manner, the number of the zero detection control modules is the same as the number of rows of the computing unit array, and each of the zero detection control modules is connected to a computing unit of a corresponding row; and / or, The data preprocessing unit includes a plurality of zero detection control modules arranged in a row vector manner, the plurality of zero detection control modules have the same number of columns as the computing unit array, and each of the zero detection control modules is connected to a computing unit of a corresponding column.
2. The computing device according to claim 1, wherein: The data preprocessing unit generates a control signal according to the data, wherein the control signal is used to indicate a working state of a calculation unit that performs calculation on the data, including: The data preprocessing unit is specifically used for: When the data value of the data is a first preset value, a first control signal is generated, wherein the first control signal is used to instruct all the computing units that perform computing on the data to perform computing; or, When the data value of the data is a second preset value, a second control signal is generated, wherein the second control signal is used to instruct all the calculation units that perform calculations on the data not to perform calculations.
3. The computing device according to claim 2, characterized in that The first preset value is a non-zero value, and the second preset value is a zero value.
4. The computing device according to any one of claims 1 to 3, characterized in that: The control signal is used to indicate the working state of a computing unit that performs calculations on the data, including: The control signal is used to indicate the working status of all the computing units in the row corresponding to the data or all the computing units in the corresponding column.
5. The computing device according to any one of claims 1 to 3, characterized in that: The control signal is used to indicate the working state of a computing unit that performs calculations on the data, including: The data preprocessing unit is used to control the working state of the calculation unit that performs calculation on the data according to the control signal; or The calculation unit is used to control its own working state according to the control signal.
6. A calculation method, characterized in that: Applicable to the computing device according to any one of claims 1 to 5, the computing method comprising: Read the data of the input matrix; A control signal is generated based on the data, wherein the control signal indicates an operating state of a computing unit that performs a calculation on the data.
7. The calculation method according to claim 6, characterized in that: Generating a control signal according to the data, wherein the control signal indicates a working state of a computing unit that performs a calculation on the data, comprises: When the data value of the data is a first preset value, a first control signal is generated, wherein the first control signal instructs all the computing units that perform calculations on the data to perform calculations; or, When the data value of the data is a second preset value, a second control signal is generated, wherein the second control signal instructs all the calculation units that perform calculations on the data not to perform calculations.
8. An electronic device, characterized in that: include: At least one computing device as claimed in any one of claims 1 to 5; A storage unit, used to store one or more programs, which, when executed by the one or more computing devices, enable the one or more computing devices to implement the computing method according to claim 6 or 7.
9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the computing method according to claim 6 or 7 can be implemented.
Citation Information
Patent Citations
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