Low-temperature polysilicon thin film, preparation method thereof, array substrate and display device
By using two laser beams to synergistically create a temperature gradient on the amorphous silicon layer, the problems of uneven grain size and random distribution of grain boundaries in low-temperature polycrystalline silicon films in the existing technology are solved, large-size, uniform polycrystalline silicon grain growth is achieved, electron mobility is improved, and production costs are reduced.
Patent Information
- Application Number
- CN202111357496.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-11-16
- Publication Date
- 2025-10-21
- Estimated Expiration
- 2041-11-16
AI Technical Summary
The existing excimer laser annealing crystallization method has problems such as uneven grain size, random distribution of grain boundaries, narrow process window, and high requirements for laser energy and uniformity when preparing low-temperature polysilicon films, which affects the electron mobility of polysilicon and the performance of display devices.
A temperature gradient is constructed on the amorphous silicon layer by using the synergistic effect of two laser beams. Through the synergistic effect of the first laser beam and the second laser beam, a low-temperature zone and a high-temperature melting zone are formed, thereby controlling the growth direction and size of the polysilicon grains and reducing the laser energy and uniformity requirements.
Large-sized and evenly distributed low-temperature polysilicon grains are achieved, which improves electron mobility, reduces production costs, expands the window of the crystallization process, and improves production efficiency.
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Figure CN114068307B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of display technology, and in particular to a low-temperature polysilicon thin film and a preparation method thereof, an array substrate and a display device. Background Art
[0002] Polycrystalline silicon (p-Si) has a much higher carrier mobility (up to 10-100cm) than amorphous silicon (a-Si) and comparable to single crystal silicon. 2 / Vs), so LTPS-TFT (Low Temperature Poly-silicon Thin Film Transistor) is often used in the active layer of thin-film transistors (TFTs) instead of amorphous silicon. LTPS-TFT can be produced at low temperatures (below 600°C) and has flexible substrate selection. It is currently the only active layer production technology compatible with flexible display technology. Therefore, LTPS-TFT has important applications in active-liquid crystal displays (AMLCDs) with integrated peripheral drivers and active organic light-emitting diodes (AMOLEDs).
[0003] Existing technical solutions for preparing low-temperature polycrystalline silicon thin films include: rapid annealing solid-phase crystallization (RTA); excimer laser annealing crystallization (ELA); metal-induced lateral crystallization (MILC); hot-filament catalyzed chemical vapor deposition (Cat-CVD), etc. The most widely used technical solution for preparing LTPS-TFT is excimer laser annealing crystallization, also known as polycrystalline silicon thin film crystallization process. Excimer laser annealing crystallization method prepares polycrystalline silicon thin film by critical complete melting of amorphous silicon thin film. Due to the strong absorption capacity of amorphous silicon thin film to ultraviolet and short-wavelength visible light, and the high laser pulse power of excimer laser and little damage to the substrate, these characteristics make excimer laser the preferred laser source for preparing low-temperature polycrystalline silicon thin film by excimer laser annealing crystallization method.
[0004] However, the existing excimer laser annealing crystallization method for preparing low-temperature polysilicon thin films has the following technical problems:
[0005] 1. There is a laser energy window for obtaining smaller grains. Within this energy window, the amorphous silicon (a-Si) film is almost completely melted, and the solid a-Si remaining on the surface of the a-Si bottom oxide acts as a nucleation medium, resulting in a liquid phase growth process with non-uniform nucleation, manifested as super lateral growth. If the laser energy is too low, the a-Si cannot be melted or the grains cannot be large enough, and too high will cause microcrystallization or amorphization. In the prior art, the amorphous silicon layer is directly formed on the buffer layer. During the excimer laser annealing process, the heating conditions of various regions of the amorphous silicon layer tend to be consistent, and the starting point of recrystallization and the growth direction of the grains are messy, resulting in small grain size of the low-temperature polycrystalline silicon (p-Si) after recrystallization and more grain boundaries between the grains, which affects the electron mobility of the polycrystalline silicon and thus the response speed of the flat panel display;
[0006] 2. The growth of low-temperature polysilicon grains is random, the grain sizes are uneven and poorly uniform, and the positions of grain boundaries are also randomly distributed;
[0007] 3. The performance requirements for the alignment process are high (such as beam uniformity and energy stability), which results in a narrow window for the crystallization process.
[0008] In response to the technical problems existing in the existing excimer laser annealing crystallization method, in order to grow large-sized low-temperature polysilicon grains and achieve low-temperature polysilicon grain control, the existing technical solution is to construct a lateral temperature gradient (Thermal Gradient) condition in the amorphous silicon layer to achieve super lateral crystallization (Super Lateral Growth) of the low-temperature polysilicon grains. The basic principle of super lateral growth is to change the regional temperature of the amorphous silicon film layer through various methods to form a temperature gradient between different regions, thereby forming super lateral crystallization. The current technical solutions for forming super lateral crystallization include: 1. Super lateral crystallization is achieved by process changes on the laser system side, such as adding phase-shift optical lenses, adding phase masks and beam interference methods; 2. Super lateral crystallization is achieved by changes on the substrate side, such as locally changing the reflectivity of the amorphous silicon layer, locally changing the thickness of the amorphous silicon and locally changing the thermal conductivity distribution of the substrate. Summary of the Invention
[0009] To address the technical issues of existing excimer laser annealing crystallization methods, the present invention provides a method for preparing low-temperature polycrystalline silicon thin films. This method improves upon existing polycrystalline silicon thin film crystallization processes. By incorporating the characteristics of polycrystalline silicon thin film devices (AMOLEDs and AMLCDs), this method creates super-lateral crystallization conditions, facilitating the growth of large low-temperature polycrystalline silicon grains and forming polycrystalline silicon films with controllable grain boundary distribution. This method increases the size of low-temperature polycrystalline silicon grains while also reducing the production cost of low-temperature polycrystalline silicon films.
[0010] In one aspect, the present invention provides a method for preparing a low-temperature polysilicon thin film, comprising the following steps:
[0011] S1, forming an amorphous silicon layer on a substrate;
[0012] S2, a first laser beam emitted by a first laser irradiates the amorphous silicon layer through a mask having an exposure pattern, and a second laser beam emitted by a second laser irradiates the amorphous silicon layer. The first laser beam and the second laser beam work together to form a low-temperature zone and a high-temperature melting zone in the amorphous silicon layer;
[0013] S3, recrystallization from the low temperature zone to the high temperature melting zone.
[0014] Wherein, the step S1 includes:
[0015] S11, forming a buffer layer on the upper surface of the substrate;
[0016] S12, forming an amorphous silicon layer on the buffer layer;
[0017] S13, performing a dehydrogenation annealing treatment on the buffer layer and the amorphous silicon layer, for example, performing the dehydrogenation annealing at an ambient temperature of 380-520° C. for 40-120 minutes.
[0018] The step S11 specifically includes: forming a silicon nitride layer and a silicon oxide layer on the surface of the substrate in sequence. In order to prevent the laser beam from damaging the substrate, preferably, the total thickness of the silicon nitride layer and the silicon oxide layer is , the thickness of the amorphous silicon layer is In one embodiment, the buffer layer and the amorphous silicon layer are formed by plasma enhanced chemical vapor deposition in both step S11 and step S12.
[0019] In step S2, the first laser beam can be considered an auxiliary laser beam, and the second laser beam can be considered a main laser beam. The temperature of the low-temperature zone formed in the amorphous silicon layer is lower than the critical temperature at which the amorphous silicon thin film is completely melted, and the temperature of the high-temperature melting zone formed in the amorphous silicon layer is higher than the critical temperature at which the amorphous silicon thin film is completely melted. To further reduce the laser energy requirements for the first laser beam and the second laser beam, the temperature of the low-temperature zone deviates from the critical temperature as little as possible, and the temperature of the high-temperature melting zone deviates from the critical temperature as little as possible.
[0020] Wherein, in step S2, the first laser and the second laser can be continuous emission lasers or pulsed lasers. Preferably, the first laser and the second laser are both pulsed lasers, and the first laser beam and the second laser beam have the same or similar pulse frequency.
[0021] When both the first laser and the second laser are pulse lasers, step S2 includes:
[0022] S21, placing a mask above the amorphous silicon layer to be recrystallized;
[0023] S22, a first laser beam emitted by a first laser irradiates the amorphous silicon layer through a mask having an exposure pattern, and a second laser beam emitted by a second laser irradiates the amorphous silicon layer directly without passing through the mask;
[0024] S23, the first laser beam irradiated onto the amorphous silicon layer reaches a rising edge before the second laser beam irradiated onto the amorphous silicon layer;
[0025] S24, after the laser power of the first laser beam irradiating the amorphous silicon layer maintains the peak power for a period of time, the second laser beam irradiating the amorphous silicon layer reaches a rising edge;
[0026] S25, the second laser beam irradiated onto the amorphous silicon layer reaches a falling edge before the first laser beam irradiated onto the amorphous silicon layer;
[0027] S23, loop S23 to S25, the first laser beam forms a pattern on the amorphous silicon layer through the mask, including a high-energy irradiation area and a low-energy irradiation area, the first laser beam and the second laser beam work together to make the amorphous silicon in the high-energy irradiation area completely melt to form a high-temperature melting area, and the amorphous silicon in the low-energy irradiation area is in a non-completely melted state to form a low-temperature area.
[0028] In a second aspect, the present invention provides a low-temperature polysilicon thin film, which is prepared by the above-mentioned preparation method.
[0029] In a third aspect, the present invention provides an array substrate comprising a low-temperature polysilicon thin film transistor, wherein the low-temperature polysilicon thin film transistor is prepared using the above-mentioned low-temperature polysilicon thin film.
[0030] In a fourth aspect, the present invention provides a display device comprising the above-mentioned array substrate.
[0031] The present invention provides a method for preparing a low-temperature polycrystalline silicon thin film. The method uses two laser beams generated by two lasers to synergistically form the low-temperature polycrystalline silicon thin film on an amorphous silicon layer. The laser light source has high energy density and low heat input. The first laser beam provides auxiliary heating for the second laser beam. The amorphous silicon layer is completely melted in the high-temperature melting zone, while the amorphous silicon in the low-temperature zone is partially melted. Therefore, there is a temperature difference between the amorphous silicon in the high-temperature melting zone and the amorphous silicon in the low-temperature zone. After laser irradiation ends, the amorphous silicon in the low-temperature zone crystallizes first and then grows toward the high-temperature melting zone, thereby forming a uniform polycrystalline silicon layer with controllable size. The preparation method provided by the present invention can greatly improve production efficiency. The synergistic effect of the two laser beams significantly reduces the laser irradiation time, lowering production costs. Moreover, the method can produce low-temperature polycrystalline silicon thin films for large-area displays.
[0032] Compared with the prior art, the technical solution of the present invention has at least the following beneficial effects:
[0033] 1. When crystallizing polysilicon thin films, the energy of the first laser beam has a pattern distribution, that is, the energy of some areas on the amorphous silicon layer is high and that of others is low. The specific structure of the pattern is determined by the exposure pattern on the mask. In addition, the synergistic effect of the second laser beam uses some areas of the amorphous silicon layer with higher temperatures and some areas with lower temperatures to create a temperature gradient on the amorphous silicon layer.
[0034] 2. During the crystallization of the polysilicon thin film, under the coordinated action of the first laser beam and the second laser beam, the high-energy irradiation area on the amorphous silicon layer is in a completely molten state, and the low-energy irradiation area is in a partially molten state. A temperature gradient is formed from the high-energy irradiation area to the low-energy irradiation area on the amorphous silicon layer, and the temperature gradually decreases. During cooling and recrystallization, the solid silicon particles that have not yet completely melted in the low-energy irradiation area serve as crystal nuclei to start recrystallization. The direction of crystallization is: advancing from the low-energy irradiation area with a lower temperature to the high-energy irradiation area with a higher temperature. Because of the existence of temperature gradient thermodynamics, the super lateral growth of low-temperature polysilicon grains is completed.
[0035] 3. The first laser beam irradiating the amorphous silicon layer reaches its rising edge before the second laser beam irradiating the amorphous silicon layer. Therefore, the first laser beam can preheat the amorphous silicon layer, thereby generating a stable temperature gradient distribution.
[0036] 4. The second laser beam irradiated to the amorphous silicon layer reaches the falling edge first compared to the first laser beam irradiated to the amorphous silicon layer, and the cooling and recrystallization stage begins when the second laser beam reaches the falling edge. Therefore, the first laser beam still at peak power can effectively prolong the cooling and recrystallization time of the seed crystal, which is beneficial to reducing the defect state of the low-temperature polycrystalline silicon grains and increasing the size of the low-temperature polycrystalline silicon grains.
[0037] 5. The synergistic effect of the first laser beam and the second laser beam makes the recrystallized low-temperature polysilicon grains large in size, evenly distributed, and with controllable grain boundaries, which can effectively improve the electron mobility of TFTs and reduce leakage current;
[0038] 6. Through the synergistic effect of the first laser beam and the second laser beam, the requirements for the power, beam uniformity and energy stability of the first laser beam and the second laser beam can be reduced at the same time, thereby expanding the window of the crystallization process.
[0039] The following describes the details in conjunction with specific embodiments. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] The accompanying drawings further illustrate the present invention, but the embodiments in the accompanying drawings do not constitute any limitation to the present invention.
[0041] Figure 1 A schematic structural diagram of a substrate and an amorphous silicon layer provided in one embodiment of the present invention.
[0042] Figure 2 A schematic diagram of a laser beam irradiating an amorphous silicon layer according to an embodiment of the present invention.
[0043] Figure 3 A schematic diagram of the superimposed waveforms of the first laser beam and the second laser beam provided in one embodiment of the present invention.
[0044] Figure 4 A schematic diagram of fabricating a polysilicon thin film transistor on a substrate according to an embodiment of the present invention.
[0045] Among them, the figure markings are: 1. glass substrate; 2. silicon nitride layer; 3. silicon oxide layer; 4. amorphous silicon layer; 5. first laser beam; 6. second laser beam; 7. mask; 81. etching area; 82. reserved area. DETAILED DESCRIPTION
[0046] It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.
[0047] This embodiment provides a method for preparing low-temperature polysilicon, comprising the following steps:
[0048] S1, providing a glass substrate 1, forming a buffer layer and an amorphous silicon layer 4 on the glass substrate 1, as shown in FIG. Figure 1 As shown, the buffer layer includes silicon nitride (SiN x ) layer 2 and silicon oxide (SiO x ) layer 3;
[0049] S2, such as Figure 2 As shown, a first laser beam 5 emitted by a first laser (not shown in the drawings) irradiates the amorphous silicon layer 4 through a mask 7 having an exposure pattern, and a second laser beam 6 emitted by a second laser (not shown in the drawings) irradiates the amorphous silicon layer 4. The first laser beam 5 and the second laser beam 6 work together to form a low-temperature zone and a high-temperature melting zone in the amorphous silicon layer 4.
[0050] S3, recrystallization from the low temperature zone to the high temperature melting zone.
[0051] The glass substrate described in this embodiment needs to have high transparency, low reflectivity, good thermal stability and corrosion resistance, high mechanical strength, and good machinability. Furthermore, the glass substrate needs to have good electrical insulation. Preferably, the glass substrate is alkali-free borosilicate glass or alkali-free aluminosilicate glass. In other embodiments, the substrate may also be a printed circuit board.
[0052] Among them, the mask plate 7 includes an exposure pattern consisting of a high-transmittance area and a low-transmittance area. Therefore, the part of the first laser beam 5 that passes through the high-transmittance area and irradiates the amorphous silicon layer 4 corresponds to the high-temperature melting area, and the part of the first laser beam 5 that passes through the low-transmittance area and irradiates the amorphous silicon layer 4 corresponds to the low-temperature area.
[0053] Specifically, step S1 includes:
[0054] S11, forming a silicon nitride layer 2 on the upper surface of the glass substrate 1 by plasma enhanced chemical vapor deposition, forming SiN x The reaction gas of the film layer is a mixed gas of SiH4, NH3, and N2, or a mixed gas of SiH2Cl2, NH3, and N2;
[0055] S12, forming a silicon oxide layer 3 on the upper surface of the silicon nitride layer 2 by plasma enhanced chemical vapor deposition, forming SiO x The reaction gas of the film layer is a mixture of SiH4 and N2O, or a mixture of SiH4 and tetraethyl orthosilicate (TEOS), and the thickness ratio of the silicon nitride layer 2 to the silicon oxide layer 3 is 1:1-1.8;
[0056] S13, forming an amorphous silicon layer 4 on the upper surface of the silicon oxide layer 3 using a plasma enhanced chemical vapor deposition method;
[0057] S14, performing a dehydrogenation annealing treatment on the silicon nitride layer 2, the silicon oxide layer 3 and the amorphous silicon layer 3. The specific steps of the dehydrogenation annealing treatment are performing dehydrogenation annealing at 400°C for 150 minutes.
[0058] Silicon nitride layer 2 is disposed between glass substrate 1 and silicon oxide layer 3, facilitating the subsequent hydrogenation process and achieving good electrical properties. The buffer layer formed on glass substrate 1 improves adhesion between amorphous silicon layer 4 and glass substrate 1, reducing heat conduction and slowing the cooling rate of the subsequent laser-heated silicon, thereby facilitating polycrystalline silicon crystallization. Furthermore, the buffer layer prevents metal ions within glass substrate 1 from entering amorphous silicon layer 4 during deposition.
[0059] In this embodiment, when both the first laser and the second laser are pulsed lasers, the following constraints are imposed on the first laser beam 5 and the second laser beam 6:
[0060] 1. The first laser beam 5 and the second laser beam 6 are both pulsed laser beams. The first laser beam 5 and the second laser beam 6 are emitted simultaneously toward the amorphous silicon layer 4 and have the same period and frequency. Assume that the period of the first laser beam 5 and the second laser beam 6 is T. Within one period T, there is a rising edge and a falling edge. The rising edge in the laser pulse waveform is defined as the process of rising from a lower power to a peak power, and the falling edge in the laser pulse waveform is defined as the process of falling from the peak power to a lower power. In this embodiment, since the duration of the rising edge and the duration of the falling edge are both very short, the rising edge and the falling edge are approximately a vertical line on the laser pulse waveform.
[0061] 2. Assume that the energy of a single pulse of the first laser beam 5 is E1, the peak power is P1, and the duration of the laser pulse waveform at the peak is tp1; assume that the energy of a single pulse of the second laser beam 6 is E2, the peak power is P2, and the duration of the laser pulse waveform at the peak is tp2; wherein the following conditions are satisfied: E2 is greater than E1, E2 is less than the theoretical energy required to melt the amorphous silicon layer, E2 is less than the theoretical energy required to melt the amorphous silicon layer, (E1+E2) is greater than the theoretical energy required to melt the amorphous silicon layer, P1 is less than P2, and tp1 is greater than tp2;
[0062] 3. Within a period T:
[0063] The first laser beam 5 reaches the rising edge first relative to the second laser beam 6. The laser power of the first laser beam 5 rises rapidly from a lower power to a peak power P1. Before the second laser beam 6 reaches the rising edge, the first laser beam 5 preheats the amorphous silicon layer.
[0064] When the second laser beam 6 reaches its rising edge, the laser power of the second laser beam 6 rapidly increases from a relatively low power to a peak power P2. At this time, under the synergistic effect of the first laser beam 5 and the second laser beam 6, the high-energy irradiation area on the amorphous silicon layer is in a completely melted state, and the low-energy irradiation area is in a partially melted state.
[0065] The second laser beam 6 reaches the falling edge first compared to the first laser beam 5. The laser power of the second laser beam 6 drops rapidly from the peak power P2 to a lower power. The solid silicon particles that have not yet completely melted in the low-energy irradiation area serve as crystal nuclei and begin to recrystallize. The first laser beam 5, which is still at the peak power, heats and keeps the amorphous silicon layer warm, thus effectively extending the cooling and recrystallization time of the seed crystal.
[0066] After the first laser beam 5 reaches the falling edge, the laser power drops rapidly from the peak power P1 to a lower power;
[0067] 4. The peak power P1, tp1 and the lower power of the first laser beam 5 are determined by the thickness and material properties of the amorphous silicon layer and are in a certain proportional relationship.
[0068] 5. The peak power P2, tp2 and lower power of the second laser beam 6 are determined by the thickness and material properties of the substrate, the thickness and material properties of the silicon nitride layer, the thickness and material properties of the silicon oxide layer, and the thickness and material properties of the amorphous silicon layer, and are in a certain proportional relationship.
[0069] In this embodiment, the power of the first laser and the second laser can be modulated by using a trapezoidal pulse waveform. The laser pulses emitted by the first laser and the second laser move along the scanning direction on the amorphous silicon layer to complete the crystallization process of the amorphous silicon layer.
[0070] Specifically, step S2 includes:
[0071] S21, placing the mask 7 above the amorphous silicon layer 4 to be recrystallized;
[0072] S22. A first laser beam 5 emitted by a first laser passes through a mask 7 having an exposure pattern and irradiates the amorphous silicon layer 4. The wavelength of the first laser beam is 308 nm and the pulse width is 10-50 ns. A second laser beam 6 emitted by a second laser directly irradiates the amorphous silicon layer 4 without passing through the mask 7. The mask 7 is a transparent thin plate made of a transparent material, and an exposure pattern is formed on the transparent thin plate. The exposure pattern consists of several fully transparent areas and several partially transparent areas. The partially transparent areas are formed by coating the transparent thin plate with a dye. The areas outside the partially transparent areas form fully transparent areas. The operator can control the size and arrangement of the prepared polycrystalline silicon grains by changing the exposure pattern of the mask. The area of the exposure pattern of the mask 7 corresponds to the area of the amorphous silicon layer 4 to be recrystallized. The transmittance of the first laser beam 5 in the fully transparent area is 100%. Preferably, the transmittance of the first laser beam 5 in the partially transparent area is 10%-60%.
[0073] S23, the first laser beam 5 irradiated onto the amorphous silicon layer 4 reaches a rising edge before the second laser beam 6 irradiated onto the amorphous silicon layer;
[0074] S24, after the laser power of the first laser beam 5 irradiating the amorphous silicon layer 4 maintains the peak power for a period of time, the second laser beam 6 irradiating the amorphous silicon layer 4 reaches a rising edge;
[0075] S25, the second laser beam 6 irradiated onto the amorphous silicon layer 4 reaches a falling edge before the first laser beam 5 irradiated onto the amorphous silicon layer 4;
[0076] S23, loop S23 to S25, the first laser beam 5 forms a pattern on the amorphous silicon layer 4 through the mask 7, including a high-energy irradiation area and a low-energy irradiation area. The area on the amorphous silicon layer 4 where the first laser beam 5 passes through the fully transparent area of the mask 7 and is irradiated is the high-energy irradiation area, and the area on the amorphous silicon layer 4 where the first laser beam 5 passes through the partially transparent area of the mask 7 and is irradiated is the low-energy irradiation area. The first laser beam 5 and the second laser beam 6 work together to completely melt the amorphous silicon in the high-energy irradiation area to form a high-temperature melting area, and the amorphous silicon in the low-energy irradiation area is in a non-completely melted state to form a low-temperature area.
[0077] In this embodiment, the first laser and the second laser are both pulse lasers, the first laser beam 5 and the second laser beam 6 are both pulse lasers, and the superimposed waveform of the first laser beam 5 and the second laser beam 6 is as follows: Figure 3As shown, the rising edge and falling edge of the waveform tend to be vertical, so the duration of the rising edge and falling edge in the pulse laser waveform approaches zero. The first laser beam 5 and the second laser beam 6 have the same pulse period T and pulse frequency. In one pulse period T, the first laser beam 5 and the second laser beam 6 both have a rising edge, a peak phase and a falling edge. The peak power P1 of the first laser beam 5 is greater than the peak power P2 of the second laser beam 6. The duration of the laser power of the second laser beam 6 at the peak is t1, and the duration of the laser power of the first laser beam 5 at the peak is (t1-t2-t3). Combined Figure 3 The specific steps for describing the synergistic effect of the first laser beam 5 and the second laser beam 6 within one pulse period T are as follows:
[0078] S1, the first laser and the second laser simultaneously emit laser beams toward the amorphous silicon layer 4. The first laser beam 5 reaches the rising edge on the amorphous silicon layer 4 preferentially compared to the second laser beam 6. At this time, the laser power of the first laser beam 5 preferentially increases from a lower power to a peak value P1. The first laser beam 5 preheats the glass substrate 1, the buffer layer, and the amorphous silicon layer 4. This can effectively reduce the requirements of the low-temperature polysilicon crystallization process for the second laser beam 6 (high energy, good uniformity, and good stability);
[0079] S2, when the first laser beam 5 is at peak power P2 and lasts for t2, the second laser beam 6 reaches a rising edge on the amorphous silicon layer 4. At this time, the laser power of the second laser beam 6 preferentially rises from a lower power to the peak P2. The first laser beam 5 and the second laser beam 6 synergistically form a low-temperature zone and a high-temperature melting zone on the amorphous silicon layer 4. The amorphous silicon in the high-temperature melting zone and the low-temperature zone has a temperature difference;
[0080] S3, when the second laser beam 6 is at the peak power P1 and lasts for (t1-t2-t3), the second laser beam 6 reaches the falling edge on the amorphous silicon layer 4. At this time, the laser power of the second laser beam 6 drops from the peak power P2 to a lower power, while the first laser beam 5 is still at the peak power P1 and lasts for t3. During the time t3, the first laser beam 5 plays a heat preservation role in the cooling and recrystallization stage of the amorphous silicon layer 4, prolonging the cooling and recrystallization effect, making the liquid-solid phase interface transformation during the crystallization process more gradual, which is beneficial to reducing the defect state density of the low-temperature polycrystalline silicon crystal and facilitating the formation of larger and more uniform low-temperature polycrystalline silicon grains;
[0081] S4, the first laser beam 5 is at the peak power P2 and reaches a falling edge on the amorphous silicon layer 4 after a duration of t3. At this time, the laser power of the first laser beam 5 drops from the peak power P2 to a lower power.
[0082] During the cooling and recrystallization stage of the amorphous silicon layer 4, recrystallization begins with the solid silicon particles that have not yet melted in the low-energy irradiation area as the crystal nucleus, and the direction of crystallization is from the low-energy irradiation area with lower temperature to the high-energy irradiation area with higher temperature. Because of the existence of temperature gradient thermal power, the super lateral growth of low-temperature polycrystalline silicon grains is completed, so that a size-controllable and uniform polycrystalline silicon layer can be formed.
[0083] Preferably, the range of (t2+t3) is 15-50 mS.
[0084] The above process is carried out with the cycle of pulse period T, thereby completing the preparation of the low-temperature polycrystalline silicon thin film on the amorphous silicon layer 4. In the existing polycrystalline silicon thin film crystallization process, only one laser beam is used to irradiate the amorphous silicon layer 4. Therefore, the peak power of the laser beam is required to be no less than (P1+P2). At the same time, the stability and uniformity of the laser power of the laser beam during the time period when the laser power is at peak power must be high. Therefore, the requirements for the laser generating the laser beam are high. The preparation method of low-temperature polycrystalline silicon provided by the present invention can reduce the requirements of the first laser and the second laser compared to the existing polycrystalline silicon thin film crystallization process, but at the same time, the effect of the polycrystalline silicon prepared by the preparation method provided by the present invention is better than the existing polycrystalline silicon thin film crystallization process.
[0085] In this embodiment, after the low-temperature polysilicon thin film is prepared on the amorphous silicon layer 4, the low-temperature polysilicon thin film is processed using the existing process for preparing low-temperature polysilicon thin-film transistors to prepare low-temperature polysilicon thin-film transistors, including: using photoresist coating, mask exposure, development and etching processes to obtain a pattern layer structure, and obtaining an etched area 81 and a retained area 82 on the polysilicon layer; using two photoresist coatings, mask exposure, development and etching processes on the pattern layer to obtain GI (gate insulating layer), GE (gate metal layer), Source (source metal layer) and Drain (drain metal layer), etc., thereby preparing a low-temperature polysilicon thin-film transistor.
[0086] It should be noted that when the pattern layer structure is obtained by applying photoresist, exposing the mask, developing and etching the low-temperature polysilicon film, part of the low-temperature polysilicon film is etched to form an etched area 81, and part is retained to form a retained area 82. Figure 4 As shown, the etched area is all or part of the area irradiated by the low-energy portion of the first laser beam 5, and the retained area is the area irradiated by the high-energy portion of the first laser beam 5; or, the etched area is all or part of the area irradiated by the high-energy portion of the first laser beam 5, and the retained area is the area irradiated by the low-energy portion of the first laser beam 5.
[0087] In one embodiment, after a low-temperature polycrystalline silicon film is prepared on the amorphous silicon layer 4 using the preparation method provided by the present invention, a patterning process is performed on the low-temperature polycrystalline silicon film, wherein the original high-energy irradiation area is completely retained and used as the source and drain electrode metal doping layer, and the original low-energy irradiation area is partially etched away and the retained part is connected to the source and drain electrode metal doping layer as the polycrystalline silicon layer channel area.
[0088] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0089] The above-described embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the patent for this invention shall be determined by the appended claims.
Claims
1. A method for preparing a low-temperature polysilicon thin film, characterized in that: The preparation method comprises the following steps: S1, forming a silicon nitride layer and a silicon oxide layer in sequence on the upper surface of the substrate, and forming an amorphous silicon layer on the silicon oxide layer; S2, a first laser beam emitted by a first laser irradiates the amorphous silicon layer through a mask having an exposure pattern, and a second laser beam emitted by a second laser irradiates the amorphous silicon layer, the first laser beam and the second laser beam synergistically forming a low-temperature zone and a high-temperature melting zone in the amorphous silicon layer; S3, recrystallizing the low temperature region toward the high temperature melting region to prepare the low temperature polycrystalline silicon thin film; The step S2 comprises: S21, placing the mask above the amorphous silicon layer that needs to be recrystallized; S22, the first laser beam emitted by the first laser passes through the mask having the exposure pattern and irradiates the amorphous silicon layer, and the second laser beam emitted by the second laser directly irradiates the amorphous silicon layer without passing through the mask; S23, the laser power of the first laser beam irradiated to the amorphous silicon layer reaches a rising edge first compared to the laser power of the second laser beam irradiated to the amorphous silicon layer; S24, after the laser power of the first laser beam irradiating the amorphous silicon layer maintains a peak power for a period of time, the second laser beam irradiating the amorphous silicon layer reaches a rising edge; S25, the second laser beam irradiated onto the amorphous silicon layer reaches a falling edge before the first laser beam irradiated onto the amorphous silicon layer; S23, looping S23 to S25, the first laser beam forms a pattern on the amorphous silicon layer through the mask, including a high-energy irradiation area and a low-energy irradiation area. The first laser beam and the second laser beam work together to completely melt the amorphous silicon in the high-energy irradiation area to form a high-temperature melting area, and the amorphous silicon in the low-energy irradiation area is in a partially melted state to form a low-temperature area. The first laser beam and the second laser beam are both pulsed laser beams, and the first laser beam and the second laser beam are emitted simultaneously to the amorphous silicon layer. The first laser beam and the second laser beam have the same period and frequency. The period of the first laser beam and the second laser beam is T, and one period T includes a rising edge and a falling edge. The wavelength of the first laser beam is 308 nm, and the pulse width is 10-50 ns. The energy of a single pulse of the first laser beam is E1, the peak power is P1, and the duration of the laser pulse waveform at the peak is tp1; the energy of a single pulse of the second laser beam is E2, the peak power is P2, and the duration of the laser pulse waveform at the peak is tp2, satisfying the following conditions: E2 is greater than E1, E2 is less than the energy required to melt the amorphous silicon layer, E2 is less than the energy required to melt the amorphous silicon layer, E1+E2 is greater than the energy required to melt the amorphous silicon layer, P1 is less than P2, and tp1 is greater than tp2; In a period T: The first laser beam reaches a rising edge preferentially relative to the second laser beam, the laser power of the first laser beam rapidly increases from a lower power to a peak power P1, and the first laser beam preheats the amorphous silicon layer before the second laser beam reaches a rising edge; When the second laser beam reaches the rising edge, the laser power of the second laser beam rapidly increases from a relatively low power to a peak power P2. At this time, under the synergistic effect of the first laser beam and the second laser beam, the high-energy irradiation area on the amorphous silicon layer is in a completely melted state, and the low-energy irradiation area is in a partially melted state. The second laser beam reaches the falling edge first relative to the first laser beam, and the laser power of the second laser beam drops rapidly from the peak power P2 to a lower power. The solid silicon particles that have not yet been completely melted in the low-energy irradiation area serve as crystal nuclei to begin recrystallization, while the first laser beam, which is still at the peak power, heats and maintains the amorphous silicon layer. After the first laser beam reaches the falling edge, the laser power drops rapidly from the peak power P1 to a lower power.
2. A low-temperature polysilicon thin film, characterized in that: The low-temperature polysilicon thin film is prepared by the preparation method according to claim 1.
3. An array substrate, characterized in that: It comprises a low-temperature polysilicon thin film transistor, which is prepared by the low-temperature polysilicon thin film according to claim 2 through an etching process.
4. The array substrate according to claim 3, wherein: The area etched away in the etching process is all or part of the low-temperature area and the remaining area is the high-temperature melting area.
5. The array substrate according to claim 3, wherein: The area etched away in the etching process is all or part of the high-temperature melting area, and the remaining area is the low-temperature area.
6. A display device, characterized in that: Including the array substrate according to claim 3.
Citation Information
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