Method for forming a semiconductor structure

Abstract

A method for forming a semiconductor structure includes: providing a substrate having a metal structure therein, and exposing the metal structure on the surface of the substrate; forming a dielectric structure on the surface of the metal structure; forming an opening penetrating the dielectric structure within the dielectric structure; after forming the opening, performing a densification process on the sidewall surface of the opening and the surface of the dielectric structure; after the densification process, forming an interconnect structure within the opening by using a selective metal growth process. Thereby, the performance and reliability of the semiconductor device are improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular, to a method for forming a semiconductor structure. Background Art

[0002] Currently, in the process of semiconductor manufacturing, an etching process is used to form vias in a dielectric layer. Subsequently, a seed layer is formed on the sidewalls and bottom surface of the vias, and a conductive material is grown on the surface of the seed layer to form an electrical connection structure to achieve electrical connection between semiconductor devices, which is a widely used process. However, since seed layers are formed on both the sidewalls and bottom surface of the vias, when growing the conductive material, the top of the via is likely to be closed before the bottom of the via is not completely filled with the conductive material, resulting in voids in the electrical connection structure and causing a relatively large parasitic resistance of the electrical connection structure.

[0003] In order to reduce the parasitic resistance of the electrical connection structure, a selective metal growth process is proposed. The electrical connection structure formed by the selective metal growth process is formed by growing from the bottom of the via to the top on the metal material at the bottom of the via. Therefore, it avoids the defect that the top of the via is closed before the bottom of the via is not completely filled with the conductive material, reduces the voids in the electrical connection structure, and reduces the parasitic resistance of the electrical connection structure.

[0004] However, the performance and reliability of existing semiconductor devices still need to be improved. Summary of the Invention

[0005] The technical problem solved by the present invention is to provide a method for forming a semiconductor structure to improve the performance and reliability of semiconductor devices.

[0006] To solve the above technical problem, the technical solution of the present invention provides a method for forming a semiconductor structure, including: providing a substrate having a metal structure therein, and exposing the metal structure on the surface of the substrate; forming a dielectric structure on the surface of the metal structure; forming an opening penetrating the dielectric structure in the dielectric structure; after forming the opening, performing a densification treatment on the sidewall surface of the opening and the surface of the dielectric structure; after the densification treatment, using a selective metal growth process to form an interconnect structure in the opening.

[0007] Optionally, the process of the densification treatment includes an oxidation process or a plasma treatment process, and the gas used in the plasma treatment process includes oxygen.

[0008] Optionally, the oxidation process includes: a thermal oxidation process, an organic gas reaction process, or an ozone treatment process.

[0009] Optionally, the material of the metal structure includes cobalt or tungsten.

[0010] Optionally, the material of the interconnect structure includes cobalt or tungsten.

[0011] Optionally, the dielectric structure includes a first dielectric layer on the surface of the metal structure and a second dielectric layer on the surface of the first dielectric layer.

[0012] Optionally, the material of the first dielectric layer includes silicon nitride.

[0013] Optionally, the material of the second dielectric layer includes silicon oxide.

[0014] Optionally, the method of forming the opening includes: forming an opening mask structure on the surface of the dielectric structure, the opening mask structure exposing at least part of the surface of the dielectric structure on the metal structure; using the opening mask structure as a mask to etch the dielectric structure until the surface of the metal structure is exposed.

[0015] Optionally, it further includes: forming a first protective film on the surface of the metal structure before forming the dielectric structure; after the densification treatment and before forming the interconnect structure, removing the first protective film at the bottom of the opening.

[0016] Optionally, the material of the first protective film includes an oxide.

[0017] Optionally, the method of forming the first protective film includes: performing an oxidation treatment on the surface of the metal structure.

[0018] Optionally, the process of removing the first protective film at the bottom of the opening includes a wet cleaning treatment.

[0019] Optionally, it further includes: after the densification treatment, forming a second protective film on the surface of the metal structure at the bottom of the opening.

[0020] Optionally, it further includes: before forming the interconnect structure, removing the second protective film.

[0021] Optionally, the process of forming the second protective film includes an oxidation process or a plasma treatment process, and the gas used in the plasma treatment process includes oxygen.

[0022] Optionally, the material of the second protective film includes an oxide.

[0023] Optionally, it further includes: after forming the opening and before performing the densification treatment, performing an ashing treatment on the surface of the dielectric structure, the sidewall surface of the opening, and the bottom surface of the opening.

[0024] Optionally, it further includes: after the densification treatment and before forming the interconnect structure, performing a wet cleaning treatment on the surface of the dielectric structure, the sidewall surface of the opening, and the bottom surface of the opening.

[0025] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0026] In the method for forming a semiconductor structure provided by the technical solution of the present invention, after the opening is formed and before the interconnect structure is formed in the opening, the side wall surface of the opening and the surface of the dielectric structure are densified. Therefore, the side wall surface of the opening and the surface of the dielectric structure can be made more dense. On the one hand, increasing the density of the side wall surface of the opening can reduce the precursor entering the side wall surface of the opening during the selective metal growth process in the process of forming the interconnect structure, so as to reduce the precursor remaining on the side wall surface of the opening. Therefore, the material of the interconnect structure growing from the side wall surface of the opening into the opening can be reduced, thereby reducing the void defects in the interconnect structure, reducing the parasitic resistance of the interconnect structure, and improving the performance of the semiconductor device. On the other hand, increasing the density of the surface of the dielectric structure can reduce the precursor entering the surface of the dielectric structure during the selective metal growth process in the process of forming the interconnect structure, so as to reduce the precursor remaining on the surface of the dielectric structure. Therefore, the material of the interconnect structure growing on the surface of the dielectric structure can be reduced, thereby reducing the risk of short circuit of the semiconductor device and improving the reliability of the semiconductor device. Moreover, since the side wall surface of the opening and the surface of the dielectric structure are more dense, the damage to the side wall surface of the opening and the surface of the dielectric structure by the wet cleaning process can be reduced in the subsequent wet cleaning process, thereby improving the performance and reliability of the semiconductor device.

[0027] Furthermore, since the densification process includes an oxidation process or a plasma treatment process, and the gas used in the plasma treatment process includes oxygen, through the oxidation process or the plasma treatment process, not only the density of the side wall surface of the opening and the surface of the dielectric structure is increased, but also the materials on the side wall surface of the opening and the surface of the dielectric structure can be converted into oxides, reducing substances such as fluorides remaining on the side wall surface of the opening and the surface of the dielectric structure. Thus, substances such as hydrofluoric acid formed in the subsequent wet cleaning process are reduced, and the damage to the side wall surface of the opening and the surface of the dielectric structure by substances such as hydrofluoric acid is reduced, so as to better reduce the damage to the side wall surface of the opening and the surface of the dielectric structure in the subsequent wet cleaning, thereby improving the performance and reliability of the semiconductor device.

[0028] Furthermore, since a first protective film is formed on the surface of the metal structure before forming the dielectric structure, the first protective film can reduce the damage to the surface of the metal structure at the bottom of the opening during the etching process of forming the opening. Thus, the contact resistance between the metal structure and the interconnect structure is reduced, and the performance of the semiconductor structure is improved. Moreover, since the first protective film at the bottom of the opening is removed after the densification process, that is, the first protective film at the bottom of the opening is removed after improving the density of the sidewall surface of the opening and the surface of the dielectric structure, the damage to the sidewall surface of the opening and the surface of the dielectric structure caused by the process of removing the first protective film at the bottom of the opening can also be reduced. Thus, the performance and reliability of the semiconductor device are improved.

[0029] Furthermore, since a second protective film is formed on the surface of the metal structure at the bottom of the opening after the densification process, the second protective film can reduce the contamination formed on the surface of the exposed metal structure by impurities such as dust in the air in a non-vacuum environment before forming the interconnect structure. Thus, the performance and reliability of the semiconductor structure are improved. Description of the Drawings

[0030] Figures 1 to 3 is a schematic cross-sectional structure diagram of the formation process of a semiconductor structure;

[0031] Figures 4 to 9 is a schematic cross-sectional structure diagram of the formation process of the semiconductor structure according to the embodiment of the present invention. Detailed Embodiments

[0032] As described in the background art, the performance and reliability of the semiconductor structure still need to be improved. The reasons for the performance and reliability of the semiconductor structure still need to be improved are described in detail below with reference to the drawings.

[0033] Figures 1 to 3 is a schematic cross-sectional structure diagram of the formation process of a semiconductor structure.

[0034] Please refer to Figure 1 , a substrate (not shown) is provided, and a metal structure 100 is provided in the substrate, and the metal structure 100 is exposed on the surface of the substrate; a dielectric structure 110 is formed on the surface of the metal structure 100.

[0035] Please refer to Figure 2 , a plug mask structure (not shown) is formed on the surface of the dielectric structure 110; using the plug mask structure as a mask, the dielectric structure 110 is etched until the surface of the metal structure 100 is exposed, and a through hole 111 is formed.

[0036] Please refer to Figure 3 , a plug structure 120 is formed in the through hole 111 by using a selective metal growth process.

[0037] The plug structure 120 is formed by using a selective metal growth process, which enables the material of the plug structure 120 to grow from bottom to top on the surface of the metal structure 100 at the bottom of the through hole 111, improves the void defects in the plug structure 120, and reduces the parasitic resistance of the plug structure 120. Therefore, it is beneficial to improve the performance of semiconductor devices.

[0038] However, in the above method, during the process of etching the dielectric structure 110 to form the through hole 111, the etching process damages the surface of the dielectric structure 110, resulting in a loose surface of the dielectric structure 110. Due to the loose surface of the dielectric structure 110, during the process of forming the plug structure 120 by using the selective metal growth process, the gaseous precursor is likely to enter and remain on the loose surface of the dielectric structure 110, causing the material of the plug structure 120 to grow not only from bottom to top on the surface of the metal structure 100, but also on the side wall surface of the through hole 111 and the surface of the dielectric structure 110.

[0039] The growth of the material of the plug structure 120 on the side wall surface of the through hole 111 will cause the top of the through hole 111 to be sealed by the material of the plug structure 120 that has grown, while the inside of the through hole 111 is not filled with the material of the plug structure 120, resulting in a poor effect of improving the void defects inside the plug structure 120. At the same time, the growth of the material of the plug structure 120 on the surface of the dielectric structure 110 will also cause a short - circuit risk between semiconductor devices, resulting in poor reliability of semiconductor devices.

[0040] To solve the above - mentioned technical problems, an embodiment of the present invention provides a method for forming a semiconductor structure. After forming an opening, and before forming an interconnect structure in the opening by using a selective metal growth process, the side wall surface of the opening and the surface of the dielectric structure are densified, thereby improving the performance and reliability of semiconductor devices.

[0041] To make the above - mentioned objects, features, and beneficial effects of the present invention more obvious and understandable, the following detailed description of the specific embodiments of the present invention is made with reference to the accompanying drawings.

[0042] Figures 4 to 9 It is a schematic cross - sectional structure diagram of the semiconductor structure formation process according to an embodiment of the present invention.

[0043] Please refer to Figure 4 , a substrate (not shown) is provided, and a metal structure 200 is disposed in the substrate, and the metal structure 200 is exposed on the surface of the substrate.

[0044] The metal structure 200 serves as a metal substrate for growing the material of the interconnect structure when forming the interconnect structure by using a selective metal growth process subsequently.

[0045] The material of the metal structure 200 includes cobalt or tungsten.

[0046] In this embodiment, the material of the metal structure 200 is cobalt.

[0047] In this embodiment, the substrate has semiconductor devices (not shown), and the semiconductor devices include one or all of PMOS transistors and NMOS transistors. The substrate further includes a substrate interconnect structure (not shown) electrically connected to the semiconductor devices, and an insulating layer (not shown) surrounding the semiconductor devices and the substrate interconnect structure.

[0048] In this embodiment, the metal structure 200 is located within the insulating layer.

[0049] The material of the substrate includes semiconductor materials. Specifically, in this embodiment, the material of the substrate includes silicon. In other embodiments, the material of the substrate includes silicon carbide, silicon germanium, a multi-element semiconductor material composed of group III-V elements, silicon on insulator (SOI), or germanium on insulator (GOI), etc. Among them, the multi-element semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs, or InGaAsP, etc.

[0050] Please continue to refer to Figure 4 , and a dielectric structure 210 is formed on the surface of the metal structure 200.

[0051] The dielectric structure 210 provides support for the subsequent formation of the interconnect structure.

[0052] In this embodiment, the dielectric structure 210 includes a first dielectric layer 211 located on the surface of the metal structure 200, and a second dielectric layer 212 located on the surface of the first dielectric layer 211.

[0053] In this embodiment, the material of the first dielectric layer 211 includes silicon nitride. The material of the second dielectric layer 212 includes silicon oxide. Therefore, during the etching process of forming an opening in the dielectric structure 210 subsequently, the first dielectric layer 211 can serve as an etch stop layer to improve the accuracy of the etching process.

[0054] The process of forming the first dielectric layer 211 includes a spin coating process, a plasma treatment process, or a deposition process, etc. The deposition process is, for example, a chemical vapor deposition process (CVD), a physical vapor deposition process (PVD), or an atomic layer deposition process (ALD), etc.

[0055] The process of forming the second dielectric layer 212 includes a spin coating process, a plasma treatment process, or a deposition process, etc. The deposition process is, for example, a chemical vapor deposition process (CVD), a physical vapor deposition process (PVD), or an atomic layer deposition process (ALD), etc.

[0056] In this embodiment, before forming the dielectric structure 210, a first protective film 220 is formed on the surface of the metal structure 200.

[0057] Since the first protective film 220 is formed on the surface of the metal structure 200 before forming the dielectric structure 210, the first protective film 220 can reduce the damage to the surface of the metal structure 200 at the bottom of the opening during the subsequent etching process for forming the opening in the dielectric structure 210. Thus, the contact resistance between the metal structure 200 and the interconnect structure is reduced, and the performance of the semiconductor structure is improved.

[0058] The material of the first protective film 220 includes an oxide.

[0059] In this embodiment, the material of the first protective film 220 is cobalt oxide.

[0060] In this embodiment, the method for forming the first protective film 220 includes: oxidizing the surface of the metal structure 200.

[0061] In other embodiments, the method for forming the first protective film includes a spin coating process or a deposition process, etc. The deposition process is, for example, a chemical vapor deposition process (CVD), a physical vapor deposition process (PVD), or an atomic layer deposition process (ALD), etc.

[0062] In other embodiments, the first protective film is not formed.

[0063] Please refer to Figure 5 to form an opening 213 penetrating the dielectric structure 210 within the dielectric structure 210.

[0064] The opening 213 provides space and positioning for the subsequent formation of the interconnect structure.

[0065] In this embodiment, the method for forming the opening 213 includes: forming an opening mask structure (not shown) on the surface of the dielectric structure 210, the opening mask structure exposing at least a part of the surface of the dielectric structure 210 on the metal structure 200; using the opening mask structure as a mask to etch the dielectric structure 210 until the surface of the metal structure 200 is exposed.

[0066] It should be noted that in this embodiment, since the first protective film 220 is formed, using the opening mask structure as a mask to etch the dielectric structure 210 until the surface of the metal structure 200 is exposed means: using the opening mask structure as a mask to etch the dielectric structure 210 until the surface of the first protective film 220 is exposed. In other embodiments, since the first protective film is not formed, the surface of the metal structure is exposed.

[0067] In this embodiment, the process of etching the dielectric structure 210 includes at least one of a wet etching process and a dry etching process.

[0068] In this embodiment, after the opening 213 is formed, the opening mask structure is removed.

[0069] In this embodiment, after the opening 213 is formed and before subsequent densification treatment, ashing treatment is performed on the surface of the dielectric structure 210, the sidewall surface of the opening 213, and the bottom surface of the opening 213. On the one hand, through the ashing treatment, the etching by-products formed during the etching process of forming the opening 213, such as carbon-fluorine-containing organic substances, can be removed; on the other hand, since the ashing treatment is performed on the surface of the dielectric structure 210, the sidewall surface of the opening 213, and the bottom surface of the opening 213 before subsequent densification treatment, even if the ashing treatment exacerbates the looseness of the sidewall surface of the opening 213 and the surface of the dielectric structure 210, the sidewall surface of the opening 213 and the surface of the dielectric structure 210 can be redensified through subsequent densification treatment.

[0070] It should be noted that for the sake of easy understanding, Figure 5 is schematically represented by an irregular wavy line: due to the damage caused to the sidewall surface of the opening 213 and the surface of the dielectric structure 210 by the etching process of forming the opening 213, the sidewall surface of the opening 213 and the surface of the dielectric structure 210 are loose.

[0071] Please refer to Figure 6 , after the opening 213 is formed, densification treatment is performed on the sidewall surface of the opening 213 and the surface of the dielectric structure 210.

[0072] Since densification treatment is performed on the sidewall surface of the opening 213 and the surface of the dielectric structure 210 after the opening 213 is formed and before the subsequent formation of the interconnect structure within the opening 213, the sidewall surface of the opening 213 and the surface of the dielectric structure 210 can be made more dense.

[0073] On the one hand, increasing the density of the sidewall surface of the opening 213 can reduce the precursors entering the sidewall surface of the opening 213 during the selective metal growth process when forming the interconnect structure, so as to reduce the precursors remaining on the sidewall surface of the opening 213. Therefore, it is possible to reduce the material of the interconnect structure growing from the sidewall surface of the opening 213 into the opening 213. Thus, the void defects in the interconnect structure are reduced, the parasitic resistance of the interconnect structure is reduced, and the performance of the semiconductor device is improved. On the other hand, increasing the density of the surface of the dielectric structure 210 can reduce the precursors entering the surface of the dielectric structure 210 during the selective metal growth process when forming the interconnect structure, so as to reduce the precursors remaining on the surface of the dielectric structure 210. Therefore, it is possible to reduce the material of the interconnect structure growing on the surface of the dielectric structure 210. Thus, the risk of short circuit of the semiconductor device is reduced, and the reliability of the semiconductor device is improved. Moreover, because the sidewall surface of the opening 213 and the surface of the dielectric structure 210 are denser, during the subsequent wet cleaning process, the damage to the sidewall surface of the opening 213 and the surface of the dielectric structure 210 by the wet cleaning process can be reduced. Thus, the performance and reliability of the semiconductor device are improved.

[0074] The process of the densification treatment includes an oxidation process or a plasma treatment process.

[0075] The oxidation process includes: a thermal oxidation process, an organic gas reaction process, or an ozone treatment process.

[0076] In this embodiment, the process of the densification treatment is the plasma treatment process, and the gas used in the plasma treatment process includes oxygen.

[0077] Since the process of the densification treatment includes an oxidation process or a plasma treatment process, and the gas used in the plasma treatment process includes oxygen, through the oxidation process or the plasma treatment process, not only the density of the sidewall surface of the opening 213 and the surface of the dielectric structure 210 is increased, but also the materials on the sidewall surface of the opening 213 and the surface of the dielectric structure 210 can be converted into oxides, reducing substances such as fluorides remaining on the sidewall surface of the opening 213 and the surface of the dielectric structure 210. Thus, substances such as hydrofluoric acid formed during the subsequent wet cleaning process are reduced, and the damage to the sidewall surface of the opening 213 and the surface of the dielectric structure 210 by substances such as hydrofluoric acid is reduced, so as to better reduce the damage to the sidewall surface of the opening 213 and the surface of the dielectric structure 210 during the subsequent wet cleaning. Thus, the performance and reliability of the semiconductor device are improved.

[0078] In this embodiment, the parameters of the plasma treatment process further include: the pressure range is from 100 millitorr to 1000 millitorr, the flow rate range of oxygen is from 1000 SCCM to 9000 SCCM, the source power range is from 500 watts to 1200 watts, the temperature range is from 100 degrees Celsius to 200 degrees Celsius, and the time range is from 10 seconds to 100 seconds.

[0079] Please refer to Figure 7 , after the densification treatment, the surface of the dielectric structure 210, the side wall surface of the opening 213, and the bottom surface of the opening 213 are processed. Meanwhile, through the wet cleaning treatment, the first protective film 220 at the bottom of the opening 213 is removed.

[0080] The purpose of removing the first protective film 220 at the bottom of the opening 213 is to expose the surface of the metal structure 200 at the bottom of the opening 213, so that the metal structure 200 can be used as the metal substrate for forming the interconnect structure in the subsequent process.

[0081] On the one hand, through the wet cleaning treatment, the contaminants on the side wall surface of the opening 213 and the surface of the dielectric structure 210 can be removed. On the other hand, by removing the first protective film 220 at the bottom of the opening 213 through the wet cleaning treatment, the step of separately removing the first protective film 220 at the bottom of the opening 213 can also be reduced, thereby reducing the formation time of the semiconductor structure and simplifying the process.

[0082] Moreover, since the first protective film 220 at the bottom of the opening 213 is removed after the densification treatment, that is, the first protective film 220 at the bottom of the opening 213 is removed after improving the density of the side wall surface of the opening 213 and the surface of the dielectric structure 210, therefore, the damage to the side wall surface of the opening 213 and the surface of the dielectric structure 210 caused by the process of removing the first protective film 220 at the bottom of the opening 213 can also be reduced, thereby improving the performance and reliability of the semiconductor device.

[0083] Please refer to Figure 8 , after the densification treatment, a second protective film 230 is formed on the surface of the metal structure 200 at the bottom of the opening 213.

[0084] Specifically, in this embodiment, after the wet cleaning treatment, a second protective film 230 is formed on the surface of the metal structure 200 at the bottom of the opening 213.

[0085] Since the second protective film 230 is formed on the surface of the metal structure 200 at the bottom of the opening 213 after the densification treatment, therefore, through the second protective film 230, the pollution formed on the surface of the exposed metal structure 200 by dust and other impurities in the air in the non-vacuum environment before the formation of the interconnect structure can be reduced, thereby improving the performance and reliability of the semiconductor structure.

[0086] The process of forming the second protective film 230 includes an oxidation process or a plasma treatment process. The oxidation process includes: a thermal oxidation process, an organic gas reaction process, or an ozone treatment process. The gas used in the plasma treatment process includes oxygen.

[0087] In this embodiment, since after the densification treatment, the materials on the side wall surface of the opening 213 and the surface of the dielectric structure 210 are converted into oxides, therefore, forming the second protective film 230 by an oxidation process or a plasma treatment process using oxygen as the gas can reduce the impact of the process of forming the second protective film 230 on the materials on the side wall surface of the opening 213 and the surface of the dielectric structure 210.

[0088] In this embodiment, the material of the second protective film 230 includes an oxide.

[0089] In other embodiments, the second protective film is not formed.

[0090] Please refer to Figure 9 , remove the second protective film 230; after removing the second protective film 230, use a selective metal growth process to form an interconnect structure 240 in the opening 213.

[0091] The purpose of removing the second protective film 230 is to expose the surface of the metal structure 200 at the bottom of the opening 213 so that the metal structure 200 can be used as the metal substrate for forming the interconnect structure subsequently.

[0092] In this embodiment, the method of removing the second protective film 230 includes: before forming the interconnect structure 240, introducing hydrogen into the process chamber, and removing the second protective film 230 through a hydrogen reduction reaction.

[0093] In this embodiment, the material of the interconnect structure 240 is tungsten.

[0094] In other embodiments, the material of the interconnect structure is cobalt, obtaining a combination of cobalt and tungsten.

[0095] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be subject to the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that, Including: Providing a substrate with a metal structure therein, and the metal structure is exposed on the surface of the substrate; Forming a dielectric structure on the surface of the metal structure; Forming an opening penetrating the dielectric structure within the dielectric structure; After forming the opening, performing a densification treatment on the sidewall surface of the opening and the surface of the dielectric structure; After the densification treatment, using a selective metal growth process to form an interconnect structure within the opening; Wherein, the process of the densification treatment includes an oxidation process or a plasma treatment process, and the gas used in the plasma treatment process includes oxygen.

2. The method for forming a semiconductor structure according to claim 1, wherein, The oxidation process includes: a thermal oxidation process, an organic gas reaction process or an ozone treatment process.

3. The method for forming a semiconductor structure as described in claim 1, wherein The material of the metal structure includes cobalt or tungsten.

4. The method for forming a semiconductor structure according to claim 1, wherein The material of the interconnect structure includes cobalt or tungsten.

5. The method for forming a semiconductor structure according to claim 1, wherein The dielectric structure includes a first dielectric layer on the surface of the metal structure and a second dielectric layer on the surface of the first dielectric layer.

6. The method for forming a semiconductor structure according to claim 5, wherein, The material of the first dielectric layer includes silicon nitride.

7. The method for forming a semiconductor structure according to claim 5, wherein The material of the second dielectric layer includes silicon oxide.

8. The method for forming a semiconductor structure according to claim 1, wherein, The method of forming the opening includes: forming an opening mask structure on the surface of the dielectric structure, and the opening mask structure exposes at least part of the surface of the dielectric structure on the metal structure; using the opening mask structure as a mask to etch the dielectric structure until the surface of the metal structure is exposed.

9. The method for forming a semiconductor structure according to claim 1, wherein, Also including: Before forming the dielectric structure, forming a first protective film on the surface of the metal structure; After the densification treatment and before forming the interconnect structure, removing the first protective film at the bottom of the opening.

10. The method for forming a semiconductor structure as described in claim 9, characterized in that, The material of the first protective film includes an oxide.

11. The method for forming a semiconductor structure according to claim 9, wherein, The method of forming the first protective film includes: performing an oxidation treatment on the surface of the metal structure.

12. The method for forming a semiconductor structure as described in claim 9, characterized in that, The process of removing the first protective film at the bottom of the opening includes a wet cleaning treatment.

13. The method for forming a semiconductor structure according to claim 1, wherein, Also including: After the densification treatment, forming a second protective film on the surface of the metal structure at the bottom of the opening.

14. The method for forming a semiconductor structure according to claim 13, wherein Also including: Before forming the interconnect structure, removing the second protective film.

15. The method for forming a semiconductor structure according to claim 13, wherein, The process of forming the second protective film includes an oxidation process or a plasma treatment process, and the gas used in the plasma treatment process includes oxygen.

16. The method for forming a semiconductor structure according to claim 13, wherein, The material of the second protective film includes an oxide.

17. The method for forming a semiconductor structure according to claim 1, wherein Also including: After forming the opening and before performing the densification treatment, performing an ashing treatment on the surface of the dielectric structure, the sidewall surface of the opening and the bottom surface of the opening.

18. The method for forming a semiconductor structure according to claim 1, wherein Also including: After the densification treatment and before forming the interconnect structure, performing a wet cleaning treatment on the surface of the dielectric structure, the sidewall surface of the opening and the bottom surface of the opening.

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