Monolithic multi-core synergistic light emitting diode

Abstract

A monolithic multi-core synergistic light emitting diode includes an n-type structure, a p-type structure, and an active region sandwiched between the n-type structure and the p-type structure; a plurality of monolithically integrated mini-chips, wherein each mini-chip includes a mini-n contact formed on the n-type structure exposed through an opening in the p-type structure and the active region, a mini-p ohmic contact formed on the p-type structure, and a mini-light emitting region defined by the mini-p ohmic contact, an n-bridge metal electrically connecting the mini-n contact of each mini-chip to an n-bonding pad, wherein the n-bridge metal is formed on the p-type structure and sidewalls of the opening in the p-type structure and the active region.

Description

Technical Field

[0001] This disclosure generally relates to semiconductor light-emitting technology, and more specifically, to high-power light-emitting diodes fabricated by monolithically integrating multiple miniature light-emitting chips to improve operating voltage, light extraction efficiency, and device yield. Background Technology

[0002] Nitride semiconductors such as InN, GaN, and AlN, along with their ternary and quaternary alloys depending on the alloy composition, enable ultraviolet (UV) radiation ranging from 410 nm to approximately 200 nm. This includes UVA (400-315 nm) radiation, UVB (315-280 nm) radiation, and a portion of UVC (280-200 nm) radiation. UVA radiation is revolutionizing the curing industry, while UVB and UVC radiation are expected to see widespread application in the food, water, and surface disinfection industries due to their bactericidal effects. Nitride-based UV light emitters offer inherent advantages over traditional UV light sources such as mercury lamps. Typically, nitride UV emitters are robust, compact, spectrally tunable, and environmentally friendly. They provide high UV light intensity, facilitating ideal disinfection / sterilization of water, air, food, and object surfaces. Furthermore, the light output of nitride UV light emitters can be modulated at frequencies up to several hundred megahertz, enabling them as innovative light sources for the Internet of Things (IoT), covert communications, and biochemical detection.

[0003] Existing UV light-emitting diodes (LEDs) typically employ a laminated structure comprising a substrate, an n-type AlGaN (n-AlGaN) structure, an AlGaN-based quantum well active region, such as a single quantum well or multiple quantum well (collectively referred to as MQW), and a p-type AlGaN (p-AlGaN) structure. The n-AlGaN and p-AlGaN structures inject electrons and holes into the MQW active region, respectively, to generate light. An AlGaN structure can consist of several AlGaN layers, forming a structure that performs better functionality than a single AlGaN layer. For example, an AlGaN structure can be made from several AlGaN layers with different doping levels and / or different compositional distributions to achieve better conductivity and carrier confinement. The substrate can be made of UV-transparent (c-plane) sapphire or AlN. AlN layers may optionally be coated on the substrate as epitaxial templates.

[0004] During pandemics and epidemics, high-power UVC LEDs have garnered particular attention due to their ability to perform rapid sterilization / disinfection. High-power UVC LEDs require large chip sizes and emitting areas to handle high current injection. For UVC LEDs, the n-AlGaN structure, with an Al content exceeding 55% (approximately 60%), exhibits relative resistivity and is unsuitable for large-area current spreading. Furthermore, larger chip LEDs suffer greater light extraction losses due to prolonged lateral light propagation and increased absorption within the chip. New device schemes are needed to fabricate efficient high-power LEDs, such as high-power UVC LEDs with improved light extraction efficiency and current spreading (and therefore lower voltage).

[0005] High-power LEDs and high-power UV LEDs refer to LEDs that consume 1 watt or more of electrical power and have an output light power of 50mW or more, depending on the photoelectric conversion efficiency of the LED. Summary of the Invention

[0006] This disclosure provides a monolithic multi-core co-emitting diode, comprising:

[0007] n-type structure, p-type structure, and the active region sandwiched between the n-type structure and the p-type structure;

[0008] Multiple monolithically integrated mini-chips, each mini-chip comprising: a mini n-contact formed on an n-type structure exposed through an opening in a p-type structure and an active region; a mini p-ohm contact formed on a p-type structure; and a mini light-emitting region defined by the mini p-ohm contact;

[0009] n-bridge metal, which electrically connects the mini n-contacts of each mini-chip to the n-bonding pads, wherein the n-bridge metal is formed on the p-type structure and on the sidewalls of the openings in the p-type structure and the active region. Attached Figure Description

[0010] The accompanying drawings provide a further understanding of this application and form part of this application. These drawings illustrate embodiments of the application and, together with the specification, explain the principles of the application. Throughout the drawings, the same reference numerals denote the same elements, and layers may represent a group of layers with the same functional association.

[0011] Figure 1 A plan view layout of a monolithic multi-core co-emitting diode chip according to an embodiment of the present disclosure is shown;

[0012] Figure 2A It shows along Figure 1 The image shown is a cross-sectional view of the chip cut by AA'.

[0013] Figure 2B It shows along Figure 1 The image shown is a cross-sectional view of the chip cut by BB'.

[0014] Figure 3 A cross-sectional view of an n-bridge metal according to an embodiment of the present disclosure is shown;

[0015] Figure 4 As shown Figure 1 The diagram shows the chip design of the mini LED chip.

[0016] Figure 5 A plan view layout of a monolithic multi-core co-emitting diode chip according to another embodiment of the present disclosure is shown;

[0017] Figure 6 A plan view layout of a monolithic multi-core co-emitting diode chip according to another embodiment of the present disclosure is shown;

[0018] Figure 7 A plan view layout of a monolithic multi-core co-emitting diode chip according to another embodiment of the present disclosure is shown;

[0019] Figure 8 A plan view layout of a monolithic multi-core co-emitting diode chip according to another embodiment of the present disclosure is shown;

[0020] Figure 9 It shows along Figure 8 The image shown is a cross-sectional view of the chip cut by AA'.

[0021] Figure 10 A plan view layout of a monolithic multi-core co-emitting diode chip according to another embodiment of the present disclosure is shown. Detailed Implementation

[0022] In the following description, the principles of the invention are illustrated using nitride UV LEDs as an example. It should be understood that the invention can also be extended to LEDs made of other materials and LEDs having wavelengths different from UV light.

[0023] Throughout this specification, the term "Group III nitride" generally refers to a metal nitride having a cation selected from Group IIIA of the periodic table. That is, Group III nitrides include AlN, GaN, InN, and their ternary (AlGaN, InGaN, InAlN) and quaternary (AllnGaN) alloys. In this specification, if one of the Group III elements is so small that its presence does not affect the intended function of a layer made from such a material, the quaternary can be reduced to a ternary for simplicity. For example, if the In content in quaternary AllnGaN is very small, less than 1%, then the AllnGaN quaternary can be simplified to ternary AlGaN. Similarly, if one of the Group III elements is very small, then the ternary can be simplified to binary. For example, if the In content in ternary InGaN is very small, less than 1%, then the InGaN ternary can be simplified to binary GaN. Group III nitrides may also include small amounts of transition metal nitrides, such as TiN, ZrN, and HfN with a molar fraction not exceeding 10%. For example, group III nitrides or nitrides may include Al x In y Ga z Ti (1-x-y-z) N, Al x In y Ga z Zr (1-x-y-z) N, Al x In y Ga z Hf (1-x-y-z) N, where (1-xyz)≤10%.

[0024] As mentioned earlier, large-size lateral LEDs with restricted n-type conduction suffer from current spread problems, which can severely limit the LED's light output power and lifetime due to locally high current density. The current density is distributed around the edge of the p-ohm contact according to the following formula: Where J(x) is the current density at point x within the p-ohm contact, away from the edge of the p-ohm contact adjacent to the n-ohm contact, and L is the current spread length: Where t n It is the thickness of the n-semiconductor layer, and R p and R n These are the resistances from the p-side and n-side of the LED, respectively. For UVC LEDs, the n-AlGaN structure with high Al content (approximately 60%) and limited thickness (2-4 micrometers due to strain-related cracking issues) exhibits poor conductivity and a small current spread length (less than 50 micrometers).

[0025] One aspect of this disclosure is to provide a large area (≥1mm²) for use in high-power LEDs, especially high-power UV LEDs.2 Such as 1-5mm 2 Chip Design. To facilitate the following discussion and description in this specification, an n-contact is defined as comprising at least one n-ohm contact (metal layer) and optionally having a thick n-metal covering the top of the n-ohm contact for sensing or connection to an external power source. Similarly, a p-contact comprises at least one p-ohm contact (metal layer) and optionally has a thick p-metal covering the top of the p-ohm contact for sensing or connection to an external power source.

[0026] As is well known, nitride-based light-emitting devices such as light-emitting diodes (LEDs) and laser diodes typically employ a laminated structure comprising a quantum well active region or a multiple quantum well (MQW) active region, an n-type nitride (or n-nitride) structure for injecting electrons into the active region, and a p-type nitride (or p-nitride) structure on the opposite side of the active region for injecting holes into the active region. For laterally injected LEDs, n-ohmic contacts are formed on the n-type nitride structure. To selectively expose the n-type nitride structure for n-contact formation, a photolithography process is used to define an exposed region (for etching) and a complementary protective region (resisting etching), and an etching process is used to remove the p-type nitride structure, the MQW active region, and a portion of the n-type nitride structure from the defined exposed region. In addition to exposing the n-type nitride structure, this selective etching process also simultaneously defines and forms p-mesa in the protective region (which will later be covered by the p-contact during p-contact formation). Since the entire light-emitting area of ​​a horizontally injected LED is contained within its p-mesa, the p-mesa can be called the light-emitting mesa.

[0027] Figure 1 A monolithic multi-core co-emitting diode (mC) according to an embodiment of the present disclosure is shown. 2 The LED chip 100 is laid out in plan view. As can be seen, the LED chip 100 is fabricated by a miniature LED chip 100' (or miniature chip 100') that monolithically integrates multiple cells. Each miniature chip 100' includes a miniature n-contact 106 and a light-emitting region defined by a miniature p-ohm contact 105. This is possible because the p-semiconductor structure of an LED is more resistive, and virtually no p-type current injection is possible except through the miniature p-ohm contact. Further features of the chip 100 can be seen along... Figure 1 The cross-sectional view of the chip taken by AA' in the image reveals that the cross-sectional view in Figure 2AAs shown in the diagram, chip 100 (hence referred to as mini-chip 100') comprises a substrate 10, an epitaxial template 20, an n-AlGaN structure 30, an AlGaN MQW 40 serving as the light-emitting active region, and a p-AlGaN structure 50. In other words, all mini-chips 100' share the substrate 10, epitaxial template 20, n-AlGaN structure 30, AlGaN MQW 40, and p-AlGaN structure 50. Note that the substrate 10 can be any suitable substrate, such as sapphire, AlN, SiC, etc. Mini n-contacts 106 are deposited on the n-AlGaN structure 30 through corresponding openings in the first dielectric layer 107 to form metal-n-AlGaN ohmic contacts, and mini p-ohmic contacts 105 are deposited on the p-AlGaN structure 50 to form metal-p-AlGaN ohmic contacts. A first dielectric layer 107 is formed on the p-AlGaN structure 50 and also covers the sidewalls of openings in the p-AlGaN structure 50 and the AlGaN MQW 40 that expose the n-type structure. Mini n-contacts 106 are formed on the n-type structure exposed by these openings. The metal scheme of the mini n-contacts 106 can be selected from Ti / Al / Ti / Au, V / Al / V / Ag, V / Al / V / Au, and V / Al / Ti / Au, with corresponding thicknesses such as 20nm / 60nm / 20nm / 100nm. The metal scheme of the mini p-ohmic contact 105 can be Ni / Au (5-10nm / 100-200nm) or Ni / Rh (0.2-0.6nm / 50-100nm).

[0028] Mini-chip 100' includes a mini p-bonding pad 102 formed on the second dielectric layer 108, and is connected via, as shown in the figure Figure 2A The opening 104 in the second dielectric layer 108 shown contacts the mini p-ohm contact 105.

[0029] Chip 100 includes n-bonding pads 101 formed on a second dielectric layer 108 and contacting n-bridge metal 103 through openings 110 in the second dielectric layer 108. The n-bridge metal 103 forms a metal interconnect network extending on a first dielectric layer 107 and connecting all mini n-contacts 106 to the n-bonding pads 101. The n-bridge metal 103 is formed on the first dielectric layer 107 and contacts the mini n-contacts 106 through openings in the p-AlGaN structure 50 and the AlGaN MQW 40 (which expose the n-type structure). In other words, the first dielectric layer 107 at least partially exposes each mini n-contact 106 so that the n-bridge metal 103 can connect to the exposed mini n-contacts 106. The second dielectric layer 108 is primarily formed on the n-bridge metal 103, the mini p-ohm contacts 105, and the first dielectric layer 107.

[0030] For operation, chip 100 can be flip-chip bonded to the substrate ( Figure 1 (Not shown in the image) It has n-bonded pads and p-bonded pads electrically isolated from the n-bonded pads. Then, the n-bonded pads and p-bonded pads (eutectic) on the substrate are bonded to n-bonded pad 101 and mini p-bonded pad 102, respectively (thereby, all mini chips 100' on chip 100 will be in parallel connection). The n-bonded pads and p-bonded pads on the substrate can then be connected to a negative voltage (or ground voltage) and a positive voltage output from a circuit or power supply, respectively. During operation, the voltage drop drives n-current (electrons) from the n-bonded pads on the substrate to n-bonded pad 101, to n-bridge metal 103, to mini n-contact 106, to n-AlGaN structure 30, and to MQW 40. Similarly, p-current (holes) is injected from the p-bonded pads on the substrate to mini p-bonded pad 102, to mini p-ohmic contact 105, to p-AlGaN structure 50, and to MQW 40. Furthermore, the injected electrons and holes recombine under irradiation to radiate light from the MQW 40.

[0031] In addition, from Figure 1 As you can see, since the light-emitting region is entirely defined by the mini p-ohm contact 105, and since hole injection outside the mini p-ohm contact 105 is negligible, there is no need to etch and remove the p-AlGaN structures 50 and MQW 40 in the region between adjacent mini p-ohm contacts 105. This situation is as follows along... Figure 1 Cross-sectional view of BB' in the image Figure 2B As shown in the diagram, these regions between adjacent mini p-ohm contacts 105 can be covered by a first dielectric layer 107, allowing an n-bridge metal 103 to extend thereon, and the n-bridge metal 103 can form an omnidirectional reflector to enhance the light extraction efficiency of the LED. Therefore, the n-bridge metal 103 can be formed in a network in the regions between adjacent mini p-ohm contacts 105.

[0032] Therefore, the (bottom) surface of the n-bridge metal 103 facing the p-AlGaN structure 50 is preferably light-reflective, such as reflecting UV and UVC light. Figure 3The diagram shows a cross-sectional view of the n-bridge metal 103 in the embodiment. As can be seen, the n-bridge metal comprises at least four metal layers. The bottom layer 1031, facing the p-AlGaN structure 50 and located on the first dielectric layer 107, is light-reflective and is optionally made of aluminum (Al) or an aluminum-magnesium (Al:Mg) alloy. Layer 1031 is intended to reflect light, so it should be thick enough to block light penetration. For example, the thickness of this layer can be at least 10 nm, or thicker than 50 nm, such as 20-100 nm. Layer 1032 is a metal diffusion barrier layer, optionally made of a thin nickel (Ni) layer with a thickness greater than 2 nm (such as 5 nm or more, e.g., 2-10 nm). Layer 1033 is intended for current conduction, so it is preferably made of a thick metal such as gold (Au), silver (Ag), or copper (Cu), with a thickness greater than 2 micrometers, such as 4-6 micrometers. Finally, on top of layer 1033 is layer 1034, which is designed to provide good adhesion for dielectric layers (such as the second dielectric layer 108) to passivate the n-bridge metal 103. Layer 1034 can be made of thin (e.g., 1-5 nm) chromium (Cr) and palladium (Pd) or alloys thereof. To balance light emission and current spreading functions, the n-bridge metal 103 can cover 20%-40% of the total area of ​​chip 100, such as 25%-35% of the total area of ​​chip 100.

[0033] The n-bridge metal 103 forms a metal interconnect network, extending primarily on the first dielectric layer 107 between adjacent mini p-ohm contacts 105, thereby providing uniform current from the n-bonding pads 101 to all mini n-contacts 106. Therefore, by adjusting the chip size of the mini-chip 100', the chip 100 can eliminate or significantly mitigate current congestion problems in large-size, high-power LEDs. The chip size of the mini-chip 100' can be in the range of 10-300 micrometers, such as 20-150 micrometers or 30-90 micrometers. The chip 100 can have a diameter equal to or greater than 1 mm. 2The chip area is a large-area chip. The mini-chips 100' in chip 100 can take any suitable shape, such as squares and rectangles, and can have the same shape and size, or different shapes and sizes. Further, the n-bridge metal 103 that reflects light and extends on the first dielectric layer 107 can form an omnidirectional reflector (ODR), thereby greatly enhancing the light extraction efficiency. When forming the ODR, in some embodiments, the first dielectric layer 107 is transparent to the light emitted by the MQW 40, and is preferably made of a UV-transparent dielectric such as silicon dioxide (SiO2), aluminum oxide (Al2O3), yttrium oxide (Y2O3), magnesium fluoride (MgF2), calcium fluoride (CaF2), etc. Note that the ODR is a three-layer optical reflector, which includes a semiconductor with a large refractive index, a transparent dielectric layer with a low refractive index, and a metal with a complex refractive index. The dielectric layer in the ODR preferably has a quarter wavelength thickness, i.e. (Here, n is the refractive index of the dielectric layer, and λ0 is the wavelength of light measured in vacuum.) For example, for a UVC LED with radiation at 280 nm, using silicon dioxide (SiO2) as the dielectric layer, the preferred SiO2 thickness in the ODR is 46.85 nm (n = 1.492 at 280 nm). When the first dielectric layer 107 is made of a UV-transparent dielectric layer, its thickness can be in the range of 30-300 nm, or 40-200 nm, or 42-90 nm, or optionally a quarter-wavelength thickness.

[0034] In another embodiment, the first dielectric layer 107 is UV reflective and optionally has a UV reflectivity greater than 90%. For example, the first dielectric layer may be a UV distributed Bragg reflector (DBR). A DBR is a periodic structure with two dielectric layers in a cell, the two dielectric layers having different refractive indices (n1, n2) and quarter-wavelength thicknesses (d1, d2). The reflectivity of a DBR typically increases with the number of repeating unit cells in the DBR. For example, the first dielectric layer 107 can be made of periodically alternating stacked UV transparent dielectrics (with different refractive indices), such as SiO2 / Al2O3, SiO2 / Y2O3, SiO2 / MgF2, or CaF2 / MgF2 DBR. When the first dielectric layer 107 is made of a UV DBR, its thickness can be in the range of 100-3000 nm (i.e., a DBR with 1 to 30 unit cells), such as 1000-2000 nm. When the first dielectric layer 107 is UV reflective, the n-bridge metal 103 can be light or UV light non-reflective and can be made of gold, gold-tin, silver, aluminum, copper, etc., having a single-layer or multi-layer structure.

[0035] The second dielectric layer 108 can be UV transparent or opaque and is made of a dielectric material similar to the first dielectric layer 107. The thickness of the second dielectric layer 108 can be in the range of 100-500 nm, such as 200-400 nm.

[0036] If the size is still too large for uniform current spreading, the mini-chip 100' can be fabricated from a set of monolithically integrated microchips 100" in mC 2 Chip 100 is made in a similar manner to mini-chip 100'. In some implementations, mini-chip 100' is essentially mC 2 Fractals of chip 100.

[0037] Figure 4 The diagram shown is a plan view layout design of an embodiment of the mini-chip 100'. As can be seen, Figure 4 The minichip 100' is made from a set of monolithically integrated microchips 100". Each microchip 100" has a micro n-contact 106', a micro p-ohm contact 105' defining a micro light-emitting region, and a micro p-bonding pad 102' connected to the micro p-ohm contact 105' via a micro opening 104' in a second dielectric layer 108. The minichip 100' also includes a mini n-contact pad 101' and a mini n-bridge metal 103', which form a metal interconnect network connecting the mini n-contact pad 101' and all the micro n-contacts 106'. The mini n-contact pad 101' can be used as Figure 1 The miniature n-contact 106 in the middle receives current from the n-bridge metal 103 and distributes the current to all the miniature n-contacts 106' via the miniature n-bridge metal 103'. Although in Figure 4 Not explicitly shown, but the mini n-bridge metal 103' extends on the first dielectric layer 107 and is preferably UV reflective, just like the n-bridge metal 103. The chip size of the microchip 100” can be in the range of 5-100 micrometers, for example 10-60 micrometers.

[0038] Figure 5 Another monolithic multi-core co-emitting diode (mC) is shown. 2The LED chip 200 is laid out in plan view. As can be seen, the chip 200, having the same constituent components as the chip 100, is fabricated by monolithically integrating multiple mini-chips 200'. Each mini-chip 200' includes a mini n-contact 206, a mini p-bonding pad 202, and a mini light-emitting region defined by a mini p-ohm contact 205. The mini p-bonding pad 202 is formed on a second dielectric layer and contacts the mini p-ohm contact 205 through an opening 204 in the second dielectric layer. A distinguishing feature of the chip 200 compared to the chip 100 is the strict separation of the mini n-contacts 206, i.e., there are no mini n-contacts 206 clustered together. In some embodiments, the separation distance between any mini n-contacts 206 is at least about the size of the mini-chip 200' itself. In this disclosure, the size of the chip refers to its lateral dimensions, such as its width or length, rather than its vertical dimensions along the epitaxial growth direction. In the chip 100, there are sometimes two mini n-contacts 106 adjacent to each other. Thus, the chip 200 provides better current spread. Furthermore, the n-bridge metal 203 connecting the n-bonding pads 201 and all mini n-contacts 206 forms a larger interconnect network extending across all rows and columns between adjacent mini-chips 200', thereby providing more uniform current spread and better light extraction for the chip 200. The n-bonding pads 201 contact the n-bridge metal 203 through openings 210 in the second dielectric layer. Figure 5 As shown, in some embodiments, when viewed from above, the mini-chips 200' have the same size and a square or rectangular shape, with mini n-contacts 206 formed at one vertices of each mini-chip 200', and the vertices occupied by the mini n-contacts 206 in adjacent mini-chips are not adjacent to each other. In other words, the vertices of mini-chips adjacent to the vertices supported by the mini-contacts of adjacent mini-chips are not occupied by the mini n-contacts. The term "adjacent vertices" as used herein refers to the two vertices having the shortest distance between them.

[0039] In yet another implementation, Figure 6 The (mC) shown 2 LED chip 300 is structurally similar to chip 100; however, the mini n-contacts of each of four adjacent mini chips 300's at one of their apex corners are aggregated and fused into a single mini n-contact 306. In other words, four mini n-contacts are formed at the adjacent apex corners of four adjacent mini chips 300's, and fused into a single mini n-contact 306. Therefore, chip 300 may not have optimal current spreading capability. However, by fusing four individual mini n-contacts into a single mini n-contact 306, the total mesa edge perimeter is reduced and the light-emitting area may increase. Figure 6In the embodiment shown, the n-bonding pad 301, the mini p-bonding pad 302, the n-bridge metal 303, the opening 304 in the second dielectric layer, the mini p-ohmic contact 305, and the opening 310 in the second dielectric layer are similar to Figure 1 The corresponding component of chip 100 shown.

[0040] Figure 7 The chip 400 shown is... Figure 6 The modification of chip 300 shown adds mini n-extension contacts 407 to surround each mini chip 400'. The mini n-extension contacts 407 are formed as fin-shaped extensions of mini n-contacts 406. n-current is transferred from the n-bonding pads 401 to the mini n-contacts 406 by n-bridge metal 403. Furthermore, the n-extension contacts 407 help extend the n-current from the mini n-contacts 406 to each mini chip 400'. The mini n-extension contacts 407, formed as extensions of the mini n-contacts 406, are deposited on the n-AlGaN structure 30 and form ohmic contacts thereto. Therefore, the metal scheme of the mini n-extension contacts 407 can be the same as that of the mini n-contacts 406, i.e., it can be selected from Ti / Al / Ti / Au, V / Al / V / Ag, V / Al / V / Au, and V / Al / Ti / Au, with corresponding thicknesses such as 20nm / 60nm / 20nm / 100nm.

[0041] Presented Figure 8 The diagram shows the layout of the 500 chip. Figure 6 Another modification to the chip 300 shown differs significantly in the n-bonding pad 501 (compared to n-bonding pad 301). Chip 500 is monolithically fabricated from multiple mini-chips 500' and multiple mini-chips 500'c. And mini-chips 500'c are fabricated by connecting the mini p-ohm contacts of two adjacent mini-chips 500' together without dielectric openings 504 in the second dielectric layer 508 on the mini p-ohm contacts and without p-bonding pads (see [link to documentation]). Figure 9 The adjacent mini-chip 500'c is partially covered by a single n-bonding pad 501. In other words, the n-bonding pad 501 is located on top of the mini-chip 500'c (in...). Figure 8 Six of them are shown in a straight line, wherein the second dielectric layer 508 is inserted between the n-bonding pad 501 of the mini-chip 500'c and the mini p-ohm contact 505 for electrical isolation. Specifically, the n-bonding pad 501 is formed on the second dielectric layer 508 and contacts the n-bridge 503 and / or the mini n-contact 506 of the mini-chip 500'c through openings 510 in the second dielectric layer 508 and the first dielectric layer 507. Figure 9In the embodiment shown, the n-bonding pad 501 contacts the n-bridge 503 through the opening 510, and the n-bridge 503 contacts the mini-n-contact 506 of the miniature chip 500'c formed on the n-AlGaN structure 30. This situation is along... Figure 8 The cross-sectional diagram of AA' in the figure clearly reveals, as Figure 9 As shown. The mini-chips 500'c partially covered by n-bonding pads 501 can emit light because their mini p-ohm contacts 505 are directly connected to the mini p-ohm contacts 505 of the mini-chips 500' to their left side. Another difference between chip 500 and chip 300 is the p-bonding pads. As seen in chip 300, each mini-chip 300' has its own mini p-bonding pad 302. Chip 500 has a single large p-bonding pad 502, which is connected to the mini p-ohm contacts 505 of all mini-chips 500' through an opening 504 in the second dielectric layer 508. Similar to Figure 1 In the illustrated embodiment, the region between adjacent mini p-ohm contacts 505 can be covered by a first dielectric layer 507 to allow n-bridge metal 503 to extend thereon, thereby forming an omnidirectional reflector to enhance the light extraction efficiency of the LED. Therefore, the n-bridge metal 503 can be formed in a network form in the region between adjacent mini p-ohm contacts 505. The fused n-contacts 506 are shared by four adjacent mini-chips 500'.

[0042] like Figure 10 The chip 600 shown is a modification of chip 500. It is simply achieved by placing all the discrete miniature p-ohm contacts 505 (in...) Figure 8 (in) merged into a continuous large p-ohm contact 605 (in Figure 10 In this way, chip 500 can be transformed into chip 600. Chip 600 has the highest light-emitting area utilization efficiency. However, in this embodiment, since the n-bridge metal 603 mainly extends on the p-ohm contact 605 and the p-bonding pad 602, there is no light extraction benefit from the reflective n-bridge metal 603. In other words, the n-bridge metal 603 is mainly formed on the p-ohm contact 605 and the p-bonding pad 602, with a dielectric layer inserted therebetween for isolation. Figure 10 (Not shown in the image). The n-bonding pad 601, the opening 604 in the second dielectric layer, the mini n-contact 606, and the opening 610 in the second dielectric layer are structurally similar to the corresponding components of the chip 500.

[0043] This disclosure has been described using exemplary embodiments. However, it should be understood that the scope of this disclosure is not limited to the disclosed embodiments. Rather, this disclosure is intended to cover various modifications and similar arrangements or equivalents that can be obtained by those skilled in the art without inventive work or excessive experimentation. Therefore, the scope of the claims should be given the broadest interpretation to cover all such modifications and similar arrangements and equivalents.

Claims

1. A monolithic multi-core co-emitting diode, comprising: n-type structure, p-type structure, and the active region sandwiched between the n-type structure and the p-type structure; Multiple monolithically integrated mini-chips, each mini-chip comprising: a mini n-contact formed on an n-type structure exposed through an opening in a p-type structure and an active region; a mini p-ohm contact formed on a p-type structure; and a mini light-emitting region defined by the mini p-ohm contact, wherein the p-type structure and the active region are retained in the region between adjacent mini p-ohm contacts; n-bridge metal, which connects the mini n-contacts of each mini-chip to the n-bonding pads, wherein the n-bridge metal is formed on the p-type structure and on the sidewalls of the openings in the p-type structure and the active region; A first dielectric layer is formed on the p-type structure and on the sidewalls of the openings in the p-type structure and the active region, and the n-bridge metal is formed on the first dielectric layer. The region between adjacent mini p-ohm contacts is covered by the first dielectric layer. The n-bridge metal extends on the first dielectric layer and forms an omnidirectional reflector (ODR). The n-bridge metal forms a metal interconnect network in the region between adjacent mini p-ohm contacts in a network form, so as to connect all the mini n-contacts to the n-bonding pads.

2. The monolithic multi-core co-emitting diode according to claim 1, wherein, The surface of the n-bridge metal facing the p-type structure is reflective of light.

3. The monolithic multi-core co-emitting diode according to claim 1, wherein, The n-bridge metal includes: a light-reflecting layer facing the p-type structure, a diffusion-blocking layer formed on the light-reflecting layer, a current-conducting layer formed on the diffusion-blocking layer, and an outer layer formed on the current-conducting layer for adhesion to the dielectric layer.

4. The monolithic multi-core co-emitting diode according to claim 3, wherein, The light-reflecting layer is made of aluminum or an aluminum-magnesium alloy and has a thickness of 10 nm or greater.

5. The monolithic multi-core co-emitting diode according to claim 3, wherein, The diffusion barrier layer is made of nickel and has a thickness in the range of 2-10 nm.

6. The monolithic multi-core co-emitting diode according to claim 3, wherein, The outer layer is made of chromium, or palladium, or an alloy thereof, and has a thickness in the range of 1-10 nm.

7. The monolithic multi-core co-emitting diode according to claim 1 further includes a second dielectric layer and mini p-bonding pads of the mini chip, wherein the second dielectric layer is formed on the n-bridge metal, the mini p-ohmic contact and the first dielectric layer; the mini p-bonding pads contact the mini p-ohmic contact through openings in the second dielectric layer.

8. The monolithic multi-core co-emitting diode according to claim 7, wherein, Each minichip comprises multiple monolithically integrated microchips, each microchip having a micro n-contact, a micro p-ohm contact defining a micro light-emitting region, and micro p-bonding pads of the micro p-ohm contact connected through micro openings in a second dielectric layer; wherein each minichip includes a mini n-contact pad and a mini n-bridge metal, which form a metal interconnect network connecting the mini n-contact pad to all micro n-contacts, the mini n-contact pad receiving current from the n-bridge metal and distributing the current to all micro n-contacts through the mini n-bridge metal.

9. The monolithic multi-core co-emitting diode according to claim 1, wherein, When viewed from above, the mini-chips are all the same size and have a square or rectangular shape; a mini n-contact is formed at one of the vertices of each mini-chip, and the vertices occupied by the mini n-contacts in adjacent mini-chips are not adjacent to each other.

10. The monolithic multi-core co-emitting diode according to claim 1, wherein, When viewed from above, the mini-chips are all the same size and have a square or rectangular shape; every four adjacent mini-chips are located at one of their apex corners where the mini n-contacts are clustered and fused into a single mini n-contact.

11. The monolithic multi-core co-emitting diode according to claim 10 further comprises a plurality of medium-sized mini-chips, each medium-sized mini-chip being formed by connecting the miniature p-ohm contacts of two or more adjacent mini-chips together, wherein, The adjacent medium-sized mini-chips are partially covered by n-bonding pads.

12. The monolithic multi-core co-emitting diode according to claim 11, wherein, The mini p-ohm contact of the medium-sized mini chip is electrically connected to the mini p-ohm contact of the mini chip.

13. The monolithic multi-core co-emitting diode according to claim 11, wherein, The monolithic multi-core co-emitting diode has a single large p-bonding pad connected to all mini p-ohm contacts.

14. The monolithic multi-core co-emitting diode according to claim 13, wherein, The miniature p-ohm contacts of the miniature chip are combined to form a single large p-ohm contact.

15. The monolithic multi-core co-emitting diode according to claim 1, wherein, The monolithic multi-core co-emitting diode is a high-power UV light-emitting diode.

16. The monolithic multi-core co-emitting diode according to claim 1, wherein, The first dielectric layer is UV transparent.

17. The monolithic multi-core co-emitting diode according to claim 1, wherein, The first dielectric layer is UV reflective.

18. The monolithic multi-core co-emitting diode according to claim 1, wherein, The first dielectric layer is a UV distributed Bragg reflector (DBR).

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