Physical layer transceivers and adaptive filtering methods for data channels

Abstract

This disclosure relates to simplified frequency domain filter adaptation windows. For example, a physical layer transceiver for a data channel includes: a receiving circuit means configured to receive a signal on the data channel; a transmitting circuit means configured to transmit the signal to the data channel; and an adaptive filtering circuit means coupled to the receiving circuit means and the transmitting circuit means, and configured to filter the data channel by operating on input frequency domain data samples to output filtered data samples. The adaptive filtering circuit means includes an error sample generation circuit means configured to generate error samples representing the difference between a target response and the filtered data samples; an arithmetic-only circuit means configured to approximately calculate a windowing function for operating on the error samples; and an output sample generation circuit means configured to operate on the windowed error samples to provide an output of filtered data samples.

Description

[0001] Cross-referencing of related application forms

[0002] This disclosure claims the benefit of co-pending, co-assigned U.S. Provisional Patent Application No. 63 / 065,379, filed August 13, 2020, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to frequency domain filters for wired communication channels. More specifically, this disclosure relates to window-constrained frequency domain filters implemented using only arithmetic functions. Background Technology

[0004] The background description provided herein is intended to provide a general overview of the context of this disclosure. The inventors' work, with respect to the work described in this background section and descriptions that may not conform to the prior art at the time of filing, neither explicitly nor implicitly includes prior art acknowledged as the subject matter of this disclosure.

[0005] Wired communication equipment, such as physical layer (PHY) devices, typically includes filters for purposes such as echo cancellation and crosstalk cancellation (near-end crosstalk or NEXT and far-end crosstalk or FEXT). These filters generally operate more efficiently in the frequency domain and require complex circuitry for conversion to and from the frequency domain (such as Fast Fourier Transform or FFT circuitry and Inverse Fast Fourier Transform or IFFT circuitry). Such frequency domain filters can be very large and consume considerable power, especially when filtering the entire channel. Summary of the Invention

[0006] According to an implementation of the subject matter of this disclosure, a physical layer transceiver for a data channel includes: a receiving circuit means configured to receive a signal arriving at the data channel; a transmitting circuit means configured to transmit the signal onto the data channel; and an adaptive filtering circuit means coupled to the receiving circuit means and the transmitting circuit means, and configured to filter the data channel by operating on input frequency domain data samples to output filtered data samples. The adaptive filtering circuit means includes: an error sample generation circuit means configured to generate error samples representing the difference between a target response and filtered data samples; an arithmetic-only circuit means configured to approximately calculate a windowing function for operating on the error samples to provide windowed error samples; and an output sample generation circuit means configured to operate on the windowed error samples to provide output filtered data samples.

[0007] In a first implementation of such a physical layer transceiver, the error sample generation circuitry may include: a comparison circuitry configured to generate an error signal representing the difference between the target response and the filtered data sample; and a combination circuitry configured to combine the error signal with a processed signal derived from the input frequency domain data sample to provide an error sample.

[0008] According to a first aspect of the first implementation, the comparison circuit device can be configured for time-domain operation and can also be configured to transform the error signal into a frequency-domain error signal.

[0009] In a first example of the first aspect, the comparison circuit device may include a fast Fourier transform circuit device configured to transform an error signal into a frequency domain error signal.

[0010] According to a second aspect of the first implementation, the combinational circuit means can be configured to combine the error signal with a processing signal derived from the input frequency domain data samples to provide a sample of the gradient of the cost function to be minimized, and the arithmetic circuit means can be configured to approximate the windowing function used to operate on the sample of the gradient of the cost function.

[0011] In a second implementation of this physical layer transceiver, the output sample generation circuitry may include: an accumulator circuitry configured to generate filter coefficients based on windowing error samples output by the arithmetic-only circuitry; and an output circuitry configured to combine the filter coefficients with input frequency domain data samples to provide output filtered data samples.

[0012] In this third implementation of the physical layer transceiver, an adaptive filtering circuit can operate on a portion of the data channel, and an error sample generation circuit can be configured to generate error samples that also represent the difference between the target response and a filtered data sample output by another adaptive filtering circuit that operates on another portion of the data channel.

[0013] In this fourth implementation of the physical layer transceiver, only the arithmetic circuitry can be configured to perform the summation of a sine function.

[0014] According to the first aspect of the fourth implementation, the arithmetic circuit device alone can be configured to approximate the calculation of the windowing function as a square window.

[0015] In a first example of the first aspect, only the arithmetic circuit device can be configured to perform the summation of a first sine function and the odd harmonics of the first sine function.

[0016] In a first variant of the first instance, for the first sine function, the arithmetic-only circuitry may include a first multiplication circuitry configured to multiply an error sample by a first constant. For each corresponding odd harmonic of the first sine function, the arithmetic-only circuitry may further include: a corresponding additional multiplication circuitry configured to multiply an error sample by a corresponding complex constant; a corresponding first cyclic shift circuitry configured to cyclically shift the output of the corresponding additional multiplication circuitry in a first direction; and a corresponding second cyclic shift circuitry configured to cyclically shift the output of the corresponding additional multiplication circuitry in a second direction opposite to the first direction. The arithmetic-only circuitry may further include a vector summing circuitry configured to perform a signed summation operation on the outputs of the first multiplication circuitry, the corresponding first cyclic shift circuitry, and the corresponding second cyclic shift circuitry.

[0017] According to this variant, the corresponding first cyclic shift circuit device can be configured to cyclically shift the output of the corresponding additional multiplication circuit device by a shift amount in a first direction, and the corresponding second cyclic shift circuit device can be configured to cyclically shift the output of the corresponding additional multiplication circuit device by a shift amount in a second direction.

[0018] In this fifth implementation of the physical layer transceiver, the output sample generation circuitry can also be configured to transform the output filtered data samples into time-domain output filtered data samples.

[0019] According to the first aspect of the fifth implementation, the output sample generation circuit device may include an inverse fast Fourier transform circuit device configured to transform output filtered data samples into time-domain output filtered data samples.

[0020] According to an implementation of the subject matter of this disclosure, a method for adaptively filtering a signal on a data channel by manipulating an input frequency domain data sample to output a filtered data sample includes: comparing a target response and a filtered data sample to generate an error sample representing the difference between the target response and the filtered data sample; approximating a windowing function for manipulating the error sample using only an arithmetic function to provide a windowed error sample; and manipulating the windowed error sample to provide an output filtered data sample.

[0021] In a first implementation of this method, comparing the target response and filtered data samples to generate error samples representing the difference between the target response and the filtered data samples may include: processing the error samples to provide samples of the gradient of the cost function to be minimized, and approximation may include approximating a windowing function used to operate on the gradient samples of the cost function using only arithmetic functions.

[0022] In a second implementation of this method, operating on the windowing error samples to provide output filtered data samples may include: accumulating the windowing error samples to generate filter coefficients; and combining the filter coefficients with the input frequency domain data samples to provide output filtered data samples.

[0023] In the third implementation, the method can operate on a portion of the data channel, and for each portion, a comparison can generate an error signal, which also represents the difference between the target response and the filtered data sample output by operating on another portion of the data channel.

[0024] In a fourth implementation of this approach, approximation may include performing the summation of time-domain sine functions using only frequency-domain arithmetic functions.

[0025] According to the first aspect of the fourth implementation, the approximation calculation may include approximating the squared window function using only frequency domain arithmetic functions.

[0026] In a first instance of the first aspect, the approximate calculation may include performing the summation of the first time-domain sine function and its odd harmonics using only frequency-domain arithmetic functions.

[0027] In a first variant of the first instance, for a first time-domain sine function, the approximation may include multiplying a combined sample in the frequency domain by a first constant. For each corresponding odd harmonic of the first time-domain sine function, the approximation may further include: multiplying an error sample by a corresponding complex constant, cyclically shifting the corresponding output of multiplying the error sample by the corresponding complex constant in a first direction, and cyclically shifting the corresponding output of multiplying the error sample by the corresponding complex constant in a second direction opposite to the first direction. The approximation may further include a signed summation of the outputs performing the following: (1) multiplying the error sample by the first constant, (2) multiplying the error sample by each corresponding complex constant, (3) cyclically shifting each corresponding output in the first direction, and (4) cyclically shifting each corresponding output in the second direction.

[0028] According to the first variant, the corresponding cyclic shift in the first direction may include cyclically shifting the corresponding output multiplied by the error sample by a shift amount in the first direction, and the corresponding cyclic shift in the second direction may include cyclically shifting the corresponding output multiplied by the error sample by a shift amount in the second direction.

[0029] In a fifth implementation of this method, the comparison can be performed as a time-domain operation, and the method may also include transforming the error samples into frequency-domain error samples.

[0030] According to the first aspect of the fifth implementation, transforming error samples into frequency domain error samples includes a fast Fourier transform operation.

[0031] A sixth implementation of this method may also include transforming the output filtered data samples into time-domain output filtered data samples.

[0032] According to the first aspect of the sixth implementation, transforming the output filtered data sample into a time-domain output filtered data sample may include an inverse fast Fourier transform operation. Attached Figure Description

[0033] Other features, nature and various advantages of this disclosure will become apparent from the following detailed description taken in conjunction with the accompanying drawings, wherein like reference numerals always refer to like parts in the drawings:

[0034] Figure 1 A portion of a communication link in which an implementation of the subject matter of this disclosure may be used is shown;

[0035] Figure 2 A portion of another type of communication link in which an implementation of the subject matter of this disclosure can be used is shown;

[0036] Figure 3 Details of a physical layer transceiver incorporating the subject matter of this disclosure are shown;

[0037] Figure 4 It is an implementation of the subject matter disclosed herein. Figure 3 Functional representation of circuit devices in a physical layer transceiver;

[0038] Figure 5 It is a graphical representation of the sine function based on the raised Fourier series expansion and the superposition of its first three odd harmonics;

[0039] Figure 6 It is an implementation of the subject matter of this disclosure for execution Figure 5 Functional representation of superimposed circuit devices; and

[0040] Figure 7 This is a flowchart illustrating a method for implementing the subject matter of this disclosure. Detailed Implementation

[0041] As mentioned above, wired communication devices, such as physical layer (PHY) devices, typically include filters for, for example, echo cancellation and crosstalk cancellation (near-end crosstalk or NEXT and far-end crosstalk or FEXT). Such filters can operate more efficiently in the frequency domain, but generally require complex circuitry for conversion to and from the frequency domain (such as Fast Fourier Transform or FFT circuitry and Inverse Fast Fourier Transform or IFFT circuitry). These filters can be very large and consume considerable power, especially when filtering the entire channel.

[0042] Typically, such a filter may involve comparing the filter output with a target response and generating an error signal representing the difference between the filter output and the target response. This error signal is typically transformed to the frequency domain via a Fast Fourier Transform (FFT), where it is combined with a frequency-domain input sample vector. Specifically, in one implementation, the error signal is convolved (e.g., by multiplication) with the conjugate transpose of the input frequency-domain samples to form the gradient of the least mean square cost function. The cost function gradient signal is then passed through a windowing function (such as a square window), which can be implemented as a matrix where the input is a vector, half of which is the identity matrix and the other half is all zeros. Matrix operations are performed in the time domain, requiring the cost function gradient signal to be returned to the time domain (e.g., by an inverse FFT), and then, after applying the windowing matrix, the windowed signal is transformed back to the frequency domain (e.g., by another FFT). The result is integrated and used as coefficients and applied (e.g., by multiplication) to the input samples to produce the output samples. These samples are transformed back to the time domain (e.g., via inverse fast Fourier transform).

[0043] To efficiently implement and reduce processing latency, the channel can be decomposed into different domains or partitions that operate in parallel. Within any partition, the outputs of other partitions can be used as part of a comparison with the target response. Partitioning also reduces the length of any individual filter, thereby reducing size and power requirements, and decreasing the overall filter latency. However, even in typical partitioned filters, typical windowing operations still require complex matrix operations, preceded by an inverse fast Fourier transform and followed by another fast Fourier transform. These operations still require significant device area and power consumption.

[0044] Therefore, according to the implementation of the subject matter of this disclosure, the filter (which may be a least mean square adaptive filter, such as, in particular, a partitioned frequency domain block least mean square (PFBLMS) filter) is implemented using only arithmetic operations (i.e., addition, subtraction, multiplication, division, and shifting) as defined herein for approximating the windowing function (as opposed to complex matrix operations such as the fast Fourier transform and inverse fast Fourier transform). Thus, these implementations offer substantial savings in device area and power consumption.

[0045] For example, a typical PFBLMS filter may include a windowing function implemented as a matrix [I 0], where half of the matrix is ​​the identity matrix and the other half is all zeros, preceded by an IFFT and followed by an FFT. The [I 0] matrix is ​​essentially a square window operator that allows all samples in the first half of its range to pass through and blocks all samples in the second half of its range. Because square waves are superpositions of sine functions, implementations of the subject matter of this disclosure use multipliers, shifters, and vector adders to instantiate square-window PFBLMS filters to approximate the square window using the sum of sine waves. However, other filters may also be constructed using only arithmetic functions (such as those determined using linear programming or quadratic programming techniques) to approximate the profiles of other filters as the sum / difference of sine functions (i.e., sine and cosine) or other functions.

[0046] The subject of this disclosure can be found by referring to Figures 1-7 To understand better.

[0047] Implementations of the subject matter of this disclosure can be found in physical layer transceivers (PHYs) of fixed or "enterprise" Ethernet links or in automotive or other wireless Ethernet links.

[0048] Figure 1 The diagram illustrates a single-cable Ethernet physical link 100 for connecting two physical layer transceivers 103, in which an implementation of the subject matter of this disclosure can be used. Each PHY 103 is connected to a channel medium 101 via a corresponding connector 102, in which the channel medium 101 may be a cable comprising a single shielded or unshielded twisted pair of copper wires 111, or a coaxial cable. This single-cable physical link 100 can be used, for example, in an automotive implementation, where one of the PHYs 103 may be located in the vehicle's electronic control unit (ECU), while the other PHY 103 may be located in a functional module of the vehicle.

[0049] A single-cable physical link 100 can also be used in enterprise implementations. However, in other implementations of the subject matter of this disclosure, such as Figure 2 The enterprise Ethernet physical link 200 shown can connect two physical layer transceivers 203 corresponding to a respective link partner, each physical layer transceiver 203 may be located in a corresponding data processing or storage device. Each PHY 203 is connected to a channel medium 201 via a corresponding connector 202. In this implementation, the channel medium 201 may include four shielded or unshielded twisted-pair copper wire pairs 211, 221, 231, 241 or four coaxial cables or optical fibers or a combination thereof.

[0050] From the perspective of this disclosure, PHY 103 (for single-pair implementation) and PHY 203 (for multi-pair implementation) are identical in relevant respects. For example, as Figure 3The implementation of PHY 302 shown can be used as PHY 103 or PHY 203.

[0051] exist Figure 3 In system 300, PHY 302 couples a host device to wired channel media (cable) 101 / 201, such as functional module 301. The host device could be, for example, a data processing or storage module in an enterprise system, or, in another example, an automotive module in an automotive implementation. Host interface 322 of PHY 302 couples PHY 302 to functional module 301. In the transmission direction, signal 314 from functional module 301 passes through encoder 324 and is transmitted as transmission symbol 334 to transmitter 304 and line interface 323, which couples PHY 302 to wired channel media (cable) 101 / 201. In the reception direction, signal from wired channel media (cable) 101 / 201 passes through line interface 323 to receiver 305, and then to equalizer 306, which enhances the quality of received signal 315. Received symbol 325 then passes through decoder 335 to host interface 322, and then to functional module 301.

[0052] One or more of the adaptive filters (shown as multiple echo cancellers 303, but may also include multiple NEXT cancellers and multiple FEXT cancellers) filter out the interference effects of echoes and / or near-end crosstalk and / or far-end crosstalk between the transmitted symbol 334 and the received signal 315.

[0053] In some implementations of the subject matter of this disclosure, PHY 302 transmits data from functional module 301 via host interface 322 and from transmitter 304 via line interface 322 to wired channel medium (cable) 101 / 201, and receives echoes of remote (target) signals and transmitted signals passing through adaptive filtering circuitry 101 / 201 via line interface 323 and receiver 305. The adaptive filtering circuitry may include a digital echo canceller 303 and / or an equalizer 306. The digital echo canceller 303 can be used to remove echoes and may also include multiple NEXT cancellers and multiple FEXT cancellers to filter the effects of interference from echoes and / or near-end crosstalk and / or far-end crosstalk, respectively. The equalizer 306 is used to improve the quality of the remote signal.

[0054] Figure 4This is a functional representation 400 of the operation of a least mean square adapted filter, implemented according to the subject matter of this disclosure. This least mean square adapted filter may be included in a digital echo canceller 303 or other filter circuitry (which may include an equalizer 306), such as that described in commonly assigned U.S. Patent 8,743,674, which is incorporated herein by reference in its entirety. The filter circuitry 400 is the m-th partition of a filter comprising m partitions, but the structure of the filter 400 can be used as a standalone filter for echo cancellation or other filter functions. Furthermore, although... Figure 4 The filter circuitry represented in this disclosure has so far been described as part of a physical layer transceiver, but implementations of the subject matter of this disclosure can be used for window functions in other types of adaptive filters.

[0055] In function representation 400, the input sample X(km) from one of the k blocks processed in the m-th partition is input at 401. The input sample X(km) is then compared with the coefficient H generated by the cost function minimization box 403 at 402. m (k) Multiply to provide the output sample Y m (k). Input sample X (km) and output sample Y m (k) In the frequency domain, and IFFT 404 will output sample Y m (k) Transform back to the time domain. A square wave filter 405, implemented as matrix [0I]′, passes only the latter half of the output sample matrix to eliminate the circular convolution artifacts achieved by FFT fast convolution, thus obtaining the time-domain output sample Y. m (n). In the partitioned implementation, the output sample Y from the m-th partition. m At 406, y(n) is combined with the output samples from other partitions to provide the complete output vector y(n). The output vector y(n) is compared with the target response vector d(n) at 407 to obtain the error sample ε(n), which is concatenated with the [0] matrix to form the [0 ε] matrix 417 and converted to the frequency domain error sample E(k) by FFT 408.

[0056] At position 409, the conjugate transpose X of the input sample vector X(km) is obtained. ＊ (km), and at 410 it is combined with the frequency domain error sample E(k) to obtain the gradient sample S(k) of the cost function to be minimized. According to the implementation of the subject matter of this disclosure, the sample S(k) is input to the arithmetic window constraint circuit device 411 to implement an arithmetic window function only. The adaptive coefficient μ of the least squares adaptation is applied to the output S′(k) of the arithmetic window constraint circuit device 411 at 412, and the result is accumulated at 413 (using, for example, register 423 and adder 433) to obtain the frequency domain coefficient vector H.m (k).

[0057] As described above, the arithmetic window constraint circuit device 411 uses only the arithmetic functions described above without complex matrix or transformation operations to approximate the desired filter function. For example, if the desired filter function is a square window, the square window can be approximated by superimposing sine functions. Figure 5 An example is shown where a square window 501 is represented by a superposition 500 of the sine function and its first three odd harmonics via raised Fourier series expansion. The Fourier series expansion of the square wave window function is:

[0058]

[0059] Where 1(x) represents the DC offset. Figure 5 In the example implementation, only the sine function is used because Sq(x) is an odd function. In some implementations, other sine functions may be used. Figure 5 In the example implementation, only odd harmonics are used because Sq(x) is antisymmetric with respect to the half-period. In other implementations, this constraint can be removed to accommodate the weighting function. In other implementations, other combinations of harmonics can be used.

[0060] This superposition of time-domain sine functions can be achieved by using, for example... Figure 6 The operation shown in function representation 600 is implemented in the frequency domain by representing the sine function as an impulse or increment function, and it contains only the circuitry for performing the arithmetic function. The sample S(k) is input at 601 and multiplied by the first coefficient c0 at 602. At 603, the sample S(k) is multiplied by the second coefficient c1×j, and at 613, the output of multiplier 603 is cyclically shifted one position in the first direction, and at 623, the output of multiplier 603 is cyclically shifted one position in the second direction opposite to the first direction. At 604, the sample S(k) is multiplied by the second coefficient c3×j, and at 614, the output of multiplier 604 is cyclically shifted three positions in the first direction, and at 624, the output of multiplier 604 is cyclically shifted three positions in the second direction. At 605, the sample S(k) is multiplied by the third coefficient c5×j, and at 615, the output of multiplier 605 is cyclically shifted five positions in the first direction, and at 625, the output of multiplier 605 is cyclically shifted five positions in the second direction.

[0061] The cyclic shifts 613, 614, 615, 623, 624, and 625 in the frequency domain are frequency-domain convolutions with unity response, which replace the windowing operation in the time domain. Therefore, these cyclic shifts allow the window function in the time domain to be implemented directly in the frequency domain without complex operations. The number of shifts depends on the harmonics used in the approximation calculation. The example in circuit arrangement 600 is an approximation with three odd-numbered sinusoidal harmonics. Therefore, the shifts correspond to the first three odd harmonics 1, 3, and 5. In other implementations, more or fewer harmonics may be used, depending on the desired convergence speed of the approximation calculation and / or the accuracy and precision requirements of the system.

[0062] Vector adder 606 performs a signed summation operation on the outputs of multiplier 602 and circular shifters 613, 623, 614, 624, 615, and 625. The summation is signed because some of the inputs (circular shifters 613, 614, and 615) are subtracted from the sum, rather than added to it. The output of vector adder 606 is the vector S′(k).

[0063] exist Figure 6 In the functions implemented in the code, the coefficients are real constants, which can be combinations of negative powers of 2, such as c0 = c1 = 2 - 1 = 0.5, c3 = 2 - 3 = 0.125, c5 = 2 -5 =0.3125, to avoid large multiplication operations when calculating the loss using the minimum approximation to achieve a sine function. Because the window function (a square wave in this example) represents the gradient function in the time domain, it should be positive semi-definite (i.e., represented by a Hermitian matrix with positive eigenvalues). The raised Fourier series expansion coefficients ensure that the positive semi-definite property is preserved.

[0064] Other approximate calculations can be achieved. For example, various approximations can be derived using linear programming or quadratic programming techniques. Terms of the arithmetic function can be expanded based on the series expansion of the desired function. With a sufficient number of terms, the performance of a filter based on this extension can be expected to be similar to the actual desired function.

[0065] For approximations with more terms, the Gibbs phenomenon affects the approximation of the angular discontinuities of the square function. Using the sigma approximation to modify the Fourier series coefficients can reduce the influence of the Gibbs phenomenon. For example, the sigma approximation of the Fourier series of a square wave is:

[0066]

[0067] Where the coefficient is

[0068]

[0069] The coefficients should still be approximated by the upgrade number to preserve the positive semi-definite property.

[0070] The window-constrained PFBLMS filter implemented according to the subject matter of this disclosure includes both unconstrained and constrained PFBLMS filters as special cases. For example, the window function implemented according to the subject matter of this disclosure can be approximated by a constrained square window [ones(L, 1); zeros(L, 1)] or an unconstrained window [ones(2*L, 1)], where L is the block size. Since the average adaptive coefficient μ of the unconstrained window is larger, the unconstrained PFBLMS filter converges faster than the constrained PFBLMS filter. Therefore, due to its initial fast convergence, the unconstrained window function can be approximated only by a 0th-order Fourier series. The behavior of the sinusoidal window function implemented according to the subject matter of this disclosure will be somewhat between that of the constrained and unconstrained window functions, because the average μ is between the unconstrained and constrained cases.

[0071] Figure 7 This is a flowchart illustrating a method 700 for performing the filtering operation as described above, according to an implementation of the present disclosure.

[0072] At 701, the target response and filtered data samples are compared to generate an error sample representing the difference between the target response and the filtered data samples. At 702, a windowing function for operating on the error sample (which may be the cost function gradient sample as described above) is approximated using only an arithmetic function. At 703, the output of the arithmetic function (the windowed error sample) is accumulated to generate the filter coefficients. At 704, the filter coefficients are combined with the input frequency domain data samples to provide the output filtered data sample.

[0073] Therefore, it can be seen that a window-constrained frequency domain filter that uses only arithmetic functions for windowing has been provided.

[0074] As used herein and in the following claims, the construction “one of A and B” shall mean “A or B”.

[0075] It should be noted that the foregoing is merely an explanation of the principles of the present invention, and the present invention can be practiced through other embodiments besides those described. These embodiments are presented for illustrative purposes and not for limitation, and the present invention is limited only to the following claims.

Claims

1. A physical layer transceiver for a data channel, the physical layer transceiver comprising: A receiving circuit device is configured to receive signals arriving at the data channel; A transmission circuit device is configured to transmit a signal to the data channel; as well as An adaptive filtering circuit device, coupled to the receiving circuit device and the transmitting circuit device, and configured to filter the data channel by operating on input frequency domain data samples to output filtered data samples, the adaptive filtering circuit device comprising: An error sample generation circuit is configured to generate error samples representing the difference between the target response and the filtered data samples; An arithmetic circuit device is configured to approximate the calculation of a windowing function used to operate on the error samples, thereby providing windowed error samples; and An output sample generation circuit is configured to operate on the windowed error samples to provide the output filtered data samples. The error sample generation circuit device includes: A comparison circuit is configured to generate an error signal representing the difference between the target response and the filtered data samples; and A combinational circuit arrangement is configured to combine the error signal with a processed signal derived from the input frequency domain data samples to provide the error samples, and in: The combined circuitry is configured to combine the error signal with the processed signal derived from the input frequency domain data samples to provide samples of the gradient of the cost function to be minimized; and The arithmetic-only circuitry is configured to approximate the arithmetic-only windowing function used to operate on the gradient samples of the cost function.

2. The physical layer transceiver according to claim 1, wherein: The comparison circuit is configured for time-domain operation and also configured to transform the error signal into a frequency-domain error signal.

3. The physical layer transceiver of claim 2, wherein the comparison circuitry includes a fast Fourier transform circuitry configured to transform the error signal into a frequency domain error signal.

4. The physical layer transceiver according to claim 1, wherein the output sample generation circuit device comprises: An accumulator circuit is configured to generate filter coefficients based on the windowing error samples output by the arithmetic-only circuit; as well as An output circuit device is configured to combine the filter coefficients with the input frequency domain data samples to provide the output filtered data samples.

5. The physical layer transceiver according to claim 1, wherein: The adaptive filtering circuit operates on a portion of the data channel; and The error sample generation circuit is configured to generate error samples that also represent the difference between the target response and a filtered data sample output by another adaptive filtering circuit operating on another portion of the data channel.

6. The physical layer transceiver of claim 1, wherein the arithmetic-only circuitry is configured to perform the summation of a sine function.

7. The physical layer transceiver of claim 6, wherein the arithmetic-only circuitry is configured to approximate the windowing function as a square window.

8. The physical layer transceiver of claim 7, wherein the arithmetic-only circuitry is configured to perform the summation of a first sine function and the odd harmonics of the first sine function.

9. The physical layer transceiver according to claim 8, wherein For the first sine function, the arithmetic-only circuit device includes: A first multiplication circuit device is configured to multiply the error sample by a first constant; For each corresponding odd harmonic of the first sine function, the arithmetic-only circuit device includes: The corresponding additional multiplication circuit is configured to multiply the error sample by a corresponding complex constant. The corresponding first cyclic shift circuit device is configured to cyclically shift the output of the corresponding additional multiplication circuit device in a first direction, and A corresponding second cyclic shift circuit device is configured to cyclically shift the output of the corresponding additional multiplication circuit device in a second direction opposite to the first direction, wherein the arithmetic-only circuit device further includes a vector summation circuit device configured to perform a signed summation operation on the outputs of the first multiplication circuit device, the corresponding first cyclic shift circuit device, and the corresponding second cyclic shift circuit device.

10. The physical layer transceiver according to claim 9, wherein: The corresponding first cyclic shift circuit device is configured to cyclically shift the output of the corresponding additional multiplication circuit device by a shift amount in the first direction, and The corresponding second cyclic shift circuit device is configured to cyclically shift the output of the corresponding additional multiplication circuit device by the shift amount in the second direction.

11. The physical layer transceiver of claim 1, wherein the output sample generation circuitry is further configured to transform the output filtered data sample into a time-domain output filtered data sample.

12. The physical layer transceiver of claim 11, wherein the output sample generation circuitry comprises: A fast Fourier transform circuit device configured to transform the output filtered data samples into time-domain output filtered data samples.

13. A method for adaptively filtering a signal on a data channel by manipulating input frequency domain data samples to output filtered data samples, the method comprising: The target response and the filtered data samples are compared to generate an error sample representing the difference between the target response and the filtered data samples; The windowing function used to operate on the error samples is approximated using only arithmetic functions to provide windowed error samples; as well as The windowing error samples are processed to provide the output filtered data samples. The error sample, which compares the target response and the filtered data sample to generate an error representing the difference between the target response and the filtered data sample, includes: The error samples are combined with the processed signal derived from the input frequency domain data samples to provide a sample of the gradient of the cost function to be minimized. as well as The approximation includes using only arithmetic functions to approximate the arithmetic windowing function used to operate on the gradient samples of the cost function.

14. The method of claim 13, wherein operating the windowing error samples to provide the output filtered data samples comprises: The windowing error samples are accumulated to generate filter coefficients; as well as The filter coefficients are combined with the input frequency domain data samples to provide the output filtered data samples.

15. The method according to claim 13, wherein: The method operates on a portion of the data channel; as well as For each part, the comparison generates an error signal, which also represents the difference between the target response and the filtered data sample output by operating another part of the data channel through the method.

16. The method of claim 13, wherein the approximation calculation comprises performing the summation of the time-domain sine function using only frequency-domain arithmetic functions.

17. The method of claim 16, wherein the approximation calculation comprises approximating the squared window function using only frequency domain arithmetic functions.

18. The method of claim 17, wherein the approximation calculation comprises using only frequency domain arithmetic functions to perform the summation of the first time-domain sine function and the odd harmonics of the first time-domain sine function.

19. The method of claim 18, wherein the approximate calculation comprises: For the first time-domain sine function, multiply the combined samples in the frequency domain by the first constant; For each corresponding odd harmonic of the first time-domain sine function: Multiply the error sample by the corresponding complex constant. The error sample is cyclically shifted in the first direction, multiplied by the corresponding complex constant, and the corresponding output is obtained. The error sample is cyclically shifted in a second direction opposite to the first direction, multiplying it by the corresponding output of the corresponding complex constant; and Perform a signed summation operation on the output of the following items: (1) multiply the error sample by a first constant, (2) multiply the error sample by each corresponding complex constant, (3) perform each corresponding cyclic shift in the first direction, and (4) perform each corresponding cyclic shift in the second direction.

20. The method of claim 19, wherein: The corresponding cyclic shift in the first direction includes cyclically shifting the corresponding output multiplied by the error sample by a shift amount in the first direction, and The corresponding cyclic shift in the second direction includes cyclically shifting the corresponding output multiplied by the error sample by the shift amount in the second direction.

21. The method according to claim 13, wherein: The comparison is performed as a time-domain operation; the method further includes: The error samples are transformed into frequency domain error samples.

22. The method of claim 21, wherein transforming the error sample into a frequency domain error sample comprises a Fast Fourier Transform operation.

23. The method of claim 13, further comprising: The output filtered data sample is transformed into a time-domain output filtered data sample.

24. The method of claim 23, wherein transforming the output filtered data sample into a time-domain output filtered data sample includes an inverse fast Fourier transform operation.

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