Comparison of biometric identifiers in memory
By implementing a multi-level artificial neural network in the memory and using multiple logic blocks and controllers to perform subset comparisons of biometric identifiers, the security and deterministic problems of biometric identifier authentication and identification in the prior art are solved, achieving more reliable and faster identity verification.
Patent Information
- Application Number
- CN202080044523.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-08-06
- Filing Date
- 2020-07-01
- Publication Date
- 2026-01-06
- Estimated Expiration
- 2040-07-01
AI Technical Summary
In existing technologies, biometric authentication and identification methods are easily stolen, forgotten, or misplaced, and comparisons of single biometric identifiers cannot achieve the desired level of certainty and security.
Artificial neural networks (ANNs) are used to implement a multi-level structure in memory. Multiple logic blocks and controllers are used to compare subsets of biometric identifiers, thereby achieving matching of various types of biometric identifiers with stored templates.
It provides more reliable, efficient, and rapid biometric authentication and identification, improving the security and determinism of identity verification.
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Figure CN114080633B_ABST
Abstract
Description
Technical Field
[0001] This disclosure generally relates to memory, and more specifically to apparatus and methods associated with the comparison of biometric identifiers in memory. Background Technology
[0002] Memory devices are typically provided as internal semiconductors or integrated circuits in computers or other electronic devices. Some memory systems may include non-volatile memory for storing host (e.g., user) data from a host computer. Non-volatile memory provides persistent information (data) by retaining stored data when no power is applied. Some types of non-volatile memory may include NAND flash memory, NOR flash memory, read-only memory (ROM), electrically erasable programmable ROM (EEPROM), erasable programmable ROM (EPROM), and resistive variable memory, such as phase-change random access memory (PCRAM), three-dimensional crosspoint memory (e.g., 3D XPoint), resistive random access memory (ReRAM), ferroelectric random access memory (FeRAM), magnetoresistive random access memory (MRAM), and programmable conductive memory, as well as other types of memory. Volatile memory cells (e.g., dynamic random access memory (DRAM) cells) require power to maintain their stored data state (e.g., via a refresh process); non-volatile memory cells (e.g., flash memory cells), on the other hand, maintain their stored state without power. However, compared to various non-volatile memory cells such as flash memory cells, various volatile memory cells such as DRAM cells can be operated (e.g., programming, reading, erasing, etc.) much faster.
[0003] Artificial neural networks (ANNs) are networks that process information by modeling neural networks (e.g., neurons in the human brain) to process information sensed in a specific environment (e.g., stimuli). Similar to the human brain, neural networks contain multi-neuron topologies. Summary of the Invention
[0004] One embodiment of this disclosure provides a memory device including: a memory cell array; a plurality of logic blocks in a complementary metal-oxide-semiconductor (CMOS) array below the array; and a controller coupled to the memory cell array, wherein the controller is configured to: control a first portion of the plurality of logic blocks to receive a first subset of a set of biometric identifiers from the array and perform a first comparison operation thereon; and control a second portion of the logic blocks to receive a second subset of the set of biometric identifiers from the array and perform a second comparison operation thereon; wherein: the first and second subsets of the biometric identifiers are different biometric identifiers; and perform the first and second comparison operations to determine that the first and second subsets match memory templates, respectively.
[0005] Another embodiment of this disclosure provides a memory device including: a plurality of logical blocks of the memory device; and a controller coupled to the plurality of logical blocks, wherein the controller is configured to: control a first portion of the plurality of logical blocks as an artificial neural network (ANN) to perform a first ANN operation, wherein the first ANN operation is to compare a first subset of a plurality of biometric identifiers with a stored template to find a match; control a second portion of the plurality of logical blocks as an ANN to perform a second ANN operation, wherein the second ANN operation is to compare a second subset of the plurality of biometric identifiers with the stored template to find a match; and control the first portion and the second portion of the plurality of logical blocks to simultaneously perform the first ANN operation and the second ANN operation.
[0006] Another embodiment of this disclosure provides a method for comparing biometric identifiers in a memory, comprising: controlling a first set of logic blocks of an artificial neural network (ANN) to perform a first comparison operation on a first subset of a set of biometric identifiers by comparison with a memory template; controlling a second set of logic blocks of the ANN to perform a second comparison operation on a second subset of the set of biometric identifiers by comparison with the memory template; and simultaneously performing the first comparison operation and the second comparison operation; wherein the first set of logic blocks and the second set of logic blocks of the ANN are part of the same memory device. Attached Figure Description
[0007] Figure 1 This is a block diagram of a device in the form of a computing system including a host and a memory system, according to several embodiments of the present disclosure.
[0008] Figure 2 This is a block diagram illustrating an example of comparing biometric identifiers in a memory according to various embodiments of the present disclosure.
[0009] Figure 3This is a block diagram of an exemplary memory device comprising multiple layers according to various embodiments of the present disclosure.
[0010] Figure 4 This is a block diagram of exemplary logic blocks of a memory device according to several embodiments of the present disclosure.
[0011] Figure 5 This is a block diagram of a memory device implementing an artificial neural network (ANN) and a plurality of logic blocks included within the memory device, according to several embodiments of the present disclosure.
[0012] Figure 6 An exemplary model of an ANN according to several embodiments of the present disclosure is shown.
[0013] Figure 7 An exemplary flowchart of a method for comparing biometric identifiers in memory according to several embodiments of the present disclosure is shown.
[0014] Figure 8 An exemplary machine of a computer system is shown, within which a set of instructions can be executed to cause the machine to perform the various methods discussed herein.
[0015] Figure 9 Another exemplary model of an ANN according to several embodiments of the present invention is shown. Detailed Implementation
[0016] Biometrics is a term used for information (e.g., measurement, calculation, and / or identification) based on metrics (e.g., measurable characteristics) associated with a biological source. A biological source can be a specific identifiable individual (e.g., a person, animal, or plant from which characteristics have been sensed). Thus, for example, biometrics can allow for the identification and / or authentication of a specific person based on identifiable and verifiable data, which may be unique and specific to that person. Biometrics can be used as a form of identification and access control. For example, using computer technology, biometrics can be used to identify individuals within a group (e.g., individuals under surveillance), or to authenticate individuals to gain access to specific areas, businesses, institutions, and laboratories, among other possible uses.
[0017] Biometric identifiers are measurable characteristics that can be used to distinguish, identify, mark, and / or describe an individual. Biometric identifiers can be categorized into physiological characteristics and behavioral characteristics. Physiological characteristics relate to morphological traits (e.g., the physical shape of a body feature) or the result of an individual's inherent physiological processes that can be used to distinguish a particular individual from others. Examples of this type of biometric identifier include, but are not limited to, facial features (e.g., the shape and / or texture of the nose, mouth, ears, etc.), fingerprints, DNA structure and / or coding segments, vein structures and / or fine lines, folds, wrinkles, etc. on the palm, features of the iris and / or retina of the eyes and / or body odor, and other possible physiological characteristics. Behavioral characteristics relate to identifiable behavioral patterns that can be used to distinguish and / or identify a particular individual. Examples of this type of biometric identifier include, but are not limited to, typing rhythm, gait (e.g., the manner of walking, running, etc.) and / or voice (e.g., tone of voice, intonation, etc.), and other possible behavioral characteristics. Some biometric identifiers can be a combination of physiological and behavioral characteristics (e.g., odor, gait, voice, etc.). These types of biometric identifiers can be used to identify (e.g., identify) a specific individual as the source of one or more biometric identifiers.
[0018] To authenticate and / or identify a specific individual, one or more such biometric identifiers (e.g., a dataset encoding this type of biometric identifier) can be compared with a stored template of predetermined biometric identifiers, as described herein. For example, to authenticate an individual, one or more biometric identifiers can be sensed by a sensor, and the sensed biometric identifiers can be compared with a template storing predetermined biometric identifiers of at least the specific individual. Alternatively, to identify a specific individual from among a plurality of other individuals (e.g., in images of a group of people), one or more biometric identifiers sensed from the specific individual can be compared with one or more templates storing predetermined biometric identifiers of the specific individual and also storing biometric identifiers of a plurality of other individuals.
[0019] Other authentication and identification methods include token-based systems, such as driver's licenses or passports, and knowledge-based systems, such as passwords or personal identification codes. However, these methods can be stolen, misplaced, and / or forgotten. Because one or more biometric identifiers compared to an appropriate stored template can provide a statistically unique identifier for a specific individual (e.g., without the individual's active participation), the use of biometrics is more reliable in verifying identity than token-based and knowledge-based methods. Facing threats such as theft, identity theft, document fraud, terrorism, cybercrime, and changes in international regulations, biometrics are a means of identifying and authenticating individuals. This identification and authentication can be performed reliably, efficiently, and quickly through the unique physiological and / or behavioral characteristics used in the computational system used to compare biometric identifiers.
[0020] The effective use of biometric identifiers depends on the application. Based on the desired level of determinism, convenience, and / or security, using certain and / or multiple biometric identifiers may be better than other approaches. A comparison of a single biometric identifier with a template may not achieve the desired level in every implementation. Therefore, the comparison of biometric identifiers with templates in memory, as described herein, enables the effective use of various types of biometric identifiers by allowing selection from multiple levels (e.g., layers) of an artificial neural network (ANN) in memory corresponding to multiple types of biometric identifiers. For example, the first layer of the ANN may correspond to a comparison of, for example, facial biometric features, the second layer may correspond to a comparison of fingerprint biometric features, and the third layer may correspond to a comparison of iris biometric features, and each of the other layers may correspond to any number of possible additional and / or alternative biometric features.
[0021] This disclosure includes systems, apparatus, and methods related to the comparison of biometric identifiers in memory. An exemplary apparatus includes a memory cell array, a plurality of logic blocks in a complementary metal-oxide-semiconductor (CMOS) array below the array, and a controller coupled to the memory cell array. The controller is configured to control a first portion of the plurality of logic blocks to receive a first subset of a set of biometric identifiers from the array and perform a first comparison operation thereon, and to control a second portion of the logic blocks to receive a second subset of the set of biometric identifiers from the array and perform a second comparison operation thereon. The first and second subsets of the biometric identifiers are distinct biometric identifiers, and the first and second comparison operations are performed to determine that the first and second subsets match memory templates, respectively.
[0022] The figures in this document follow a numbering convention, where the first one or several digits correspond to the figure number, and the remaining digits identify elements or components in the figure. Similar elements or components between different figures can be identified by using similar digits. For example, figure number 108 can indicate... Figure 1 The element "08" in the text, and similar elements can be found in the text. Figure 2 The element is designated as 208. In some instances, multiple similar but functionally and / or structurally distinguishable elements or components in the same or different figures may be numbered with the same element number (e.g., Figure 1 The numbers 109-1 and 109-N in the figures indicate sequentially. Furthermore, as used herein, indicators such as "N," particularly with respect to reference numerals in the figures, can indicate that multiple such indicated specific features may be included in various embodiments of this disclosure, and their number may be greater than the number shown in the figures. For example, Figure 5 The reference numeral 524-N in the figure can indicate that ANN 525 may contain more than the four sets of logic blocks shown.
[0023] Figure 1 This is a block diagram of a device in the form of a computing system 100 including a host 102 and a memory system 104, according to several embodiments of the present disclosure. As used herein, "device" may refer to, but is not limited to, a variety of structures or combinations of structures. For example, the host 102 and the memory system 104 may each be considered as a "device".
[0024] In this example, computing system 100 includes a host 102 coupled to memory system 104 via interface 103. Host 102 can be a personal laptop, desktop computer, digital camera, mobile phone, memory card reader, or Internet of Things (IoT) enabled device, as well as various other types of systems. Host 102 may include multiple processing resources (e.g., one or more processors, microprocessors, or other types of control circuitry) capable of accessing memory system 104. Host 102 may include a system motherboard and / or backplane and may contain multiple processing resources (e.g., one or more processors, microprocessors, or other types of control circuitry).
[0025] System 100 may contain a separate integrated circuit, or host 102 and memory system 104 may be on the same integrated circuit. System 100 may be, for example, a server system and / or a high-performance computing (HPC) system and / or a part thereof. Although Figure 1 The examples shown illustrate systems with a von Neumann architecture, but embodiments of this disclosure can be implemented in non-von Neumann architectures, which may not include one or more components typically associated with a von Neumann architecture (e.g., CPU, ALU, etc.).
[0026] Host 102 may contain instructions that can be provided to memory system 104 via interface 103. As an example, the instructions may include an ANN instruction 101, which, when provided to memory system 104, enables memory system 104 to use ANNs in memory device 108 (e.g., as shown in 525 and 625 and in combination). Figure 5 and 6 (and as described elsewhere in this document) perform various ANN operations. Although Figure 1 One such memory device is shown, but more than one memory device (collectively referred to as memory device 108) may be included in memory system 104. For example, in several embodiments, multiple memory devices may correspond to multiple storage templates 109-1, ..., 109-N, which can be used to compare biometric identifiers as described herein.
[0027] The interface 103 that couples host 102 to memory system 104 may include, for example, a physical interface employing a suitable protocol (e.g., a data bus, address bus, and command bus, or a combined data / address / command bus). This protocol may be custom or proprietary, or interface 103 may employ a standardized protocol, such as Peripheral Component Interconnect Fast (PCIe), Gen-Z Interconnect, Cache Coherent Interconnect for Accelerators (CCIX), etc.
[0028] Memory system 104 includes controller 106 and memory devices 108. Controller 106 may include state machines, sequencers, and / or other types of control circuitry, and may include hardware and / or firmware (e.g., microcode instructions) in the form of application-specific integrated circuits (ASICs), field-programmable gate arrays, etc. Controller 106 may be local to each memory device 108. In other words, although... Figure 1 A controller 106 is shown, but the memory system 104 may contain multiple controllers, each local to each of the respective multiple memory devices 108.
[0029] Memory device 108 may comprise memory cells arranged in rows coupled by access lines (which may be referred to as word lines or select lines) and columns coupled by sense lines (which may be referred to as digital lines or data lines). For example, the memory cell array may be, but is not limited to, a DRAM array, an SRAM array, an STT RAM array, a PCRAM array, a TRAM array, an RRAM array, a NAND flash memory array, and / or a NOR flash memory array. Memory device 108 may be in the form of multiple individual memory dies and / or different memory layers (e.g., as further described herein) formed as integrated circuits on a chip.
[0030] In several embodiments, the memory device 108 may be three-dimensional (3D) and may include multiple layers stacked together. As an example, the memory device 108 may include a first layer and a second layer, the first layer including logical components (e.g., logic blocks, row drivers, and / or column drivers, such as in combination). Figure 4 As described above), the second layer is stacked on the first layer and includes memory components such as memory cell arrays (e.g., as combined with...). Figure 3 (As described).
[0031] Despite Figure 1 Not shown, but memory system 104 may also include a decoder (e.g., a row / column decoder) which may be controlled by controller 106 to decode address signals, for example, received from host 102. The decoded address signals may be further provided via controller 106 to row / column drivers, which may activate rows / columns of the memory cell array of memory device 108.
[0032] Controller 106 can control the corresponding logic of memory device 108 (e.g., in conjunction with...) Figure 4 The physical locations (e.g., addresses) of logic units (logic 422) and / or memory cells in the described logic block 416 are mapped to corresponding logical addresses, and the mapping information can be stored in lookup table 111. Using lookup table 111, controller 106 can access the logical and / or memory cells of memory device 108 accordingly, and / or track the topology of the ANN implemented within memory device 108 by using the mapping information stored in lookup table 111.
[0033] In various embodiments, controller 106 may configure various portions of memory device 108 as multiple ANNs and, in response to receiving ANN instruction 101, use the memory device 108 configured as an ANN to perform corresponding ANN operations. As used herein, an ANN operation refers to an operation that performs a given task by processing input using artificial neurons. The term "configuration" refers to designating a set of elements as elements of the same network. For example, a specific set of logical blocks may be configured as an ANN such that the specific set of logical blocks is used, for example, to perform a comparison operation of matching biometric identifiers requested to be performed via an ANN. In various embodiments, ANN operations may involve performing various machine learning algorithms to process input. Other tasks that can be processed by performing ANN operations may include computer sensing, speech recognition (e.g., from a user), machine translation and / or social network filtering, and other possible tasks.
[0034] An example of computer sensing is shown at sensor 105. Sensor 105 can be configured to sense a set of biometric identifiers from a source (not shown). In various embodiments, sensor 105 may be one or more image recording devices (e.g., cameras) as a first modality providing still images (e.g., photographs) and / or one or more motion image recording devices as a second modality providing moving images (e.g., video) to enable the extraction and storage of biometric identifiers. Other types of sensors may also be used as various types of modalities to suit the type of biometric identifiers being sensed. In various embodiments, other types of modalities (e.g., sensors) may include sound recording devices for enabling the extraction and storage of biometric identifiers related to speech recognition and odor sensing devices for enabling the extraction and storage of biometric identifiers related to body odor, but other types of sensors are not limited thereto. The operation of sensor 105 may be directed by host 100 and / or ANN instructions 101 to sense the appropriate type of biometric identifiers from the source (e.g., an individual to be identified and / or authenticated). For example, a sensed image containing biometric identifiers may be sent from sensor 105 to memory system 104.
[0035] In several embodiments, the controller 106 and / or memory device 108 of memory system 104 may include a processor 110. Processor 110 may be configured to selectively store inputs of a set of biometric identifiers in a subset of memory cells within an array of memory cells in memory device 108. The subset of memory cells may correspond to a specific subset of the set of biometric identifiers. For example, in a facial recognition operation, such a subset may include a first subset of biometric identifiers associated with the nose of an individual stored in a corresponding first subset of memory cells, a second subset of biometric identifiers associated with the mouth of the individual stored in a corresponding second subset of memory cells, and other possible subsets.
[0036] Processor 110 may be further configured to selectively determine the type of input to be identified from the set of biometric identifiers. For example, the set of biometric identifiers in an image provided by sensor 105 (e.g., sensed based on instructions from host 100 and / or ANN 101) may enable processor 110 to determine the type of biometric comparison being performed. Biometric identifiers in the image may indicate a type such as facial features, fingerprints, DNA, veins and / or ridges on the palm, features of the iris and / or retina of the eye, gait, etc.
[0037] In addition to the multiple memory cell subsets described above for storing subsets of specific biometric identifiers related to facial recognition, the processor 110 may be further configured to selectively store inputs of multiple sets of biometric identifiers in separate memory cell subsets in the array based on a determined type of the biometric identifier. For example, biometric identifiers such as facial features, fingerprints, DNA, veins and / or patterns on the palm, features of the iris and / or retina of the eye, gait, etc., may each be stored separately in corresponding memory cell subsets in the array.
[0038] Processor 110 may be further configured to determine, based on the type of input, multiple subsets (e.g., stored in a specific subset of memory cells) of biometric identifiers to be compared with a particular template among a plurality of templates 109-1, ..., 109-N for identification and / or authentication. For example, a first type of biometric identifier stored in one or more subsets of memory cells on memory device 108 may be compared with storage template 109-1, which may be stored on memory device 108 or on different memory resources (not shown). When stored on different memory resources, storage template 109-1 may be coupled 113-1 (e.g., via a bus) to memory device 108. A second type of biometric identifier stored in one or more different subsets of memory cells on memory device 108 may be compared with storage template 109-N. When stored on different memory resources, storage template 109-N may be coupled 113-N to memory device 108. Alternatively or additionally, for example, for authentication purposes, the template may be stored on a portable memory resource (not shown) that can be presented to system 100 (e.g., host 102 and / or sensor 105). In several embodiments, the portable memory resource may be an ID card, personal digital assistant (PDA), etc., configured to store this template.
[0039] ANNs can be implemented within memory device 108 at various granularities. Memory device 108 contains multiple logic blocks (e.g., multiple sets of 524 logic blocks 516 of ANN 525, such as combined...). Figure 5 In one instance of the described ANN, it can be implemented within a single logic block and / or over multiple logic blocks and / or memory devices (e.g., memory device 108). Each set of logic blocks of an ANN implemented within a memory device can operate independently of each other, such that, for example, multiple ANN operations can be performed simultaneously.
[0040] Figure 2This is a block diagram of one example of a comparison (e.g., using multiple comparison operations 207) of biometric identifiers 213 in memory according to various embodiments of the present disclosure. Multiple encoded inputs x1, x2, ..., xN (e.g., binary numbers) corresponding to a set of biometric identifiers 213-1, 213-2, ..., 213-N (collectively referred to as biometric identifiers 213) can be input from a sensor to a memory system for storage by a corresponding subset of memory cells in memory device 208. As further described herein, an ANN operation 217 can be performed on at least some of the biometric identifiers 213 to compare 207 with biometric identifiers of the corresponding type stored by template 209. As used herein, the ANN operation can be referred to as comparison operation 207 or multiple comparison operations 207, depending on the context. An output 221 can be output as the result of the ANN operation 217, indicating whether the ANN operation 217 performed between at least some of the biometric identifiers 213 and the biometric identifiers stored by template 209 has determined a matching indicator “Y”. In several embodiments, the determined matching indicator “Y” may also correspond to the output 221 of the identification and / or authentication of the source (e.g., a specific individual) sensed by sensor 105.
[0041] ANN and the corresponding logic blocks (e.g., ANN 525 and the corresponding logic block 516 of group 524, as combined) Figure 5 The described biometric identifiers (ANN) can be artificial neural networks that can be used to simulate biological neurons (e.g., neurons in the human brain). Such artificial neurons can sometimes be referred to as perceptrons. The encoded inputs x1, x2, ..., xN corresponding to the set of biometric identifiers can be referred to as stimuli, which can be used as inputs to one or more artificial neurons of the ANN, respectively. Signals corresponding to the encoded inputs x1, x2, ..., xN, such as voltage, current, or specific data values (e.g., binary digits), can be generated in response to sensing biometric identifiers from a source, and such signals can be stored by memory device 208 and input to the circuitry of the ANN to perform ANN operation 217.
[0042] Figure 3 This is a block diagram of an exemplary memory device 308 comprising multiple layers according to various embodiments of the present disclosure. The memory device 308 may be similar to those previously combined... Figure 1 and 2 The memory devices 108 and 208 are described.
[0043] Figure 3The memory device 308 shown is intended to represent a 3D memory device comprising multiple layers stacked together. As an example, a second layer 312 of the memory device 308 is stacked on top of (e.g., on) a first layer 314 of the memory device 308. An array of memory cells may be formed within the second layer 312. The array may be or comprise a DRAM device containing DRAM memory cells. In various embodiments, the array may be or comprise other types of memory devices, such as SRAM, STT RAM, PCRAM, TRAM, RRAM, NAND and / or NOR, and other possibilities.
[0044] The first group of logic blocks (e.g., Figure 5 The logic block 516 shown can be formed within the first layer 314. The logic block is configured to perform various artificial neural network operations, such as comparing data values of biometric identifiers stored in the memory cell array 312 with a stored template. The first group of logic blocks in the first layer 314 can be formed as a complementary metal-oxide-semiconductor (CMOS) array below the array 312. (As in combination...) Figure 4 As further shown, each logic block can also contain row / column drivers. (As combined...) Figure 5 and 6 As described, the memory device 308 may also include multiple sets of logic blocks and / or layers thereof. For example, each set and / or layer of logic blocks may correspond to a comparison of a corresponding type of biometric identifier with an appropriate template. In several embodiments, a first type of biometric identifier may be a set of biometric identifiers for facial recognition, while a second type of biometric identifier may be a set of biometric identifiers for fingerprint recognition.
[0045] Figure 4 This is a block diagram of an exemplary logic block 416 of a memory device according to several embodiments of the present disclosure. (As in conjunction with...) Figure 3 As described, logic block 416 may be one of a plurality of logic blocks contained within a memory device, such as those previously combined separately. Figure 1 , 2 The memory devices 108, 208 and / or 308 described in 3.
[0046] At least one of a plurality of logic blocks (e.g., any one or all) can be a configurable logic block (CLB). A logic block can be a CLB that serves as a basic building block of a field-programmable gate array (FPGA). An FPGA is a chip that can change its data path (e.g., topology) and / or be reprogrammed in the field. For example, a logic block, a set of logic blocks, and / or multiple portions of a set of logic blocks can be programmed or reprogrammed during manufacturing and / or in the field. With this capability, a CLB can be flexibly programmed or switched between comparisons of different types of biometric identifiers (e.g., comparisons with appropriate corresponding templates). For example, a CLB already used as a microprocessor for comparing facial features can be reprogrammed in the field to be used as a microprocessor for retinal features of the eye and other possibilities.
[0047] like Figure 4 As shown, logic block 416 contains logic 422. Logic 422 can be logic based on a lookup table (LUT). For example, the physical location (e.g., address) of logic 422 can be mapped to a logical address, and the mapping information can be stored in a lookup table (e.g., ...). Figure 1 In the lookup table 111 shown in the figure.
[0048] Logic block 416 may further include row driver 418 and column driver 420, which can be enabled to activate the memory array (e.g., previously combined) Figure 3 The described memory array 312 comprises one (or more rows) and / or one (or more columns). As described herein, row driver 418 and column driver 420 can receive address signals decoded by corresponding row decoders and column decoders controllable by a controller, such as those previously combined with Figure 1 The controller 106 is described. Although Figure 4 Not shown, but logic block 416 may also include (e.g., coupled to) multiple data buses (e.g., as shown at 530-0, 530-1, ..., 530-N) and combined Figure 5 As described, the data bus can couple logic block 416 to another logic block and / or another external device (e.g., a device such as controller 106 located outside memory device 308). The data bus of logic block 416 that couples logic block 416 to another logic block may include interconnecting optical fibers, as further described below.
[0049] Figure 5 This is a block diagram of a memory device 508 implementing an ANN 525 according to several embodiments of the present disclosure and a plurality of logic blocks 516 included within the memory device. The memory device 508 can be similar to those previously described, each incorporating... Figure 1 , 2The memory devices 108, 208, and / or 308 described in section 3. In various embodiments, memory device 508 may represent a plurality of memory devices as described herein (collectively referred to as memory device 508). Each memory device 508 may be in the form of a separate memory die, such as a DRAM memory die.
[0050] like Figure 5 As shown in the diagram of logic block 516-A, each logic block may include a first data bus 530 that couples the logic block to another logic block and / or a second data bus 523 that couples the logic block to another device. For example, data bus 523-1 may couple logic block 516-A to a memory array located inside memory device 508 and / or a controller located outside memory device 508. Data bus 523-1 coupled to logic block 516-A may also extend as an exemplary data bus (e.g., an input / output (I / O) boundary) outside memory device 508 to enable data communication between memory device 508 and another device located outside the memory system. For example, memory device 508 may communicate with a host (e.g., ...) via data buses, such as data buses 523-1 and 523-2 (collectively referred to as data bus 523). Figure 1 The host 102 shown in the figure communicates. Therefore, data buses 523 and 530 can be used as interconnecting optical fibers to couple a set of logic blocks 524-1 516-A, 516(A+1), ..., 516-(A+5) to realize the input data path of the logic block and the inter-block data path between logic blocks.
[0051] like Figure 5As shown, multiple groups of logic blocks 524-1, 524-2, ..., 524-N of ANN 525 can be implemented within memory device 508. For example, the first portions 516-A, 516-(A+1), 516-(A+2), 516-(A+3), 516-(A+4), and 516-(A+5) of the multiple logic blocks are configured as the first group 524-1; the second portions 516-B, 516-(B+1), 516-(B+2), 516-(B+3), 516-(B+4), 516-(B+5), 516-(B+6), 516-(B+7), 516-(B+8), 516-(B+9), and 516-(B+N) of the multiple logic blocks are configured as the first group 524-1. 10) and 516-(B+11) are configured as the second group 524-2; the third portions 516-C, 516-(C+1), 516-(C+2), and 516-(C+3) of the plurality of logic blocks are configured as the third group 524-3, and the fourth portions 516-D, 516-(D+1), 516-(D+2), 516-(D+3), 516-(D+4), 516-(D+5), 516-(D+6), 516-(D+7), and 516-(D+8) of the plurality of logic blocks are configured as the Nth group 524-N. Therefore, at least four different groups of ANN 525 are implemented on the plurality of logic blocks 516 of the memory device 508. In various embodiments, the ANN 525 may be implemented at the granularity of one or more of a first portion, a second portion, etc. of a plurality of logic blocks, each of which contains (e.g., is) a single logic block.
[0052] Multiple groups of 524-1, 524-2, ..., 524-N logic blocks 516 (collectively referred to as multiple groups 524) may have different topologies (e.g., logical topologies). In some embodiments, the respective topologies of the multiple groups 524 may correspond to the physical topologies that make up the logic blocks. In one instance where an ANN 525 is implemented on multiple logic blocks, the logical topology of the ANN may correspond to the physical topology of all or each of the multiple logic blocks (e.g., each group 524 is configured as a node of the ANN).
[0053] In several embodiments, the corresponding topologies of multiple sets of 524 may not correspond to the physical topology of the constituent logic blocks. In this example, the controller (e.g., as previously combined) Figure 1 The described controller 106 can, for example, use a lookup table (e.g., as previously combined) Figure 1The described lookup table 111 is used to map (e.g., when the various portions of memory device 508 are configured as multiple groups 524) and track the corresponding topology of each group implemented within memory device 508. The controller can also update the mapping information stored in the lookup table in response to changes in the CLBs of the multiple groups 524. Changes to the multiple groups 524 may include changes to the constituent CLBs of the multiple groups 524 and / or the addition / deletion of multiple groups within the ANN 525 of memory device 508.
[0054] Multiple sets of 524 implemented within the ANN 525 of the memory device 508 can operate independently of each other. In other words, multiple sets of 524 implemented within the memory device 508 can be used to perform multiple ANN operations simultaneously, as further described herein.
[0055] Figure 6 Exemplary models of an ANN 625 according to several embodiments of the present disclosure are shown. The ANN 625 may include or be associated with an input component (not shown) for receiving data values corresponding to one or more sets of biometric identifiers from or associated with an array of memory cells. In several embodiments, the input component may be a processor or may be controlled by a processor, as described herein.
[0056] Data values for each of multiple sets (e.g., different types) of biometric identifiers can be provided by an input component to the corresponding set of logic blocks 624-1, 624-2, ..., 624-N via corresponding data buses 623-1, 624-2, ..., 624-N. In various embodiments, each of the multiple sets of biometric identifiers 624-1, 624-2, ..., 624-N (e.g., as shown at 516 and combined) Figure 5 The described can be coupled by corresponding interconnecting optical fibers 630-0, 630-1, ..., 630-N to serve as a data bus to enable inter-block data paths between logic blocks (e.g., input and output for data and / or comparison operation results between multiple sets of logic blocks, and other possibilities).
[0057] In various embodiments, multiple groups 624-1, 624-2, ..., 624-N can be a single layer 614 (e.g., as in...). Figure 3Different portions of multiple logical blocks (shown at 314 in the diagram) are each assigned to process comparisons of multiple specific biometric identifiers associated with specific features of a certain type of biometric. For example, layer 614 may be configured for biometrics of a facial recognition type. Thus, in various embodiments, group 624-1 may be configured (e.g., with a specific logical topology) for comparisons of biometric identifiers associated with the shape and / or texture of the nose, group 624-2 may be configured for comparisons of the shape and / or texture of the mouth, group 624-3 may be configured for comparisons of the shape and / or texture of the ears, and group 624-N may be configured for comparisons of hairline (e.g., receding hairline, baldness, etc.) and other possible facial recognition features.
[0058] Therefore, exemplary memory devices (e.g., combined with) Figure 5 The memory device 508 of the ANN 525 shown and described may include an array of memory cells for storing a set of biometric identifiers and is configured to be connected to a storage template (e.g., with a combination of...) Figure 1 The controller compares one or more storage templates 209-1, ..., 209-N shown and described to match multiple logical blocks of a subset of the set of biometric identifiers. The controller (e.g., in conjunction with...) Figure 1 The controller 106 shown and described can be coupled to a memory device and can be coupled to multiple logic blocks.
[0059] The controller can be configured to control a first portion of a plurality of logical blocks to receive a first subset of the set of biometric identifiers from the array for performing a first comparison operation thereon. The controller can be further configured to control the first portion of the plurality of logical blocks as ANN 625 to perform a first ANN comparison operation by comparing the first subset of the plurality of biometric identifiers with a storage template in an attempt to find a match. The controller can be further configured to control a second portion of the logical blocks to receive a second subset of the set of biometric identifiers from the array for performing a second comparison operation thereon. The controller can be further configured to control the second portion of the plurality of logical blocks as ANN 625 to perform a second ANN comparison operation by comparing the second subset of the plurality of biometric identifiers with a storage template in an attempt to find a match. The controller can be further configured to control the first and second portions of the plurality of logical blocks to perform the first and second ANN comparison operations simultaneously.
[0060] In several embodiments, a group comprising multiple biometric identifiers may be derived from multiple sensors (e.g., combined). Figure 1The data derived from multiple features in static and / or dynamic images sensed by sensor 105 (shown and described herein) are not limited to such images. A first subset may be a first feature in an image represented by multiple biometric identifiers, which is compared with a corresponding first feature in a stored template via a first ANN operation to attempt to find a first match; while a second subset may be a second feature in an image represented by multiple different biometric identifiers, which is compared with a corresponding second feature in a stored template via a second ANN operation to attempt to find a second match. The source of the image may be identifiable when the identity of the first match corresponds to the identity of the second match and the first and second features are different features in the image.
[0061] Alternatively, the multiple sets of 624-1, 624-2, ..., 624-N can be different portions of multiple logical blocks in corresponding multiple layers 614-1, 614-2, ..., 614-N, each portion being assigned (e.g., through its logical blocks, each logical block having a specific logical topology) to handle the comparison of multiple specific biometric identifiers associated with specific features of corresponding different types of biometrics. For ease of representation of a single layer 614 and multiple layers 614-1, 614-2, ..., 614-N, the multiple sets of 624-1, 624-2, ..., 624-N logical blocks are shown side by side. However, in several embodiments, the multiple sets of 624-1, 624-2, ..., 624-N can be stacked as an array (e.g., combined with...). Figure 3 The corresponding CMOS layers 614-1, 614-2, ..., 614-N below the array 312 shown and described.
[0062] Whether in a single layer 614 or multiple layers 614-1, 614-2, ..., 614-N, each of the multiple sets of logic blocks 624-1, 624-2, ..., 624-N can be coupled to the storage template via corresponding buses 613-1, 613-2, ..., 613-N for processing biometric identifiers received from the memory cell array (e.g., in combination with...). Figure 2The comparison of biometric identifiers 213 shown and described. For example, a first type of biometric identifier stored in a first subset of memory cells of a memory device can be compared by a logic block of group 624-1 with a storage template (e.g., storage template 109-1), which in various embodiments may be stored on the memory device or on a different memory resource (not shown). A second type of biometric identifier stored in a second subset of memory cells can be compared by a logic block of group 624-2 with the same or a different storage template (e.g., storage template 109-N), depending on the manner and / or location of storing data corresponding to the different types of biometric identifiers and / or the configuration of the circuitry used to implement access to this data. Alternatively or additionally, the template may be stored on a portable memory resource configured to store this template, such as an ID card, PDA, etc. Buses 613-1, 613-2, ..., 613-N may be coupled (e.g., wired or wirelessly) to a port that implements access to the template of this portable memory resource.
[0063] Depending on which groups of 624-1, 624-2, ..., 624-N logic blocks are used for comparison, the result of each of the one or more comparison operations performed using the corresponding groups 624-1, 624-2, ..., 624-N can be the outputs 621-1, 621-2, ..., 621-N from the corresponding groups 624-1, 624-2, ..., 624-N. These results can be the outputs 621-1, 621-2, ..., 621-N of the selector component 632.
[0064] For example, a facial recognition operation can be performed where a set of logic blocks 624-1 is specifically configured to compare biometric identifiers related to the shape and / or texture of the nose, a set of blocks 624-2 is specifically configured to compare the shape and / or texture of the mouth, a set of blocks 624-3 is specifically configured to compare the shape and / or texture of one or more ears, and a set of blocks 624-N is specifically configured to compare hairlines (e.g., receding hairline, baldness, etc.) and other possible facial recognition features. Comparisons with a stored template (e.g., a template specified for storing various facial features, but embodiments are not limited to one such template) can produce an output 621-1 that provides a match for a nose of a particular individual, an output 621-2 that provides a match for a mouth of the same individual, an output 621-3 that does not provide a match for ears of any individual, and an output 621-N that provides a match for hairlines of different individuals. As described herein, multiple comparison operations can be performed simultaneously. In some embodiments, multiple comparison operations can be performed simultaneously with respect to a subset of a particular type of biometric (e.g., facial recognition and possibly other types of recognition) (e.g., corresponding to multiple biometric identifiers). The output 621 described above can be provided to the selector component 632.
[0065] Because no match was generated for a specific facial feature with any individual (e.g., no match for the ear biometric identifier in outputs 621-3), the feature can be removed from the collective comparison of facial feature biometric identifiers. Therefore, a match based on the comparison of nose, mouth, and hairline biometric identifiers can provide a set of three matching comparisons, but the number of features and / or comparisons of these biometric identifiers is not limited to this. The failure to generate a match for a specific biometric identifier described herein may be due to the corresponding feature not being sensed by a sensor (e.g., therefore no corresponding comparison operation is performed) or the feature of the biometric identifier being sensed from the source but not stored in the template and / or a matching biometric identifier being detected, and other possibilities. In this example, selector component 632 can select individuals identified by a match of the nose biometric identifier and a match of the mouth biometric identifier as the source of the matching biometric identifier.
[0066] The selection made by the selector component 632 can be based on obtaining multiple matching results by comparing a subset of the set of biometric identifiers and selecting one of the multiple matching results as the source of the set of biometric identifiers, as verified by the majority of the multiple matching results provided by the ANN 625. In various embodiments, the selection of a particular individual can be based on matching as few as one biometric identifier or as many as two biometric identifiers (e.g., for facial recognition), which may depend on the uniqueness and / or universality of each biometric identifier. Thus, this identifier or the absence of an identifier can be provided by the selector component 632 as a result 634 of the comparison operation performed using the ANN 625.
[0067] The array can store a set of biometric identifiers, including first and second subsets of biometric identifiers (e.g., using an input component controlled by processor 110). The first and second subsets of biometric identifiers are distinct biometric identifiers within the set. For example, the first subset could be nose-related biometric identifiers from a set of facial features that can be used in a comparison operation for face recognition, while the second subset could be mouth-related biometric identifiers. The first and second comparison operations can potentially determine a match between the first and / or second subsets and a stored template (e.g., any one of a plurality of stored templates 109-1, ..., 109-N determined to be suitable for the comparison operation). Multiple logical blocks (e.g., as in...) Figure 4 Multiple individual logic blocks shown at position 416 and / or as in Figure 5 The multiple sets of logic blocks shown at point 524 can each be configured to process resources to match a subset of the set of biometric identifiers by comparison with a storage template. The controller can be further configured to control the determination of the identity of the source (e.g., a specific individual) of the set of biometric identifiers (e.g., via selector component 632) based on a combination of a first match determined between a first subset of biometric identifiers and a storage template and a second match determined between a second subset of biometric identifiers and a storage template.
[0068] Another embodiment may include a set of first-type biometric identifiers (e.g., having one or more subsets for facial recognition) compared by the logic block of group 624-1 with a storage template (e.g., storage template 109-1); a set of second-type biometric identifiers (e.g., having one or more subsets for fingerprint recognition) compared by the logic block of group 624-2 with the same or different storage templates (e.g., storage template 109-N); a set of third-type biometric identifiers (e.g., having one or more subsets for gait recognition) compared by the logic block of group 624-3 with the same or different storage templates; and a set of fourth-type biometric identifiers (e.g., having one or more subsets for iris recognition) compared by the logic block of group 624-N with the same or different storage templates. The embodiment is not limited to the comparison of these four or a total of four types of biometric identifiers (e.g., for identifying an individual). In several embodiments, comparisons with different storage templates are intended to indicate that each type of biometric identifier can be compared with an appropriate template storing information (data) from multiple individuals (sources) based on the specific type of biometric identifier.
[0069] In several embodiments, one or more subsets of logic blocks in group 624-1 corresponding to one or more subsets for facial recognition may be formed (e.g., located) in layer 614-1; one or more subsets of logic blocks in group 624-2 corresponding to one or more subsets for fingerprint recognition may be formed in layer 614-2; one or more subsets of logic blocks in group 624-3 corresponding to one or more subsets for gait recognition may be formed in layer 614-3; and one or more subsets of logic blocks in group 624-N corresponding to one or more subsets for iris recognition may be formed in layer 614-N. However, when using multiple layers of logic blocks, the embodiments are not limited to using these four or a total of four separate layers of logic blocks.
[0070] Depending on which groups of 624-1, 624-2, ..., 624-N logic blocks should be used for comparison, the result of each of the one or more comparison operations performed using the corresponding groups 624-1, 624-2, ..., 624-N can be the outputs 621-1, 621-2, ..., 621-N from the corresponding groups 624-1, 624-2, ..., 624-N. These results can be the outputs 621-1, 621-2, ..., 621-N of the selector component 632 of the ANN 625.
[0071] For example, facial recognition operations can be performed, wherein logic block 624-1 is specifically configured to compare biometric identifiers with a first type of comparison, including the shape and / or texture of the nose, mouth, and ears, and / or hairline, as well as other possible facial recognition features. Fingerprint recognition operations can be performed, wherein logic block 624-2 is specifically configured to compare biometric identifiers with a second type of comparison, including arch, whorl, and / or loop patterns, as well as various other fingerprint recognition features. Iris recognition operations can be performed, wherein logic block 624-3 is specifically configured to compare biometric identifiers with a third type of comparison, including the amount and / or location of melanin in the iris (e.g., affecting eye color) and / or patterns produced by iris muscle folding, as well as various other iris recognition features. Speech recognition operations can be performed, wherein logic block 624-N is specifically configured to compare biometric identifiers with a fourth type of comparison, including an individual's behavioral characteristics and / or speech patterns (e.g., tone, accent, rhythm, speaking style, and other possible speech recognition features). One or more of these biometric identifiers used for speech recognition may be influenced by the physiological characteristics of a particular speaker (e.g., the shape and size of the speaker's mouth and / or throat).
[0072] Comparison with multiple suitable stored templates can produce output 621-1 that provides a match for biometric identifiers associated with one or more facial features of a particular individual, output 621-2 that provides a match for biometric identifiers associated with one or more fingerprint features of the same individual, output 621-3 that does not provide a match for the iris of any individual, and output 621-N that provides a match for the voice of a different individual. The number of stored templates can be the number of separate stores for features associated with each type of recognition operation performed, but embodiments are not limited to a specific number of such templates. As described herein, multiple comparison operations can be performed simultaneously. In some embodiments, multiple comparison operations can be performed simultaneously for a subset of multiple types of biometrics (e.g., facial recognition, fingerprint recognition, iris recognition, and / or voice recognition, and possibly other recognition types). The output 621 just described can be provided to the selector component 632 of ANN 625.
[0073] Because no match is generated for a specific biometric with any individual (e.g., no match for the iris biometric identifier in outputs 621-3), the feature can be removed from the collective comparison of biometric identifiers of the corresponding feature. Therefore, a match based on facial, fingerprint, and voice biometric identifier comparisons can provide a set of three matching biometric identifier comparisons, but the number and / or type of comparisons of features and / or these biometric identifiers are not limited to this. In this example, the selector component 632 can select individuals identified by matches of facial feature biometric identifiers and matches of fingerprint feature biometric identifiers as the source of matching biometric identifiers.
[0074] The selection made by the selector component 632 can be based on obtaining multiple matching results by comparing multiple types of biometric identifiers in the group and selecting one of the multiple matching results as the source of the group of biometric identifiers, as verified by the majority of the multiple matching results provided by the ANN 625. In several embodiments, the selection of a particular individual can be based on matching as few as one type of biometric identifier or more than two types of biometric identifiers, which may depend on the uniqueness and / or universality of each biometric identifier and / or the total number of individuals whose identities are stored in the template database, as well as other possible considerations. Thus, this identifier or the absence of an identifier can be provided by the selector component 632 as a result 634 of the comparison operation performed using the ANN 625.
[0075] In several embodiments, the set of multiple biometric identifiers may be data derived from multiple features in multiple static and / or dynamic images sensed by sensor 105, but embodiments of the ANN comparison operation described herein are not limited to such images. A first feature represented by multiple biometric identifiers in a first image may be sensed using a first modality, and a second feature represented by multiple different biometric identifiers in a second image may be sensed using a second modality different from the first modality. For example, the first feature may be the face or a subset of the face (e.g., nose) of an individual sensed in a static image modality (e.g., via a camera), and the second feature may be the gait of an individual sensed in a dynamic image modality (e.g., via a video recorder). The subset of gait recognition that can be used as biometric identifiers may include modes of walking and / or running, each of which may include stride length and / or stride length, cadence and / or walking speed, foot angle, hip angle and / or forward, backward and / or lateral tilt angles, and other possibilities (e.g., which may be better derived from the dynamic image modality relative to the static image modality).
[0076] Other modalities may be particularly well-suited for fingerprint recognition, iris recognition, retinal recognition, body odor recognition, and / or voice recognition, as well as other possible recognition types. For example, fingerprint recognition has a variety of possible modalities. These modalities include and can be selected from: optical readers (e.g., digital cameras) configured to sense and provide a visual image of a fingerprint; capacitive readers (e.g., CMOS readers) that use capacitors and current to form an image of a fingerprint; ultrasonic readers that use high-frequency sound waves to penetrate the outer layer of skin to form an image of a fingerprint from the subcutaneous layer (e.g., clean, scar-free, etc.); and thermal readers that sense the temperature difference between the ridges and valleys of a fingerprint on a contact surface to form an image of a fingerprint.
[0077] The modality of iris recognition may differ from that of retinal recognition. The folding of the muscle rings that produce the random patterns of the iris is an external feature that can be sensed using a camera in a static image (e.g., by photographing the outer surface of the eye) as a modality for detection in visible light with sufficient resolution. In contrast, the random patterns generated by the blood vessels responsible for the blood supply to the retina can be detected by sensing the back of the eye using a sensor (e.g., a retinal scanner) specifically configured as a different modality (e.g., scanning retinal patterns using a retinal scanner containing a low-energy infrared light source).
[0078] The first subset can be a first feature in a static image, which is compared with a corresponding first feature in a first stored template (e.g., template 109-1) through a first ANN comparison operation to attempt to find a first match; while the second subset can be a second feature in a dynamic image, which is compared with a corresponding second feature in a second stored template (e.g., template 109-N) through a second ANN comparison operation to attempt to find a second match. The source of the image can be identifiable when the multimodal comparison indicates that the identity of the first match corresponds to the identity of the second match.
[0079] In several embodiments, ANN 625 may include a first layer (e.g., as shown at 314 and combined with it). Figure 3 The described layer corresponds to layer 614-1, where a first portion of a plurality of logic blocks is specifically configured to perform a first ANN comparison operation on a first feature; and a second layer (e.g., layer 614-2), which is stacked on the first layer, where a second portion of a plurality of logic blocks is specifically configured to perform a second ANN operation on a second feature. ANN 625 may also include a third layer that can be stacked on the second layer. The third layer may be a memory cell array formed therein (e.g., as shown at 312 and combined with...). Figure 3 The layer described.
[0080] Figure 7An exemplary flowchart of a method 740 for comparing biometric identifiers in memory according to several embodiments of the present disclosure is shown. Unless explicitly stated otherwise, the elements of the methods described herein are not limited to a particular order or sequence. Furthermore, the various method embodiments described herein, or elements thereof, may be performed at the same or substantially the same point in time.
[0081] In 742, method 740 may include a first set of logic blocks controlling the ANN to be used in conjunction with a storage template (e.g., as in combination with...). Figure 4-6 A first comparison operation is performed on a first subset of a set of biometric identifiers by comparing them with multiple sets of logic blocks and subsets thereof shown elsewhere in this document. At 744, method 740 may include independently controlling a second set of logic blocks of the ANN to perform a second comparison operation on a second subset of the set of biometric identifiers by comparing them with a stored template. At 746, method 740 may include performing the first comparison operation and the second comparison operation simultaneously.
[0082] The first and second sets of logic blocks of the ANN mentioned in blocks 742 and 744 can be part of the same memory device (e.g., as shown and combined at 108, 208, 308 and / or 508 respectively). Figure 1 , 2 (As described in blocks 742 and 744). The storage templates mentioned in blocks 742 and 744 are intended to represent one or more storage templates (e.g., as shown at 109-1, ..., 109-N and combined). Figure 1 (As described elsewhere in this document), this depends on whether all applicable features corresponding to one or more biometric identification types are stored in a single template or in multiple templates (e.g., each template corresponds to a specific identification type).
[0083] In several embodiments, method 740 may further include configuring the memory device in CMOS below the memory cell array (e.g., as shown at 314 and in conjunction with...). Figure 3 (As described elsewhere in this document) comprises a first part and a second part of an ANN corresponding to the corresponding first and second group logic blocks. These parts may correspond to the values shown at 524 and 624 respectively, and in combination. Figure 5 and 6 The described multiple sets of logic blocks, and / or may correspond to combinations Figure 6 The multiple layers 614 are described. At least one of the multiple logic blocks may be in each of the first and second parts of the ANN (e.g., as shown in the group 524 and combined). Figure 5 and 6(As described). Therefore, the method may further include receiving data containing a first subset of the set of biometric identifiers from a memory cell array at a first subset of the logical block, and receiving data containing a second subset of the set of biometric identifiers from a memory cell array at a second subset of the logical block.
[0084] The first and second comparison operations can be part of a plurality of comparison operations performed in a corresponding group of logic blocks using an ANN. The plurality of comparison operations can be a subset of recognition operations. For example, a facial recognition operation can be performed using a subset that includes comparisons of biometric identifiers associated with the shape and / or texture of the nose, the shape and / or texture of the mouth, the shape and / or texture of one or more ears and / or the hairline, and other possible facial recognition features.
[0085] Alternatively or additionally, multiple comparison operations may correspond to the execution of multiple different recognition operations as a subset of combined recognition operations. For example, a facial recognition operation may be performed to compare biometric identifiers associated with the shape and / or texture of the nose, mouth, and ears and / or hairline, as well as other possible facial recognition features. A fingerprint recognition operation may be performed to compare biometric identifiers associated with arch, whorl, and / or loop patterns, as well as various other fingerprint recognition features. An iris recognition operation may be performed to compare biometric identifiers associated with the amount and / or location of melanin in the iris and / or patterns produced by iris muscle folding, as well as various other iris recognition features. A speech recognition operation may be performed to compare biometric identifiers associated with an individual's behavioral characteristics and / or speech patterns, as well as other possible speech recognition features. In various embodiments, these multiple different recognition operations may be used as a subset of combined recognition operations, as described herein.
[0086] Method 740 may further include obtaining multiple matching results by comparing a subset of the set of biometric identifiers and selecting one of the multiple matching results as the source of the set of biometric identifiers, as verified by the majority of the multiple matching results provided by the ANN. In several embodiments, the multiple matching results may be selected by a selector component (e.g., as shown at 632) and combined with... Figure 6 The selector component can also perform the following: select one of multiple matching results as the source of the set of biometric identifiers (e.g., a specific individual) (e.g., as combined with...). Figure 6 (As described).
[0087] Method 740 may further include sensing the set of biometric identifiers via a biometric modality and performing first and second comparison operations on corresponding first and second subsets of the set of biometric identifiers. For example, in a face recognition operation, a single biometric modality corresponding to one or more still image recording devices (e.g., multiple cameras used as sensor 105) may be used to sense and record a subset of the set of biometric identifiers used to perform the face recognition operation. As previously described, these subsets may include the shape and / or texture of the nose, the shape and / or texture of the mouth, the shape and / or texture of one or more ears and / or hairline, and other possible facial recognition features.
[0088] Method 740 may further include sensing the set of biometric identifiers via a variety of biometric modalities. The types of biometric modalities described herein include, but are not limited to, still image recording devices (e.g., digital cameras) that provide still images (e.g., photographs), moving image recording devices that provide moving images (e.g., videos), various devices described herein for fingerprint imaging, sound recording devices, odor sensing devices, retinal scanning devices, and various other suitable biometric modalities that can be used to perform the biometric identification operations described herein or otherwise.
[0089] Multiple biometric modalities can be used to perform biometric identification operations (e.g., to identify and / or authenticate a specific individual), said biometric identification operations combining at least two of facial recognition, gait recognition, fingerprint recognition, iris recognition, retinal recognition, and / or voice recognition operations. For example, a first modality for facial recognition could be a digital camera, a second modality for gait recognition could be a video recorder, a third modality for fingerprint recognition could be a capacitive reader, a fourth modality for retinal recognition could be a retinal scanner, and / or a fifth modality for voice recognition could be a sound recording device. Therefore, first and second comparison operations can be performed on corresponding first and second subsets of at least two of a set of biometric identifiers from a plurality of combinations of biometric identification operations. In various embodiments, other identification operations and / or modalities described herein or otherwise can be added and / or removed from this set of identification operations and modalities (e.g., based on the expected determinism, convenience, and / or security of the combined identification operations).
[0090] Figure 8 An exemplary machine of computer system 800 is shown, within which a set of instructions can be executed to cause the machine to perform the various methods discussed herein. In various embodiments, computer system 800 may correspond to including, coupled to, or utilizing a memory subsystem (e.g., Figure 1 The memory system 104) system (e.g., Figure 1 The system 100) or can be used to execute a controller (e.g., Figure 1 The machine operates as a controller (106). In an alternative embodiment, the machine may be connected (e.g., networked) to other machines in a LAN, intranet, extranet, and / or the Internet. The machine may operate as a server or client machine in a client-server network environment, as a peer-to-peer machine in a peer-to-peer (or distributed) network environment, or as a server or client machine in a cloud computing infrastructure or environment.
[0091] The machine may be a personal computer (PC), tablet PC, set-top box (STB), PDA, cellular phone, network device, server, network router, switch, or bridge, or any machine capable of executing a set of instructions (sequential or otherwise) specifying the action to be taken by the machine. Furthermore, although a single machine is shown, the term "machine" should also be considered as any collection of machines that individually or jointly execute a set (or more) of instructions to perform any of the methods discussed herein.
[0092] The exemplary computer system 800 includes a processing unit 850, a main memory 852 (e.g., read-only memory (ROM), flash memory, dynamic random access memory (DRAM) such as synchronous DRAM (SDRAM) or Rambus DRAM (RDRAM), etc.), a static memory 858 (e.g., flash memory, static random access memory (SRAM), etc.), and a data storage system 859, which communicate with each other via a bus 857.
[0093] Processing device 850 represents one or more general-purpose processing devices, such as microprocessors, central processing units (CPUs), etc. More specifically, processing device 850 may be a Complex Instruction Set Computing (CISC) microprocessor, a Reduced Instruction Set Computing (RISC) microprocessor, a Very Long Instruction Word (VLIW) microprocessor, or a processor implementing other instruction sets or combinations of instruction sets. Processing device 850 may also be one or more special-purpose processing devices, such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), digital signal processors (DSPs), network processors, etc. Processing device 850 is configured to execute instructions 851 to perform the operations and steps discussed herein. Computer system 800 may further include network interface device 854 for communication via network 856.
[0094] The data storage system 859 may include a machine-readable storage medium 860 (also referred to as a computer-readable medium) on which one or more sets of instructions 851 or software embodying any one or more methods or functions described herein are stored. The instructions 851 may also reside wholly or at least partially within main memory 852 and / or processing device 850 during execution by computer system 800, which also constitute machine-readable storage media.
[0095] In several embodiments, instruction 851 may include instructions for implementing and Figure 1 Instructions corresponding to the functions of host 102 and / or memory system 104. Although machine-readable storage medium 860 is shown as a single medium in one exemplary embodiment, the term "machine-readable storage medium" should be considered as a single medium or multiple media containing one or more sets of instructions. The term "machine-readable storage medium" should also be considered as any medium capable of storing or encoding a set of instructions executable by a machine and causing the machine to perform any one or more methods of this disclosure. Therefore, the term "machine-readable storage medium" should be considered as including, but not limited to, solid-state memory, optical media, and magnetic media.
[0096] Figure 9 Another exemplary model of an ANN 965 according to various embodiments of the present invention is shown. The ANN 965 may comprise an ANN layer 974 (e.g., an input layer) having nodes 966-1 to 966-N, the nodes receiving various inputs, such as those previously combined. Figure 2 The inputs x1 to xN are described. Each node of an ANN layer (e.g., ANN layers 974, 975-1, 975-2, 975-3, and 978) can correspond to an artificial neuron as described in this paper.
[0097] ANN 965 can contain ANN layers 975-1 to 975-3. ANN layer 975-1 can contain nodes 968-1 to 968-L. As shown in interconnect region 976-1, each of the corresponding nodes 968-1 to 968-L can be coupled to receive input from nodes 966-1 to 966-N. ANN layer 975-2 can contain nodes 970-1 to 970-L. As shown in interconnect region 976-2, each of the corresponding nodes 970-1 to 970-L can be coupled to receive input from nodes 968-1 to 968-L. ANN layer 975-3 can contain nodes 972-1 to 972-L. As shown in interconnect region 976-3, each of the corresponding nodes 972-1 to 972-L can be coupled to receive input from nodes 970-1 to 970-L. The ANN 965 can be configured during training, where each connection in interconnect region 976 is assigned a weight value or updated with new weight values for operations or computations at nodes 968, 970, or 972. The training process may vary depending on the specific application or the use of the ANN 965. For example, an ANN can be trained for image recognition, speech recognition, or any number of other processing or computational tasks.
[0098] An ANN 965 can include an output layer 978 with output nodes 979-1 to 979-K. Each of the corresponding output nodes 979-1 to 979-K can be coupled to receive input from nodes 972-1 to 972-L. The process of receiving the outputs at output layers 978 and output nodes 979 as inputs to nodes 966 at ANN layer 974 can be referred to as inference or forward propagation. That is, input signals representing some real-world phenomenon or application can be fed into the trained ANN 965, and results can be output through inference performed by computations implemented by the individual nodes and interconnections. In the case of an ANN 965 trained for speech recognition, the input can be a signal representing human speech in one language, and the output can be a signal representing human speech in a different language. Alternatively, for an ANN 965 trained for image recognition, the input can be a signal representing a photograph, and the output can be a signal representing the subject in the photograph.
[0099] As described in this paper, multiple ANNs can be configured within a memory device. Multiple ANNs can be trained individually (locally or remotely), and the trained ANNs can be used for inference within the memory device. Multiple ANNs can perform the same or different functions. They can have the same or different weights relative to each other.
[0100] In the above detailed description of this disclosure, reference has been made to the accompanying drawings, which form part of this disclosure, and wherein one or more embodiments of this disclosure are illustrated by way of illustration. These embodiments have been described in sufficient detail to enable those skilled in the art to practice the embodiments of this disclosure, and it should be understood that other embodiments may be utilized and process, electrical, and / or structural changes may be made without departing from the scope of this disclosure.
[0101] It should be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms “a” and “the” include both singular and plural indicators unless the context clearly specifies otherwise, as do “a number of,” “at least one,” and “one or more” (e.g., multiple memory arrays may refer to one or more memory arrays), while “plurality of / multiple” is intended to refer to more than one such thing. Furthermore, in this application, the word “may / can” is used in a permissive sense (i.e., has the potential to, is able to) rather than in a mandatory sense (i.e., must). The term “comprising” and its derivatives mean “including but not limited to.” The term “coupled / coupling” refers to a direct or indirect physical connection and, unless otherwise stated, may include wireless connections for accessing and / or moving (transmitting) instructions (e.g., control signals, address signals, etc.) and data, depending on the context.
[0102] While exemplary embodiments comprising various combinations and configurations of structural materials, logic blocks, identification operations, biometric identifiers, biometric modalities, controllers, processing resources, input types, storage templates, memory devices and memory cell arrays, and other materials and / or components related to the comparison of biometric identifiers in memory have been shown and described herein, embodiments of this disclosure are not limited to those combinations expressly listed herein. Other combinations and configurations of structural materials, logic blocks, identification operations, biometric identifiers, biometric modalities, controllers, processing resources, input types, storage templates, memory devices and memory cell arrays, and other materials and / or components related to the comparison of biometric identifiers in memory, in addition to those disclosed herein, are expressly included within the scope of this disclosure.
[0103] Although specific embodiments have been shown and described herein, those skilled in the art will understand that arrangements that achieve the same results can be substituted for the specific embodiments shown. This disclosure is intended to cover adaptations or variations of the various embodiments of this disclosure. It will be understood that elements shown in the various embodiments herein may be added, exchanged, and / or eliminated to provide several other embodiments of this disclosure. Furthermore, the ratios and relative proportions of the elements provided in the drawings are intended to illustrate various embodiments of this disclosure and are not intended to be limiting.
[0104] It should be understood that the above description is illustrative and not restrictive. After reading the above description, combinations of the above embodiments and other embodiments not specifically described in the text will be apparent to those skilled in the art. The scope of the various embodiments of this disclosure includes other applications using the above structures and methods. Therefore, the scope of the various embodiments of this disclosure should be determined by referring to the appended claims and the full scope of their equivalents.
[0105] In the foregoing detailed embodiments, for the purposes of this disclosure, various features are grouped in a single embodiment. The method of this disclosure should not be construed as reflecting an intention that the disclosed embodiments of this disclosure must use more features than expressly recited in each claim. Rather, as reflected in the following claims, the subject matter of the invention lies in fewer than all features of a single disclosed embodiment. Therefore, the following claims are thereby incorporated into the detailed embodiments, wherein each claim exists independently as a separate embodiment.
Claims
1. A memory device comprising: a second tier of memory devices (108, 208, 308, 508) stacked on a first tier of memory devices, wherein an array of memory cells (312) is formed in the second tier; the first tier, within the first tier, a plurality of logic blocks (416, 516) formed in a complementary metal-oxide-semiconductor (CMOS) (314) under the array; and a controller (106) coupled to the plurality of logic blocks, wherein the controller is configured to: control a first portion (516-A, 516-(A+1), 516-(A+2), 516-(A+3), 516-(A+4), 516-(A+5)) of the plurality of logic blocks to receive a first subset of a set of biometric identifiers from the array and perform a first comparison operation thereon; and control a second portion (516-B, 516-(B+1), 516-(B+2), 516-(B+3), 516-(B+4), 516-(B+5), 516-(B+6), 516-(B+7), 516-(B+8), 516-(B+9), 516-(B+10), 516-(B+11)) of the logic blocks to receive a second subset of the set of biometric identifiers from the array and perform a second comparison operation thereon; wherein the first and second subsets of biometric identifiers are different biometric identifiers; and wherein the first and second comparison operations are performed to determine a match of the first and second subsets, respectively, to a stored template (109-1, 109-N).
2. The device of claim 1, wherein the first and second comparison operations are performed to determine a match of the first and second subsets, respectively, to any of a plurality of stored templates.
3. The device of claim 1, wherein the controller is configured to store the set of biometric identifiers in the array, the set of biometric identifiers including the first and second subsets of biometric identifiers.
4. The device of claim 1, wherein the plurality of logic blocks are each configured to match a respective subset of the set of biometric identifiers by comparison to the stored template.
5. The device of claim 1, wherein the controller is further configured to control a determination of an identity of a source of the set of biometric identifiers based on a combination of a first match determined between the first subset of the set of biometric identifiers and the stored template and a second match determined between the second subset of the set of biometric identifiers and the stored template.
6. The device of any one of claims 1-5, wherein the device further comprises a sensor (105) configured to sense the set of biometric identifiers from a source.
7. The device of any one of claims 1-5, wherein the first portion and the second portion of the plurality of logic blocks are each a respective single logic block. 8. The apparatus of any one of claims 1-5, wherein at least one of the plurality of logic blocks is a configurable logic block (CLB).
9. The apparatus of claim 1, wherein: the controller further comprises a processor (110) configured to selectively store inputs of the first and second subsets of biometric identifiers in a subset of memory cells in the array, wherein the subset of memory cells corresponds to a respective subset of the set of biometric identifiers; and the controller is further configured to control: the first portion of the plurality of logic blocks to receive the first subset of biometric identifiers moved from a corresponding first subset of memory cells via a first data bus; and the second portion of the plurality of logic blocks to receive the second subset of biometric identifiers moved from a corresponding second subset of memory cells via a second data bus.
10. The apparatus of claim 1, wherein: the controller further comprises a processor (110) configured to selectively: determine, from the set of biometric identifiers, an input type to be identified; and determine, from the input type, a plurality of subsets of biometric identifiers to be compared for identification; the controller is further configured to control: based on the first portion of the plurality of logic blocks being specifically configured to compare the first subset of the set of biometric identifiers to the stored template, move the first subset to the first portion; and based on the second portion of the plurality of logic blocks being specifically configured to compare the second subset of the set of biometric identifiers to the stored template, move the second subset to the second portion.
11. A memory apparatus comprising: a second tier of memory devices (108, 208, 308, 508) stacked on a first tier of memory devices, wherein an array of memory cells is formed in the second tier; the first tier, within the first tier, a plurality of logic blocks (416, 516) formed in complementary metal-oxide-semiconductor (CMOS); and a controller (106) coupled to the plurality of logic blocks, wherein the controller is configured to: control a first portion (516-A, 516-(A+1), 516-(A+2), 516-(A+3), 516-(A+4), 516-(A+5)) of the plurality of logic blocks as an artificial neural network (ANN) (525, 625) to perform a first ANN operation, wherein the first ANN operation is comparing a first subset of a plurality of biometric identifiers to a stored template for a match; controlling a second portion of the plurality of logic blocks (516-B, 516-(B+1), 516-(B+2), 516-(B+3), 516-(B+4), 516-(B+5), 516-(B+6), 516-(B+7), 516-(B+8), 516-(B+9), 516-(B+10), 516-(B+11)) as ANNs to perform a second ANN operation, wherein the second ANN operation is comparing a second subset of the plurality of biometric identifiers to the stored templates to find a match; and controlling the first and second portions of the plurality of logic blocks to perform the first and second ANN operations simultaneously.
12. The device of claim 11, wherein the array of memory cells is formed as dynamic random access memory (DRAM) cells in a DRAM device.
13. The device of any of claims 11-12, wherein: the plurality of biometric identifiers are data derived from a plurality of features in an image; the first subset is a first feature in the image that the first ANN operation compares to a corresponding first feature in the stored templates to find a first match; the second subset is a second feature in the image that the second ANN operation compares to a corresponding second feature in the stored templates to find a second match; when the identity of the first match corresponds to the identity of the second match, the source of the image is identifiable; and the first and second features are different features in the image.
14. The device of any of claims 11-12, wherein: the plurality of biometric identifiers are data derived from features in a plurality of images; a first feature in a first image is sensed using a first modality and a second feature in a second image is sensed using a second modality different than the first modality; the first subset is the first feature in the first image that the first ANN operation compares to a corresponding first feature in a first stored template to find a first match; the second subset is the second feature in the second image that the second ANN operation compares to a corresponding second feature in a second stored template to find a second match; and when a multi-modal comparison indicates that the identity of the first match corresponds to the identity of the second match, the source of the image is identifiable.
15. The device of any of claims 11-12, wherein the stored templates are stored on one of the memory device, a memory resource coupled to the memory device, and a portable memory resource presentable to the device.
16. A method for comparing biometric identifiers in memory, comprising: controlling a first set of logic blocks (416, 516) of an artificial neural network (ANN) (525, 625) to: receive data including a first subset of a set of biometric identifiers from an array of memory cells; and controlling a second portion of the plurality of logic blocks (516-B, 516-(B+1), 516-(B+2), 516-(B+3), 516-(B+4), 516-(B+5), 516-(B+6), 516-(B+7), 516-(B+8), 516-(B+9), 516-(B+10), 516-(B+11)) as ANNs to perform a second ANN operation, wherein the second ANN operation is comparing a second subset of the plurality of biometric identifiers to the stored templates to find a match; and controlling the first and second portions of the plurality of logic blocks to perform the first and second ANN operations simultaneously. performing a first comparison operation (742) on the first subset of the set of biometric identifiers by comparison to the stored templates; controlling a second set of logic blocks of the ANN to: receive data comprising a second subset of the set of biometric identifiers from the array; and performing a second comparison operation (744) on the second subset of the set of biometric identifiers by comparison to the stored templates; and performing the first comparison operation and the second comparison operation concurrently (746); wherein the first set of logic blocks and the second set of logic blocks of the ANN are formed in a first tier of a memory device (108, 208, 308, 508) in a complementary metal-oxide-semiconductor (CMOS) under the array; and wherein the array is formed in a second tier of the memory device stacked on the first tier.
17. The method of claim 16, further comprising: configuring the memory device to include a first portion of the ANN and a second portion of the ANN corresponding to the respective first set of logic blocks and the second set of logic blocks in a complementary metal-oxide-semiconductor (CMOS) under an array of memory cells; and including at least one of the plurality of logic blocks in each of the first portion and the second portion of the ANN.
18. The method of claim 17, further comprising: receiving data comprising the first subset of the set of biometric identifiers from the array of memory cells at a first subset of logic blocks; and receiving data comprising the second subset of the set of biometric identifiers from the array of memory cells at a second subset of logic blocks.
19. The method of any one of claims 16-18, wherein the first comparison operation and the second comparison operation are part of a plurality of comparison operations performed using respective sets of the logic blocks of the ANN, and wherein the method further comprises: obtaining a plurality of match results by comparison of the subsets of the set of biometric identifiers; and selecting one of the plurality of match results as a source of the set of biometric identifiers as verified by a majority of the plurality of match results provided by the ANN.
20. The method of any one of claims 16-18, further comprising: sensing the set of biometric identifiers via a biometric modality; and performing the first and the second comparison operations on the respective first and second subsets of the set of biometric identifiers.
21. The method of any one of claims 16-18, further comprising: sensing the set of biometric identifiers via a plurality of biometric modalities, the plurality of biometric modalities comprising at least two of: facial recognition; fingerprint recognition; gait recognition; iris recognition; retinal recognition; or voice recognition; and performing the first and the second comparison operations on the respective first and second subsets of the at least two of the set of biometric identifiers.
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