Low noise amplifier and signal receiving circuit

Abstract

The present invention discloses a low noise amplifier and a signal receiving circuit. The low noise amplifier includes a bias current generating circuit, a first transconductance amplifier, a second transconductance amplifier and a low pass filter. The input end of the low pass filter is connected to the output end of the first transconductance amplifier, the filter input end of the second transconductance amplifier is connected to the output end of the low pass filter, the output end of the second transconductance amplifier is connected to the feedback input end of the first transconductance amplifier, and the bias current generating circuit provides bias current for the first transconductance amplifier and the second transconductance amplifier; the signal receiving circuit includes an input circuit, a low noise amplifier, a buffer circuit, and a secondary circuit which are electrically connected in sequence. The low noise amplifier of the present invention has the characteristics of low power consumption, high power supply rejection ratio, rail-to-rail output, and the advantages that the gain does not change with the process, power supply voltage and temperature; the signal receiving circuit with the low noise amplifier can effectively improve the sensing range of the receiver when used in the receiver.

Description

Technical Field

[0001] The present invention relates to the technical field of signal circuits, and in particular to a low noise amplifier and a signal receiving circuit. Background Art

[0002] There are many wireless electronic fence systems on the market that are used to limit the range of animal activities. The system includes two parts: a transmitter and a receiver.

[0003] Among them, the receiver is worn on the animal as a wearable device, so its size and power consumption limit the comfort of the animal and the battery life of the wearable device. At present, most manufacturers' receivers are implemented with discrete components, which often have problems such as large size, high power consumption, poor reliability, and high cost.

[0004] For cost considerations, existing receivers are generally powered by button batteries, and the internal impedance of button batteries is generally very large. When the stimulation and warning modules inside the receiver are working, they will draw an instantaneous current of hundreds of mA from the battery, resulting in large ripples on the power supply. Therefore, in a system powered by a button battery, when the stimulation and warning modules are working, the received signal will be blocked, causing the receiver to malfunction.

[0005] In addition, the application of infinite electronic fence requires the receiver to have very high sensitivity, which means that the first-stage amplifier of the receiver needs to provide sufficiently small noise. However, noise and power consumption are contradictory. Although some manufacturers can provide a reaction distance of up to 6m, they have to pay the price of 2mA static power consumption, that is, a 100mAh battery can only support about 2 days.

[0006] The signal-to-noise ratio can be improved by limiting the signal bandwidth, but bandwidth limitation will cause the receiver to be extremely sensitive to harmonics. Therefore, in order to reduce the top and bottom distortion of the received signal, the first-stage amplifier is required to have a sufficiently large output dynamic range. Summary of the invention

[0007] The present invention provides a low noise amplifier and a signal receiving circuit to solve the above technical problems.

[0008] In order to achieve the above object, the technical solution adopted by the present invention is:

[0009] According to a first aspect of an embodiment of the present invention, a low-noise amplifier is provided for amplifying an input analog signal provided by an input circuit, comprising a bias current generating circuit, a first transconductance amplifier, a second transconductance amplifier and a low-pass filter, wherein the input end of the first transconductance amplifier is connected to the input analog signal, the input end of the low-pass filter is connected to the output end of the first transconductance amplifier, the filter input end of the second transconductance amplifier is connected to the output end of the low-pass filter, and the output end of the second transconductance amplifier is connected to the feedback input end of the first transconductance amplifier: the output end of the bias current generating circuit is respectively connected to the first transconductance amplifier and the second transconductance amplifier, and the bias current generating circuit provides bias current for the first transconductance amplifier and the second transconductance amplifier.

[0010] Preferably, the bias current generating circuit comprises a bias resistor R B MOS tube T1, MOS tube T2, MOS tube T3, MOS tube T4, MOS tube T5 and MOS tube T6, the source of MOS tube T2 and the source of MOS tube T6 are connected to the second power supply, the gate of MOS tube T1 and the drain of MOS tube T2 are connected, the gate of MOS tube T2 and the drain of MOS tube T4 are connected, the drain of MOS tube T1, the drain of MOS tube T3, the gate of MOS tube T3, the gate of MOS tube T4 and the gate of MOS tube T5 are connected, and the source of MOS tube T3, the source of MOS tube T4 and the source of MOS tube T5 are all connected to the first power supply;

[0011] The bias resistor R B The connection in the bias current generating circuit makes the transconductance of MOS tube T1 only connected to the bias resistor R B The connection form is:

[0012] Bias resistor R B One end is connected to the source of MOS tube T1, and the bias resistor R B The other end is connected to the second power supply, and the gate of the MOS tube T1 and the gate of the MOS tube T2 are connected; or, the bias resistor R B One end is connected to the gate of MOS tube T1, and the bias resistor R B The other end of is connected to the gate of the MOS tube T2, and the source of the MOS tube T1 is connected to the second power supply.

[0013] Preferably, the first transconductance amplifier includes MOS transistor T7, MOS transistor T8, MOS transistor T10, MOS transistor T11, MOS transistor T12 and MOS transistor T13, the source of MOS transistor T12 is connected to the signal output end of the input circuit, the gate of MOS transistor T7 and the gate of MOS transistor T8 are connected to the gate of MOS transistor T3, the drain of MOS transistor T7, the drain of MOS transistor T10, the gate of MOS transistor T12 and the gate of MOS transistor T13 are connected, the source of MOS transistor T7 and the source of MOS transistor T8 are connected to the first power supply, the source of MOS transistor T13 is connected to the second power supply, the drain of MOS transistor T8 is connected to the drain of MOS transistor T11 to form an output end, the source of MOS transistor T11 is connected to the drain of MOS transistor T13 to form a first feedback end Vp, the source of MOS transistor T10 is connected to the drain of MOS transistor T12 to form a second feedback end Vn, and the first feedback end Vp and the second feedback end Vn constitute the feedback input end of the first transconductance amplifier.

[0014] Preferably, the second transconductance amplifier includes MOS tube T9, MOS tube T14 and MOS tube T15, the source of MOS tube T9 is connected to the first power supply, the source of MOS tube T14 and the source of MOS tube T15 are both connected to the drain of MOS tube T9, the gate of MOS tube T14 is the filter input terminal of the second transconductance amplifier, the gate of MOS tube T15 is the reference voltage input terminal, the drain of MOS tube T14 is connected to the first feedback terminal Vp of the first transconductance amplifier, and the drain of MOS tube T15 is connected to the second feedback terminal Vn of the first transconductance amplifier.

[0015] Preferably, the bias current generating circuit is connected to the first power supply and has a first current output terminal and a second current output terminal;

[0016] The first transconductance amplifier includes MOS transistors T21, T22, T23 and T24, the gate of MOS transistor T21 and the gate of MOS transistor T22 are connected, the gate of MOS transistor T23 and the gate of MOS transistor T24 and the drain of MOS transistor T23 are connected, the drain of MOS transistor T22 and the drain of MOS transistor T24 are connected to form an output end and a feedback input end, and the source of MOS transistor T21 and the source of MOS transistor T22 are both connected to the first current output end of the bias current generating circuit;

[0017] The second transconductance amplifier includes MOS tube T25, MOS tube T26, MOS tube T27 and MOS tube T28, the gate of MOS tube T25 is the filter input terminal of the second transconductance amplifier, the gate of MOS tube T27, the gate of MOS tube T28, the drain of MOS tube T26 and the drain of MOS tube T28 are connected, the drain of MOS tube T25 and the drain of MOS tube T27 are both connected to the feedback input terminal of the first transconductance amplifier, the source of MOS tube T25 and the source of MOS tube T26 are both connected to the second current output terminal of the bias current generating circuit, and the source of MOS tube T27 and the source of MOS tube T28 are connected to the second power supply;

[0018] The connection form between the low noise amplifier and the input circuit is:

[0019] The source of the MOS transistor T24 is connected to the signal output end of the input circuit, the source of the MOS transistor T23 is connected to the second power supply, the gate of the MOS transistor T21 and the gate of the MOS transistor T22 are connected, and the gate of the MOS transistor T26 and the drain of the MOS transistor T26 are connected;

[0020] Alternatively, the source of the MOS transistor T23 is connected to the signal output end of the input circuit, the source of the MOS transistor T24 is connected to the second power supply, and the gate of the MOS transistor T26 and the drain of the MOS transistor T26 are both connected to the gate of the MOS transistor T21;

[0021] Alternatively, the source of the MOS transistor T24 is connected to the signal output end of the input circuit, the source of the MOS transistor T23 is connected to the second power supply, and the drain of the MOS transistor T21 and the gate of the MOS transistor T26 are both connected to the gate of the MOS transistor T21.

[0022] Preferably, the low-pass filter comprises a resistor R LF and capacitor C LF , the resistor R LF One end of the resistor R is connected to the output voltage terminal. LF The other end of the capacitor C LF One end of the capacitor is connected to the filter input of the second transconductance amplifier, and the capacitor C LF The other end is connected to a second power source.

[0023] According to a second aspect of an embodiment of the present invention, there is provided a signal receiving circuit, comprising an input circuit, a low-noise amplifier as described above, a buffer circuit and a secondary circuit electrically connected in sequence; the input circuit is used to receive an input analog signal; the low-noise amplifier is used to amplify the input analog signal; the buffer circuit is used to buffer the output impedance of the low-noise amplifier; and the secondary circuit is used to reduce the bandwidth of the output noise of the low-noise amplifier.

[0024] Preferably, the input circuit includes an inductor L0 and a capacitor C0, one end of the inductor L0 and one end of the capacitor C0 are connected to form a signal output end to provide an input analog signal, and the other end of the inductor L0 and the other end of the capacitor C0 are connected to a second power supply; the buffer circuit includes an amplifier U31, the positive input end of the amplifier U31 is connected to the output end of the low-noise amplifier, and the negative input end and output end of the amplifier U31 are both connected to the input end of the secondary circuit.

[0025] Preferably, the secondary circuit comprises a bandpass filter and a comparator, the input end of the bandpass filter is connected to the output end of the buffer circuit, and the output end of the bandpass filter is connected to the input end of the comparator.

[0026] Preferably, the bandpass filter includes a resistor R31, a capacitor C31, a resistor R32, a capacitor R32 and an amplifier U32, one end of the resistor R31 is connected to the output end of the buffer circuit, the other end of the resistor R31 is connected to one end of the capacitor C31 and one end of the capacitor C32, the positive input end of the amplifier U32 is connected to the second reference voltage, the negative input end of the amplifier U32 is connected to the other end of the capacitor C31 and one end of the resistor R32, and the output end of the amplifier U32, the other end of the resistor R32 and the other end of the capacitor R32 are all connected to the input end of the comparator.

[0027] Compared with the prior art, the low noise amplifier of the present invention has the characteristics of low power consumption, high power supply rejection ratio, rail-to-rail output, and the like, and the gain does not change with the process, power supply voltage and temperature; a signal receiving circuit with the low noise amplifier can effectively improve the sensing range of the receiver when used in a receiver. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 A structural block diagram of a low noise amplifier of the present invention;

[0029] Figure 2 A circuit diagram of an example of a low noise amplifier of the present invention;

[0030] Figure 3 A circuit diagram of a bias current generating circuit in a low noise amplifier of the present invention;

[0031] Figure 4 A circuit diagram of another example of a low noise amplifier of the present invention;

[0032] Figure 5 for Figure 4 An equivalent circuit diagram of

[0033] Figure 6 for Figure 4 Another equivalent circuit diagram of;

[0034] Figure 7 A structural block diagram of a signal receiving circuit of the present invention;

[0035] Figure 8 The present invention is a circuit diagram of a buffer circuit and a secondary circuit in a signal receiving circuit.

[0036] In the figure, 1-input circuit, 2-low noise amplifier, 3-buffer circuit, 4-secondary circuit, 21-bias current generating circuit, 22-first transconductance amplifier, 23-second transconductance amplifier, 24-low pass filter. DETAILED DESCRIPTION

[0037] The present invention will be described in detail below in conjunction with the specific embodiments shown in the accompanying drawings. However, these embodiments do not limit the present invention, and any structural, methodological, or functional changes made by a person skilled in the art based on these embodiments are all within the scope of protection of the present invention.

[0038] The terms used in the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The singular forms "a", "the" and "the" used in the present invention and the appended claims are also intended to include plural forms unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more associated listed items.

[0039] like Figure 1 As shown, a low noise amplifier 2 is used to amplify the input analog signal provided by the input circuit 1, including a bias current generating circuit 21, a first transconductance amplifier 22, a second transconductance amplifier 23 and a low-pass filter 24, wherein the input end of the first transconductance amplifier 22 is connected to the input analog signal, the input end of the low-pass filter 24 is connected to the output end of the first transconductance amplifier 22, the filter input end of the second transconductance amplifier 23 is connected to the output end of the low-pass filter 24, and the output end of the second transconductance amplifier 23 is connected to the feedback input end of the first transconductance amplifier 22: the output end of the bias current generating circuit 21 is connected to the first transconductance amplifier 22 and the second transconductance amplifier 23 respectively, and the bias current generating circuit 21 provides bias current for the first transconductance amplifier 22 and the second transconductance amplifier 23.

[0040] The second transconductance amplifier 23 may only have a filter input terminal connected to the output terminal of the low-pass filter 24, or may also have a reference voltage input terminal connected to a reference voltage in addition to the filter input terminal, and the two may be used in combination.

[0041] The input circuit 1 here is generally composed of an inductor L0 and a capacitor C0 to form a resonant circuit for receiving an input electromagnetic field signal. One end of the inductor L0 and one end of the capacitor C0 are connected to form a signal output end to provide an input analog signal, and the other end of the inductor L0 and the other end of the capacitor C0 are connected to a second power supply. The above circuits can all work under positive voltage, negative voltage or dual voltage power supply, that is, the first power supply can be selected as a positive power supply and the second power supply can be ground, or the first power supply can be ground and the second power supply can be negative power supply, or the first power supply can be a positive power supply and the second power supply can be a negative power supply. Figure 2 and Figure 3 The circuits in the drawings all adopt a connection form in which the first power supply is a positive power supply and the second power supply is a ground.

[0042] Here, the low-pass filter 24 may include a resistor R LF and capacitor C LF , the resistor R LF One end of the resistor R is connected to the output voltage terminal. LF The other end of the capacitor C LF One end of the capacitor C is connected to the filter input end of the second transconductance amplifier 23. LF The other end of is connected to the second power supply. The low-pass filter 24 extracts the low-frequency component of the output voltage signal and sends it to the second transconductance amplifier 23 at the subsequent stage to obtain the error current.

[0043] The bias current generating circuit 21 generates a current related only to the resistance, and provides a current bias for the first transconductance amplifier 22 and the second transconductance amplifier 23. The current provided is usually called a constant transconductance bias current. After the first transconductance amplifier 22 operates under a suitable bias, it amplifies the input signal from the input circuit 1, and the amplified signal is added to the output signal from the second transconductance amplifier 23 to convert it into an output voltage, which is then output to the low-pass filter 24 and other external circuits.

[0044] An example of the present invention is as follows Figure 2 As shown, the bias current generating circuit 21 may include a bias resistor R B , MOS tube T1, MOS tube T2, MOS tube T3, MOS tube T4, MOS tube T5 and MOS tube T6, wherein the bias resistor R B The connection in the bias current generating circuit makes the transconductance of MOS tube T1 only connected to the bias resistor R B It is related to the inverse of , forming a constant transconductance bias circuit.

[0045] Figure 2In the embodiment, the source of MOS tube T2 and the source of MOS tube T6 are connected to the second power supply, the gate of MOS tube T1 and the drain of MOS tube T2 are connected, the gate of MOS tube T2 and the drain of MOS tube T4 are connected, the gate of MOS tube T1, the gate of MOS tube T2, the drain of MOS tube T2 and the drain of MOS tube T4 are connected, the drain of MOS tube T1, the drain of MOS tube T3, the gate of MOS tube T3, the gate of MOS tube T4 and the gate of MOS tube T5 are connected, and the source of MOS tube T3, the source of MOS tube T4 and the source of MOS tube T5 are all connected to the first power supply; one end of the bias resistor RB is connected to the source of MOS tube T1, the other end of the bias resistor RB is connected to the second power supply, and the gate of MOS tube T1 and the gate of MOS tube T2 are connected.

[0046] Bias resistor R B In the bias current generating circuit, the following can also be used: Figure 3 The connection shown is: bias resistor R B One end is connected to the gate of MOS tube T1 and the drain of MOS tube T2, and the bias resistor R B The other end of is connected to the drain of MOS tube T4 and the gate of MOS tube T2, and the source of MOS tube T1 is connected to the second power supply. B The function is equivalent to the above form, and it can also form a constant transconductance bias circuit, so that the transconductance of MOS tube T1 is only related to the bias resistor R B The inverse of .

[0047] The core part of the bias current generating circuit 21 is composed of a bias resistor R B The core circuit of the bias current generating circuit 21 is formed by MOS tube T1, MOS tube T2, MOS tube T3, and MOS tube T4. The circuit generated by the core circuit of the bias current generating circuit 21 is mirrored by MOS tube T5, and the bias current provided to MOS tube T5 is provided to MOS tube T6. MOS tube T6 can be connected in the form of a diode. Assuming that the width-to-length ratio of MOS tube T1 and MOS tube T2 is K:1, and the mirror ratio of MOS tube T3 and MOS tube T4 is 1:1, then the transconductance g of T1 can be obtained. T1 The size is expressed by the following formula:

[0048]

[0049] Since K is a constant, g T1 Only with bias resistor R B The inverse of the resistance value.

[0050] like Figure 2As shown, the first transconductance amplifier 22 may include MOS transistors T7, MOS transistor T8, MOS transistor T10, MOS transistor T11, MOS transistor T12 and MOS transistor T13, wherein the source of MOS transistor T12 is connected to the signal output end of the input circuit 1, the gate of MOS transistor T7 and the gate of MOS transistor T8 are both connected to the gate of MOS transistor T3, the drain of MOS transistor T7, the drain of MOS transistor T10, the gate of MOS transistor T12 and the gate of MOS transistor T13 are connected, the source of MOS transistor T7 and the source of MOS transistor T8 are both connected to the first power supply, the source of MOS transistor T13 is connected to the second power supply, the drain of MOS transistor T8 is connected to the drain of MOS transistor T11 to form an output end, the source of MOS transistor T11 is connected to the drain of MOS transistor T13 to form a first feedback end Vp, the source of MOS transistor T10 is connected to the drain of MOS transistor T12 to form a second feedback end Vn, and the first feedback end Vp and the second feedback end Vn constitute the feedback input end of the first transconductance amplifier 22.

[0051] The current generated by the core circuit of the bias current generating circuit 21 is mirrored by MOS transistors T7 and T8, and the bias current provided to MOS transistor T5 is provided to MOS transistor T6. After the current flows through MOS transistor T6, a bias voltage is generated to provide bias for MOS transistors T10 and T11.

[0052] The MOS tube T7 and MOS tube T8 in the first transconductance amplifier 22 constitute a fully differential current load, and the power supply ripple can be regarded as common mode noise. As long as the MOS tube T7 and MOS tube T8 are matched well enough, the low-frequency PSRR can be infinite in theory. The MOS tube T10, MOS tube T11, MOS tube T12, and MOS tube T13 in the first transconductance amplifier 22 are all common source and common gate current mirror structures. MOS tube T10 and MOS tube T11 are common source and common gate tubes, and the gates are biased by the bias voltage generated by MOS tube T6. In this example, the input voltage enters from the source of T12. Since MOS tubes T12 and MOS tubes T13 form a current mirror, the change of the input voltage will be directly transmitted to the gates of MOS tubes T12 and MOS tubes T13, and finally the input voltage is amplified by MOS tube T13 to the first output current signal.

[0053] Here, the input circuit 1 is selected to be connected from the MOS tube T12 because the channel resistance of the MOS tube T7 and the gate resistance of the MOS tube T13 are seen in parallel from the source of the MOS tube T12. These two resistances are very large, much larger than the equivalent parallel resistance of the inductor L0 and the capacitor C0. In this way, the Q value of the inductor L0 and the capacitor C0 will not be consumed, so better frequency selection performance and higher signal quantity can be obtained.

[0054] The second transconductance amplifier 23 includes a MOS transistor T9, a MOS transistor T14 and a MOS transistor T15, the source of the MOS transistor T9 is connected to the first power supply, the source of the MOS transistor T14 and the source of the MOS transistor T15 are both connected to the drain of the MOS transistor T9, the gate of the MOS transistor T14 is the filter input terminal of the second transconductance amplifier, the gate of the MOS transistor T15 is the reference voltage input terminal, the drain of the MOS transistor T14 is connected to the first feedback terminal Vp of the first transconductance amplifier 22, and the drain of the MOS transistor T15 is connected to the second feedback terminal Vn of the first transconductance amplifier 22.

[0055] The circuit generated by the core circuit of the bias current generating circuit 21 is mirrored by the MOS transistor T9, and the bias current generated by the MOS transistor T9 provides bias for the MOS transistors T14 and T15. The MOS transistors T14 and T15 are a fully differential transconductor, which completes the difference between the low-frequency component of the output voltage and the reference voltage, and converts the voltage difference (i.e., the error voltage signal) into a second output current (i.e., the error current), which is sent to the first feedback terminal Vp and the second feedback terminal Vn node to be added to the first output current. In this example, the addition of the two currents is to use the MOS transistors T10 and T11 to transfer the second output current in equal proportion to the output voltage terminal for addition, and the added current signal generates an output voltage through the output impedance.

[0056] The output impedance of the output voltage terminal can be an independent impedance module, or it can refer to the input impedance of the next stage circuit, such as the input impedance of the passive filter, the input impedance of the amplifier, etc. In this example, the input impedance of the passive filter is reused to generate the output voltage, and the gain from input to output is independent of the power supply voltage, temperature and process, which will be described in detail later.

[0057] In this example, the difference between the signal of the low-pass filter 24 and the reference signal is calculated, and then the error signal is converted into a current signal through the second transconductance amplifier 23 and added to the current signal of the first transconductance amplifier 22, and the current signal is converted into an output voltage through the output impedance, and then the low-frequency component of the output voltage is taken out through the low-pass filter and sent to the input end of the second transconductance amplifier, finally forming a low-pass transconductance loop. This low-pass transconductance loop stabilizes the output bias voltage.

[0058] Next, the principle of output bias voltage stability is analyzed.

[0059] Assume that the transconductance of the second transconductance amplifier 23 is G 2 , the output impedance is Z(s), the transfer function of the low-pass filter 24 is H(s), then the output voltage V in the s domain is 2out (s) and the reference voltage V ref The relationship can be written as:

[0060] Since the low-pass filter 24 adopts a passive structure and a simple RC voltage divider, the input impedance of the low-pass filter 24 is:

[0061]

[0062] but:

[0063]

[0064] Therefore, when s = 0, V 2out (0) = V ref , that is, the output DC bias voltage of the amplifier is V ref .

[0065] The following discusses the constant principle of the open-loop gain of the first transconductance amplifier 22. Since the bias current of the first transconductance amplifier 22 is derived from the bias current generating circuit 21, the transconductance of the first transconductance amplifier 22 does not change with the power supply or temperature, but is only related to the resistor process, and its magnitude is inversely proportional to the resistance value. Assuming that the transconductance of the first transconductance amplifier 22 is G 1 , then the output voltage V in the s domain 1out (s) and input voltage V in The relationship between (s) is:

[0066]

[0067] It can be seen that the above relationship shows a high-pass characteristic, and the adjustment resistor R LF , capacitor C LF Make the high-pass cutoff frequency lower than the signal bandwidth, then the gain within the bandwidth is G 1 R LF . Due to the above mentioned G 1 It is only related to the resistor process and its size is inversely proportional to the resistor value. 1 Process deviation and R LF cancel each other out, which means that G 1 R LF It is a constant that is independent of supply voltage, temperature and process.

[0068] An example of the present invention is as follows Figure 4As shown, the bias current generating circuit 21 is connected to the first power supply and has a first current output terminal and a second current output terminal; the first transconductance amplifier 22 includes MOS transistors T21, MOS transistors T22, MOS transistors T23 and MOS transistors T24, the source of MOS transistor T24 is connected to the signal output terminal of the input circuit 1, the gate of MOS transistor T21, the gate of MOS transistor T22, the gate of MOS transistor T23, the gate of MOS transistor T24, the drain of MOS transistor T21, and the drain of MOS transistor T23 are connected, the drain of MOS transistor T22 and the drain of MOS transistor T24 are connected to form an output terminal and a feedback input terminal, the source of MOS transistor T21 and the source of MOS transistor T22 are both connected to the first current output terminal of the bias current generating circuit 21, The source of the MOS tube T23 is connected to the second power supply; the second transconductance amplifier 23 includes MOS tubes T25, MOS tubes T26, MOS tubes T27 and MOS tubes T28, the gate of the MOS tube T25 is the filter input end of the second transconductance amplifier, the gate of the MOS tube T26, the gate of the MOS tube T27, the gate of the MOS tube T28, the drain of the MOS tube T26, and the drain of the MOS tube T28 are connected, the drain of the MOS tube T25 and the drain of the MOS tube T27 are both connected to the feedback input end of the first transconductance amplifier 22, the source of the MOS tube T25 and the source of the MOS tube T26 are both connected to the second current output end of the bias current generating circuit 21, and the source of the MOS tube T27 and the source of the MOS tube T28 are connected to the second power supply.

[0069] Here, MOS transistor T21, MOS transistor T22, MOS transistor T23 and MOS transistor T24 constitute the first transconductance amplifier 22. The MOS transistor T21 and MOS transistor T22 in this example are not used to provide transconductance, but simply act as a differential pair to provide a common mode rejection ratio CMRR. The current change caused by the power supply ripple and the noise of the bias circuit provided by the first current output terminal will be regarded as a common mode quantity and suppressed. In particular, the first current output terminal has provided a certain rejection ratio, and coupled with the suppression of the common mode by the differential pair, the PSRR can be very high. Among them, MOS transistor T23 provides a bias voltage for the gate of MOS transistor T24, and MOS transistor T24 provides the transconductance required by the second transconductance amplifier 23. Since the impedance seen from the source end of MOS transistor T23 is the series connection of the two transconductance inverses of MOS transistor T23 and MOS transistor T21, the impedance is very small, so the output end of the input circuit 1 can only be connected to the source end of MOS transistor T24.

[0070] MOS transistors T25, MOS transistors T26, MOS transistors T27 and MOS transistors T28 constitute a second transconductance amplifier 23, wherein MOS transistors T25 and MOS transistors T26 have similar functions to MOS transistors T21 and MOS transistors T22, in order to provide CMRR. Among them, MOS transistor T25 provides the transconductance required by the second transconductance amplifier 23, and is used to convert the output voltage of the low-pass filter 24 into a current signal. MOS transistors T27 and MOS transistors T28 are a pair of current mirrors, the purpose of which is to mirror the currents of MOS transistors T26 and MOS transistors T28 to the output of the second transconductance amplifier 23, and subtract them from the current of MOS transistor T25, thereby producing a common-mode suppression effect.

[0071] In this example, the second transconductance amplifier 23 has no reference voltage V ref This is because the gate of MOS tube T26 is directly connected to its own drain, forming a self-bias. Here, the gate of MOS tube T26 can also be connected to a reference voltage separately, but there is no special effect.

[0072] Therefore, in this example, the outputs of the first transconductance amplifier 22 and the second transconductance amplifier 23 are added at the voltage output terminal Vout of the first transconductance amplifier 22, that is, they can be added directly at the same node without adding through a device or circuit.

[0073] In this example, there are many variations in the connection of the MOS tube, mainly focusing on the bias connection. Due to the wide variety of variations, they are not listed here one by one: (1) Figure 5 As shown, since the low-pass filter 24 filters out the high-frequency components, the bias voltage of the MOS tube T26 is almost a stable value. Therefore, the gates of the MOS tubes T21 and T22 can be connected to the gate of the MOS tube T26, and then connected to the drain of the MOS tube T26. The advantage of this is that the source of the MOS tube T23 can be used as the input terminal, so that the input impedance of the amplifier will be further improved, and the input circuit 1 can be more embodied as a voltage source; (2) As shown in FIG. Figure 6 As shown, the source of MOS transistor T24 is still used as the input terminal. After the gates of MOS transistors T21, T22 and T26 are connected, they can also be connected to the drain of MOS transistor T21; (3) the connection of MOS transistors T23, T27 and T28 can also refer to the connection method of MOS transistors T21, T22 and T26; (4) MOS transistor T21 is self-biased, MOS transistor T22 is connected to the gate of MOS transistor T26, and connected to the drain of MOS transistor T26, etc. The above connection methods are all equivalent connections.

[0074] The MOS tubes in the above examples can all be replaced with triodes, or with slight adjustments, the resulting circuit can achieve the same function.

[0075] Based on the low noise amplifier 2 as described above, the present invention provides a signal receiving circuit, such as Figure 7 As shown, it includes an input circuit 1, a low noise amplifier 2, a buffer circuit 3 and a secondary circuit 4 which are electrically connected in sequence.

[0076] The input circuit 1 is used to receive the magnetic field signal sent by the transmitter. Specifically, the input circuit 1 may include an inductor L0 and a capacitor C0, one end of the inductor L0 and one end of the capacitor C0 are connected to form a signal output end to provide an input analog signal, and the other end of the inductor L0 and the other end of the capacitor C0 are connected to a second power supply.

[0077] The low noise amplifier 2 is used to amplify the input analog signal, as described above, and will not be described again here.

[0078] The input impedance of the buffer circuit 3 is much larger than the output impedance of the low noise amplifier 2, and the output impedance of the buffer circuit 3 is much smaller than the impedance of the secondary circuit 4, and the dynamic range of the input and output is rail-to-rail. The buffer circuit 3 is used to buffer the output impedance of the low noise amplifier 2, and has a certain gain, which is generally 1. Specifically, the buffer circuit 3 may include an amplifier U31, the positive input terminal of the amplifier U31 is connected to the output terminal of the low noise amplifier 2, the negative input terminal and the output terminal of the amplifier U31 are both connected to the input terminal of the secondary circuit 4, and the amplifier U31 is a rail-to-rail amplifier.

[0079] The secondary circuit 4 is used to reduce the bandwidth of the output noise of the low noise amplifier 2, and can be an amplifier or a filter. Figure 8 As shown, the secondary circuit 4 includes a bandpass filter and a comparator, the input end of the bandpass filter is connected to the output end of the buffer circuit 3, and the output end of the bandpass filter is connected to the input end of the comparator.

[0080] The bandpass filter includes a resistor R31, a capacitor C31, a resistor R32, a capacitor R32 and an amplifier U32, one end of the resistor R31 is connected to the output end of the buffer circuit 3, the other end of the resistor R31 is connected to one end of the capacitor C31 and one end of the capacitor C32, the positive input end of the amplifier U32 is connected to the second reference voltage, the negative input end of the amplifier U32 is connected to the other end of the capacitor C31 and one end of the resistor R32, the output end of the amplifier U32, the other end of the resistor R32, and the other end of the capacitor R32 are all connected to the input end of the comparator. The role of the bandpass filter here is to reduce the bandwidth of the output noise of the low noise amplifier 2, which helps to improve the noise.

[0081] The comparator may be a hysteresis comparator, which receives the output of the bandpass filter and reshapes the analog signal into a digital signal for processing by the subsequent digital circuit. The hysteresis interval of the hysteresis comparator needs to be greater than the peak value of the output noise of the bandpass filter.

[0082] Those skilled in the art will readily appreciate other embodiments of the present invention after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses or adaptations of the present invention, which follow the general principles of the present invention and include common knowledge or customary techniques in the art that are not disclosed by the present invention. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present invention are indicated by the claims of the present application.

[0083] It should be understood that the present invention is not limited to the exact construction that has been described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present invention is limited only by the appended claims.

Claims

1. A low noise amplifier for amplifying an input analog signal provided by an input circuit. It is characterized in that The invention comprises a bias current generating circuit, a first transconductance amplifier, a second transconductance amplifier and a low-pass filter, wherein the input end of the first transconductance amplifier is connected to the input analog signal, the input end of the low-pass filter is connected to the output end of the first transconductance amplifier, the filter input end of the second transconductance amplifier is connected to the output end of the low-pass filter, the output end of the second transconductance amplifier is connected to the feedback input end of the first transconductance amplifier, the output end of the bias current generating circuit is connected to the first transconductance amplifier and the second transconductance amplifier, and the bias current generating circuit provides bias current for the first transconductance amplifier and the second transconductance amplifier; The bias current generating circuit comprises a bias resistor RB, a MOS transistor T1, a MOS transistor T2, a MOS transistor T3, a MOS transistor T4, a MOS transistor T5 and a MOS transistor T6, the source of the MOS transistor T2 and the source of the MOS transistor T6 are connected to the second power supply, the gate of the MOS transistor T1 and the drain of the MOS transistor T2 are connected, the gate of the MOS transistor T2 and the drain of the MOS transistor T4 are connected, the drain of the MOS transistor T1, the drain of the MOS transistor T3, the gate of the MOS transistor T3, the gate of the MOS transistor T4 and the gate of the MOS transistor T5 are connected, and the source of the MOS transistor T3, the source of the MOS transistor T4 and the source of the MOS transistor T5 are all connected to the first power supply; The connection of the bias resistor RB in the bias current generating circuit makes the transconductance of the MOS tube T1 only related to the reciprocal of the bias resistor RB, and the connection form is: One end of the bias resistor RB is connected to the source of the MOS tube T1, the other end of the bias resistor RB is connected to the second power supply, and the gate of the MOS tube T1 and the gate of the MOS tube T2 are connected; or, one end of the bias resistor RB is connected to the gate of the MOS tube T1, the other end of the bias resistor RB is connected to the gate of the MOS tube T2, and the source of the MOS tube T1 is connected to the second power supply; The first transconductance amplifier includes MOS transistor T7, MOS transistor T8, MOS transistor T10, MOS transistor T11, MOS transistor T12 and MOS transistor T13, the source of MOS transistor T12 is connected to the signal output end of the input circuit, the gate of MOS transistor T7 and the gate of MOS transistor T8 are connected to the gate of MOS transistor T3, the drain of MOS transistor T7, the drain of MOS transistor T10, the gate of MOS transistor T12 and the gate of MOS transistor T13 are connected, the source of MOS transistor T7 and the source of MOS transistor T8 are connected to the first power supply, the source of MOS transistor T13 is connected to the second power supply, the drain of MOS transistor T8 is connected to the drain of MOS transistor T11 to form an output end, the source of MOS transistor T11 is connected to the drain of MOS transistor T13 to form a first feedback end Vp, the source of MOS transistor T10 is connected to the drain of MOS transistor T12 to form a second feedback end Vn, and the first feedback end Vp and the second feedback end Vn constitute a feedback input end of the first transconductance amplifier.

2. The low noise amplifier according to claim 1, It is characterized in that The second transconductance amplifier includes a MOS tube T9, a MOS tube T14 and a MOS tube T15, the source of the MOS tube T9 is connected to the first power supply, the source of the MOS tube T14 and the source of the MOS tube T15 are both connected to the drain of the MOS tube T9, the gate of the MOS tube T14 is the filter input terminal of the second transconductance amplifier, the gate of the MOS tube T15 is the reference voltage input terminal, the drain of the MOS tube T14 is connected to the first feedback terminal Vp of the first transconductance amplifier, and the drain of the MOS tube T15 is connected to the second feedback terminal Vn of the first transconductance amplifier.

3. The low noise amplifier according to any one of claims 1 to 2, It is characterized in that The low-pass filter includes a resistor R LF and a capacitor C LF, one end of the resistor R LF is connected to the output voltage end, the other end of the resistor R LF and one end of the capacitor CLF are connected to the filter input end of the second transconductance amplifier, and the other end of the capacitor C LF is connected to the second power supply.

4. A signal receiving circuit, It is characterized in that comprising an input circuit, a low noise amplifier according to any one of claims 1 to 3, a buffer circuit and a secondary circuit electrically connected in sequence; The input circuit is used to receive an input analog signal; The low noise amplifier is used to amplify the input analog signal; The buffer circuit is used to buffer the output impedance of the low noise amplifier; The secondary circuit is used to reduce the bandwidth of the output noise of the low noise amplifier.

5. The signal receiving circuit according to claim 4, It is characterized in that The input circuit includes an inductor L0 and a capacitor C0, one end of the inductor L0 and one end of the capacitor C0 are connected to form a signal output end to provide an input analog signal, and the other end of the inductor L0 and the other end of the capacitor C0 are connected to a second power supply; the buffer circuit includes an amplifier U31, the positive input end of the amplifier U31 is connected to the output end of the low-noise amplifier, and the negative input end and output end of the amplifier U31 are both connected to the input end of the secondary circuit.

6. The signal receiving circuit according to claim 4, It is characterized in that The secondary circuit includes a bandpass filter and a comparator, wherein the input end of the bandpass filter is connected to the output end of the buffer circuit, and the output end of the bandpass filter is connected to the input end of the comparator.

7. The signal receiving circuit according to claim 6, It is characterized in that The bandpass filter includes a resistor R31, a capacitor C31, a resistor R32, a capacitor R32 and an amplifier U32, one end of the resistor R31 is connected to the output end of the buffer circuit, the other end of the resistor R31 is connected to one end of the capacitor C31 and one end of the capacitor C32, the positive input end of the amplifier U32 is connected to the second reference voltage, the negative input end of the amplifier U32 is connected to the other end of the capacitor C31 and one end of the resistor R32, and the output end of the amplifier U32, the other end of the resistor R32, and the other end of the capacitor R32 are all connected to the input end of the comparator.

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