Combined inter- and intra-prediction modes for video coding

By using the combined inter -frame/frame internal prediction mode and equal weighted dual prediction mode during the video coding and decoding process, the problem of high decoding complexity in the existing technology has been solved, and more efficient video data processing is achieved.

CN114128261BActive Publication Date: 2025-01-28QUALCOMM INC
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Patent Information

Application Number
CN202080044568.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-06-25
Filing Date
2020-06-26
Publication Date
2025-01-28
Estimated Expiration
2040-06-26

AI Technical Summary

Technical Problem

The existing video encoding and decoding technologies are more complex when processing video data, resulting in low decoding efficiency.

Method used

Adopting the combined inter -frame/internal prediction mode, the inter -frame prediction is performed through equal weighted dual prediction mode, the prediction block is generated, and the video data is decoded or encoded based on the predicted block.

Benefits of technology

On the basis of maintaining decoding efficiency, the complexity of decoding is reduced and the efficiency of video data processing is improved.

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Abstract

Embodiments include methods and apparatus for encoding and decoding video data. In particular, embodiments include methods and apparatus for encoding and decoding video using a combined inter / intra prediction mode. In one such embodiment, inter prediction is performed using an equally weighted bi-prediction mode that is determined using a merge mode that would otherwise indicate unequally weighted bi-prediction.
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Description

[0001] Claiming priority

[0002] This application claims the benefit of U.S. Provisional Application No. 62 / 867,148, filed on June 26, 2019, and claims priority to U.S. Non-Provisional Application No. 16 / 912,657, filed on June 25, 2020, each of which is hereby incorporated by reference in its entirety. Technical Field

[0003] The present disclosure relates to video encoding (encode) and video decoding (decode). Background Art

[0004] Digital video capabilities can be incorporated into a wide variety of devices, including digital televisions, digital live broadcast systems, wireless broadcast systems, personal digital assistants (PDAs), laptop or desktop computers, tablet computers, e-book readers, digital cameras, digital recording devices, digital media players, video game devices, video game consoles, cellular or satellite radio phones (so-called "smart phones"), video teleconferencing devices, video streaming devices, etc. Digital video devices implement video coding techniques, such as those described in the standards defined by MPEG-2, MPEG-4, ITU-T H.263, ITU-TH.264 / MPEG-4 (Part 10, Advanced Video Coding (AVC)), ITU-T H.265 / High Efficiency Video Coding (HEVC), and extensions of such standards. By implementing such video coding techniques, video devices can more efficiently send, receive, encode, decode and / or store digital video information.

[0005] Video coding techniques include spatial (intra-picture) prediction and / or temporal (inter-picture) prediction to reduce or remove redundancy inherent in video sequences. For block-based video coding, a video slice (e.g., a video picture or a portion of a video picture) may be divided into video blocks, which may also be referred to as coding tree units (CTUs), coding units (CUs), and / or coding nodes. Video blocks in an intra-coded (I) slice of a picture are encoded using spatial prediction relative to reference samples in neighboring blocks in the same picture. Video blocks in an inter-coded (P or B) slice of a picture may use spatial prediction relative to reference samples in neighboring blocks in the same picture or temporal prediction relative to reference samples in other reference pictures. Pictures may be referred to as frames, and reference pictures may be referred to as reference frames. Summary of the invention

[0006] In general, the present disclosure describes techniques for performing a combined inter / intra prediction mode as part of a video encoding or decoding process. Embodiments include methods and apparatus for encoding and decoding video using a combined inter / intra prediction mode. In one such embodiment, inter prediction is performed using an equally weighted bi-prediction mode, which is determined using a merge mode that would otherwise indicate unequally weighted bi-prediction. Desirably, this can reduce decoding complexity with minimal loss in decoding efficiency.

[0007] One embodiment includes a method of decoding video data. The method includes predicting a block of video data according to a combined inter / intra prediction mode to generate a prediction block, which includes generating a weighted combination of an intra prediction of the block and an inter prediction of the block. Generating the weighted combination includes determining that an inter prediction merge candidate is to be used for inter prediction and the inter prediction merge candidate is a bi-prediction candidate, for which non-equal weighting is otherwise indicated for bi-prediction of the block; and applying equal weighted averaging to perform inter prediction for the combined inter / intra prediction to generate a prediction block. The method also includes decoding the block of video data based on the prediction block.

[0008] Another embodiment includes a method for encoding video data. The method includes predicting a block of video data according to a combined inter / intra prediction mode to generate a prediction block, which includes generating a weighted combination of an intra prediction of the block and an inter prediction of the block. Generating the weighted combination includes determining that an inter prediction merge candidate is to be used for inter prediction and the inter prediction merge candidate is a bi-prediction candidate, for which non-equal weighting is otherwise indicated for bi-prediction of the block; and applying equal weighted averaging to perform inter prediction for the combined inter / intra prediction to generate a prediction block. The method also includes encoding the block of video data based on the prediction block.

[0009] One embodiment includes an apparatus for encoding or decoding video data. The apparatus includes a memory configured to store one or more reference pictures of the video data and a video processor. The video processor is configured to predict a block of the video data according to a combined inter / intra prediction mode to generate a prediction block. The video processor is configured to generate a weighted combination of an intra prediction of the block and an inter prediction of the block. In order to generate the weighted combination, the processor is configured to determine that an inter prediction merge candidate is to be used for inter prediction and the inter prediction merge candidate is a bi-prediction candidate, for which non-equal weighting is otherwise indicated for bi-prediction, and the processor is further configured to apply equal weighted averaging to perform inter prediction for the combined inter / intra prediction to generate a prediction block. The video processor is further configured to encode or decode a block of the video data based on the prediction block.

[0010] One embodiment includes an apparatus for encoding or decoding video data. The apparatus includes a unit for storing one or more reference pictures of the video data and a unit for processing the video data. The video processing unit includes: a unit for predicting a block of the video data according to a combined inter / intra prediction mode to generate a prediction block. The unit for predicting the block includes: a unit for generating a weighted combination of an intra prediction of the block and an inter prediction of the block. The unit for generating the weighted combination includes: a unit for determining that an inter prediction merge candidate will be used for inter prediction and that the inter prediction merge candidate is a dual prediction candidate, for which non-equal weighting is otherwise indicated for dual prediction; and a unit for applying equal weighted averaging to perform inter prediction for the combined inter / intra prediction to generate a prediction block. The video processing unit also includes: a unit for encoding or decoding a block of the video data based on the prediction block.

[0011] Another embodiment includes a computer-readable medium having instructions stored thereon, which when executed cause a processor to perform the following operations: predict a block of video data according to a combined inter / intra prediction mode to generate a prediction block. The instructions also cause the processor to perform the following operations: generate a weighted combination of an intra prediction of the block and an inter prediction of the block. To generate the weighted combination, the instructions also cause the processor to perform the following operations: determine that an inter prediction merge candidate is to be used for inter prediction and the inter prediction merge candidate is a bi-prediction candidate, for which non-equal weighting is otherwise indicated for bi-prediction, and the instructions also cause the processor to perform the following operations: apply equal weighted averaging to perform inter prediction for combined inter / intra prediction to generate a prediction block. The instructions also cause the processor to perform the following operations: encode or decode a block of video data based on the prediction block.

[0012] The details of one or more examples are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will be apparent from the description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a block diagram illustrating an example video encoding and decoding system that may perform the techniques of this disclosure.

[0014] Figure 2A and Figure 2B is a conceptual diagram illustrating an example quadtree binary tree (QTBT) structure and a corresponding coding tree unit (CTU).

[0015] Figure 3 is a block diagram illustrating an example video encoder that may perform the techniques of this disclosure.

[0016] Figure 4is a block diagram illustrating an example video decoder that may perform the techniques of this disclosure.

[0017] Figure 5 is a conceptual diagram illustrating example positions of spatial merging candidates.

[0018] Figure 6 is a conceptual diagram illustrating an example of candidate pairs considered for redundancy check of spatial merging candidates.

[0019] Figure 7 is a conceptual diagram illustrating an example of motion vector scaling for temporal merging candidates.

[0020] Figure 8 is a conceptual diagram illustrating an example of candidate positions for a temporal merging candidate.

[0021] Fig.9A and 9B is a conceptual diagram illustrating an example of inter prediction based on triangle partitioning.

[0022] Fig.10 is a flow chart illustrating an embodiment of combined inter / intra prediction. DETAILED DESCRIPTION

[0023] Weighted prediction (WP) is a decoding tool supported by video codecs (such as H.264 / AVC and HEVC standards) for efficiently decoding video content with fading. Starting from VTM4, support for WP has also been added to the VVC standard. WP allows weighting parameters (weights and offsets) to be signaled for each reference picture in each list in the reference picture lists L0 and L1. Then, during motion compensation, the weights and offsets of the corresponding reference pictures are applied. WP and BWA are designed for different types of video content. In order to avoid interaction between WP and BWA (which will complicate the VVC decoder design), if the CU uses WP, the BWA weight index is not signaled, and w is inferred to be 4 (ie, equal weights are applied).

[0024] In another decoding tool, combined inter / intra prediction (CIIP), intra prediction modes and merge candidates of rules are derived. As further described herein, intra prediction and inter prediction signals are derived using the derived intra modes and merge candidates. The inter prediction signal P inter is derived using the same inter-frame prediction process applied to the regular merge mode; and the intra-frame prediction signal P inter is derived using the CIIP intra prediction mode after a regular intra prediction process. In some embodiments, the intra and inter prediction signals are optionally combined using a weighted average as follows:

[0025] P CIIP =((8-wt)*P inter +wt*P intra +4)>>3 (1)

[0026] In one embodiment, if the merge candidate of the rule selected in CIIP is a bi-prediction, the encoder / decoder always uses equal weights for averaging. Even if the weight index for the merge candidate of the selected rule in CIIP indicates a weighted average in a bi-prediction with unequal weights, the encoder / decoder is required / forced to use equal weighted average during motion compensation for CIIP. Alternatively, if the current block uses CIIP mode, the weight index is modified to indicate a value using equal weights. Desirably, this constraint can reduce decoding complexity with minimal loss in decoding efficiency.

[0027] In another alternative embodiment, if weighted prediction (with unequal weights) is enabled, CIIP is disabled. This similarly reduces complexity.

[0028] Figure 1 1 is a block diagram illustrating an example video encoding and decoding system 100 that can perform the techniques of the present disclosure. The techniques of the present disclosure are generally directed to decoding (encoding and / or decoding) video data. Generally, video data includes any data used to process video. Thus, video data may include original video samples, encoded video, decoded (e.g., reconstructed) video, and video metadata (such as signaling data).

[0029] like Figure 1 As shown in , in this example, system 100 includes a source device 102 that provides encoded video data to be decoded and displayed by a destination device 116. Specifically, source device 102 provides the video data to destination device 116 via computer-readable medium 110. Source device 102 and destination device 116 may include any of a wide variety of devices, including desktop computers, notebook (i.e., laptop) computers, tablet computers, set-top boxes, mobile phones (such as smart phones), televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, etc. In some cases, source device 102 and destination device 116 may be equipped for wireless communication and, therefore, may be referred to as wireless communication devices.

[0030] exist Figure 1In the example of, source device 102 includes video source 104, memory 106, video encoder 200 and output interface 108. Destination device 116 includes input interface 122, video decoder 300, memory 120 and display device 118. According to the present disclosure, the video encoder 200 of source device 102 and the video decoder 300 of destination device 116 can be configured to apply the technology for inter-frame prediction disclosed herein. Therefore, source device 102 represents an example of a video encoding device, and destination device 116 represents an example of a video decoding device. In other examples, source device and destination device may include other components or arrangements. For example, source device 102 may receive video data from an external video source (such as an external camera). Similarly, destination device 116 may be docked with an external display device, rather than including an integrated display device.

[0031] like Figure 1 The system 100 shown is only an example. In general, any digital video encoding and / or decoding device can perform techniques for combined inter / intra prediction. The source device 102 and the destination device 116 are only examples of such decoding devices, wherein the source device 102 generates decoded video data for transmission to the destination device 116. The present disclosure refers to a "decoding" device as a device that performs decoding (e.g., encoding and / or decoding) of data. Therefore, the video encoder 200 and the video decoder 300 represent examples of decoding devices, specifically, video encoders and video decoders, respectively. In some examples, the devices 102 and 116 can operate in a substantially symmetrical manner, so that each of the devices 102 and 116 includes video encoding and decoding components. Therefore, the system 100 can support one-way or two-way video transmission between video devices 102 and 116, for example, for video streaming, video playback, video broadcasting, or video telephony.

[0032] Typically, video source 104 represents a source of video data (i.e., original, undecoded video data), and provides a sequence of pictures (also referred to as "frames") of the video data to video encoder 200, which encodes the data for the pictures. Video source 104 of source device 102 may include a video capture device, such as a camera, a video archive unit containing previously captured original video, and / or a video feed interface for receiving video from a video content provider. As another alternative, video source 104 may generate computer graphics-based data as source video, or a combination of real-time video, archived video, and computer-generated video. In each case, video encoder 200 may encode captured, pre-captured, or computer-generated video data. Video encoder 200 may rearrange pictures from the received order (sometimes referred to as "display order") to a decoding order for decoding. Video encoder 200 may generate a bitstream comprising encoded video data. Source device 102 may then output the encoded video data onto computer-readable medium 110 via output interface 108 to be received and / or retrieved by, for example, input interface 122 of destination device 116 .

[0033] The memory 106 of the source device 102 and the memory 120 of the destination device 116 represent general purpose memory. In some examples, the memories 106, 120 can store original video data, such as the original video from the video source 104 and the original decoded video data from the video decoder 300. In addition or alternatively, the memories 106, 120 can store software instructions that can be executed by, for example, the video encoder 200 and the video decoder 300, respectively. Although shown as separate from the video encoder 200 and the video decoder 300 in this example, it should be understood that the video encoder 200 and the video decoder 300 can also include internal memory for functionally similar or equivalent purposes. In addition, the memories 106, 120 can store encoded video data, such as output from the video encoder 200 and input to the video decoder 300. In some examples, portions of the memories 106, 120 can be allocated as one or more video buffers, for example, to store original decoded and / or encoded video data.

[0034] The computer-readable medium 110 may represent any type of medium or device capable of transmitting the encoded video data from the source device 102 to the destination device 116. In one example, the computer-readable medium 110 represents a communication medium so that the source device 102 can directly send the encoded video data to the destination device 116 in real time, for example, via a radio frequency network or a computer-based network. According to a communication standard (such as a wireless communication protocol), the output interface 108 can modulate the transmission signal including the encoded video data, and the input interface 122 can modulate the received transmission signal. The communication medium may include any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form a portion of a packet-based network such as a local area network, a wide area network, or a global network such as the Internet. The communication medium may include a router, a switch, a base station, or any other device that may be useful for facilitating communication from the source device 102 to the destination device 116.

[0035] In some examples, source device 102 may output the encoded data from output interface 108 to storage device 112. Similarly, destination device 116 may access the encoded data from storage device 112 via input interface 122. Storage device 112 may include any of a variety of distributed or locally accessed data storage media, such as a hard drive, Blu-ray disc, DVD, CD-ROM, flash memory, volatile or non-volatile memory, or any other suitable digital storage medium for storing encoded video data.

[0036] In some examples, the source device 102 may output the encoded video data to a file server 114 or another intermediate storage device that may store the encoded video generated by the source device 102. The destination device 116 may access the stored video data from the file server 114 via streaming or downloading. The file server 114 may be any type of server device capable of storing the encoded video data and sending the encoded video data to the destination device 116. The file server 114 may represent a web server (e.g., for a website), a file transfer protocol (FTP) server, a content delivery network device, or a network attached storage (NAS) device. The destination device 116 may access the encoded video data from the file server 114 via any standard data connection (including an Internet connection). This may include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., a DSL, a cable modem, etc.), or a combination of both that is suitable for accessing the encoded video data stored on the file server 114. The file server 114 and the input interface 122 may be configured to operate according to a streaming protocol, a download transmission protocol, or a combination thereof.

[0037] Output interface 108 and input interface 122 may represent wireless transmitters / receivers, modems, wired networking components (e.g., Ethernet cards), wireless communication components that operate according to any of the various IEEE 802.11 standards, or other physical components. In examples where output interface 108 and input interface 122 include wireless components, output interface 108 and input interface 122 may be configured to transmit data (e.g., encoded video data) according to a cellular communication standard (e.g., 4G, 4G-LTE (Long Term Evolution), Advanced LTE, 5G, etc.). In some examples where output interface 108 includes a wireless transmitter, output interface 108 and input interface 122 may be configured to transmit data (e.g., encoded video data) according to other wireless standards (e.g., IEEE 802.11 specifications, IEEE 802.15 specifications (e.g., ZigBee 5G, etc.). TM ),Bluetooth TM Standards, etc.) to transmit data (such as encoded video data). In some examples, source device 102 and / or destination device 116 may include corresponding system-on-chip (SoC) devices. For example, source device 102 may include a SoC device for performing the functions attributed to video encoder 200 and / or output interface 108, and destination device 116 may include a SoC device for performing the functions attributed to video decoder 300 and / or input interface 122.

[0038] The techniques of the present disclosure may be applied to video decoding to support any of a variety of multimedia applications, such as over-the-air television broadcasting, cable television transmission, satellite television transmission, Internet streaming video transmission (such as Dynamic Adaptive Streaming over HTTP (DASH)), digital video encoded onto a data storage medium, decoding of digital video stored on a data storage medium, or other applications.

[0039] The input interface 122 of the destination device 116 receives the encoded video bitstream from the computer-readable medium 110 (e.g., the storage device 112, the file server 114, etc.). The encoded video bitstream computer-readable medium 110 may include signaling information defined by the video encoder 200 and also used by the video decoder 300, such as syntax elements with values ​​describing characteristics and / or processing of video blocks or other decoding units (e.g., slices, pictures, groups of pictures, sequences, etc.). The display device 118 displays the decoded pictures of the decoded video data to the user. The display device 118 may represent any of a variety of display devices, such as a cathode ray tube (CRT), a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.

[0040] Despite Figure 1 200 and 300 may each be integrated with an audio encoder and / or an audio decoder and may include appropriate MUX-DEMUX units or other hardware and / or software to process multiplexed streams including both audio and video in a common data stream. If applicable, the MUX-DEMUX units may follow the ITU H.223 multiplexer protocol or other protocols, such as the User Datagram Protocol (UDP).

[0041] The video encoder 200 and the video decoder 300 can each be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When the technology is partially implemented in software, the device can store instructions for the software in a suitable non-transitory computer-readable medium, and use one or more processors to execute the instructions in the hardware to perform the technology of the present disclosure. Each of the video encoder 200 and the video decoder 300 can be included in one or more encoders or decoders, and any of the encoders or decoders can be integrated as part of a combined encoder / decoder (CODEC) in the corresponding device. The device including the video encoder 200 and / or the video decoder 300 may include an integrated circuit, a microprocessor, and / or a wireless communication device, such as a cellular phone.

[0042] The video encoder 200 and the video decoder 300 may operate according to a video coding standard, such as the ITU-T H.265 (also known as the High Efficiency Video Coding (HEVC) standard) or an extension thereof, such as a multi-view and / or scalable video coding extension. Alternatively, the video encoder 200 and the video decoder 300 may operate according to other proprietary or industry standards, such as the Joint Exploration Test Model (JEM) or the ITU-T H.266 standard, also known as Versatile Video Coding (VVC). The latest draft of the VVC standard is described in the following document: Bross et al., "Versatile Video Coding (Draft 3)", Joint Video Experts Group (JVET) of ITU-T SG 16WP 3 and ISO / IEC JTC 1 / SC 29 / WG 11, 12th meeting in Macau, China, October 3-12, 2018, JVET-L1001-v9 (hereinafter referred to as "VVC Draft 3"). However, the techniques of this disclosure are not limited to any particular coding standard.

[0043] Typically, the video encoder 200 and the video decoder 300 can perform block-based decoding of a picture. The term "block" generally refers to a structure that includes data to be processed (e.g., to be encoded, decoded, or otherwise used in an encoding and / or decoding process). For example, a block may include a two-dimensional matrix of samples of luminance and / or chrominance data. Typically, the video encoder 200 and the video decoder 300 can decode video data represented in a YUV (e.g., Y, Cb, Cr) format. That is, instead of decoding red, green, and blue (RGB) data for samples of a picture, the video encoder 200 and the video decoder 300 can decode luminance and chrominance components, wherein the chrominance components may include both red hue and blue hue chrominance components. In some examples, the video encoder 200 converts the received RGB format data to a YUV representation before encoding, and the video decoder 300 converts the YUV representation to an RGB format. Alternatively, a pre-processing unit and a post-processing unit (not shown) may perform these conversions.

[0044] The present disclosure may generally relate to the decoding (e.g., encoding and decoding) of a picture to include the process of encoding or decoding data for the picture. Similarly, the present disclosure may relate to the decoding of a block of a picture to include the process of encoding or decoding data for the block (e.g., prediction and / or residual decoding). The encoded video bitstream generally includes a series of values ​​of syntax elements for representing decoding decisions (e.g., decoding modes) and partitioning of pictures into blocks. Therefore, references to decoding a picture or block should generally be understood as decoding the values ​​of the syntax elements used to form the picture or block.

[0045] HEVC defines various blocks, including coding units (CUs), prediction units (PUs), and transform units (TUs). According to HEVC, a video decoder (such as the video encoder 200) divides a coding tree unit (CTU) into CUs according to a quadtree structure. That is, the video decoder divides the CTU and CU into four equal, non-overlapping squares, and each node of the quadtree has zero or four child nodes. A node without child nodes may be referred to as a "leaf node", and the CU of such a leaf node may include one or more PUs and / or one or more TUs. The video decoder may further divide the PU and TU. For example, in HEVC, the residual quadtree (RQT) represents the division of TUs. In HEVC, PU represents inter-frame prediction data, and TU represents residual data. An intra-predicted CU includes intra-frame prediction information, such as an intra-frame mode indication.

[0046] As another example, the video encoder 200 and the video decoder 300 may be configured to operate according to JEM or VVC. According to JEM or VVC, a video decoder (such as the video encoder 200) divides a picture into a plurality of coding tree units (CTUs). The video encoder 200 may divide the CTU according to a tree structure (such as a quadtree-binary tree (QTBT) structure or a multi-type tree (MTT) structure). The QTBT structure removes the concept of multiple partition types, such as the separation between CU, PU, ​​and TU of HEVC. The QTBT structure includes two levels: a first level divided according to quadtree partitioning, and a second level divided according to binary tree partitioning. The root node of the QTBT structure corresponds to the CTU. The leaf nodes of the binary tree correspond to the coding units (CUs).

[0047] In the MTT partition structure, blocks can be partitioned using quadtree (QT) partitioning, binary tree (BT) partitioning, and one or more types of ternary tree (TT) partitioning. Ternary tree partitioning is a partition in which a block is split into three sub-blocks. In some examples, ternary tree partitioning divides a block into three sub-blocks without dividing the original block through the center. The partition types in MTT (e.g., QT, BT, and TT) can be symmetric or asymmetric.

[0048] In some examples, the video encoder 200 and the video decoder 300 may use a single QTBT or MTT structure to represent each of the luma component and the chroma components, while in other examples, the video encoder 200 and the video decoder 300 may use two or more QTBT or MTT structures, such as one QTBT / MTT structure for the luma component and another QTBT / MTT structure for the two chroma components (or two QTBT / MTT structures for the corresponding chroma components).

[0049] The video encoder 200 and the video decoder 300 may be configured to use quadtree partitioning, QTBT partitioning, MTT partitioning, or other partitioning structures according to HEVC. For the purpose of explanation, the description of the technology of the present disclosure is given with respect to QTBT partitioning. However, it should be understood that the technology of the present disclosure may also be applied to a video decoder configured to use quadtree partitioning or also use other types of partitioning.

[0050] The present disclosure may use "NxN" and "N by N" interchangeably to refer to the sample size of a block (such as a CU or other video block) in terms of vertical and horizontal dimensions, for example, 16x16 samples or 16 by 16 samples. Typically, a 16x16 CU will have 16 samples in the vertical direction (y=16) and 16 samples in the horizontal direction (x=16). Similarly, an NxN CU typically has N samples in the vertical direction and N samples in the horizontal direction, where N represents a non-negative integer value. The samples in a CU may be arranged in rows and columns. In addition, a CU does not necessarily need to have the same number of samples in the horizontal direction as in the vertical direction. For example, a CU may include NxM samples, where M is not necessarily equal to N.

[0051] The video encoder 200 encodes video data representing prediction and / or residual information and other information for a CU. The prediction information indicates how the CU will be predicted in order to form a prediction block for the CU. The residual information typically represents the sample-by-sample difference between samples of the CU and the prediction block before encoding.

[0052] In order to predict a CU, the video encoder 200 can generally form a prediction block for the CU by inter-frame prediction or intra-frame prediction. Inter-frame prediction generally refers to predicting a CU based on data of a previously decoded picture, while intra-frame prediction generally refers to predicting a CU based on previously decoded data of the same picture. In order to perform inter-frame prediction, the video encoder 200 can use one or more motion vectors to generate a prediction block. The video encoder 200 can generally perform motion search to identify a reference block that closely matches the CU, for example, in terms of the difference between the CU and the reference block. The video encoder 200 can use the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean square difference (MSD), or other such difference calculations to calculate a difference metric to determine whether the reference block closely matches the current CU. In some examples, the video encoder 200 can use unidirectional prediction or bidirectional prediction to predict the current CU.

[0053] Examples of inter-picture prediction techniques are described below. Examples of inter-picture prediction include: 1) block motion replication with spatial, temporal, history-based, and pairwise average merging candidates, 2) affine motion inter-frame prediction, 3) sub-block based temporal motion vector prediction, 4) AMVR, 5) 8x8 block-based motion compression for temporal motion prediction, 6) high precision (1 / 16 pixel) motion vector storage and motion compensation with 8-tap interpolation filters for luma components and 4-tap interpolation filters for chroma components, 7) triangulation, 8) combined intra-frame and inter-frame prediction, 9) merge with motion vector difference (MMVD), 10) symmetric motion vector difference (MVD) decoding, 11) bidirectional optical flow, 12) decoder-side motion vector refinement, and 13) dual prediction weighted averaging.

[0054] For each inter-predicted CU, motion parameters including motion vectors, reference picture indices, and reference picture list usage indices, as well as additional information, are used together with the new decoding features of VVC for sample generation for inter-prediction. Motion parameters may be signaled explicitly or implicitly. For example, the video encoder 200 may signal motion parameters in a bitstream, and the video decoder 300 may determine the motion parameters by reading (e.g., parsing) the motion parameters in the bitstream. In another example, the video encoder 200 may not signal motion parameters in the bitstream, and the video decoder 300 may infer (e.g., determine) motion parameters. For example, when a CU is decoded using skip mode, the CU is associated with one PU and has no significant residual coefficients, no decoded motion vector increments, or no reference picture indices. A merge mode is specified by which motion parameters for the current CU are obtained from neighboring CUs, including spatial and temporal candidates and additional scheduling introduced in VVC. The merge mode can be applied to any inter-predicted CU, not only for skip mode. An alternative to merge mode is explicit transmission of motion parameters, where the motion vector, the corresponding reference picture index for each reference picture list and the reference picture list usage flag, as well as other information, are explicitly signaled for each CU.

[0055] In addition to the inter-coding features in HEVC, VTM4 (VVC Test Model 4) also includes a variety of new and refined inter-prediction coding tools listed below: 1) extended merge prediction, 2) MMVD, 3) AMVP mode with symmetric MVD signaling, 4) affine motion compensated prediction, 5) sub-block based temporal motion vector prediction (SbTMVP), 6) AMVR, 7) motion field storage: 1 / 16 luma sample MV storage and 8x8 motion field compression, 8) dual prediction with weighted averaging (BWA), 9) bidirectional optical flow (BDOF), 10) decoder-side motion vector refinement (DMVR), 11) triangle partitioning prediction, and 12) combined inter- and intra-prediction (CIIP).

[0056] Some examples of JEM and VVC also provide an affine motion compensation mode, which can be considered an inter-frame prediction mode. In the affine motion compensation mode, the video encoder 200 can determine two or more motion vectors representing non-translational motion (such as zooming in or out, rotation, perspective motion, or other irregular motion types).

[0057] To perform intra prediction, the video encoder 200 may select an intra prediction mode to generate a prediction block. Some examples of JEM and VVC provide sixty-seven intra prediction modes, including various directional modes, as well as planar modes and DC modes. Typically, the video encoder 200 selects an intra prediction mode that describes neighboring samples of the current block according to which the current block (e.g., a block of a CU) is to be predicted. Assuming that the video encoder 200 decodes the CTU and CU in raster scan order (from left to right, from top to bottom), such samples may typically be above, above left, or to the left of the current block in the same picture as the current block.

[0058] The video encoder 200 encodes data representing a prediction mode for the current block. For example, for an inter-frame prediction mode, the video encoder 200 may encode data representing which inter-frame prediction mode of various available inter-frame prediction modes is used and motion information for the corresponding mode. For unidirectional or bidirectional inter-frame prediction, for example, the video encoder 200 may encode motion vectors using advanced motion vector prediction (AMVP) or merge mode. The video encoder 200 may use a similar mode to encode motion vectors for affine motion compensation mode.

[0059] After prediction (such as intra-frame prediction or inter-frame prediction of a block), the video encoder 200 can calculate residual data for the block. The residual data (such as a residual block) represents the sample-by-sample difference between the block and the prediction block for the block, and the prediction block is formed using the corresponding prediction mode. The video encoder 200 can apply one or more transforms to the residual block to generate transformed data in the transform domain rather than in the sample domain. For example, the video encoder 200 can apply a discrete cosine transform (DCT), an integer transform, a wavelet transform, or a conceptually similar transform to the residual video data. In addition, the video encoder 200 can apply a secondary transform after the first transform, such as a mode-dependent non-separable secondary transform (MDNSST), a signal-dependent transform, a Karhunen-Loeve transform (KLT), etc. The video encoder 200 generates transform coefficients after applying one or more transforms.

[0060] As noted above, after any transforms used to produce transform coefficients, the video encoder 200 may perform quantization of the transform coefficients. Quantization generally refers to a process in which transform coefficients are quantized to possibly reduce the amount of data used to represent the coefficients, thereby providing further compression. By performing the quantization process, the video encoder 200 may reduce the bit depth associated with some or all of the coefficients. For example, the video encoder 200 may round down an n-bit value to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, the video encoder 200 may perform a bitwise right shift on the value to be quantized.

[0061] After quantization, the video encoder 200 can scan the transform coefficients to generate a one-dimensional vector from a two-dimensional matrix including the quantized transform coefficients. The scan can be designed to place coefficients with higher energy (and therefore lower frequency) in front of the vector and transform coefficients with lower energy (and therefore higher frequency) in the back of the vector. In some examples, the video encoder 200 can scan the quantized transform coefficients using a predefined scan order to generate a serialized vector, and then entropy encode the quantized transform coefficients of the vector. In other examples, the video encoder 200 can perform adaptive scanning. After scanning the quantized transform coefficients to form a one-dimensional vector, the video encoder 200 can entropy encode the one-dimensional vector, for example, according to context adaptive binary arithmetic coding (CABAC). The video encoder 200 can also entropy encode the values ​​of the syntax elements used to describe the metadata associated with the encoded video data for use by the video decoder 300 when decoding the video data.

[0062] To perform CABAC, the video encoder 200 may assign context within a context model to a symbol to be transmitted. The context may relate to, for example, whether neighboring values ​​of the symbol are zero values. The likelihood determination may be based on the context assigned to the symbol.

[0063] The video encoder 200 may also generate syntax data (such as block-based syntax data, picture-based syntax data, and sequence-based syntax data) or other syntax data (such as sequence parameter set (SPS), picture parameter set (PPS), or video parameter set (VPS)) for the video decoder 300, for example, in a picture header, a block header, or a slice header. Likewise, the video decoder 300 may decode such syntax data to determine how to decode the corresponding video data.

[0064] In this way, the video encoder 200 can generate a bitstream including encoded video data, the encoded video data, for example, describing the partition of the picture into blocks (e.g., CU) and syntax elements for prediction and / or residual information for the blocks. Finally, the video decoder 300 can receive the bitstream and decode the encoded video data.

[0065] In general, the video decoder 300 performs a process that is the opposite of the process performed by the video encoder 200 to decode the encoded video data of the bitstream. For example, the video decoder 300 may use CABAC to decode the values ​​of the syntax elements for the bitstream in a manner substantially similar to, but inverse to, the CABAC encoding process of the video encoder 200. The syntax elements may define partition information of a picture into CTUs, and partitioning of each CTU according to a corresponding partitioning structure (such as a QTBT structure) to define CUs of the CTUs. The syntax elements may also define prediction and residual information for a block (e.g., CU) of video data.

[0066] The residual information may be represented by, for example, quantized transform coefficients. The video decoder 300 may inverse quantize and inverse transform the quantized transform coefficients of the block to reproduce a residual block for the block. The video decoder 300 uses the signaled prediction mode (intra-frame prediction or inter-frame prediction) and related prediction information (e.g., motion information for inter-frame prediction) to form a prediction block for the block. The video decoder 300 may then combine the prediction block and the residual block (on a sample-by-sample basis) to reproduce the original block. The video decoder 300 may perform additional processing, such as performing a deblocking process to reduce visual artifacts along the boundaries of the blocks.

[0067] The present disclosure may generally involve "signaling" certain information, such as syntax elements. The term "signaling" may generally refer to the transmission of values ​​for syntax elements and / or other data used to decode the encoded video data. That is, the video encoder 200 may signal values ​​for syntax elements in a bitstream. Generally, signaling refers to generating values ​​in a bitstream. As noted above, the source device 102 may transmit the bitstream to the destination device 116 in substantially real time or not in real time (such as may occur when storing syntax elements to the storage device 112 for later retrieval by the destination device 116).

[0068] Figure 2A and 2B 1 is a conceptual diagram showing an example quadtree binary tree (QTBT) structure 130 and a corresponding coding tree unit (CTU) 132. Solid lines represent quadtree splits, and dashed lines indicate binary tree splits. In each split (i.e., non-leaf) node of the binary tree, a flag is signaled to indicate which split type (i.e., horizontal or vertical) is used, where, in this example, 0 indicates horizontal splitting and 1 indicates vertical splitting. For quadtree splitting, there is no need to indicate the split type because the quadtree node splits the block horizontally and vertically into 4 sub-blocks of equal size. Therefore, the video encoder 200 can encode the following, and the video decoder 300 can decode the following: syntax elements (such as split information) for the regional tree level (i.e., solid line) of the QTBT structure 130, and syntax elements (such as split information) for the prediction tree level (i.e., dashed line) of the QTBT structure 130. The video encoder 200 may encode video data (such as prediction and transform data) for a CU represented by a terminal leaf node of the QTBT structure 130 , and the video decoder 300 may decode the video data.

[0069] generally, Figure 2B The CTU 132 may be associated with parameters defining the size of blocks corresponding to nodes at the first and second levels of the QTBT structure 130. These parameters may include a CTU size (indicating the size of the CTU 132 in units of samples), a minimum quadtree size (MinQTSize, indicating the minimum allowed quadtree leaf node size), a maximum binary tree size (MaxBTSize, indicating the maximum allowed binary tree root node size), a maximum binary tree depth (MaxBTDepth, indicating the maximum allowed binary tree depth), and a minimum binary tree size (MinBTSize, indicating the minimum allowed binary tree leaf node size).

[0070] The root node corresponding to the CTU of the QTBT structure may have four child nodes at the first level of the QTBT structure, and each child node may be divided according to the quadtree partitioning. That is, the node of the first level is a leaf node (without child nodes) or has four child nodes. The example of the QTBT structure 130 represents such a node as a parent node and a child node including a solid line for branching. If the node of the first level is not larger than the maximum allowed binary tree root node size (MaxBTSize), it may be further divided by the corresponding binary tree. The binary tree splitting of a node may be iterated until the node generated from the split reaches the minimum allowed binary tree leaf node size (MinBTSize) or the maximum allowed binary tree depth (MaxBTDepth). The example of the QTBT structure 130 represents such a node as having a dotted line for branching. The binary tree leaf node is called a coding unit (CU), and the CU is used for prediction (e.g., intra-picture or inter-picture prediction) and transformation without any further division. As discussed above, a CU may also be referred to as a "video block" or "block".

[0071] In one example of a QTBT partitioning structure, the CTU size is set to 128x128 (luminance sample and two corresponding 64x64 chrominance samples), MinQTSize is set to 16x16, MaxBTSize is set to 64x64, MinBTSize (for both width and height) is set to 4, and MaxBTDepth is set to 4. Quadtree partitioning is first applied to the CTU to generate a quadtree leaf node. The quadtree leaf node can have a size from 16x16 (i.e., MinQTSize) to 128x128 (i.e., CTU size). If the leaf quadtree node is 128x128, it will not be further split by the binary tree because the size exceeds MaxBTSize (i.e., 64x64 in this example). Otherwise, the leaf quadtree node will be further divided by the binary tree. Therefore, the quadtree leaf node is also the root node for the binary tree and has a binary tree depth of 0. When the binary tree depth reaches MaxBTDepth (4 in this example), no further splitting is allowed. When a binary tree node has a width equal to MinBTSize (4 in this example), this means that no further horizontal splitting is allowed. Similarly, a binary tree node with a height equal to MinBTSize means that no further vertical splitting is allowed for the binary tree node. As noted above, the leaf nodes of the binary tree are called CUs and are further processed according to prediction and transformation without further partitioning.

[0072] Figure 3 is a block diagram illustrating an example video encoder 200 that may perform the techniques of this disclosure. Figure 3The above description is provided for the purpose of explanation and should not be considered as limiting the techniques as broadly illustrated and described in this disclosure. For the purpose of explanation, this disclosure describes the video encoder 200 in the context of video coding standards such as the HEVC video coding standard and the developing H.266 video coding standard. However, the techniques of this disclosure are not limited to these video coding standards and are generally applicable to video encoding and decoding.

[0073] exist Figure 3 In the example of , the video encoder 200 includes a video data memory 230, a mode selection unit 202, a residual generation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a filtering unit 216, a decoded picture buffer (DPB) 218, and an entropy coding unit 220. Any or all of the video data memory 230, the mode selection unit 202, the residual generation unit 204, the transform processing unit 206, the quantization unit 208, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the filtering unit 216, the DPB 218, and the entropy coding unit 220 may be implemented in one or more processors or in processing circuits. Furthermore, the video encoder 200 may include additional or alternative processors or processing circuits to perform these and other functions.

[0074] Video data memory 230 may store video data to be encoded by components of video encoder 200. Video encoder 200 may receive video data from, for example, video source 104 ( Figure 1 ) receives the video data stored in the video data memory 230. DPB 218 can act as a reference picture memory, which stores reference video data for prediction of subsequent video data by the video encoder 200. Video data memory 230 and DPB 218 can be formed by any memory device in a variety of memory devices, such as dynamic random access memory (DRAM) (including synchronous DRAM (SDRAM)), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. Video data memory 230 and DPB 218 can be provided by the same memory device or a separate memory device. In various examples, video data memory 230 can be located on the chip with other component instruments of the video encoder 200 (as shown), or located off-chip relative to those components.

[0075] In the present disclosure, references to the video data memory 230 should not be interpreted as limited to memory internal to the video encoder 200 (unless specifically described as such), or to memory external to the video encoder 200 (unless specifically described as such). Rather, references to the video data memory 230 should be understood as a reference memory that stores video data received by the video encoder 200 for encoding (e.g., video data for a current block to be encoded). Figure 1 The memory 106 may also provide temporary storage for outputs from the various units of the video encoder 200 .

[0076] Show Figure 3 The various units of the video encoder 200 are provided to help understand the operations performed by the video encoder 200. The units may be implemented as fixed-function circuits, programmable circuits, or a combination thereof. Fixed-function circuits refer to circuits that provide specific functions and are pre-set with respect to the operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks and provide flexible functions on the operations that can be performed. For example, a programmable circuit may execute software or firmware that causes the programmable circuit to operate in a manner defined by the instructions of the software or firmware. Fixed-function circuits may execute software instructions (e.g., to receive parameters or output parameters), but the type of operation performed by the fixed-function circuit is generally constant. In some examples, one or more of the units may be different circuit blocks (fixed-function or programmable), and in some examples, one or more units may be integrated circuits.

[0077] The video encoder 200 may include an arithmetic logic unit (ALU), an elementary function unit (EFU), a digital circuit, an analog circuit, and / or a programmable core formed by a programmable circuit. In an example where the operation of the video encoder 200 is performed using software executed by a programmable circuit, the memory 106 ( Figure 1 ) may store object code for software received and executed by the video encoder 200, or another memory (not shown) within the video encoder 200 may store such instructions.

[0078] The video data memory 230 is configured to store the received video data. The video encoder 200 may retrieve the picture of the video data from the video data memory 230 and provide the video data to the residual generation unit 204 and the mode selection unit 202. The video data in the video data memory 230 may be the original video data to be encoded.

[0079] The mode selection unit 202 includes a motion estimation unit 222, a motion compensation unit 224, and an intra prediction unit 226. The mode selection unit 202 may include additional functional units for performing video prediction according to other prediction modes. As an example, the mode selection unit 202 may include a palette unit, an intra-block copy unit (which may be part of the motion estimation unit 222 and / or the motion compensation unit 224), an affine unit, a linear model (LM) unit, etc.

[0080] The mode selection unit 202 generally coordinates multiple encoding passes to test combinations of encoding parameters and the resulting rate-distortion values ​​for such combinations. The encoding parameters may include the partitioning of CTUs into CUs, the prediction mode for the CUs, the transform type for the residual data of the CUs, the quantization parameter for the residual data of the CUs, etc. The mode selection unit 202 may ultimately select a coding parameter combination that has a better rate-distortion value than other tested combinations.

[0081] The video encoder 200 may divide the picture retrieved from the video data memory 230 into a series of CTUs, and encapsulate one or more CTUs in a slice. The mode selection unit 202 may divide the CTUs of the picture according to a tree structure (such as the QTBT structure or quadtree structure of HEVC described above). As described above, the video encoder 200 may form one or more CUs by dividing the CTUs according to the tree structure. Such CUs may also be generally referred to as "video blocks" or "blocks".

[0082] Typically, the mode selection unit 202 also controls its components (e.g., the motion estimation unit 222, the motion compensation unit 224, and the intra prediction unit 226) to generate a prediction block for a current block (e.g., a current CU, or the overlapping portion of a PU and a TU in HEVC). For inter prediction of the current block, the motion estimation unit 222 may perform a motion search to identify one or more closely matching reference blocks in one or more reference pictures (e.g., one or more previously decoded pictures stored in the DPB 218). In particular, the motion estimation unit 222 may calculate values ​​indicating how similar potential reference blocks are to the current block, for example, based on the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean squared difference (MSD), etc. The motion estimation unit 222 may typically perform these calculations using the sample-by-sample difference between the current block and the reference block under consideration. The motion estimation unit 222 may identify the reference block having the lowest value obtained from these calculations, indicating the reference block that most closely matches the current block.

[0083] The motion estimation unit 222 may form one or more motion vectors (MVs) that define the position of the reference block in the reference picture relative to the position of the current block in the current picture. The motion estimation unit 222 may then provide the motion vectors to the motion compensation unit 224. For example, for unidirectional inter prediction, the motion estimation unit 222 may provide a single motion vector, while for bidirectional inter prediction, the motion estimation unit 222 may provide two motion vectors. The motion compensation unit 224 may then use the motion vectors to generate a prediction block. For example, the motion compensation unit 224 may use the motion vectors to retrieve data for the reference block. As another example, if the motion vectors have fractional sample precision, the motion compensation unit 224 may interpolate for the prediction block according to one or more interpolation filters. In addition, for bidirectional inter prediction, the motion compensation unit 224 may retrieve data for two reference blocks identified by the corresponding motion vectors and combine the retrieved data, for example, by sample-by-sample averaging or weighted averaging.

[0084] As another example, for intra prediction or intra prediction decoding, the intra prediction unit 226 can generate a prediction block based on samples adjacent to the current block. For example, for directional mode, the intra prediction unit 226 can generally arithmetically combine the values ​​of adjacent samples and fill these calculated values ​​across the current block in a defined direction to produce a prediction block. As another example, for DC mode, the intra prediction unit 226 can calculate the average value of adjacent samples of the current block and generate a prediction block to include the obtained average value for each sample of the prediction block.

[0085] The mode selection unit 202 provides the prediction block to the residual generation unit 204. The residual generation unit 204 receives the original uncoded version of the current block from the video data memory 230 and receives the prediction block from the mode selection unit 202. The residual generation unit 204 calculates the sample-by-sample difference between the current block and the prediction block. The resulting sample-by-sample difference defines a residual block for the current block. In some examples, the residual generation unit 204 may determine the difference between the sample values ​​in the residual block to generate the residual block using residual differential pulse coding modulation (RDPCM). In some examples, the residual generation unit 204 may be formed using one or more subtractor circuits that perform binary subtraction.

[0086] In the example where the mode selection unit 202 divides the CU into PUs, each PU may be associated with a luma prediction unit and a corresponding chroma prediction unit. The video encoder 200 and the video decoder 300 may support PUs of various sizes. As noted above, the size of the CU may refer to the size of the luma coding block of the CU, and the size of the PU may refer to the size of the luma prediction unit of the PU. Assuming that the size of a particular CU is 2Nx2N, the video encoder 200 may support PU sizes of 2Nx2N or NxN for intra-frame prediction, and symmetrical PU sizes of 2Nx2N, 2NxN, Nx2N, NxN or similar sizes for inter-frame prediction. The video encoder 200 and the video decoder 300 may also support asymmetric partitioning of PU sizes of 2NxnU, 2NxnD, nLx2N, and nRx2N for inter-frame prediction.

[0087] In an example where the mode selection unit does not further divide the CU into PUs, each CU may be associated with a luma coding block and a corresponding chroma coding block. As above, the size of a CU may refer to the size of the luma coding block of the CU. The video encoder 200 and the video decoder 300 may support a CU size of 2Nx2N, 2NxN, or Nx2N.

[0088] For other video coding techniques (such as intra-block copy mode coding, affine mode coding, and linear model (LM) mode coding, to name a few examples), the mode selection unit 202 generates a prediction block for the current block being encoded via a corresponding unit associated with the coding technique. In some examples (such as palette mode coding), the mode selection unit 202 may not generate a prediction block, but instead generate syntax elements indicating how to reconstruct the block based on the selected palette. In such a mode, the mode selection unit 202 can provide these syntax elements to the entropy coding unit 220 for encoding.

[0089] As described above, the residual generation unit 204 receives video data for a current block and a corresponding prediction block. Then, the residual generation unit 204 generates a residual block for the current block. To generate the residual block, the residual generation unit 204 calculates the sample-by-sample difference between the prediction block and the current block.

[0090] The transform processing unit 206 applies one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). The transform processing unit 206 can apply various transforms to the residual block to form a transform coefficient block. For example, the transform processing unit 206 can apply a discrete cosine transform (DCT), a directional transform, a Karhunen-Loeve transform (KLT), or a conceptually similar transform to the residual block. In some examples, the transform processing unit 206 can perform multiple transforms on the residual block, for example, a primary transform and a secondary transform (such as a rotation transform). In some examples, the transform processing unit 206 does not apply a transform to the residual block.

[0091] The quantization unit 208 may quantize the transform coefficients in the transform coefficient block to produce a quantized transform coefficient block. The quantization unit 208 may quantize the transform coefficients of the transform coefficient block according to a quantization parameter (QP) value associated with the current block. The video encoder 200 (e.g., via the mode selection unit 202) may adjust the degree of quantization applied to the coefficient block associated with the current block by adjusting the QP value associated with the CU. Quantization may cause a loss of information, and therefore, the quantized transform coefficients may have a lower precision than the original transform coefficients produced by the transform processing unit 206.

[0092] The inverse quantization unit 210 and the inverse transform processing unit 212 may apply inverse quantization and inverse transform, respectively, to the quantized transform coefficient block to reconstruct a residual block from the transform coefficient block. The reconstruction unit 214 may generate a reconstructed block corresponding to the current block (although potentially with some degree of distortion) based on the reconstructed residual block and the prediction block generated by the mode selection unit 202. For example, the reconstruction unit 214 may add samples of the reconstructed residual block to corresponding samples from the prediction block generated by the mode selection unit 202 to generate a reconstructed block.

[0093] Filtering unit 216 may perform one or more filtering operations on the reconstructed block. For example, filtering unit 216 may perform a deblocking operation to reduce blocking artifacts along the edges of the CU. In some examples, the operations of filtering unit 216 may be skipped.

[0094] The video encoder 200 stores the reconstructed blocks in the DPB 218. For example, in an example where the operation of the filtering unit 216 is not required, the reconstruction unit 214 can store the reconstructed blocks in the DPB 218. In an example where the operation of the filtering unit 216 is required, the filtering unit 216 can store the filtered reconstructed blocks in the DPB 218. The motion estimation unit 222 and the motion compensation unit 224 can retrieve the reference picture formed by the reconstructed (and potentially filtered) blocks from the DPB 218 to perform inter-frame prediction on the blocks of the subsequently encoded pictures. In addition, the intra-frame prediction unit 226 can use the reconstructed blocks in the DPB 218 of the current picture to perform intra-frame prediction on other blocks in the current picture.

[0095] In general, the entropy coding unit 220 may entropy encode syntax elements received from other functional components of the video encoder 200. For example, the entropy coding unit 220 may entropy encode quantized transform coefficient blocks from the quantization unit 208. As another example, the entropy coding unit 220 may entropy encode prediction syntax elements (e.g., motion information for inter-frame prediction or intra-frame mode information for intra-frame prediction) from the mode selection unit 202. The entropy coding unit 220 may perform one or more entropy coding operations on the syntax elements (which is another example of video data) to generate entropy-encoded data. For example, the entropy coding unit 220 may perform a context-adaptive variable length coding (CAVLC) operation, a CABAC operation, a variable-to-variable (V2V) length coding operation, a syntax-based context-adaptive binary arithmetic coding (SBAC) operation, a probability interval partitioning entropy (PIPE) coding operation, an exponential Golomb coding operation, or another type of entropy coding operation on the data. In some examples, the entropy coding unit 220 may operate in a bypass mode, in which the syntax elements are not entropy encoded.

[0096] The video encoder 200 may output a bitstream including entropy-encoded syntax elements required to reconstruct blocks of a slice or picture. In particular, the entropy encoding unit 220 may output a bitstream.

[0097] The operations described above are described with respect to blocks. Such descriptions should be understood as operations for luma coding blocks and / or chroma coding blocks. As described above, in some examples, the luma coding blocks and chroma coding blocks are the luma components and chroma components of a CU. In some examples, the luma coding blocks and chroma coding blocks are the luma components and chroma components of a PU.

[0098] In some examples, operations performed on luma coding blocks need not be repeated for chroma coding blocks. As an example, operations to identify motion vectors (MVs) and reference pictures for luma coding blocks need not be repeated for identifying MVs and reference pictures for chroma blocks. Specifically, the MVs for luma coding blocks may be scaled to determine MVs for chroma blocks, and the reference pictures may be the same. As another example, the intra prediction process may be the same for luma coding blocks and chroma coding blocks.

[0099] Video encoder 200 represents an example of a device configured to encode video data, the device comprising: a memory configured to store the video data; and one or more processing units implemented in circuits and configured to perform combined inter / intra prediction according to embodiments disclosed herein.

[0100] Figure 4 is a block diagram illustrating an example video decoder 300 that may perform the techniques of this disclosure. Figure 4 It is provided for the purpose of explanation and does not limit the techniques as broadly illustrated and described in this disclosure. For the purpose of explanation, this disclosure describes the video decoder 300 according to the techniques of JEM, VVC, and HEVC. However, the techniques of this disclosure can be performed by a video decoding device configured for other video decoding standards.

[0101] exist Figure 4 In the example of , the video decoder 300 includes a coded picture buffer (CPB) memory 320, an entropy decoding unit 302, a prediction processing unit 304, an inverse quantization unit 306, an inverse transform processing unit 308, a reconstruction unit 310, a filtering unit 312, and a decoded picture buffer (DPB) 134. Any or all of the CPB memory 320, the entropy decoding unit 302, the prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, the filtering unit 312, and the DPB 134 may be implemented in one or more processors or in processing circuitry. Furthermore, the video decoder 300 may include additional or alternative processors or processing circuitry to perform these and other functions.

[0102] The prediction processing unit 304 includes a motion compensation unit 316 and an intra prediction unit 318. The prediction processing unit 304 may include an addition unit to perform prediction according to other prediction modes. As an example, the prediction processing unit 304 may include a palette unit, an intra-block copy unit (which may form part of the motion compensation unit 316), an affine unit, a linear model (LM) unit, etc. In other examples, the video decoder 300 may include more, fewer, or different functional components.

[0103] CPB memory 320 may store video data, such as an encoded video bitstream, to be decoded by components of video decoder 300. For example, the video bitstream may be obtained from computer readable medium 110 ( Figure 1 ) obtains video data stored in CPB memory 320. CPB memory 320 may include a CPB that stores encoded video data (e.g., syntax elements) from an encoded video bitstream. In addition, CPB memory 320 may store video data other than syntax elements of decoded pictures, such as temporary data representing outputs from various units of video decoder 300. DPB 314 typically stores decoded pictures, and video decoder 300 may output decoded pictures and / or use decoded pictures as reference video data when decoding subsequent data or pictures of the encoded video bitstream. CPB memory 320 and DPB 314 may be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM), including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. CPB memory 320 and DPB 314 may be provided by the same memory device or separate memory devices. In various examples, CPB memory 320 may be located on-chip with other components of video decoder 300 , or off-chip relative to those components.

[0104] Additionally or alternatively, in some examples, video decoder 300 may retrieve the video from memory 120 ( Figure 1 ) to retrieve the decoded video data. That is, memory 120 may store data as discussed above with respect to CPB memory 320. Likewise, when some or all of the functions of video decoder 300 are implemented in software to be executed by processing circuitry of video decoder 300, memory 120 may store instructions to be executed by video decoder 300.

[0105] Description Figure 4 The various units shown in FIG. 3 are used to help understand the operations performed by the video decoder 300. The units may be implemented as fixed function circuits, programmable circuits, or a combination thereof. Figure 3, fixed-function circuits refer to circuits that provide specific functions and are pre-set with respect to the operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks and provide flexible functions in the operations that can be performed. For example, a programmable circuit can execute software or firmware that causes the programmable circuit to operate in a manner defined by the instructions of the software or firmware. Fixed-function circuits can execute software instructions (e.g., to receive parameters or output parameters), but the type of operations performed by the fixed-function circuits is generally constant. In some examples, one or more of the units may be different circuit blocks (fixed-function or programmable), and in some examples, one or more units may be integrated circuits.

[0106] The video decoder 300 may include an ALU, an EFU, a digital circuit, an analog circuit, and / or a programmable core formed by a programmable circuit. In an example where the operation of the video decoder 300 is performed by software executed on the programmable circuit, an on-chip or off-chip memory may store instructions (e.g., object code) of the software received and executed by the video decoder 300.

[0107] The entropy decoding unit 302 may receive the encoded video data from the CPB and entropy decode the video data to reproduce the syntax elements. The prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, and the filtering unit 312 may generate decoded video data based on the syntax elements extracted from the bitstream.

[0108] Typically, the video decoder 300 reconstructs a picture on a block-by-block basis. The video decoder 300 may perform a reconstruction operation on each block individually (wherein a block currently being reconstructed (ie, decoded) may be referred to as a "current block").

[0109] The entropy decoding unit 302 may entropy decode syntax elements defining the quantized transform coefficients of the quantized transform coefficient block and transform information, such as a quantization parameter (QP) and / or a transform mode indication. The inverse quantization unit 306 may use the QP associated with the quantized transform coefficient block to determine a degree of quantization, and likewise, determine a degree of inverse quantization for the inverse quantization unit 306 to apply. The inverse quantization unit 306 may, for example, perform a bitwise left shift operation to inverse quantize the quantized transform coefficients. The inverse quantization unit 306 may thereby form a transform coefficient block including the transform coefficients.

[0110] After the inverse quantization unit 306 forms the transform coefficient block, the inverse transform processing unit 308 may apply one or more inverse transforms to the transform coefficient block to generate a residual block associated with the current block. For example, the inverse transform processing unit 308 may apply an inverse DCT, an inverse integer transform, an inverse Karhunen-Loeve transform (KLT), an inverse rotational transform, an inverse directional transform, or another inverse transform to the coefficient block.

[0111] In addition, prediction processing unit 304 generates a prediction block based on the prediction information syntax element entropy decoded by entropy decoding unit 302. For example, if the prediction information syntax element indicates that the current block is inter-predicted, motion compensation unit 316 can generate a prediction block. In this case, the prediction information syntax element can indicate a reference picture in DPB 314 from which to retrieve the reference block, and a motion vector that identifies the position of the reference block in the reference picture relative to the position of the current block in the current picture. Motion compensation unit 316 can generally generate a prediction block in the same manner as described for motion compensation unit 224 ( Figure 3 )The inter-frame prediction process is performed in a manner substantially similar to that described in detail above.

[0112] As another example, if the prediction information syntax element indicates that the current block is intra-predicted, the intra-prediction unit 318 may generate a prediction block according to the intra-prediction mode indicated by the prediction information syntax element. Again, the intra-prediction unit 318 may generally generate a prediction block in the same manner as described with respect to the intra-prediction unit 226 ( Figure 3 ) to perform the intra prediction process in a manner substantially similar to that described in the foregoing. The intra prediction unit 318 may retrieve data of neighboring samples of the current block from the DPB 314.

[0113] The reconstruction unit 310 may reconstruct the current block using the prediction block and the residual block. For example, the reconstruction unit 310 may reconstruct the current block by adding samples of the residual block to corresponding samples of the prediction block.

[0114] The filtering unit 312 may perform one or more filtering operations on the reconstructed block. For example, the filtering unit 312 may perform a deblocking operation to reduce blocking artifacts along the edges of the reconstructed block. The operations of the filtering unit 312 may not necessarily be performed in all examples.

[0115] The video decoder 300 may store the reconstructed blocks in the DPB 314. As discussed above, the DPB 314 may provide reference information (such as samples of the current picture for intra prediction and previously decoded pictures for subsequent motion compensation) to the prediction processing unit 304. In addition, the video decoder 300 may output decoded pictures from the DPB for display on a display device such as a Figure 1 for subsequent presentation on a display device 118).

[0116] In this manner, video decoder 300 represents an example of a video decoding device including a memory configured to store video data and one or more processing units implemented in circuitry and configured to perform combined inter / intra prediction.

[0117] The derivation of spatial candidates is described below. Figure 5 is a conceptual diagram illustrating example positions of spatial merging candidates.

[0118] The derivation of spatial merging candidates in VVC is the same as that in HEVC. Figure 5 526, B0 528, B1 530, A1 532, and B2 533. Position B2 533 is considered only when any CU of positions A0 526, B0 528, B1 530, A1 532, and B2 533 is unavailable (e.g., because it belongs to another slice or tile) or is intra-coded. After adding the candidate at position A1 532, the addition of the remaining candidates is subject to a redundancy check that ensures that candidates with the same motion information are excluded from the list in order to improve decoding efficiency. In order to reduce computational complexity, not all possible candidate pairs are considered in the mentioned redundancy check. Figure 6 is a conceptual diagram showing an example of candidate pairs considered for redundant checking of spatial merging candidates. Figure 6 Only pairs linked with arrows (eg, arrow 529 or arrow 531) are considered in the list, and candidates are added to the list only if the corresponding candidates for redundancy checking do not have the same motion information.

[0119] The derivation of temporal candidates is described below. Figure 7 is a conceptual diagram showing an example of motion vector scaling for a temporal merge candidate. In some examples, only one temporary candidate is added to the list. In particular, in the derivation of the temporal merge candidate, the scaled motion vector is derived based on the co-located CU belonging to the co-located reference picture. The reference picture list to be used for deriving the co-located CU is explicitly signaled in the slice header. For example, the video encoder 200 may signal in the slice header in the bitstream the reference picture list for deriving the co-located CU, and the video decoder 300 may determine the reference picture list by reading the signaling in the bitstream. Such as by Figure 7, a scaled motion vector 50 for a temporal merge candidate for current CU 42 is obtained, which is scaled from a motion vector 552 of collocated CU 544 using picture order count (POC) distances tb 546 and td 548, where tb is defined as the POC difference between the reference picture of the current picture (reference picture 536) and the current picture (current picture 538), and td is defined as the POC difference between the reference picture of the collocated picture (reference picture 534) and the collocated picture (collocated picture 540). The reference picture index of the temporal merge candidate is set to zero.

[0120] Figure 8 is a conceptual diagram showing an example of candidate positions for temporal merging candidates. Figure 8 As depicted, the position for the temporal candidate is selected between the candidates at position C0 554 and position C1 556. If the CU at position C0 554 is not available, is intra-coded, or is outside the current row of a coding tree unit (CTU), then the candidate at position C1 556 is used. Otherwise, position C0 554 is used in the derivation of the temporal merge candidate.

[0121] Fig.9A and 9B is a conceptual diagram showing an example of inter-frame prediction based on triangle partitioning. Fig.9A The diagonal split shown in or Fig. 9B The anti-diagonal split shown in splits the CU evenly into two triangular partitions. Fig.9A The diagonal split in divides the CU into partition 1 930 and partition 2 932. Fig. 9B The anti-diagonal split in divides the CU into partition 1 934 and partition 2 936. Each triangular partition in the CU uses its own motion for inter prediction; only uni-prediction is allowed for each partition, i.e., each partition has one motion vector and one reference index. Uni-prediction motion constraints are applied to ensure that only two motion-compensated predictors are required for each CU, as in conventional bi-prediction. The uni-prediction motion for each partition is derived from a uni-prediction candidate list.

[0122] If triangle partitioning mode is used, a flag indicating the direction of the triangle partitioning (diagonal or anti-diagonal) and two merge indices (one for each partition) are also signaled. After predicting each triangle partition, a blending process with adaptive weights is used to adjust the sample values ​​along the diagonal or anti-diagonal edges. This is the prediction signal for the entire CU, and as in other prediction modes, the transform and quantization process will be applied to the entire CU.

[0123] In one embodiment, the encoder 200 / decoder 300 uses a triangle merge candidate list (a list constructed for triangle merge prediction) instead of a regular merge candidate list. The triangle merge candidate list includes all uni-predicted merge candidates, so CIIP is a weighted combination between uni-prediction and intra-prediction, which simplifies the CIIP mode. Any list of only uni-prediction candidates can be used instead.

[0124] Fig.10 1 is a flow chart illustrating an example method 1000 for encoding and decoding a current block using a combined inter / intra mode according to some embodiments. The current block may include a current prediction unit. Although relative to the video encoder 200 ( Figure 1 and Figure 3 ), but it should be understood that other devices may be configured to perform the same Figure 6 A similar approach to the one used in this paper.

[0125] In this example, at block 1010, the video encoder 200 or the video decoder 300 determines that the block is to be predicted according to a combined inter / intra mode. The encoder 200 may make this determination using a rate-distortion process or similar process to select from available prediction modes for the block. The decoder 300 may decode one or more syntax elements from the video bitstream and determine the mode based on the decoded syntax elements.

[0126] When combined inter / intra mode is used, intra mode and inter mode may be derived. For example, at block 1012, the video encoder 200 and / or the video decoder 300 may determine that an inter prediction merge candidate is to be used for inter prediction and that the inter prediction merge candidate is a bi-prediction candidate. According to one embodiment, the merge candidate may be associated with a weight index indicating non-equal weighting of the bi-prediction indicated for the block.

[0127] To reduce complexity, moving to block 1014, the encoder 200 and / or decoder 300 performs inter prediction for combined inter / intra prediction using equal weighted averaging to generate a predicted block, even if unequal weighting is otherwise specified for bi-prediction of the block.

[0128] Alternatively, in one embodiment, the encoder 200 is configured to modify the weight index used to merge blocks so that equal weighting is used.

[0129] Moving to block 1016, the encoder 200 encodes the block using the combined inter / intra prediction mode, or the decoder 300 decodes the block using the combined inter / intra prediction mode. For example, the encoder 200 and / or decoder 300 may combine inter and intra prediction for the block and encode or decode the residual using techniques such as those disclosed herein.

[0130] In some embodiments, there are multiple (e.g., 3) weight sets for hybrid inter-frame prediction and intra-frame prediction: {3,1}, {1,3}, and {2,2}. The selection of the weight set depends on the mode of the neighboring blocks. If both the left and the top are intra-frame modes, the weight set is {1,3}, indicating that the weight for intra-frame mode is 1 and the weight for inter-frame mode is 3. Otherwise, if there is a block of intra-frame mode in the upper left neighborhood, the weight set is {2,2}. Otherwise, the weight set is {3,1}. According to one embodiment, only two weights are used. For example, if the neighboring blocks on the left and the top are both intra-frame modes, one weight is used, otherwise another weight is used. Any two weight sets can be used. In one such embodiment, the weight set {2,2} is removed from the embodiments illustrated in some drafts of VVC. If both the left and the top are intra-frame modes, the weight set is {1,3}, otherwise the weight set {3,1} is used.

[0131] It is to be appreciated that, according to examples, certain actions or events of any of the techniques described herein may be performed in a different order, may be added, combined, or omitted entirely (e.g., not all described actions or events are necessary for the practice of the techniques). In addition, in some examples, actions or events may be performed concurrently rather than sequentially, such as through multithreading, interrupt handling, or multiple processors.

[0132] In one or more examples, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored as one or more instructions or codes on a computer-readable medium or transmitted via a computer-readable medium and executed by a hardware-based processing unit. A computer-readable medium may include a computer-readable storage medium (which corresponds to a tangible medium such as a data storage medium) or a communication medium (including, for example, any medium that facilitates the transfer of a computer program from one place to another according to a communication protocol). In this manner, a computer-readable medium may generally correspond to (1) a non-temporary tangible computer-readable storage medium, or (2) a communication medium such as a signal or carrier wave. A data storage medium may be any available medium that can be accessed by one or more computers or one or more processors to retrieve instructions, codes, and / or data structures for implementing the techniques described in the present disclosure. A computer program product may include a computer-readable medium.

[0133] By way of example and not limitation, such computer-readable storage media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, disk storage or other magnetic storage devices, flash memory, or any other medium that can be used to store desired program codes in the form of instructions or data structures and can be accessed by a computer. In addition, any connection is appropriately referred to as a computer-readable medium. For example, if the instruction is transmitted from a website, server or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL) or wireless technology (such as infrared, radio and microwave), the coaxial cable, fiber optic cable, twisted pair, DSL or wireless technology (such as infrared, radio and microwave) is included in the definition of the medium. However, it should be understood that computer-readable storage media and data storage media do not include connections, carrier waves, signals or other temporary media, but are instead directed to non-temporary tangible storage media. As used herein, disks and optical disks include compact disks (CDs), laser optical disks, optical disks, digital versatile disks (DVDs), floppy disks and blue-ray disks, wherein disks usually copy data magnetically, while optical disks use lasers to optically copy data. Combinations of the above should also be included within the scope of computer-readable media.

[0134] Instructions may be executed by one or more processors, such as one or more digital signal processors (DSPs), general-purpose microprocessors, application-specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or other equivalent integrated or discrete logic circuits. Therefore, the terms "processor" and "processing circuitry" as used herein may refer to any of the aforementioned structures or any other structure suitable for implementing the techniques described herein. In addition, in some aspects, the functionality described herein may be provided within dedicated hardware and / or software modules configured for encoding and decoding, or incorporated into a combined codec. In addition, the techniques may be implemented entirely in one or more circuits or logic elements.

[0135] The techniques of the present disclosure may be implemented in a wide variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC), or a set of ICs (e.g., a chipset). Various components, modules, or units are described in the present disclosure to emphasize functional aspects of devices configured to perform the disclosed techniques, but do not necessarily require implementation by different hardware units. Specifically, as described above, the various units may be combined in a codec hardware unit, or provided by a collection of interoperable hardware units (including one or more processors as described above) in combination with appropriate software and / or firmware.

[0136] Various examples have been described. These and other examples are within the scope of the following claims.

Claims

1. A method for decoding video data, comprising: Predicting a block of the video data according to a combined inter / intra prediction mode to generate a predicted block, including generating a weighted combination of an intra prediction for the block and an inter prediction for the block, comprising: determining that an inter-prediction merge candidate is to be used for the inter-prediction and that the inter-prediction merge candidate is a bi-prediction candidate for which unequal weighting is indicated for bi-prediction of the block; and applying equal weighted averaging to perform the inter prediction for the combined inter / intra prediction to generate the prediction block; and The block of video data is decoded based on the prediction block.

2. The method according to claim 1, further comprising: A weight index for the inter prediction merge candidate is decoded, the weight index indicating that unequal weighting is to be used for bi-prediction of the block.

3. The method according to claim 1, further comprising: The intra prediction is performed for the block.

4. The method according to claim 1, further comprising: Data indicating the combined inter / intra prediction mode is decoded from the encoded video bitstream.

5. A method for encoding video data, comprising: Predicting a block of the video data according to a combined inter / intra prediction mode to generate a predicted block, including generating a weighted combination of an intra prediction for the block and an inter prediction for the block, comprising: determining that an inter prediction merge candidate is to be used for the inter prediction and the inter prediction merge candidate is a bi prediction candidate for which unequal weighting is indicated for bi prediction; and applying equal weighted averaging to perform the inter prediction for the combined inter / intra prediction to generate the prediction block; and The block of video data is encoded based on the prediction block.

6. The method according to claim 5, further comprising: A weight index for the inter prediction merge candidate is encoded, the weight index indicating that unequal weighting is to be used for bi-prediction of the block.

7. The method according to claim 5, further comprising: A weight index for the inter prediction merge candidate is modified, the weight index indicating that equal weights are to be used.

8. The method according to claim 5, further comprising: The intra prediction is performed for the block.

9. The method according to claim 8, wherein: Performing the intra prediction includes performing prediction according to a DC prediction mode based on the mode being a combined inter / intra prediction mode.

10. The method according to claim 5, further comprising: Data indicating the combined inter / intra prediction mode is encoded into a coded video bitstream.

11. The method according to claim 5, further comprising: A rate-distortion analysis is performed to select the combined inter / intra prediction mode.

12. The method according to claim 5, further comprising: The video data is captured using a video capture device.

13. An apparatus for encoding video data, comprising: a memory configured to store one or more reference pictures of the video data; A video processor configured to: predicting a block of the video data according to a combined inter / intra prediction mode to generate a predicted block, wherein the video processor is configured to generate a weighted combination of the intra prediction of the block and the inter prediction of the block, and wherein, to generate the weighted combination, the processor is configured to: determining that an inter prediction merge candidate is to be used for the inter prediction and the inter prediction merge candidate is a bi prediction candidate for which unequal weighting is indicated for bi prediction; and applying equal weighted averaging to perform the inter prediction for the combined inter / intra prediction to generate the prediction block; and The block of video data is encoded based on the prediction block.

14. The device according to claim 13, wherein: The apparatus includes one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

15. The apparatus according to claim 13, further comprising: A video capture device is configured to capture a picture comprising said block of video data.

16. The apparatus according to claim 13, further comprising: A display is configured to display a picture comprising the block of video data.

17. The device according to claim 13, wherein: The video processor is further configured to encode a weight index for the inter prediction merge candidate, the weight index indicating that unequal weighting is to be used for bi-prediction of the block.

18. The device according to claim 17, wherein: The video processor is further configured to modify a weight index for the inter prediction merge candidate, the weight index indicating that equal weights are to be used.

19. The device according to claim 13, wherein: The video processor is further configured to perform the intra prediction for the block.

20. The device according to claim 19, wherein To perform the intra prediction, the video processor is configured to perform prediction according to a DC prediction mode based on the mode being a combined inter / intra prediction mode.

21. The device according to claim 13, wherein: The video processor is further configured to encode data indicative of the combined inter / intra prediction mode into an encoded video bitstream.

22. The device according to claim 13, wherein: The video processor is further configured to perform a rate-distortion analysis to select the combined inter / intra prediction mode.

23. An apparatus for decoding video data, comprising: a memory configured to store one or more reference pictures of the video data; A video processor configured to: predicting a block of the video data according to a combined inter / intra prediction mode to generate a predicted block, wherein the video processor is configured to generate a weighted combination of the intra prediction of the block and the inter prediction of the block, and wherein, to generate the weighted combination, the processor is configured to: determining that an inter prediction merge candidate is to be used for the inter prediction and the inter prediction merge candidate is a bi prediction candidate for which unequal weighting is indicated for bi prediction; and applying equal weighted averaging to perform the inter prediction for the combined inter / intra prediction to generate the prediction block; and The block of video data is decoded based on the prediction block.

24. The device according to claim 23, wherein: The apparatus includes one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

25. The apparatus of claim 23, further comprising: A video capture device is configured to capture a picture comprising said block of video data.

26. The apparatus of claim 23, further comprising: A display is configured to display a picture comprising the block of video data.

27. The device according to claim 23, wherein: The video processor is further configured to decode a weight index for the inter prediction merge candidate, the weight index indicating that unequal weighting is to be used for bi-prediction of the block.

28. The device according to claim 23, wherein: The video processor is further configured to perform the intra prediction for the block.

29. The device according to claim 28, wherein To perform the intra prediction, the video processor is configured to perform prediction according to a DC prediction mode based on the mode being a combined inter / intra prediction mode.

30. The device according to claim 23, wherein: The video processor is further configured to decode data indicating the combined inter / intra prediction mode from the encoded video bitstream.

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