Semiconductor die with pressure and acceleration sensor elements

Abstract

Embodiments of the present disclosure relate to a semiconductor die with a pressure and acceleration sensor element. A semiconductor die is proposed, wherein the semiconductor die has a semiconductor chip. The semiconductor chip comprises a piezoresistive pressure sensor element and at least one capacitive acceleration sensor element. The piezoresistive pressure sensor element is arranged next to the capacitive acceleration sensor element. A method for manufacturing a semiconductor die is also proposed, wherein an insulating layer is applied to a semiconductor wafer, wherein a spacing of a single-crystalline cover layer is exposed by structuring the insulating layer, wherein a semiconductor layer is generated by depositing a semiconductor material, and wherein the semiconductor layer has a single-crystalline section and a polycrystalline section.

Description

TECHNICAL FIELD

[0001] The present invention relates to a sensor and to a semiconductor die for manufacturing a sensor. BACKGROUND

[0002] Modern sensors are increasingly manufactured on the basis of semiconductor dies. With the aid of mature semiconductor process technology, a number of functional units are manufactured together by processing a semiconductor wafer, wherein the processed semiconductor wafer is then divided into a plurality of semiconductor dies, which form the basis of individual sensors.

[0003] It is generally desirable to measure acceleration and pressure simultaneously with a sensor.

[0004] Therefore, it is proposed in US 2015 / 035093 A1 to manufacture a capacitive pressure sensor together with an inertial sensor. A method for manufacturing a MEMS sensor comprising a piezoresistive pressure sensor and a piezoresistive acceleration sensor is described in US 7972888 B1.

[0005] Likewise, it is proposed in US 2015 / 096376 A1 to combine an inertial sensor and a pressure sensor in a single semiconductor chip. The known pressure sensor is arranged above the known inertial sensor and is designed as a capacitive pressure sensor. In an alternative, but not explicitly described embodiment in US 2015 / 096376 A1, a piezoresistor is applied to the diaphragm of the known pressure sensor.

[0006] In order to manufacture the sensor described in US 2015 / 096376 A1, a number of process steps are required, which complicate the manufacture of the known sensor. SUMMARY

[0007] Therefore, there is a need for a sensor having both a pressure sensor element and an acceleration sensor element, which is characterized by improved manufacturability.

[0008] In order to meet this need, a semiconductor die and a method for manufacturing a semiconductor die according to the invention are proposed. Advantageous improvements are given in the following.

[0009] A semiconductor die is proposed, which comprises a semiconductor chip. The semiconductor chip comprises a piezoresistive pressure sensor element and at least one capacitive acceleration sensor element. The piezoresistive pressure sensor element is arranged next to the capacitive acceleration sensor element.

[0010] A method for manufacturing a semiconductor die is also proposed, wherein an insulating layer is applied to a semiconductor wafer, wherein a section of a single-crystalline cap layer is exposed by structuring the insulating layer, wherein a semiconductor layer is generated by depositing a semiconductor material, and wherein the semiconductor layer has a single-crystalline section and a polycrystalline section. BRIEF DESCRIPTION OF DRAWINGS

[0011] The proposed semiconductor die and the proposed method will now be explained in more detail with reference to the accompanying drawings. In which:

[0012] Figure 1 A wafer is shown;

[0013] Figure 2 A wafer in Figure 1 is shown after processing;

[0014] Figure 3 A wafer in Figure 2 is shown after processing;

[0015] Figure 4 A wafer in Figure 3 is shown after processing;

[0016] Figure 5 A wafer in Figure 4 is shown after processing;

[0017] Figure 6 A wafer in Figure 5 is shown after processing;

[0018] Figure 7 A wafer in Figure 6 is shown after processing;

[0019] Figure 8 A wafer in Figure 7 is shown after bonding;

[0020] Figure 9 A wafer in Figure 8 is shown after processing;

[0021] Figure 10 A sensor is shown;

[0022] Figure 11 A method for manufacturing a sensor is shown; and

[0023] Figure 12 A sensor is shown. DETAILED DESCRIPTION

[0024] Figure 1The wafer 100 shown comprises a substrate 101 with a single-crystalline cover layer. The substrate 101 can be a silicon substrate, for example. On the substrate 101, an insulating layer 102 is applied. The insulating layer 102 can be an insulating oxide layer, in particular a silicon oxide layer. On the insulating layer 102, a sensor surface 103 is applied. The sensor surface can be a sensor surface 103 composed of polysilicon. However, in principle, it is also conceivable to manufacture a sensor surface 103 composed of other materials.

[0025] Figure 2 A wafer 200 is shown after the wafer 100 has been further processed. In particular, an insulating material is further applied on the insulating layer 102, so that the insulating layer 102 also covers the sensor surface 103. In Figure 2 In the embodiment shown, the insulating layer 202 is shown as a single insulating layer 202. However, in principle, it is conceivable to use other materials after the application of the insulating layer 102, so that the insulating layer 202 will have two sub-layers.

[0026] Figure 3 A wafer 300 is shown which is derived from the further processing of the wafer 200. In particular, Figure 3 The insulating layer 302 is shown to have been structured. A section of the substrate with the single-crystalline cover layer is exposed. In the process of structuring, recesses 304 are introduced into the insulating layer 302.

[0027] After the insulating layer 302 has been structured, as Figure 4 is shown, a semiconductor layer 405, 406 is generated by depositing a semiconductor material. The semiconductor layer has a single-crystalline section 405 and a polycrystalline section 406. In particular, the deposition process can be chosen so that in the single-crystalline section 405, the semiconductor layer grows epitaxially starting from the single-crystalline cover layer exposed when the insulating layer was structured and the deposition on the insulating layer 304 causes a polycrystalline growth. For example, silicon can be deposited to manufacture the semiconductor layer.

[0028] After the deposition of the semiconductor material, the top surface of the wafer 400 can be flattened. This can be achieved by chemical mechanical polishing (CMP), for example. The thickness of the deposited semiconductor layer can be greater than 10 pm, in particular greater than 15 pm. It is also conceivable that the thickness of the semiconductor layer is less than 35 pm, in particular less than 25 pm. For example, the thickness of the semiconductor layer 405, 406 can be approximately 20 pm.

[0029] Figure 5 A semiconductor wafer 500 is shown which is obtained after trenches 507 have been introduced into the semiconductor wafer 400 to manufacture buried cavities.

[0030] After annealing the wafer in a hydrogen atmosphere (H2annealing), a Figure 6A wafer 600 is shown with buried cavities 608. The method of obtaining buried cavities 608 by manufacturing deep trenches 507 and subsequently annealing is also referred to as the Venezia process.

[0031] Figure 7 A wafer 700 is shown after exposing the acceleration mass 709 of the acceleration sensor element by structuring the poly-crystalline section and subsequently etching. The recess 304 results in a protrusion 704 which prevents the acceleration mass 709 from sticking to the sensor face 103 when the acceleration mass 709 moves. Furthermore, a contact face 710 is shown through which an electrical connection to the acceleration sensor element can be established. The pressure within the buried cavities 608 corresponds to the pressure at the time of annealing of the wafer 500. The pressure is typically less than 100 mbar, in particular less than 20 mbar. For example, the pressure within the buried cavities can be 13 mbar.

[0032] After the buried cavities 608 have been manufactured, a membrane can be implanted above the cavities 608 in order to form a piezo-resistive pressure sensor element therefrom.

[0033] In Figure 7 After the acceleration mass 709 has been exposed, a cover wafer 811 can be bonded to the processed wafer 700. Thereby, a piezo-resistive pressure sensor element 915 is obtained. Figure 8 A wafer 800 is shown in which an acceleration sensor element cavity 812 is formed. The pressure within the acceleration sensor element cavity 812 corresponds to the pressure at the time of bonding the cover wafer 811 to the wafer 700. The pressure can be adjusted. Typically, the pressure within the acceleration sensor element cavity 812 can exceed 500 mbar, in particular 900 mbar. The pressure can be sufficient to substantially suppress the movement of the acceleration sensor element mass 709.

[0034] Figure 9 A semiconductor die 900 is shown which is obtained after the wafer 800 has been segmented. The semiconductor die has a cover chip 911 and a semiconductor chip 916. The height of the semiconductor chip 916 can be less than 500 pm, in particular less than 350 pm. The thickness of the semiconductor chip is preferably about 300 pm. The thickness 917 of the cover chip 911 can be less than 250 pm, in particular less than 200 pm. In Figure 9 In the example shown, the thickness 917 of the cover chip 911 can be, for example, about 150 pm.

[0035] A via 913 is introduced from the back side of the semiconductor chip 916 in order to achieve a combination of the top face of the membrane of the piezo-resistive pressure sensor element 915 with the ambient pressure.

[0036] The capacitive acceleration sensor element 914 can be configured to measure accelerations in a direction perpendicular to the direction of the substrate 101. However, in an analogous manner, it is also conceivable to configure the acceleration sensor element 914 such that it can measure accelerations by movements of the acceleration sensor element mass in a direction parallel to the top side of the substrate. In particular, the sensitivity of the acceleration sensor element 914 in the plane of the semiconductor chip can be approximately the same as the sensitivity of the acceleration sensor element 914 in a direction perpendicular thereto. In comparison to piezo-resistive acceleration sensor elements, it is thus possible to provide a sensor whose sensitivity is essentially the same in all three spatial directions. Furthermore, it is possible to provide a plurality of acceleration sensor elements 914 which can measure not only accelerations in one direction, but also accelerations about an axis. This furthermore allows piezo-resistive pressure sensors to determine the pressure even when the diaphragm moves slightly. In particular, it is possible to dispense with covering the pressure sensor element 915 with a gel.

[0037] Figure 10 A sensor 1000 is shown which comprises a semiconductor die 900. The semiconductor die 900 is connected with a lead frame 1018 using an adhesive 1019. A control chip 1020 is applied onto the top side of the semiconductor die 900 using an adhesive 1021. The control chip 1020 can in particular have an integrated semiconductor circuit which can be used to evaluate signals from the piezo-resistive pressure sensor element 915 and the capacitive acceleration sensor element 914. For this purpose, contact surfaces 1022, 1023, 1026 are provided in order to establish electrical connections between the various chips by means of bonding wires 1024, 1025.

[0038] Figure 11 A further sensor is shown which has just been manufactured. As with the sensor 1000, Figure 11 The sensor shown shows a substrate 1101, an insulating layer 1102, a sensor surface 1103, a polycrystalline semiconductor material 1106, a buried cavity 1108, an acceleration sensor element mass 1109, a contact surface 1110, an acceleration sensor element cavity 1112, a cover chip 1111, a capacitive acceleration sensor element 1114, a piezo-resistive pressure sensor element 1115, a lead frame 1118, an adhesive 1119, contact surfaces 1122, 1123, bonding wires 1124, 1125, a contact surface 1126. In contrast to the sensor 1000, no through-hole 913 is provided which leads in from the rear side of the semiconductor chip.

[0039] Figure 11 A top half mold 1127 and a bottom half mold 1128 are also shown between which the sensor is arranged. A membrane 1129 is used for sealing during the introduction of the encapsulation material into the closed mold.

[0040] Figure 12The sensor is shown after the encapsulation material 1229 has been introduced and hardened. The upper mold half 1127 is designed such that the area above the pressure sensor element 1115 is not covered by the encapsulation material, thus constituting a through-hole 1213 through which the diaphragm of the pressure sensor element 1115 can react to the ambient pressure.

[0041] The side-by-side arrangement of the piezoresistive pressure sensor element 1115 and the capacitive acceleration sensor element 1114 as shown allows for the manufacturing of both elements in a common semiconductor deposition process and still obtaining the respective advantages of a piezoresistive pressure sensor and a capacitive acceleration sensor. Furthermore, the parallel manufacturing reduces the manufacturing time of the sensor. Finally, the sensor and semiconductor die presented here can be produced with the aid of existing semiconductor processing systems.

[0042] Some embodiments are defined by the following examples:

[0043] Example 1. A semiconductor die,

[0044] wherein the semiconductor die comprises a semiconductor chip,

[0045] wherein the semiconductor chip has:

[0046] a piezoresistive pressure sensor element and

[0047] at least one capacitive acceleration sensor element,

[0048] wherein the piezoresistive pressure sensor element is arranged next to the capacitive acceleration sensor element.

[0049] Example 2. A semiconductor die,

[0050] wherein the piezoresistive pressure sensor element has a buried cavity.

[0051] Example 3. A semiconductor die,

[0052] wherein the gas pressure in the cavity is less than 15 mbar.

[0053] Example 4. A semiconductor die,

[0054] wherein the piezoresistive pressure sensor element has a diaphragm made of a single-crystalline semiconductor material.

[0055] Example 5. A semiconductor chip,

[0056] wherein the acceleration sensor element is a multi-axis acceleration sensor element, in particular a three-axis acceleration sensor element.

[0057] Example 6. A semiconductor die,

[0058] wherein the acceleration sensor element has a movable acceleration mass made of a polycrystalline semiconductor material.

[0059] Example 7. Semiconductor chip,

[0060] wherein the semiconductor die has a cap chip,

[0061] wherein the cap chip and the semiconductor chip are interconnected by means of bonding.

[0062] Example 8. Semiconductor chip,

[0063] wherein an acceleration sensor element cavity is formed between the semiconductor die and the cap chip, the acceleration mass being arranged in the acceleration sensor element cavity.

[0064] Example 9. Semiconductor die,

[0065] wherein the cap chip comprises an integrated circuit.

[0066] Example 10. Method for manufacturing a semiconductor die, in particular for manufacturing a semiconductor die according to any one of examples 1 to 9,

[0067] wherein a semiconductor wafer having a single-crystalline cap layer is provided,

[0068] wherein an insulating layer is applied to the semiconductor wafer,

[0069] wherein sections of the single-crystalline cap layer are exposed by structuring the insulating layer,

[0070] wherein the semiconductor layer is generated by depositing a semiconductor material, in particular silicon,

[0071] wherein the semiconductor layer has single-crystalline sections and polycrystalline sections.

[0072] Example 11. Method according to example 10,

[0073] a buried cavity is generated in the device single-crystalline sections.

[0074] Example 12. Method according to example 10 or 11,

[0075] wherein in the polycrystalline sections, a structured acceleration mass is formed.

[0076] While specific embodiments have been illustrated and described herein, it will be appreciated that various alternative and / or equivalent implementations can be substituted for the specific embodiments shown and described without departing from the scope of the present disclosure. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, it is intended that the application be limited only by the claims and the equivalents thereof.

Claims

1. A semiconductor die (900), wherein the semiconductor die (900) has a semiconductor chip and a cover chip (911) covering the semiconductor chip, wherein the semiconductor chip has a piezoresistive pressure sensor element (915) and at least one capacitive acceleration sensor element (914), wherein the semiconductor chip comprises a substrate (101) and an intermediate layer arranged between the substrate and the cover chip (911), wherein the piezoresistive pressure sensor element (915) and the capacitive acceleration sensor element (914) are located in the intermediate layer and are arranged side by side at a side facing the cover chip (911) such that the capacitive acceleration sensor element (914) senses a pressure when the cover chip (911) is bonded onto the semiconductor chip and enables a combination of a top side of a diaphragm of the piezoresistive pressure sensor element (915) with an ambient pressure.

2. The semiconductor die (900) according to claim 1, wherein the piezoresistive pressure sensor element (915) has a buried cavity (608).

3. The semiconductor die (900) according to claim 2, wherein a gas pressure in the cavity (608) is less than 15 mbar.

4. The semiconductor die (900) according to any one of claims 1 to 3, wherein the acceleration sensor element (914) is a multi-axis acceleration sensor element.

5. The semiconductor die (900) according to claim 4, wherein the multi-axis acceleration sensor element is a tri-axial acceleration sensor element.

6. The semiconductor die (900) according to any one of claims 1 to 3, wherein the cover chip (911) and the semiconductor chip are interconnected by means of bonding.

7. The semiconductor die (900) according to any one of claims 1 to 3, wherein between the semiconductor die (900) and the cover chip an acceleration sensor element cavity is formed, in which an acceleration mass (709) is arranged.

8. The semiconductor die according to any one of claims 1 to 3, wherein the cover chip comprises an integrated circuit.

9. The semiconductor die according to any one of claims 1 to 3, wherein the piezoresistive pressure sensor element (915) has a diaphragm made of a single crystalline semiconductor material.

10. The semiconductor die according to any one of claims 1 to 3, wherein the capacitive acceleration sensor element (914) has a movable acceleration mass (709) made of a polycrystalline semiconductor material.

11. A method for manufacturing a semiconductor die (900), the method being for manufacturing a semiconductor die (900) according to any one of claims 1 to 10, wherein a semiconductor wafer having a single crystalline cover layer is provided, wherein an insulating layer is applied to the semiconductor wafer, wherein sections of the single crystalline cover layer are exposed by structuring the insulating layer, wherein a semiconductor layer is generated by depositing a semiconductor material, wherein the semiconductor layer has single crystalline sections and polycrystalline sections.

12. The method of claim 11, wherein the semiconductor material is silicon.

13. The method of claim 11, generating a buried cavity in the single-crystalline section.

14. The method of any one of claims 11 to 13, wherein in the polycrystalline section, a structured acceleration mass.

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