Adaptive conditioning system for electronic device packaging
By using a negative temperature coefficient resistive material connected in series with a thermoelectric cooler in the electronic device package, adaptive cooling is achieved, solving the problems of complexity and space constraints in active cooling systems, and improving cooling efficiency and system adaptability.
Patent Information
- Application Number
- CN202110237166.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-09-03
- Filing Date
- 2021-03-03
- Publication Date
- 2025-11-11
- Estimated Expiration
- 2041-03-03
AI Technical Summary
Existing active cooling systems for electronic devices are complex, space-constrained, and component failures can affect performance, requiring specific tuning procedures to operate under specific conditions.
By using a resistive material with a negative temperature coefficient connected in series with a thermoelectric cooler, the resistance is automatically adjusted by sensing temperature changes to control the voltage and current supply, thus achieving adaptive cooling.
The cooling system is simplified, reducing reliance on additional hardware and software, improving system adaptability and cooling efficiency, and reducing complexity and space requirements.
Smart Images

Figure CN114141731B_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present invention generally relate to cooling of electronic devices. More specifically, embodiments of the present invention relate to methods for packaging electronic devices and adaptive adjustment systems. Background Technology
[0002] Active cooling control systems for integrated circuit (IC) devices typically require hardware and / or software components (including sensors, cabling, and software) to regulate system temperature. In some cases, component failure in the cooling control system can negatively impact system performance. Additionally, such regulation systems increase packaging complexity.
[0003] For electronic device packaging, space is limited to implement active cooling systems for the device package. Furthermore, dedicated active cooling systems may require specific tuning procedures to operate under specific conditions. Summary of the Invention
[0004] In one aspect, the present invention provides an adaptive electronic device package, comprising:
[0005] A resistive material with a negative temperature coefficient of resistivity, said resistive material being thermally coupled to an electronic chip; and
[0006] A thermoelectric cooler is thermally coupled to the electronic chip, and the thermoelectric cooler is electrically connected in series with the resistive material and the power supply to cool the electronic chip.
[0007] If the temperature of the electronic chip increases, the resistance of the resistive material decreases, resulting in an increase in the voltage / current supplied to the thermoelectric cooler; and if the temperature of the electronic chip decreases, the resistance of the resistive material increases, resulting in a decrease in the voltage / current supplied to the thermoelectric cooler.
[0008] In another aspect, the present invention provides a method for adaptive electronic device packaging, comprising:
[0009] Measure the temperature at one or more sensing locations on the package of an electronic device;
[0010] If the measured temperature is higher than the target temperature, reduce the resistance of the resistive material with a negative temperature coefficient.
[0011] If the measured temperature is lower than the target temperature, then the resistance of the resistive material with a negative temperature coefficient is increased; and
[0012] The voltage is increased or decreased and supplied to a thermoelectric cooler that is thermally coupled to the electronic chip packaged in the electronic device.
[0013] The supply is based on the change in resistance of the resistive material, wherein the increase or decrease in voltage supplied to the thermoelectric cooler causes the temperature measured at the one or more sensing locations to decrease or increase, respectively.
[0014] The thermoelectric cooler is electrically connected in series with the resistive material and the power source to cool the electronic chip, wherein if the temperature of the electronic chip increases, the resistance of the resistive material decreases, resulting in an increase in the voltage supplied to the thermoelectric cooler, and if the temperature of the electronic chip decreases, the resistance of the resistive material increases, resulting in a decrease in the voltage supplied to the thermoelectric cooler. Attached Figure Description
[0015] The embodiments of the present invention are illustrated by way of example and are not limited to the figures in the accompanying drawings, in which the same reference numerals denote similar elements.
[0016] Figure 1 This is a block diagram showing a side view of an adaptive electronic device package according to one embodiment.
[0017] Figure 2 This is a block diagram showing a side view of an adaptive electronic device package according to another embodiment.
[0018] Figure 3 This is a block diagram showing a side view of an adaptive electronic device package according to another embodiment.
[0019] Figure 4A This is a block diagram showing a side view of an adaptive electronic device package with a fan according to another embodiment.
[0020] Figure 4B This is a block diagram showing a side view of an adaptive electronic device package with fluid cooling according to another embodiment.
[0021] Figure 5 This is a block diagram showing a side view of an adaptive electronic device package according to another embodiment.
[0022] Figure 6 A flowchart illustrating the temperature regulation of an electronic device package according to one embodiment is shown.
[0023] Figure 7 A flowchart illustrating the adjustment of the temperature of an electronic device package according to another embodiment is shown.
[0024] Figure 8 A flowchart based on one implementation scheme is shown. Detailed Implementation
[0025] Various embodiments and aspects of the invention will be described with reference to the details of the following discussion, and the accompanying drawings will illustrate the various embodiments. The following description and drawings are illustrative of the invention and should not be construed as limiting the invention. Numerous specific details are described to provide a thorough understanding of various embodiments of the invention. However, in some cases, well-known or conventional details have not been described in order to provide a brief discussion of embodiments of the invention.
[0026] The reference to "one embodiment" or "an embodiment" in the specification means that a particular feature, structure, or characteristic described in connection with that embodiment can be included in at least one embodiment of the invention. The phrase "in one embodiment" appearing in various places in the specification does not necessarily refer to the same embodiment.
[0027] The embodiments disclosed herein provide thermoelectric / Peltier cooling solutions for cooling IC chips / devices within integrated circuit (IC) packages. This cooling solution can be added to existing IC packages, or it can be partially implemented as an embedded component of the IC within the package. While embodiments for IC packaging are disclosed, the following embodiments can also be applied to other industrial processes for controlling and optimizing thermoelectric conversion, etc.
[0028] According to the first aspect, the self-acclimating electronics package includes an electronic chip, a resistive material with a negative temperature coefficient of resistivity (thermally coupled to the electronic chip), and a thermoelectric cooler thermally coupled to the electronic chip. The thermoelectric cooler is electrically connected in series with the resistive material and a power supply to cool the electronic chip, wherein if the temperature of the electronic chip increases, the resistance of the resistive material decreases, resulting in an increase in the voltage supplied to the thermoelectric cooler connected in series in the loop, and if the temperature of the electronic chip decreases, the resistance of the resistive material increases, resulting in a decrease in the voltage supplied to the thermoelectric cooler. This flexible adaptive cooling system eliminates any control hardware, firmware and / or software, and control algorithms that may be unreliable, expensive, complex, and potentially require additional package space and / or adjustments.
[0029] In one embodiment, the thermoelectric cooler includes a first thermally conductive layer, a second thermally conductive layer thermally coupled to an electronic chip, a first plurality of electrically conductive pads thermally coupled to the first thermally conductive layer, a second plurality of electrically conductive pads thermally coupled to the second thermally conductive layer, and a plurality of alternating p-type and n-type semiconductor pillars sandwiched between (or thermally connected between) the first and second thermally conductive layers. The p-type and n-type semiconductor pillars are electrically connected in series via the first plurality of electrically conductive pads and the second plurality of electrically conductive pads to receive a voltage supply.
[0030] In one embodiment, a resistive material is located between a portion of the electronic chip and a second thermally conductive layer, wherein the resistive material senses the temperature at that portion of the electronic chip. In another embodiment, the resistive material is embedded in at least one of a second plurality of electrically conductive pads thermally coupled to the second thermally conductive layer, which is thermally coupled to a portion of the electronic chip, wherein the resistive material senses the temperature of the second thermally conductive layer.
[0031] In one embodiment, the adaptive electronics device package further includes a second resistive material disposed in at least one of a first plurality of electrically conductive pads thermally coupled to a first thermally conductive layer, wherein the second resistive material senses temperature at a portion of the first thermally conductive layer. In one embodiment, the adaptive electronics device package further includes a fan for air cooling, wherein the resistive material is electrically connected to the fan to regulate the voltage supplied to the fan.
[0032] In one embodiment, the adaptive electronic device package further includes a cooling plate thermally coupled to a portion of a first thermally conductive layer, wherein resistive material is electrically connected to a liquid (or fluid) pump / valve to regulate the liquid flow for cooling the cooling plate. In one embodiment, the resistive material with a resistivity having a negative temperature coefficient includes silicon. In one embodiment, the resistive material is an embedded component of an electronic chip.
[0033] According to a second aspect, an adaptive electronic device package is disclosed. A resistive material senses / measures temperature at one or more sensing locations within the electronic device package. If the measured temperature is greater than a target temperature, the resistance of the resistive material having a negative temperature coefficient of resistivity is reduced. If the measured temperature is less than the target temperature, the resistance of the resistive material having a negative temperature coefficient of resistivity is increased. The adaptive electronic device package supplies an increased or decreased voltage to a thermoelectric cooler thermally coupled to an electronic chip within the electronic device package, wherein the increased or decreased voltage supplied to the thermoelectric cooler causes the measured temperature at one or more sensing locations to decrease or increase, respectively. The thermoelectric cooler is electrically connected in series with the resistive material and a power source to cool the electronic chip, wherein if the temperature of the electronic chip increases, the resistance of the resistive material decreases, resulting in an increase in the voltage supplied to the thermoelectric cooler, and if the temperature of the electronic chip decreases, the resistance of the resistive material increases, resulting in a decrease in the voltage supplied to the thermoelectric cooler.
[0034] In one embodiment, the thermoelectric cooler includes a first thermal conductor, a second thermally conductive layer thermally coupled to an electronic chip, a first plurality of electrically conductive pads thermally coupled to the first thermally conductive layer, a second plurality of electrically conductive pads thermally coupled to the second thermally conductive layer, and a plurality of alternating p-type and n-type semiconductor pillars sandwiched between the first and second thermally conductive layers. The p-type and n-type semiconductor pillars are electrically connected in series via the first plurality of electrically conductive pads and the second plurality of electrically conductive pads to receive a voltage supply.
[0035] In one embodiment, a resistive material is located between a portion of the electronic chip and a second thermally conductive layer, wherein the resistive material senses the temperature at that portion of the electronic chip. In another embodiment, a resistive material is disposed in at least one of a second plurality of electrically conductive pads thermally coupled to a second thermally conductive layer thermally coupled to a portion of the electronic chip, wherein the resistive material senses the temperature at that portion of the electronic chip.
[0036] In one embodiment, a second resistive material is disposed in at least one of a first plurality of electrically conductive pads thermally coupled to a first thermally conductive layer, wherein the second resistive material senses temperature at a portion of the first thermally conductive layer. In one embodiment, based on an increase or decrease in resistance, the adaptive electronic device package also supplies an increased or decreased voltage to a fan for air cooling of the electronic device package, wherein supplying the increased or decreased voltage to the fan causes a decrease or increase in temperature, respectively, at one or more sensing locations.
[0037] In one implementation, based on an increase or decrease in resistance, the adaptive electronic device package also supplies an increased or decreased voltage to a liquid pump that regulates the flow of liquid cooling a cooling plate for liquid cooling of the electronic device package, wherein the cooling plate is attached to a first thermally conductive layer, wherein the increased or decreased voltage supplied to the liquid pump causes the temperature measured at one or more sensing locations to decrease or increase, respectively.
[0038] In one embodiment, the resistive material with a negative temperature coefficient of resistivity includes silicon. In another embodiment, the resistive material is embedded in an electronic chip.
[0039] Figure 1 This is a block diagram showing a side view of an adaptive electronic device package according to one embodiment. In this example, Figure 1 A side view of an adaptive electronics device package 100 is shown. The adaptive electronics device package can be an electronics device package for any type of electronic chip, such as processors, integrated circuits (ICs), application-specific integrated circuits (ASICs), electronic sensors, microelectromechanical systems (MEMS) electronics, etc. See also Figure 1 According to one embodiment, the electronic device package 100 includes an electronic chip 111, one or more resistive materials 110, a thermoelectric cooler (TEC) device 120, and a heat sink 101. In one embodiment, the heat sink 101 may alternatively be a liquid cooling plate / cold plate (not shown), and the resistor is connected in series with a controller, such as a valve and / or a pump (not shown), that circulates liquid to cool the cooling plate / cold plate.
[0040] In one embodiment, the TEC device 120 includes a semiconductor layer 105. The semiconductor layer 105 is electrically coupled in series via a first electrically conductive pad group 103 and a second electrically conductive pad group 107. The first electrically conductive pad group 103 is located on a first side (e.g., a heat dissipation side) of the semiconductor layer 105, and the second electrically conductive pad group 107 is located on a second side (e.g., a heat absorption side) of the semiconductor layer 105. The TEC device 120 also includes a first thermally conductive layer 102 and a second thermally conductive layer 108. The first thermally conductive layer 102 and the second thermally conductive layer 108 sandwich the first electrically conductive pad group 103, the semiconductor layer 105, and the second electrically conductive pad group 107. In one embodiment, the first thermally conductive layer 102 and the second thermally conductive layer 108 may comprise ceramic, a substrate (e.g., silicon dioxide), or any type of thermally conductive and electrically insulating material.
[0041] Reference Figure 1An electronic chip 111 is placed on a packaging mold 109 (e.g., an epoxy resin mold), where the electronic chip 111 needs to be cooled to a target temperature via a TEC 120. The electronic chip 111 is thermally coupled to one or more resistive materials 110 (or resistors) with a resistivity having a negative temperature coefficient. Here, one or more resistive materials (e.g., resistors) 110 are electrically connected in series with the TEC device 120 and interconnect 104 via interconnect 106, wherein interconnect 104 supplies power to the TEC device 120. One or more resistive materials 110 can dynamically self-adjust according to thermal conditions that cause changes in resistance within the resistor. Changes in the resistance of the resistor, in turn, result in changes in the voltage or current supplied to the TEC device 120.
[0042] For example, a change in the resistance of resistor 110 causes a change in the load supplied to the resistor / TEC device 120, which is displayed as a constant DC voltage, based on the equation P = V^2 / R, where P is the power, V is the constant DC voltage, and R is the resistance of resistor 110. The changing load causes a change in the power supplied to the TEC device 120. Here, the resistor can be represented by the formula R = R o (1+a*dT) is determined, where R represents the resistance of resistor 110 at the operating temperature, R0 represents the initial resistance, R0 = dT = zero R, a represents the temperature coefficient of resistivity of resistor 110 (here, the selected material has negative a), and dT represents the difference between the operating temperature of resistor 110 and the reference temperature specified for resistor a.
[0043] In some implementations, one or more resistors are disposed at multiple locations on the IC to be cooled. Examples of locations may be areas of high heat flux (e.g., directly at the IC), areas with high thermal resistance in a normal orientation, or areas with strong performance correlation to the heat dissipation side (e.g., the side that removes heat, the side of heat sink 101). In one implementation, the one or more resistors may have any shape, size, or form. For example, the resistor may be strip-shaped, rectangular, circular, sheet-shaped, or tapered, or a combination thereof, which may be determined based on design requirements for the resistor's resistance. For example, the area on top of the electronic chip 111 may be covered by resistor 110, which may be the most heat-sensitive area. As another example, the electronic chip may be partially covered by a resistor, or the resistor may have a larger area than the electronic chip and cover the electronic chip.
[0044] The resistance of the resistor can be determined based on the target cooling temperature of the electronic chip 111 (e.g., approximately the operating temperature of the resistor). For example, for a silicon resistor (with approximately a = -0.07 / degree Celsius), based on a target cooling temperature of 30 degrees Celsius and a reference temperature of 20 degrees Celsius, dT = 30 - 20 = 10, R = Ro (1 + -0.07*(10)) = 0.3*r o Therefore, the resistance of resistor 110 can be selected based on the target temperature of electronic chip 111.
[0045] Figure 2 This is a block diagram showing a side view of an adaptive electronic device package according to another embodiment. The electronic device package 200 can be similar to the electronic device package 100 with a modified configuration. For example, the electronic device package 200 may have wires 104 on two opposite sides of the package 200. In one embodiment, resistors 110 may be disposed at one or more pads of conductive pad 107 to form a series electrical connection connecting TEC 120 to wires 104, which are connected to a power source (not shown). In this modified configuration, as... Figure 1 The interconnect 106 shown is not required.
[0046] Reference Figure 2 Semiconductor layer 105 includes one or more P-semiconductor materials 201 and one or more N-semiconductor materials 202. The alternating P and N semiconductor materials 201-202 are electrically connected in series (via conductive pads 103 and 107) and thermally connected in parallel (via thermally conductive layers 102 and 108). When DC current flows through the P and N semiconductor materials 201-202, for the TEC device 120, heat is absorbed on the heat-absorbing side and released on the heat-dissipating side, both on the hot and cold sides.
[0047] Figure 3 This is a block diagram showing a side view of an adaptive electronic device package according to another embodiment. The electronic device package 300 can be similar to... Figure 2 Electronic device package 200. Reference. Figure 3 Resistor 110 may be disposed on one or more pads at both conductive pad 103 and conductive pad 107. In another embodiment, one or more conductive pads 103 and 107 may be replaced by resistor 110. Here, the adaptive process will be driven by resistor 110 at conductive pad 107 for sensing the operating temperature of electronic chip 111 and resistor 110 at conductive pad 103 for sensing the temperature of the heat dissipation side of electronic device package 300.
[0048] In another embodiment, the resistive material (or one or more resistors) comprises a plurality of sub-resistors connected in parallel and / or series configurations, and as... Figure 1 As shown, it is thermally coupled to the electronic chip 111, or as... Figure 2-3 The diagram shows the integration of different wires into the conductive layers 103 / 107.
[0049] Figure 4AThis is a block diagram showing a side view of an adaptive electronic device package according to another embodiment. The electronic device package 400 can be similar to... Figure 2 Electronic device package 200. Reference. Figure 4A A resistor 110 with a negative temperature coefficient of resistivity can be disposed on one or more pads at conductive pad 107 and can be positioned close to / adjacent to the electronic chip 111. Here, the resistor 110 adjacent to the electronic chip 111 forms a series connection with a power supply (not shown) and a fan 401 powered by a motor. In one embodiment, for the resistor 110 adjacent to the electronic chip 111, the resistance of the resistor 110 adjacent to the electronic chip 111 decreases when the sensed temperature rises. The decrease / increase in resistance causes the power (P = V^2 / R) to increase / decrease, thereby increasing / decreaseing the power and the speed of the fan 401. For example, an increase in the speed of the fan 401 subsequently removes heat from the "heat dissipation side" of the electronic device package 400 more quickly.
[0050] Figure 4B This is a block diagram showing a side view of an adaptive electronic device package with fluid cooling according to another embodiment. The electronic device package 410 can be similar to... Figure 4A The electronic device package is 400. (Refer to...) Figure 4B A resistor 110 adjacent to the electronic chip 111 is connected in series with a power supply (not shown), a pump 412, and / or a valve 413. In one embodiment, for the resistor 110 adjacent to the electronic chip 111, the resistance of the resistor 110 decreases as the sensed temperature increases. The decrease in resistance results in an increase in power (P = V^2 / R), thereby increasing the power to the pump 412 and / or the valve 413. In one embodiment, the pump 412 and / or the valve 413 can be operated to increase / decrease the fluid flow rate to cool the cold plate 411. For example, increasing the power to the pump 412 and / or the valve 413 can be used to remove heat more quickly from the "heat dissipation side" of the electronic device package 410.
[0051] Figure 5 This is a block diagram showing a side view of an adaptive electronic device package according to another embodiment. The electronic device package 500 can be similar to... Figure 2 Electronic device package 200. (Refer to...) Figure 5 The electronic chip 501 includes a resistor 110 embedded within it. Here, the resistor 110 may comprise silicon material 110 deposited on a portion of the electronic chip 501 during its fabrication. The electronic chip 501 may include additional pins 502 as positive terminals connected to the silicon material 110, wherein these additional pins 502 are included as specific pin definitions and are included in the pinout diagram of the electronic chip 501.
[0052] Figure 6 A flowchart illustrating the temperature regulation of an electronic device package according to one embodiment is shown. Process 600 may be performed using a temperature-dependent resistive material (e.g., Figure 1-5 The electronic device uses an adaptive circuit with a 100-500 ohm resistor (110). See reference... Figure 6 The process begins at operation 601. At operation 602, one or more resistors 110 sense / measure the temperature at one or more locations near a portion of the electronic chip to be cooled. At operation 603, if it is determined that the measured temperature equals a target temperature (e.g., equilibrium), the process proceeds to operation 602. Here, the target temperature approximates the desired operating temperature of the electronic chip in the adaptive electronic device package. Otherwise, the process proceeds to operation 604. At operation 604, if it is determined that the measured temperature is greater than the target temperature, the process proceeds to operation 605. Otherwise, the process proceeds to operation 608. At operation 605, the higher measured temperature of the resistive material causes a decrease in the resistance of the resistive material. At operation 606, the decrease in resistance of resistor 110 increases the voltage or current to the TEC, which causes a decrease in the temperature of the heat-absorbing side of the TEC, for example, an increase in ΔT(dT) of the TEC. Subsequently, the measured temperature of the resistive material decreases. At operation 607, if it is determined that the measured temperature equals a target temperature (e.g., equilibrium), the process proceeds to operation 602. Otherwise, the process proceeds to operation 604.
[0053] In operation 608, the lower measurement temperature causes an increase in the resistance of the resistive material. In operation 609, the increased resistance of the resistive material reduces the power of the TEC device, which leads to an increase in temperature on the heat-absorbing side of the TEC device; for example, the ΔT(dT) of the TEC device decreases. Consequently, the measurement temperature of the resistive material increases. It should be noted that the disclosed adaptive electronic device package implementation adjusts the temperature close to the electronic chip by design based on the selection of a target temperature without a dedicated temperature controller.
[0054] Figure 7 A flowchart illustrating the temperature regulation of an electronic device package according to another embodiment is shown. Process 700 can be performed by an adaptive circuit having a temperature-dependent resistive material (e.g., resistor 110 of the electronic device package 400 in FIG. 4). Process 700 can use a fan (e.g., fan 401 in FIG. 4) to adapt the electronic chips in the electronic device package to remove heat from the heat dissipation side of the electronic device package faster or slower. Process 700 is similar to [other implementation details omitted]. Except that operation 606 is replaced by operation 706 and operation 609 is replaced by operation 709, process 700 is similar to [other implementation details omitted]. Figure 6In process 600, when the resistance of the resistive material 110 (connected in series with the fan 401) decreases due to a higher measured temperature, in operation 706, the series connection of the resistive material 110 with the fan results in an increase in power to the fan, and therefore, an increase in fan speed. The increased fan speed reduces the temperature on the heat dissipation side of the electronic device package more quickly. When the resistance of the resistive material increases due to a lower measured temperature, in operation 709, the series connection of the resistive material with the fan results in a decrease in power to the fan, and therefore, a decrease in fan speed. The decreased fan speed reduces the temperature on the heat dissipation side of the electronic device package at a slower rate.
[0055] Figure 8 A flowchart according to one embodiment is shown. Process 800 can be comprised of an package having coupling to an adaptive electronic device (e.g., Figure 1-5 This process is performed using an adaptive circuit for a temperature-dependent resistive material (e.g., resistor 110 in Figure 4) in the fan and / or TEC device of any electronic device package (100-500). In operation 801, the process measures the temperature at one or more sensing locations within the electronic device package. In operation 802, if the measured temperature is greater than a target temperature, the process decreases the resistance of the resistive material with a negative temperature coefficient of resistivity. In operation 803, if the measured temperature is less than the target temperature, the process increases the resistance of the resistive material with a negative temperature coefficient of resistivity. In operation 804, the process supplies an increased or decreased voltage to a thermoelectric cooler thermally coupled to the electronic chip of the electronic device package, wherein the supply is based on a change in the resistance of the resistive material, and the increased or decreased voltage supplied to the thermoelectric cooler causes the measured temperature at one or more sensing locations to decrease or increase, respectively. The thermoelectric cooler is electrically connected in series with the resistive material and a power supply to cool the electronic chip, wherein if the temperature of the electronic chip increases, the resistance of the resistive material decreases, resulting in an increase in the voltage supplied to the thermoelectric cooler, and if the temperature of the electronic chip decreases, the resistance of the resistive material increases, resulting in a decrease in the voltage supplied to the thermoelectric cooler. Changes in the voltage supplied to the thermoelectric cooler cause changes in the heat transfer and pumping capacity of the TEC, which in turn leads to adjustments in the temperature difference between the absorption and dissipation sides of the TEC.
[0056] In the foregoing description, embodiments of the invention have been described with reference to specific exemplary embodiments. It will be apparent that various modifications may be made to the embodiments without departing from the broader spirit and scope of the invention as set forth in the appended claims. Therefore, the description and drawings should be considered illustrative rather than restrictive.
Claims
1. An adaptive electronic device package, comprising: A resistive material with a negative temperature coefficient of resistivity, said resistive material being thermally coupled to an electronic chip; and A thermoelectric cooler is thermally coupled to the electronic chip, and the thermoelectric cooler is electrically connected in series with the resistive material and the power supply to cool the electronic chip. If the temperature of the electronic chip increases, the resistance of the resistive material decreases, resulting in an increase in the voltage / current supplied to the thermoelectric cooler; and if the temperature of the electronic chip decreases, the resistance of the resistive material increases, resulting in a decrease in the voltage / current supplied to the thermoelectric cooler. The thermoelectric cooler includes: a first heat-conducting layer, and a first plurality of electrically conductive pads thermally coupled to the first heat-conducting layer; The adaptive electronic device package further includes a second resistive material disposed in at least one of the first plurality of electrically conductive pads, at least one of the first plurality of electrically conductive pads being thermally coupled to the first thermally conductive layer, wherein the second resistive material senses the temperature at a portion of the first thermally conductive layer.
2. The adaptive electronic device package of claim 1, wherein the thermoelectric cooler comprises: A second thermally conductive layer thermally coupled to a portion of the electronic chip; A second plurality of electrically conductive pads thermally coupled to the second thermally conductive layer; and Multiple alternating p-type and n-type semiconductor pillars are sandwiched between a first thermally conductive layer and a second thermally conductive layer, wherein the multiple p-type and n-type semiconductor pillars are electrically connected in series via a first plurality of electrically conductive pads and a second plurality of electrically conductive pads to receive power supply.
3. The adaptive electronic device package of claim 2, wherein the resistive material is located between the portion of the electronic chip and the second thermally conductive layer, wherein the resistive material senses the temperature at the portion of the electronic chip.
4. The adaptive electronic device package of claim 2, wherein the resistive material is disposed in at least one of the second plurality of electrically conductive pads, at least one of the second plurality of electrically conductive pads is thermally coupled to the second thermally conductive layer, the second thermally conductive layer is thermally coupled to a portion of the electronic chip, wherein the resistive material senses the temperature at the second thermally conductive layer.
5. The adaptive electronic device package of claim 1, further comprising a fan for air cooling, wherein the resistive material is electrically connected to the fan to regulate the power supplied to the fan.
6. The adaptive electronic device package of claim 1, further comprising a liquid cooling plate thermally coupled to a portion of the first thermally conductive layer, wherein the resistive material is electrically connected to a liquid pump to regulate the liquid flow cooling the liquid cooling plate.
7. The adaptive electronic device package of claim 1, wherein the resistive material having a negative temperature coefficient of resistivity comprises silicon.
8. The adaptive electronic device package of claim 2, wherein the resistive material is embedded in the electronic chip.
9. The adaptive electronic device package of claim 2, wherein the resistive material comprises a plurality of sub-resistors connected in parallel and / or series configuration.
10. A method for packaging an adaptive electronic device, comprising: Measure the temperature at one or more sensing locations on the package of an electronic device; If the measured temperature is higher than the target temperature, reduce the resistance of the resistive material with a negative temperature coefficient. If the measured temperature is lower than the target temperature, then the resistance of the resistive material with a negative temperature coefficient is increased; and The voltage is increased or decreased and supplied to a thermoelectric cooler that is thermally coupled to the electronic chip packaged in the electronic device. The supply is based on the change in resistance of the resistive material, wherein the increase or decrease in voltage supplied to the thermoelectric cooler causes the temperature measured at the one or more sensing locations to decrease or increase, respectively. The thermoelectric cooler is electrically connected in series with the resistive material and the power supply to cool the electronic chip, wherein if the temperature of the electronic chip increases, the resistance of the resistive material decreases, resulting in an increase in the voltage supplied to the thermoelectric cooler, and if the temperature of the electronic chip decreases, the resistance of the resistive material increases, resulting in a decrease in the voltage supplied to the thermoelectric cooler. The thermoelectric cooler includes: a first heat-conducting layer, and a first plurality of electrically conductive pads thermally coupled to the first heat-conducting layer; The electronic device package includes a second resistive material disposed in at least one of the plurality of electrically conductive pads, the at least one of the plurality of electrically conductive pads being thermally coupled to the first thermally conductive layer, wherein the second resistive material senses the temperature at a portion of the first thermally conductive layer.
11. The method of claim 10, wherein the thermoelectric cooler comprises: A second thermally conductive layer thermally coupled to a portion of the electronic chip; A second plurality of electrically conductive pads thermally coupled to the second thermally conductive layer; and Multiple alternating p-type and n-type semiconductor pillars are sandwiched between a first thermally conductive layer and a second thermally conductive layer, wherein the multiple p-type and n-type semiconductor pillars are electrically connected in series via a first plurality of electrically conductive pads and a second plurality of electrically conductive pads to receive voltage supply.
12. The method of claim 11, wherein the resistive material is located between the portion of the electronic chip and the second thermally conductive layer, wherein the resistive material senses the temperature at the portion of the electronic chip.
13. The method of claim 11, wherein the resistive material is disposed in at least one of the second plurality of electrically conductive pads, at least one of the second plurality of electrically conductive pads is thermally coupled to the second thermally conductive layer, the second thermally conductive layer is thermally coupled to a portion of the electronic chip, wherein the resistive material senses the temperature at said portion of the electronic chip.
14. The method of claim 10, further comprising supplying the increased or decreased voltage to a fan to air cool the electronic device package based on the increase or decrease of the resistance, wherein supplying the increased or decreased voltage to the fan causes the temperature measured at the one or more sensing locations to decrease or increase, respectively.
15. The method of claim 11, further comprising supplying the increased or decreased voltage to a liquid pump based on the increase or decrease of the resistance, the liquid pump regulating the liquid flow for cooling a cooling plate for liquid cooling of the electronic device package, wherein the cooling plate is attached to the first thermally conductive layer, wherein the increased or decreased voltage supplied to the liquid pump causes the temperature measured at the one or more sensing locations to decrease or increase, respectively.
16. The method of claim 10, wherein the resistive material having a negative temperature coefficient of resistivity comprises silicon.
17. The method of claim 11, wherein the resistive material is embedded in the electronic chip.
18. The method of claim 11, wherein the resistive material comprises a plurality of sub-resistors connected in parallel and / or series configuration.
Citation Information
Patent Citations
Temperature control method, temperature control apparatus, and optical device
US20110006124A1
Intrinsically controlled cooling container
WO1993008600A1