Semiconductor Structure and Method of Forming the Same

Abstract

A semiconductor structure and a method for forming the same, wherein the method includes: providing a substrate, the substrate including a first region, and a fin material film being on the surface of the first region; forming a first opening in the fin material film on the first region; forming a second opening in the substrate of the first region, the first opening and the second opening being in communication; forming a conductive plug in the second opening, the top surface of the conductive plug being exposed at the bottom of the first opening. The first opening and the second opening are formed by etching the substrate of the first region and the fin material film on the surface of the substrate. Since the thickness of the fin material film is small, the distance from the bottom of the formed second opening to the top surface of the fin material film is small, thereby reducing the difficulty of forming the second opening, reducing the process difficulty, and improving the topography of the second opening.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and particularly to a semiconductor structure and a method for forming the same. Background Art

[0002] When forming a device including multiple semiconductor devices such as integrated circuits, standard cells can be used as the basic units for designing and manufacturing integrated circuits. Standard cells can be used to form one or more functional circuits, and each standard cell can have the same footprint (e.g., can have a standard footprint). Using standard cells in designing complex circuits and components reduces design and manufacturing costs. Each standard cell requires a power supply (Vdd) input and a ground (Vss) connection. To supply power to its various components, each standard cell is usually coupled to a power rail that is electrically connected to the active layer of the standard cell to provide the power supply (Vdd). In some cases, multiple power rails can be provided for each standard cell to respectively provide the power supply (Vdd) and the ground (Vss).

[0003] With the further development of semiconductor technology, the size of integrated circuit devices is getting smaller and smaller. To further reduce the area of standard cells, by burying the power rails in the substrate, the space within the substrate can be fully utilized. And, by providing the power rails in the substrate, it is beneficial to achieve a better aspect ratio, thereby helping to reduce the resistance of the power rails.

[0004] However, the performance of existing semiconductor structures with power rails formed in the substrate is still poor. Summary of the Invention

[0005] The technical problem solved by the present invention is to provide a semiconductor structure and a method for forming the same to reduce the process difficulty.

[0006] To solve the above technical problem, the technical solution of the present invention provides a semiconductor structure, including: a substrate, the substrate includes a first region, and a plurality of discrete fin structures are provided on the surface of the first region; a first opening between adjacent fin structures on the first region; a second opening in the substrate of the first region, the first opening and the second opening are connected; a conductive plug located in the second opening, and the top surface of the conductive plug is exposed at the bottom of the first opening.

[0007] Optionally, the substrate further includes: a second region adjacent to the first region; the plurality of discrete fin structures are also provided on the second region.

[0008] Optionally, the size of the first opening is larger than the size of the second opening.

[0009] Optionally, the fin structure includes a plurality of first fin layers stacked along the normal direction of the substrate surface, and second fin layers located between adjacent first fin layers, and the materials of the first fin layers and the second fin layers are different.

[0010] Optionally, the conductive plug includes: an insulating layer located on the bottom and sidewall surfaces of the second opening; a conductive layer located on the surface of the insulating layer, and the conductive layer fills the second opening.

[0011] Optionally, the material of the insulating layer includes one or a combination of several of: silicon oxide, silicon nitride, silicon carbonitride, silicon boronitride, silicon carbon oxynitride, silicon oxynitride; the material of the conductive layer includes one or a combination of several of: ruthenium, copper, tungsten, aluminum, titanium, titanium nitride, tantalum.

[0012] Optionally, it further includes: an isolation layer located on the surface of the substrate and the surface of the conductive plug, and the isolation layer covers the sidewall surface of part of the fin structure.

[0013] Optionally, the material of the isolation layer includes one or a combination of several of: silicon oxide, silicon nitride, silicon carbonitride, silicon boronitride, silicon carbon oxynitride, silicon oxynitride.

[0014] Correspondingly, the technical solution of the present invention further provides a method for forming a semiconductor structure, including: providing a substrate, the substrate includes a first region, and a fin material film is provided on the surface of the first region; forming a first opening in the fin material film on the first region; forming a second opening in the substrate of the first region, and the first opening and the second opening are communicated; forming a conductive plug in the second opening, and the top surface of the conductive plug is exposed at the bottom of the first opening.

[0015] Optionally, the substrate further includes: a second region adjacent to the first region, and the fin material film is also located on the surface of the second region.

[0016] Optionally, it further includes: before forming the first opening and the second opening, forming a first mask layer on the surface of the fin material film, and the first mask layer exposes part of the surface of the fin material film.

[0017] Optionally, the method for forming the first mask layer includes: forming discrete axis layers on the surface of the fin material film; forming a first mask material film on the surface of the fin material film and the top and sidewall surfaces of the axis layers; back-etching the first mask material film until the top surface of the axis layer and the surface of the fin material film are exposed to form the first mask layer.

[0018] Optionally, after forming the first mask layer, the axis layer is removed.

[0019] Optionally, the method for forming the first opening and the second opening includes: forming a patterned layer on the fin material film, the patterned layer exposing a part of the surface of the fin material film, and the patterned layer covering the top and sidewall surfaces of the first mask layer; using the patterned layer as a mask to etch the fin material film until the surface of the substrate is exposed, and forming the first opening in the fin material film in the first region; using the patterned layer as a mask to etch a part of the substrate, and forming the second opening in the substrate in the first region; after forming the second opening, removing the patterned layer.

[0020] Optionally, it further includes: after forming the first opening and before forming the second opening, forming a second mask layer on the sidewall surface of the first opening; after forming the second mask layer, using the patterned layer and the second mask layer as masks to etch a part of the substrate, and forming the second opening in the substrate; after forming the second opening, removing the patterned layer and the second mask layer.

[0021] Optionally, the thickness range of the second mask layer is from 30 angstroms to 100 angstroms.

[0022] Optionally, the method for forming the second mask layer includes: forming a second mask material film on the bottom and sidewalls of the first opening and the surface of the patterned layer; back-etching the second mask material film until the bottom of the first opening is exposed, and forming the second mask layer on the sidewall surface of the first opening.

[0023] Optionally, the method for forming the conductive plug includes: forming an insulating material film on the bottom and sidewall surfaces of the second opening, the sidewall surface of the first opening, and the surface of the fin material film; forming a conductive material film on the surface of the insulating material film, and the conductive material film filling the second opening; back-etching the conductive material film until the bottom of the first opening is exposed, and forming the conductive plug.

[0024] Optionally, it further includes: after forming the conductive plug, etching the fin material film until the surface of the substrate is exposed, forming a plurality of discrete fin structures, and the first opening exposing the sidewall surface of the fin structure in the first region; forming an isolation layer on the surface of the substrate and the surface of the conductive plug, the isolation layer covering a part of the sidewall surface of the fin structure.

[0025] Optionally, it further includes: after forming the conductive plug and before forming the fin structure, forming an initial isolation layer in the first opening; after forming the initial isolation layer, removing the core layer.

[0026] Optionally, the method for etching the fin material film to form a plurality of discrete fin structures includes: using the first mask layer and the initial isolation layer as masks, etching the fin material film until the substrate surface is exposed to form the fin structures.

[0027] Optionally, the method for forming the isolation layer includes: forming an isolation material film on the substrate surface, the isolation material film covering the surface of the initial isolation layer, and the top surface of the isolation material film being higher than the top surface of the fin structure; planarizing the isolation material film and the initial isolation layer until the top surface of the fin structure is exposed to form an initial isolation material layer; and back-etching the initial isolation material layer to form the isolation layer.

[0028] Optionally, the fin material film includes a plurality of first fin material films stacked along the normal direction of the substrate surface and second fin material films located between adjacent first fin material films, and the materials of the first fin material film and the second fin material film are different; etching the fin material film so that the first fin material film forms a first fin layer and the second fin material film forms a second fin layer, and the first fin layer and the second fin layer constitute the fin structure.

[0029] Optionally, a protective layer is further provided on the surface of the fin material film, and the first mask layer is located on the surface of the protective layer.

[0030] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0031] In the method for forming a semiconductor structure provided by the technical solution of the present invention, before forming the isolation layer, a second opening is formed in the substrate. The first opening and the second opening are formed by etching the first region substrate and the fin material film on the substrate surface. Since the thickness of the fin material film is small, the distance from the bottom of the formed second opening to the top surface of the fin material film is small, thereby reducing the difficulty of forming the second opening, reducing the process difficulty, and improving the topography of the second opening.

[0032] Further, after forming the first opening and before forming the second opening, the method further includes: forming a second mask layer on the sidewall surface of the first opening. The function of the second mask layer is that, on the one hand, the second mask layer can protect the fin material film on the sidewall of the first opening, so that during the process of etching the substrate to form the second opening, it is not easy to cause etching damage to the fin material film. On the other hand, by using the second mask layer and the patterned layer as masks to etch the substrate, the size of the formed second opening is smaller than that of the first opening. Thus, the substrate located at the bottom of the first opening can compensate for the weakening effect of the second opening on the stress, so that during the subsequent process of etching to form the fin structure, the stress on both sides of the fin structure by the substrate is relatively consistent, and thus the fin structure is not easy to tilt. In summary, it is beneficial to improve the performance of the formed semiconductor structure.

[0033] Further, since the size of the first opening is larger than that of the second opening, the first opening not only exposes the conductive plug but also exposes a part of the substrate surface. By forming an initial isolation layer in the first opening on the first region before etching the fin material film to form the fin structure, the initial isolation layer covers the substrate at the bottom of the first opening, so that during the process of etching the fin material film with the first mask layer as a mask, due to the protection of the initial isolation layer, the process of etching the fin material film will not cause etching damage to the substrate material and the conductive plug material exposed at the bottom of the first opening, which is beneficial to improving the performance of the formed semiconductor structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figures 1 to 3 is a schematic structural diagram of each step of a method for forming an existing semiconductor structure;

[0035] Figures 4 to 15 is a schematic structural diagram of each step of a method for forming a semiconductor structure according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0036] It should be noted that the "surface" and "upper" in this specification are used to describe the relative positional relationship in space and do not limit whether there is direct contact.

[0037] First, the reasons for the poor performance of the existing semiconductor structure will be described in detail with reference to the accompanying drawings. Figures 1 to 3 is a schematic structural diagram of each step of a method for forming an existing semiconductor structure.

[0038] Please refer to Figure 1 , a substrate 100 is provided, and a fin material film (not shown in the figure) is provided on the surface of the substrate 100; the fin material film is etched to form discrete fin structures 110.

[0039] Please refer to Figure 2, an isolation layer 120 covering the fin structure 110 is formed on the substrate 100, and the top surface of the isolation layer 120 is higher than the top surface of the fin structure 110.

[0040] Please refer to Figure 3 , etch the isolation layer 120 and the substrate 100 at the bottom of the isolation layer 120 to form a first opening 130 in the isolation layer 120 and a second opening (not shown in the figure) in the substrate 100; form a conductive plug 140 in the second opening.

[0041] In the above method, the conductive plug 140 is used as a power rail of a standard cell to provide power. By forming the conductive plug 140 in the substrate 100, on the one hand, the conductive plug 140 is located in the substrate 100, which is beneficial to saving the area on the substrate 100. On the other hand, a second opening with a smaller aspect ratio can be formed in the substrate 100, which is beneficial to reducing the resistance of the conductive plug 140 formed in the second opening.

[0042] However, in order to form the conductive plug 140 in the substrate 100, it is necessary to etch the isolation layer 120. After forming a first opening 130 exposing the surface of the substrate 100 in the isolation layer 120, continue to etch the substrate 100 at the bottom of the first opening 130 to form a second opening in the substrate 100. After forming the second opening, form a conductive plug 140 in the second opening. Since the function of the isolation layer 120 is, on the one hand, to electrically isolate adjacent fin structures 110, and on the other hand, to provide support for the subsequent formation of metal wires, the thickness of the isolation layer 120 is usually greater than the thickness of the fin structure 110, and the thickness of the isolation layer 120 is relatively large. The relatively large thickness of the isolation layer 120 makes the distance from the bottom of the second opening to the top surface of the isolation layer 120 relatively large, which easily leads to a relatively large etching process difficulty in forming the second opening in the substrate 100.

[0043] To solve the above technical problems, an embodiment of the present invention provides a semiconductor structure and a method for forming the same. By etching the fin material film and the substrate, a first opening is formed in the fin material film in the first region; a second opening is formed in the substrate in the first region, and the first opening and the second opening are connected; a conductive plug is formed in the second opening, and the top surface of the conductive plug is exposed at the bottom of the first opening. The first opening and the second opening are formed by etching the substrate in the first region and the fin material film on the surface of the substrate. Since the thickness of the fin material film is relatively small, the distance from the bottom of the formed second opening to the top surface of the fin material film is relatively small, thereby reducing the difficulty of forming the second opening, reducing the process difficulty, and improving the morphology of the second opening.

[0044] To make the above objects, features, and beneficial effects of the present invention more obvious and understandable, the following specifically describes the embodiments of the present invention in detail with reference to the accompanying drawings.

[0045] Figures 4 to 15 It is a schematic structural diagram of each step of a method for forming a semiconductor structure in an embodiment of the present invention.

[0046] Please refer to Figure 4 , provide a substrate 200, the substrate 200 includes a first region I, and a fin material film is provided on the surface of the first region I.

[0047] In this embodiment, the substrate 200 further includes: a second region II adjacent to the first region I, and the fin material film is also located on the surface of the second region II.

[0048] In this embodiment, the substrate 200 is single-crystalline silicon. In other embodiments, the material of the substrate can also be semiconductor materials such as single-crystalline germanium, silicon germanide, gallium arsenide, etc., and can also be a semiconductor-on-insulator structure.

[0049] The fin material film includes a plurality of first fin material films 211 stacked along the normal direction of the surface of the substrate 200 and second fin material films 212 located between adjacent first fin material films 211, and the materials of the first fin material films 211 and the second fin material films 212 are different.

[0050] In this embodiment, the material of the first fin material film 211 is silicon, and the material of the second fin material film 212 is silicon germanium.

[0051] In this embodiment, a protective layer 213 is further provided on the surface of the fin material film.

[0052] The protective layer 213 is used to protect the surface of the fin material film, reduce damage to the fin material film caused by subsequent processes, and thus is beneficial to improving the performance of the formed semiconductor structure.

[0053] In this embodiment, the protective layer 213 includes: a first protection part 2131 located on the surface of the fin material film, a second protection part 2132 located on the surface of the first protection part 2131, and a third protection part 2133 located on the surface of the second protection part 2132.

[0054] In this embodiment, the material of the first protection part 2131 is silicon oxide; the material of the second protection part 2132 is silicon oxide; the material of the third protection part 2133 is silicon nitride. Among them, the first protection part 2131 is formed by a furnace tube process, the second protection part 2132 is formed by a deposition process, and the first protection part 2131 has higher density, so it can play a better role in protecting the fin material film

[0055] Please refer to Figure 5 , a first mask layer 220 is formed on the surface of the fin material film, and a part of the surface of the fin material film is exposed by the first mask layer 220.

[0056] The first mask layer 220 is used as a mask for subsequent etching of the fin material film to form a fin structure.

[0057] Specifically, the first mask layer 220 is located on the surface of the protective layer 213, and the first mask layer 220 exposes the surface of the protective layer 213 on the surface of the fin material film.

[0058] In this embodiment, the first mask layer 220 is formed by using a multiple patterning process.

[0059] The forming method of the first mask layer 220 includes: forming discrete axis layers 221 on the surface of the fin material film; forming a first mask material film (not shown in the figure) on the surface of the fin material film and the top and sidewall surfaces of the axis layers 221; back-etching the first mask material film until the top surface of the axis layer 221 and the surface of the fin material film are exposed, so as to form the first mask layer 220.

[0060] The material of the first mask layer 220 is different from that of the axis layer 221.

[0061] In this embodiment, the material of the axis layer 221 is a carbon-oxygen-containing organic material, and the material of the first mask layer 220 is silicon nitride.

[0062] In this embodiment, after the first mask layer 220 is formed, the axis layer 221 is not removed.

[0063] In other embodiments, after the first mask layer is formed, the axis layer may also be removed.

[0064] Next, a first opening is formed in the fin material film on the first region I; a second opening is formed in the substrate 200 of the first region I, and the first opening and the second opening are communicated with each other. For the specific process of forming the first opening and the second opening, please refer to Figures 6 to 9 .

[0065] Please refer to Figure 6 , a patterned layer 230 is formed on the fin material film, the patterned layer 230 exposes a part of the surface of the fin material film, and the patterned layer 230 covers the top and sidewall surfaces of the first mask layer 220.

[0066] The patterned layer 230 is used as a mask for subsequent formation of the first opening and the second opening.

[0067] Specifically, in this embodiment, the patterning layer 230 also covers the surface of the axis layer 221.

[0068] In this embodiment, the material of the patterning layer 230 is photoresist, and the patterning layer 230 is formed by a photolithography process. The patterning layer 230 has a pattern therein.

[0069] Please refer to Figure 7 , using the patterning layer 230 as a mask, etching the fin material film until the surface of the substrate 200 is exposed, and forming the first opening 241 in the fin material film on the first region I.

[0070] Specifically, the fin material film and the protective layer 213 on the surface of the fin material film are etched to form the first opening 241 in the fin material film and the protective layer 213.

[0071] The process of etching the fin material film includes one or a combination of two of a dry etching process and a wet etching process.

[0072] In this embodiment, the first opening 241 is formed by a dry etching process, which is beneficial to forming a first opening 241 with a better sidewall topography.

[0073] Please refer to Figure 8 , and a second mask layer 250 is formed on the sidewall surface of the first opening 241.

[0074] The thickness range of the second mask layer 250 is 30 Å to 100 Å.

[0075] The thickness refers to the dimension in the extending direction of the fin material film.

[0076] The significance of selecting the second mask layer 250 with the thickness range is as follows: If the thickness is less than 30 Å, for the second mask layer 250 with too thin a thickness, on the one hand, the second mask layer 250 cannot sufficiently protect the fin material film on the sidewall of the first opening 241, resulting in that during the subsequent formation of the second opening, it is still easy to cause etching damage to the fin material film; on the other hand, the degree to which the first opening 241 is larger than the second opening is too small, and the stress of the substrate 200 at the bottom of the first opening 241 on the fin material film is still small, so that during the subsequent etching process of the fin material film, the formed fin structure is still relatively easy to tilt; if the thickness is greater than 100 Å, it will cause the size of the subsequently formed second opening to be too small, which is not conducive to filling the material in the second opening to form a conductive structure, resulting in a poor performance of the formed semiconductor structure.

[0077] The function of the second mask layer 250 is as follows. On the one hand, the second mask layer 250 can protect the fin material film on the sidewall of the first opening 241, so that during the subsequent etching process of the second opening formed in the substrate 200, it is not easy to cause etching damage to the fin material film. On the other hand, by etching the substrate 200 using the second mask layer 250 and the patterning layer 230 as masks, the size of the subsequently formed second opening is smaller than that of the first opening 241. As a result, the portion of the substrate 200 at the bottom of the first opening 241 can compensate for the weakening effect of the second opening on the stress, so that during the subsequent etching process of forming the fin structure, the stress on both sides of the fin structure by the substrate 200 is relatively consistent, and thus the fin structure is not prone to tilt. In summary, forming the second mask layer 250 is beneficial to improving the performance of the formed semiconductor structure.

[0078] The forming method of the second mask layer 250 includes: forming a second mask material film (not shown in the figure) on the bottom and sidewall of the first opening 241 and the surface of the patterning layer 230; back-etching the second mask material film until the bottom of the first opening 241 is exposed, and forming the second mask layer 250 on the surface of the sidewall of the first opening 241.

[0079] The materials of the second mask layer 250 and the first mask layer 220 are different. Therefore, during the process of back-etching the second mask material film to form the second mask layer 250, the first mask layer 220 will not be damaged by etching, so that the pattern accuracy of etching and forming the fin structure using the first mask layer 220 as a mask subsequently is better.

[0080] In this embodiment, the material of the second mask layer 250 is silicon oxide.

[0081] Please refer to Figure 9 , after forming the second mask layer 250, using the patterning layer 230 and the second mask layer 250 as masks, etching a part of the substrate 200 to form a second opening 242 in the substrate 200.

[0082] Since the first opening 241 is formed by etching using the patterning layer 230 as a mask, and the second opening 242 is formed by etching using the patterning layer 230 and the second mask layer 250 as masks, therefore, the size W1 of the first opening 241 is greater than the size W2 of the second opening 242.

[0083] It should be noted that the size refers to the size in the extending direction of the fin material film.

[0084] In this embodiment, it further includes: after forming the second opening 242, removing the patterning layer 230 and the second mask layer 250.

[0085] Next, a conductive plug is formed in the second opening 242, and the top surface of the conductive plug is exposed at the bottom of the first opening 241. For the specific process of forming the conductive plug, please refer to Figures 10 to 11 .

[0086] Please refer to Figure 10 , an insulating material film 261 is formed on the bottom and side wall surfaces of the second opening 242, the side wall surface of the first opening 241, and the surface of the fin material film; a conductive material film 262 is formed on the surface of the insulating material film 261, and the second opening 242 is filled with the conductive material film 262.

[0087] The insulating material film 261 and the conductive material film 262 provide materials for the subsequent formation of the conductive plug.

[0088] Specifically, in this embodiment, the insulating material film 261 is located on the surface of the protective layer 213 on the surface of the fin material film, and is located on the surface of the first mask layer 220 and the axis layer 221.

[0089] The material of the insulating material film 261 includes: one or a combination of several of silicon oxide, silicon nitride, silicon carbonitride, silicon boronitride, silicon carbon oxynitride, and silicon oxynitride.

[0090] In this embodiment, the material of the insulating material film 261 is silicon oxide.

[0091] The material of the conductive material film 262 includes: one or a combination of several of ruthenium, copper, tungsten, aluminum, titanium, titanium nitride, and tantalum.

[0092] In this embodiment, the material of the conductive material film 262 is ruthenium.

[0093] Please refer to Figure 11 , the conductive material film 262 is etched back until the bottom of the first opening 241 is exposed to form the conductive plug 270.

[0094] Specifically, the conductive material film 262 is etched back to form a conductive layer 272, and the conductive plug 270 includes the conductive layer 272.

[0095] In this embodiment, during the process of etching back the conductive material film 262, the insulating material film 261 is also etched back to form an insulating layer 271. The insulating layer 271 is located on the bottom and side wall surfaces of the second opening 242. The conductive plug 270 includes the insulating layer 271 and the conductive layer 272 on the surface of the insulating layer 271, and the conductive layer 272 fills the second opening 242.

[0096] Please refer to Figure 12, an initial isolation layer 280 is formed within the first opening 241.

[0097] The initial isolation layer 280 is used to protect the conductive plug 270 and the substrate 200 at the bottom of the first opening 241.

[0098] Since the size W1 of the first opening 241 is larger than the size W2 of the second opening 242, the first opening 241 not only exposes the conductive plug 270 but also exposes a portion of the surface of the substrate 200. By forming the initial isolation layer 280 within the first opening 241 in the first region I before etching the fin material film to form the fin structure, the initial isolation layer 280 covers the substrate 200 and the conductive plug 270 at the bottom of the first opening 241. During the process of etching the fin material film using the first mask layer 220 as a mask, due to the protective effect of the initial isolation layer 280, the etching process of the fin material film will not cause etching damage to the substrate 200 material and the conductive plug 270 material exposed at the bottom of the first opening 241, which is beneficial to improving the performance of the formed semiconductor structure.

[0099] In this embodiment, after forming the initial isolation layer 280, the core layer 221 is removed.

[0100] In this embodiment, after forming the fin structure, the initial isolation layer 280 is not removed, so that the initial isolation layer also provides materials for the subsequent formation of the isolation layer.

[0101] The material of the initial isolation layer 280 includes one or a combination of several of: silicon oxide, silicon nitride, silicon carbonitride, silicon boronitride, silicon carbon oxynitride, silicon oxynitride. In this embodiment, the material of the initial isolation layer 280 is silicon oxide.

[0102] In this embodiment, the initial isolation layer 280 is formed by a fluid chemical vapor deposition process, which is beneficial for the formed initial isolation layer 280 to better fill the first opening 241.

[0103] Please refer to Figure 13 , etch the fin material film until the surface of the substrate 200 is exposed to form a plurality of discrete fin structures, and the first opening 241 (as Figure 11 shown) exposes the sidewall surface of the fin structure in the first region I.

[0104] Specifically, in this embodiment, after forming the initial isolation layer 280, using the first mask layer 220 and the initial isolation layer 280 as masks, etch the fin material film until the surface of the substrate 200 is exposed to form the fin structure, and the initial isolation layer 280 located within the first opening 241 is on the sidewall surface of the fin structure in the first region I.

[0105] In this embodiment, when etching the fin material film with the first mask layer 220 and the initial isolation layer 280 as masks, the protective layer 213 on the surface of the fin material film is also etched.

[0106] The fin structure includes a plurality of first fin layers 291 stacked along the normal direction of the surface of the substrate 200, and second fin layers 292 located between adjacent first fin layers 291, and the materials of the first fin layer 291 and the second fin layer 292 are different.

[0107] Next, an isolation layer is formed on the surface of the substrate 200 and the surface of the conductive plug 270, and the isolation layer covers the side wall surfaces of part of the fin structure. For the specific process of forming the isolation layer, please refer to Figures 14 to 15 .

[0108] Please refer to Figure 14 , an isolation material film 281 is formed on the surface of the substrate 200, the isolation material film 281 covers the surface of the initial isolation layer 280, and the top surface of the isolation material film 281 is higher than the top surface of the fin structure.

[0109] The isolation material film 281 is used to provide materials for forming the isolation layer subsequently.

[0110] In this embodiment, the initial isolation layer 280 is not removed after the fin structure is formed, so that the initial isolation layer 280 can provide materials for forming the isolation layer subsequently, which is beneficial to saving process time and process cost.

[0111] In this embodiment, the materials of the initial isolation layer 280 and the isolation material film 281 are the same, which is silicon oxide. In other embodiments, the materials of the initial isolation layer and the isolation material film are different.

[0112] In this embodiment, the isolation material film 281 is formed by a fluid chemical vapor deposition process, which is beneficial to enabling the isolation material film 281 to be better filled between adjacent fin structures.

[0113] Please refer to Figure 15 , planarize the isolation material film 281 and the initial isolation layer 280 until the top surface of the fin structure is exposed to form an initial isolation material layer (not shown in the figure); back-etch the initial isolation material layer to form the isolation layer 282.

[0114] The function of the isolation layer 282 is to perform electrical isolation between different devices.

[0115] In this embodiment, the process of planarizing the isolation material film 281 and the initial isolation layer 280 is a chemical mechanical polishing process.

[0116] Specifically, in this embodiment, the isolation layer 282 includes a first isolation portion 2821 formed by etching an isolation material film 281 and a second isolation portion 2822 formed by etching an initial isolation layer 280.

[0117] Correspondingly, an embodiment of the present invention further provides a semiconductor structure formed by the above method. Please continue to refer to Figure 13 , including: a substrate 200, the substrate 200 includes a first region I, and the surface of the first region I has a plurality of discrete fin structures; a first opening 241 between adjacent fin structures on the first region I; a second opening 242 in the substrate 200 of the first region I, the first opening 241 and the second opening 242 are connected; a conductive plug 270 in the second opening 242 ( Figure 9 as shown), the top surface of the conductive plug 270 is exposed at the bottom of the first opening 241.

[0118] The substrate 200 further includes: a second region II adjacent to the first region I; the plurality of discrete fin structures are also located on the second region II.

[0119] The size W1 of the first opening 241 is greater than the size W2 of the second opening 242.

[0120] The fin structure includes a plurality of first fin layers 291 stacked along the normal direction of the surface of the substrate 200, and second fin layers 292 located between adjacent first fin layers 291, and the materials of the first fin layers 291 and the second fin layers 292 are different.

[0121] The conductive plug 270 includes: an insulating layer 271 on the bottom and side wall surfaces of the second opening 242; a conductive layer 272 on the surface of the insulating layer 271, and the conductive layer 272 fills the second opening 242.

[0122] The material of the insulating layer 271 includes: one or a combination of several of silicon oxide, silicon nitride, silicon carbonitride, silicon boronitride, silicon carbon oxynitride, silicon oxynitride; the material of the conductive layer 272 includes: one or a combination of several of ruthenium, copper, tungsten, aluminum, titanium, titanium nitride, tantalum.

[0123] In this embodiment, the material of the conductive layer 272 is ruthenium.

[0124] The semiconductor structure further includes: an isolation layer 282 on the surface of the substrate 200 and the surface of the conductive plug 270, and the isolation layer 282 covers the side wall surfaces of some fin structures.

[0125] The materials of the isolation layer 282 include one or a combination of several of silicon oxide, silicon nitride, silicon carbonitride, silicon boronitride, silicon carbon oxynitride, and silicon oxynitride.

[0126] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be subject to the scope defined by the claims.

Claims

1. A semiconductor structure, characterized in that, Comprising: A substrate, the substrate including a first region, the surface of the first region having a plurality of discrete fin structures; A first opening located between adjacent fin structures on the first region and above the substrate; A second isolation portion located within the first opening, the second isolation portion being on the substrate and covering the sidewall surfaces of some of the fin structures; A second opening within the substrate of the first region, the first opening and the second opening being in communication; A conductive plug located within the second opening, the top surface of the conductive plug being exposed at the bottom of the first opening; The size of the first opening is larger than the size of the second opening, the first opening exposing the conductive plug and a portion of the substrate surface on both sides of the conductive plug, the conductive plug filling the second opening, and the second isolation portion exposing the top surface of the fin structures.

2. The semiconductor structure according to claim 1, wherein The substrate further includes: a second region adjacent to the first region; the plurality of discrete fin structures are also located on the second region.

3. The semiconductor structure according to claim 1, wherein The fin structure includes a plurality of first fin layers stacked along the normal direction of the substrate surface, and second fin layers located between adjacent first fin layers, and the materials of the first fin layer and the second fin layer are different.

4. The semiconductor structure according to claim 1, wherein, The conductive plug includes: an insulating layer located on the bottom and sidewall surfaces of the second opening; a conductive layer located on the surface of the insulating layer, and the conductive layer fills the second opening.

5. The semiconductor structure according to claim 4, characterized in that, The material of the insulating layer includes: one or several combinations of silicon oxide, silicon nitride, silicon carbonitride, silicon boronitride, silicon carbon oxynitride, silicon oxynitride; the material of the conductive layer includes: one or several combinations of ruthenium, copper, tungsten, aluminum, titanium, titanium nitride, tantalum.

6. The semiconductor structure according to claim 1, wherein, Further comprising: A first isolation portion located on the substrate surface and the surface of the conductive plug, the first isolation portion covering the sidewall surfaces of some of the fin structures; The first isolation portion and the second isolation portion form an isolation layer.

7. The semiconductor structure according to claim 6, characterized in that, The material of the isolation layer includes: one or several combinations of silicon oxide, silicon nitride, silicon carbonitride, silicon boronitride, silicon carbon oxynitride, silicon oxynitride.

8. A method for forming a semiconductor structure, characterized in that, Comprising: Providing a substrate, the substrate including a first region, the substrate surface of the first region having a fin material film; Forming a first opening in the fin material film on the first region; Forming a second opening in the substrate of the first region, the first opening and the second opening being in communication; Forming a conductive plug in the second opening, the top surface of the conductive plug being exposed at the bottom of the first opening; Forming a second isolation portion in the first opening, the second isolation portion being on the substrate and covering the sidewall surfaces of some of the fin structures; The size of the first opening is larger than the size of the second opening, the first opening exposing the conductive plug and a portion of the substrate surface on both sides of the conductive plug, the conductive plug filling the second opening, and the second isolation portion exposing the top surface of the fin structures.

9. The method for forming a semiconductor structure according to claim 8, wherein, The substrate further includes: a second region adjacent to the first region, and the fin material film is also located on the surface of the second region.

10. The method for forming a semiconductor structure according to claim 8, wherein, Further comprising: Before forming the first opening and the second opening, a first mask layer is formed on the surface of the fin material film, and the first mask layer exposes a part of the surface of the fin material film.

11. The method for forming a semiconductor structure as described in claim 10, characterized in that, The method for forming the first mask layer includes: forming discrete axis layers on the surface of the fin material film; forming a first mask material film on the surface of the fin material film and on the top and sidewall surfaces of the axis layers; and back-etching the first mask material film until the top surface of the axis layer and the surface of the fin material film are exposed to form the first mask layer.

12. The method for forming a semiconductor structure according to claim 11, wherein, After forming the first mask layer, the axis layer is removed.

13. The method for forming a semiconductor structure according to claim 10, wherein, The method for forming the first opening and the second opening includes: forming a patterned layer on the fin material film, the patterned layer exposing a part of the surface of the fin material film and covering the top and sidewall surfaces of the first mask layer; using the patterned layer as a mask to etch the fin material film until the surface of the substrate is exposed, and forming the first opening in the fin material film in the first region; using the patterned layer as a mask to etch a part of the substrate to form the second opening in the substrate in the first region; and after forming the second opening, removing the patterned layer.

14. The method for forming a semiconductor structure as described in claim 13, wherein, It further includes: After forming the first opening and before forming the second opening, a second mask layer is formed on the sidewall surface of the first opening; After forming the second mask layer, using the patterned layer and the second mask layer as masks to etch a part of the substrate to form the second opening in the substrate; After forming the second opening, removing the patterned layer and the second mask layer.

15. The method for forming a semiconductor structure according to claim 14, wherein, The thickness range of the second mask layer is from 30 angstroms to 100 angstroms.

16. The method for forming a semiconductor structure according to claim 14, wherein The method for forming the second mask layer includes: forming a second mask material film on the bottom and sidewalls of the first opening and on the surface of the patterned layer; and back-etching the second mask material film until the bottom of the first opening is exposed to form the second mask layer on the sidewall surface of the first opening.

17. The method for forming a semiconductor structure according to claim 8, wherein, The method for forming the conductive plug includes: forming an insulating material film on the bottom and sidewall surfaces of the second opening, on the sidewall surface of the first opening, and on the surface of the fin material film; forming a conductive material film on the surface of the insulating material film, and the conductive material film filling the second opening; and back-etching the conductive material film until the bottom of the first opening is exposed to form the conductive plug.

18. The method for forming a semiconductor structure according to claim 11, wherein, It further includes: A first isolation part located on the surface of the substrate and on the surface of the conductive plug, the first isolation part covering a part of the sidewall surface of the fin structure; The first isolation part and the second isolation part form an isolation layer; The method for forming the isolation layer includes: after forming the conductive plug, etching the fin material film until the surface of the substrate is exposed to form a plurality of discrete fin structures, and the first opening exposing the sidewall surface of the fin structure in the first region; forming an isolation layer on the surface of the substrate and on the surface of the conductive plug, the isolation layer covering a part of the sidewall surface of the fin structure.

19. The method for forming a semiconductor structure according to claim 18, wherein, It further includes: After forming the conductive plug and before forming the fin structure, an initial isolation layer is formed in the first opening; After forming the initial isolation layer, the axis layer is removed.

20. The method for forming a semiconductor structure according to claim 19, wherein, A method for etching the fin material film to form a plurality of discrete fin structures includes: etching the fin material film using the first mask layer and the initial isolation layer as masks until the substrate surface is exposed to form the fin structures.

21. The method for forming a semiconductor structure as described in claim 20, characterized in that, The method for forming the isolation layer includes: forming an isolation material film on the substrate surface, the isolation material film covering the surface of the initial isolation layer and the top surface of the isolation material film being higher than the top surface of the fin structure; planarizing the isolation material film and the initial isolation layer until the top surface of the fin structure is exposed to form an initial isolation material layer; and back-etching the initial isolation material layer to form the isolation layer.

22. The method for forming a semiconductor structure according to claim 8, wherein, The fin material film includes a plurality of first fin material films stacked along the normal direction of the substrate surface and second fin material films located between adjacent first fin material films, and the materials of the first fin material film and the second fin material film are different; Etch the fin material film so that the first fin material film forms a first fin layer and the second fin material film forms a second fin layer, and the first fin layer and the second fin layer constitute the fin structure.

23. The method for forming a semiconductor structure as claimed in claim 10, wherein, The surface of the fin material film further has a protective layer, and the first mask layer is located on the surface of the protective layer.

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