A magnetic tunnel junction with low power consumption and high storage density

By forming a ring-shaped defect structure at the interface between the free layer and the barrier layer of the magnetic tunnel junction, the problems of increasing storage density and power consumption of STT-MRAM are solved, achieving low power consumption, high storage density, and high-speed operation.

CN114171675BActive Publication Date: 2025-11-14CETHIK GRP
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Patent Information

Application Number
CN202111319734.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-11-09
Publication Date
2025-11-14
Estimated Expiration
2041-11-09

AI Technical Summary

Technical Problem

The bottleneck in improving the storage density of existing STT-MRAM memories is mainly due to the high switching current, which leads to increased power consumption and limits the improvement of storage density.

Method used

A ring-shaped defect structure is formed at the interface between the free layer and the barrier layer of the magnetic tunnel junction. The vertical anisotropy induced by the interface is reduced by etching, which promotes the in-plane magnetization direction, reduces the critical reversal current, and increases the magnetic reversal speed.

Benefits of technology

It effectively reduces the critical switching current by about 20%, improves storage density and operating speed, and reduces power consumption.

✦ Generated by Eureka AI based on patent content.

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Abstract

This invention discloses a magnetic tunnel junction with low power consumption and high storage density, comprising a free layer and a barrier layer, with an interface formed between the free layer and the barrier layer. A ring-shaped defect structure is formed at the edge of the interface by etching. This structure has a ring-shaped defect structure at the interface between the free layer and the barrier layer. The interface-induced vertical anisotropy of the ring-shaped defect structure is low, thereby reducing the overall vertical anisotropy of the free layer. Simultaneously, an in-plane magnetization direction is formed at the edge of the magnetic tunnel junction, which helps to reduce the critical switching current and improve the magnetic switching speed, storage density, and operating speed, while reducing power consumption.
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Description

Technical Field

[0001] This invention belongs to the field of memory technology, specifically relating to a magnetic tunnel junction with low power consumption and high storage density. Background Technology

[0002] STT-MRAM (Spin Transfer Torque-Magnetoresistive Random Access Memory) is a novel type of non-volatile memory that uses magnetic tunnel junctions (MTJs) as its storage cells. It boasts excellent characteristics such as nanosecond-level high-speed read / write, near-infinite lifespan, and data retention time exceeding 10 years, showing great potential for future storage applications. However, as hardware demands on memory performance increase, the application of STT-MRAM in high-capacity and ultra-low-power memory chips still faces challenges. The magnetic tunnel junction (MTJ), as the basic storage cell of STT-MRAM, directly determines its storage performance. The bottleneck in improving STT-MRAM storage density is primarily due to its high required switching current. To provide sufficient switching current, given current transistor power supply capabilities, a large power supply cell area is needed, far exceeding the area of ​​the MTJ device, limiting the overall storage density. Furthermore, higher STT-MRAM storage density leads to higher power consumption. Therefore, how to improve STT-MRAM storage density and reduce power consumption by lowering the switching current has become a key issue. Summary of the Invention

[0003] The purpose of this invention is to address the above-mentioned problems by proposing a magnetic tunnel junction with low power consumption and high storage density, which is beneficial for reducing the critical switching current and improving the magnetic switching speed, storage density and operating speed, while reducing power consumption.

[0004] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0005] The present invention proposes a magnetic tunnel junction with low power consumption and high storage density, comprising a free layer and a barrier layer, wherein an interface is generated between the free layer and the barrier layer, and a ring-shaped defect structure is formed by etching the edge of the interface.

[0006] Preferably, the wall thickness of the annular defect structure is 0.1 nm to 2 nm.

[0007] Preferably, the thickness of the free layer is 0.6 nm to 2 nm.

[0008] Preferably, the material of the free layer is selected from one or more of Co, Fe, Ni, Pt, Pd, Ru, Ta, W, Ir, Rh, Mo, Hf, Cu, CoB, FeB, NiB, CoFe, NiFe, CoNi, CoFeNi, CoFeB, NiFeB, CoNiB, CoFeNiB, FePt, FePd, CoPt, CoPd, CoFePt, CoFePd, FePtPd, CoPtPd, and CoFePtPd.

[0009] Preferably, the material of the barrier layer is selected from one or more of magnesium oxide, silicon oxide, silicon nitride, aluminum oxide, magnesium aluminum oxide, titanium oxide, tantalum oxide, calcium oxide, and iron oxide.

[0010] Compared with the prior art, the beneficial effects of the present invention are as follows: the magnetic tunnel junction has a ring-shaped defect structure at the interface between the free layer and the barrier layer. The interface of the ring-shaped defect structure induces lower vertical anisotropy, thereby reducing the overall vertical anisotropy of the free layer. At the same time, an in-plane magnetization direction is formed at the edge of the magnetic tunnel junction, which is beneficial to reduce the critical switching current and improve the magnetic switching speed, storage density and operating speed, while reducing power consumption. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of the structure of a magnetic tunnel junction in the prior art;

[0012] Figure 2 This is a schematic diagram of the magnetic tunnel junction of the present invention;

[0013] Figure 3 This is a schematic diagram of the interface structure of the magnetic tunnel junction of the present invention;

[0014] Figure 4 The graph shows the relationship between the flip probability and current density of a magnetic tunnel junction in the prior art (left) and the relationship between the flip probability and current density of the magnetic tunnel junction of the present invention (right). Detailed Implementation

[0015] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0016] It should be noted that, unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application.

[0017] Figure 1 This is a schematic diagram of a magnetic tunnel junction in the prior art, including a free layer 1 and a barrier layer 3. The free layer 1 is located above the barrier layer 3, and an interface 2 is formed between them. The magnetic tunnel junction is cylindrical, such as a cylinder. The free layer 1 is made of CoFeB material, and the barrier layer 3 is made of MgO material. That is, an interface (Interface CoFeB) is formed between the free layer (Bulk CoFeB) and the barrier layer (MgO). Typically, the CoFeB in contact with MgO at the interface has interface-induced vertical anisotropy, while the CoFeB not in contact with MgO has weaker anisotropy. This magnetic tunnel junction requires a high switching current to operate. To provide sufficient switching current, under the current transistor power supply capacity, a large power supply cell area is required, which is not conducive to improving storage density and results in high power consumption. It should be noted that the stacked structure and materials of the magnetic tunnel junction are not limited to this; other stacked structures in the prior art or other materials can be selected.

[0018] like Figure 2-4 As shown, a magnetic tunnel junction with low power consumption and high storage density includes a free layer and a barrier layer, an interface is generated between the free layer and the barrier layer, and a ring-shaped defect structure is formed by etching the edge of the interface.

[0019] like Figure 2 The magnetic tunnel junction comprises a free layer 1 and a barrier layer 3, with the free layer 1 located above the barrier layer 3. An interface 2 is formed between the two, and a ring-shaped defect structure 4 is formed at the edge of the interface 2. The magnetic tunnel junction is cylindrical, such as a cylinder. The free layer 1 is made of CoFeB material, and the barrier layer 3 is made of MgO material. That is, an interface (Interface CoFeB) is formed between the free layer (Bulk CoFeB) and the barrier layer (MgO). Typically, the CoFeB on the interface 2 that is in contact with MgO has interface-induced vertical anisotropy, while the CoFeB that is not in contact with MgO has weaker anisotropy. The ring-shaped defect structure refers to the disruption of the interface atomic characteristics of the CoFeB atoms located at the edge of the CoFeB / MgO interface through etching, thereby reducing the interface-induced vertical magnetic anisotropy. It should be noted that the stacked structure of the magnetic tunnel junction is not limited to this and can also be other stacked structures in the prior art.

[0020] Specifically, such as Figure 3 The diagram shown is a schematic representation of the interface structure of the magnetic tunnel junction of the present invention. R device R is the diameter of the cylindrical magnetic tunnel junction.defect The thickness of the annular defect structure 4 (i.e., the gray annular dotted region) is shown in the diameter direction, with the central black dotted region representing the remaining interface area. During processing, the annular defect structure 4 is formed on the CoFeB / MgO interface using etching technology. IBE etching or RIE etching methods can be employed, or other existing etching methods can be selected. The annular defect structure 4 is composed of the disrupted CoFeB / MgO interface 2. The spin-orbit coupling between CoFeB and MgO is reduced, and the hybridization interaction between Fe and O atomic orbitals is weakened, resulting in weaker interface-induced vertical magnetic anisotropy at the defect location. This leads to a decrease in the overall vertical anisotropy of the free layer, while simultaneously forming an in-plane magnetization direction at the edge of the magnetic tunnel junction. This is beneficial for reducing the critical reversal current, increasing the magnetic reversal speed, storage density, and operating speed, while also reducing power consumption.

[0021] Figure 4 (Left figure) shows the relationship between the flip probability and current density of the magnetic tunnel junction in the prior art. That is, the wall thickness of the annular defect structure 4 is 0 nm. The gray line represents the relationship between the flip probability and current density under the condition of 3 ns flip time, and the black line represents the relationship between the flip probability and current density under the condition of 5 ns flip time. Figure 4 (Right figure) shows the relationship between the flipping probability and current density of the magnetic tunnel junction of the present invention. Specifically, the wall thickness of the annular defect structure 4 is 0.5 nm. The gray line represents the relationship between the flipping probability and current density under a 3 ns flipping time condition, and the black line represents the relationship under a 5 ns flipping time condition. Simulation comparisons show that, under the same flipping time and flipping probability, the current density is reduced by approximately 20%. Therefore, the annular defect structure 4 can reduce the critical flipping current by approximately 20%, significantly improving the flipping speed and resulting in high operating speed. Furthermore, by reducing the critical flipping current, only a smaller power supply unit area is required, which is beneficial for increasing storage density and reducing power consumption.

[0022] In one embodiment, the wall thickness of the annular defect structure is 0.1 nm to 2 nm. Limiting the wall thickness of the annular defect structure 4 to this range can significantly reduce the critical flip current and processing difficulty, and is beneficial to avoid rapid degradation of data retention time due to decreased thermal stability, especially as the wall thickness increases, the thermal stability decreases significantly.

[0023] In one embodiment, the thickness of the free layer is 0.6 nm to 2 nm. Limiting the thickness of the free layer 1 to this range helps to ensure overall anisotropic performance and obtain a sufficiently high data retention time.

[0024] In one embodiment, the material of the free layer is selected from one or more of Co, Fe, Ni, Pt, Pd, Ru, Ta, W, Ir, Rh, Mo, Hf, Cu, CoB, FeB, NiB, CoFe, NiFe, CoNi, CoFeNi, CoFeB, NiFeB, CoNiB, CoFeNiB, FePt, FePd, CoPt, CoPd, CoFePt, CoFePd, FePtPd, CoPtPd, and CoFePtPd. The free layer 1 is composed of a magnetic material, but the material selection is not limited to this; other ferromagnetic materials with interface-induced magnetic anisotropy well-known to those skilled in the art can also be used, which will not be elaborated further here.

[0025] In one embodiment, the material of the barrier layer is selected from one or more of magnesium oxide, silicon oxide, silicon nitride, aluminum oxide, magnesium aluminum oxide, titanium oxide, tantalum oxide, calcium oxide, and iron oxide. The barrier layer 3 is composed of a non-magnetic material and is used to induce magnetic anisotropy in the free layer 1. The material selection is not limited to this, and other materials well known to those skilled in the art can also be used, which will not be described in detail here.

[0026] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0027] The embodiments described above are merely specific and detailed examples of the embodiments described in this application, and should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the scope of protection of this application. Therefore, the scope of protection of this patent application should be determined by the appended claims.

Claims

1. A magnetic tunnel junction with low power consumption and high storage density, characterized in that: The magnetic tunnel junction with low power consumption and high storage density includes a free layer and a barrier layer. An interface is generated between the free layer and the barrier layer, and a ring-shaped defect structure is formed by etching the edge of the interface. The etching of the edge of the interface means etching the free layer atoms located at the edge of the interface between the free layer and the barrier layer. The wall thickness of the ring-shaped defect structure is 0.1 nm to 2 nm, and the wall thickness of the ring-shaped defect structure corresponds to the diameter direction and is perpendicular to the thickness direction of the free layer.

2. The magnetic tunnel junction with low power consumption and high storage density as described in claim 1, characterized in that: The thickness of the free layer is 0.6 nm to 2 nm.

3. The magnetic tunnel junction with low power consumption and high storage density as described in claim 1, characterized in that: The material of the free layer is selected from one or more of Co, Fe, Ni, Pt, Pd, Ru, Ta, W, Ir, Rh, Mo, Hf, Cu, CoB, FeB, NiB, CoFe, NiFe, CoNi, CoFeNi, CoFeB, NiFeB, CoNiB, CoFeNiB, FePt, FePd, CoPt, CoPd, CoFePt, CoFePd, FePtPd, CoPtPd, and CoFePtPd.

4. The magnetic tunnel junction with low power consumption and high storage density as described in claim 1, characterized in that: The material of the barrier layer is selected from one or more of magnesium oxide, silicon oxide, silicon nitride, aluminum oxide, magnesium aluminum oxide, titanium oxide, tantalum oxide, calcium oxide, and iron oxide.

Citation Information

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