Subfield control of photolithography process and related equipment

Abstract

A method for determining intra-field correction to control a lithographic device configured to expose a pattern on an exposure field of a substrate is disclosed, the method comprising: acquiring metrology data for determining the intra-field correction; determining an accuracy metric indicating lower accuracy when the metrology data is unreliable and / or when the lithographic device is limited in activating a potential activation input based on the metrology data; and determining the intra-field correction based at least in part on the accuracy metric.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to EP application 19184412.5 filed on July 4, 2019 and EP application 19186820.7 filed on July 17, 2019, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present invention relates to methods and apparatus for applying a pattern to a substrate and / or measuring the pattern in a lithographic process. Background Art

[0004] A lithographic apparatus is a machine that applies a desired pattern to a substrate, usually to a target portion of the substrate. For example, a lithographic apparatus can be used in the manufacture of an integrated circuit (IC). In this case, a patterning device, alternatively referred to as a mask or reticle, can be used to generate a circuit pattern to be formed on each layer of the IC. The pattern can be transferred to a target portion (e.g., including a portion of a die, a die, or several die) on a substrate (e.g., a silicon wafer). The transfer of the pattern is usually via imaging onto a radiation-sensitive material (resist) layer disposed on the substrate. Typically, a single substrate will contain a network of adjacent target portions of continuous patterning. Known lithographic apparatus include so-called steppers, in which each target portion is irradiated by exposing the entire pattern to the target portion at once, and so-called scanners, in which each target portion is irradiated by scanning the pattern by a radiation beam in a given direction ("scanning" direction), while scanning the substrate synchronously parallel to or antiparallel to the direction. The pattern can also be transferred from a patterning device to a substrate by imprinting the pattern onto the substrate.

[0005] In order to monitor the lithography process, parameters of the patterned substrate are measured. For example, the parameters may include the overlay error between successive layers formed in or on the patterned substrate and the critical line width (CD) of the developed photoresist. The measurement may be performed on a product substrate and / or on a dedicated measurement target. There are various techniques for measuring the microstructures formed in the lithography process, including the use of scanning electron microscopes and various dedicated tools. A fast and non-invasive dedicated inspection tool is a scatterometer, in which a radiation beam is directed onto a target on the surface of the substrate and the properties of the scattered or reflected beam are measured. Two main types of scatterometers are known. Spectral scatterometers direct a broadband radiation beam onto a substrate and measure the spectrum (intensity as a function of wavelength) of the radiation scattered into a specific narrow angular range. Angle-resolved scatterometers use a monochromatic radiation beam and measure the intensity of the scattered radiation as a function of angle.

[0006] Examples of known scatterometers include angle-resolved scatterometers of the type described in US2006033921A1 and US2010201963A1. The target used by such a scatterometer is a relatively large (e.g. 40 μm×40 μm) grating, and the measuring beam produces a spot that is smaller than the grating (i.e., the grating is underfilled). In addition to measuring feature shapes by reconstruction, diffraction-based overlay can also be measured using devices such as those described in published patent application US2006066855A1. Diffraction-based overlay metrology using diffraction-order dark-field imaging enables overlay measurements on smaller targets. Examples of dark-field imaging metrology can be found in international patent applications WO 2009 / 078708 and WO 2009 / 106279, which are incorporated by reference in their entirety. Further developments of this technology are described in published patent publications US20110027704A, US20110043791A, US2011102753A1, US20120044470A, US20123581A, US20130258310A, US20130271740A and WO2013178422A1. These targets can be smaller than the illumination spot and can be surrounded by product structures on the wafer. Multiple gratings can be measured in one image using composite grating targets. The contents of all these applications are also incorporated herein by reference.

[0007] At present, the overlay error is controlled and corrected by the correction model described in US2013230797A1, for example. In recent years, advanced process control techniques have been introduced, and the measurement of the measurement target applied to the substrate and the device pattern applied are used. These targets allow the use of high-throughput inspection equipment such as scatterometers to measure overlay, and the measurement can be used to generate corrections, which are fed back to the lithography equipment when the subsequent substrate continues to be patterned. For example, an example of advanced process control (APC) is described in US2012008127A1. The inspection equipment can be separated from the lithography equipment. In the lithography equipment, the wafer correction model is conventionally applied based on the measurement of the overlay target set on the substrate, which is used as a preparatory step for each patterning operation. The current correction model includes a high-order model to correct the nonlinear distortion of the wafer. The correction model can also be extended to consider other measurement and / or calculation effects, such as thermal deformation during the patterning operation.

[0008] However, while using a higher-order model may be able to take into account more effects, the use of such a model may be limited if the patterning equipment itself does not provide control over the corresponding parameters during the patterning operation. In addition, even advanced correction models may not be sufficient or ideal to correct certain overlay errors.

[0009] It would be desirable to improve such process control methods by, for example, addressing at least one of the issues highlighted above. Summary of the invention

[0010] In a first aspect of the present invention, there is provided a method for determining intra-field correction of sub-field control of a lithography process for exposing a pattern on an exposure field of a substrate, the exposure field comprising a plurality of sub-fields, the method comprising: acquiring a database comprising intra-field fingerprint data linked to historical lithography equipment measurement data; determining an estimate of the intra-field fingerprint from the lithography equipment measurement data and the database; and determining the intra-field correction of the lithography process based on the estimated intra-field fingerprint.

[0011] In a second aspect of the present invention, a method is provided for determining intra-field correction for sub-field control of a lithography process for exposing a pattern on an exposure field of a substrate, the exposure field comprising a plurality of sub-fields, the method comprising: performing optimization to determine the intra-field correction, the optimization maximizing the number of sub-fields within specifications.

[0012] In a third aspect of the present invention, a method for determining intra-field correction for sub-field control of a manufacturing process is provided, the manufacturing process comprising a lithography process for exposing a pattern on an exposure field of a substrate, the exposure field comprising a plurality of sub-fields, the manufacturing process comprising at least one additional processing step, the method comprising performing optimization to determine the intra-field correction, the optimization comprising jointly optimizing at least one lithography parameter associated with the lithography process and at least one processing parameter associated with at least one additional processing step.

[0013] In a fourth aspect of the invention, a method is provided for determining intra-field corrections for sub-field control of a lithography process for exposing a pattern on an exposure field of a substrate in forming a plurality of layers of a stack, the exposure field comprising a plurality of sub-fields, the method comprising constructing a physical and / or empirical through-stack model describing how parameters of interest propagate through the stack layer by layer.

[0014] In a fifth aspect of the present invention, a method for determining intra-field correction for sub-field control of a lithography process is provided, the lithography process being used to expose a pattern on an exposure field of a substrate, the exposure field comprising a plurality of sub-fields, the method comprising: determining a sensitivity metric describing the sensitivity of the correction to input data for determining the correction and / or layout of the pattern; and determining the intra-field correction for sub-field control based on the sensitivity metric.

[0015] In a sixth aspect of the present invention, a method for determining intra-field correction for controlling a lithographic device is provided, the lithographic device being configured to expose a pattern on an exposure field of a substrate, the method comprising: acquiring measurement data for determining the intra-field correction; determining an accuracy metric indicating lower accuracy when the measurement data is unreliable and / or when the lithographic device is limited in starting a potential start input based on the measurement data; and determining the intra-field correction based at least in part on the accuracy metric.

[0016] Also disclosed is a computer program comprising program instructions operable to perform the method of any of the above aspects when run on a suitable device.

[0017] Other aspects, features and advantages of the present invention, as well as the structure and operation of various embodiments of the present invention are described in detail below with reference to the accompanying drawings. Note that the present invention is not limited to the specific embodiments described herein. Such embodiments are presented herein for illustrative purposes only. Based on the teachings contained herein, additional embodiments will be apparent to those skilled in the art of related (multiple) fields. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Embodiments of the present invention will now be described by way of example with reference to the accompanying drawings, in which:

[0019] Figure 1 A lithographic apparatus is depicted along with other equipment of a production facility that forms a semiconductor device;

[0020] Figure 2 Depicted is a schematic diagram of holistic lithography, which represents the collaboration between three key technologies used to optimize semiconductor manufacturing;

[0021] Figure 3 Exemplary sources of processing parameters are shown;

[0022] Figure 4 is an overlay plot relative to field position, showing the effect of intra-die stress for a particular manufacturing process; and

[0023] Figure 5 is a flow chart of a method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0024] Before describing embodiments of the invention in detail, it is instructive to present an example environment in which embodiments of the invention may be implemented.

[0025] Figure 1At 200 is shown a lithographic apparatus LA as part of an industrial production facility implementing a high volume lithographic manufacturing process. In this example, the manufacturing process is suitable for manufacturing semiconductor products (integrated circuits) on substrates such as semiconductor wafers. Those skilled in the art will recognize that by processing different types of substrates with different variations of the process, a wide variety of products can be manufactured. The production of semiconductor products is used purely as an example, which still has great commercial significance today.

[0026] In a lithographic apparatus (or simply "lithography tool" 200), a measurement station MEA is shown at 202 and an exposure station EXP is shown at 204. A control unit LACU is shown at 206. In this example, each substrate visits a measurement station and an exposure station to have a pattern applied. In an optical lithographic apparatus, for example, a projection system is used to transfer a product pattern from a patterning device MA to a substrate using conditioned radiation and a projection system. This is achieved by forming an image of the pattern in a layer of radiation-sensitive resist material.

[0027] The term "projection system" as used herein should be broadly interpreted to include any type of projection system, including refractive, reflective, catadioptric, magnetic, electromagnetic and electrostatic optical systems, or any combination thereof, to suit the exposure radiation being used, or for other factors, such as the use of immersion liquid or the use of vacuum. The patterning device MA can be a mask or a reticle that imparts a pattern to a radiation beam transmitted or reflected by the patterning device. Well-known operating modes include stepping mode and scanning mode. It is well known that the projection system can cooperate with a support and positioning system for the substrate and the patterning device in various ways to apply the desired pattern to many target portions on the substrate. A programmable patterning device can be used instead of a reticle with a fixed pattern. For example, the radiation can include electromagnetic radiation in the deep ultraviolet (DUV) or extreme ultraviolet (EUV) band. The present invention is also applicable to other types of lithography processes, such as imprint lithography and direct write lithography, such as electron beam lithography.

[0028] The lithography equipment control unit LACU controls all movements and measurements of the various actuators and sensors to receive the substrate W and mask MA and implement the patterning operation. The LACU also includes signal processing and data processing capabilities to implement the desired calculations related to the equipment operation. In practice, the control unit LACU will be implemented as a system of many sub-units, each of which handles real-time data acquisition, processing and control of a subsystem or component within the equipment.

[0029] Before the pattern is applied to the substrate at the exposure station EXP, the substrate is processed in the measurement station MEA so that various preparatory steps can be performed. The preparatory steps may include mapping the surface height of the substrate using a horizontal position sensor, and measuring the position of the alignment marks on the substrate using an alignment sensor. The alignment marks are nominally arranged in a regular grid pattern. However, due to the inaccuracy in creating the marks, and also due to the deformation of the substrate during its entire processing process, the marks deviate from the ideal grid. Therefore, if the device is to print product features in the correct position with very high accuracy, then in addition to measuring the position and orientation of the substrate, the alignment sensor must actually measure the positions of many marks on the substrate area in detail. The device can be a so-called dual-stage type, which has two substrate tables, each substrate table having a positioning system controlled by a control unit LACU. When one substrate on one substrate table is exposed at the exposure station EXP, another substrate can be loaded onto the other substrate table at the measurement station MEA, so that various preparatory steps can be performed. Therefore, the measurement of the alignment marks is very time-consuming, and providing two substrate tables can significantly increase the throughput of the device. If the position sensor IF is not capable of measuring the position of the substrate when it is located at the measurement station and the exposure station, a second position sensor may be provided to enable the position of the substrate table to be tracked at both stations. For example, the lithographic apparatus LA may be of a so-called dual stage type having two substrate tables and two stations - an exposure station and a measurement station - between which the substrate table can be exchanged.

[0030] Within a production facility, the apparatus 200 forms part of a "lithography unit" or "lithography cluster", which also includes a coating apparatus 208 for applying photoresist and other coatings to a substrate W for patterning by the apparatus 200. On the output side of the apparatus 200, a baking apparatus 210 and a developing apparatus 212 are provided for developing the exposed pattern into a physical resist pattern. Between all these apparatuses, the substrate handling system is responsible for supporting the substrates and transferring them from one piece of equipment to another. These apparatuses, which are generally collectively referred to as tracks, are controlled by a track control unit, which itself is controlled by a supervisory control system SCS, which also controls the lithography apparatus via a lithography apparatus control unit LACU. Thus, the different apparatuses can be operated to maximize production throughput and processing efficiency. The supervisory control system SCS receives recipe information R, which provides a definition of the steps to be performed to create each patterned substrate in more detail.

[0031] Once the pattern is applied and developed in the lithography unit, the patterned substrate 220 is transferred to other processing equipment, such as shown at 222, 224, and 226. A wide range of processing steps are implemented by various equipment in a typical manufacturing facility. As an example, the equipment 222 in the present embodiment is an etching station, and the equipment 224 performs a post-etching annealing step. Additional physical and / or chemical processing steps are applied in other equipment 226, etc. Many types of operations may be required to manufacture a real device, such as material deposition, modification of surface material properties (oxidation, doping, ion implantation, etc.), chemical mechanical polishing (CMP), etc. In fact, the equipment 226 can represent a series of different processing steps performed in one or more equipment. As another example, equipment and processing steps for implementing self-aligned multiple patterning can be provided to produce multiple smaller features based on the precursor pattern laid by the lithography equipment.

[0032] As is well known, the manufacture of semiconductor devices involves multiple repetitions of such processing to build device structures layer by layer with appropriate materials and patterns on the substrate. Thus, the substrates 230 arriving at the lithography cluster may be newly prepared substrates, or they may be substrates that have been previously processed in the cluster or in another device entirely. Similarly, depending on the processing required, the substrates 232 leaving the device 226 may be returned for subsequent patterning operations in the same lithography cluster, they may be designated for patterning operations in a different cluster, or they may be finished products that will be sent for cutting and packaging.

[0033] Each layer of the product structure requires a different set of processing steps, and the equipment 226 used at each layer can be completely different in type. Furthermore, even in cases where the processing steps to be applied by the equipment 226 are nominally the same, in a large facility there may be several supposedly identical machines working in parallel to perform steps 226 on different substrates. Small differences in setup or failures between these machines may mean that they affect different substrates in different ways. Even steps that are relatively common to each layer, such as etching (equipment 222), may be implemented by several etching equipment that are nominally identical but working in parallel to maximize throughput. Furthermore, in practice, different layers require different etching processes, such as chemical etching, plasma etching, depending on the details of the material to be etched and special requirements such as anisotropic etching.

[0034] As described above, previous and / or subsequent processing may be performed in other lithographic equipment, or even in different types of lithographic equipment. For example, some layers of a device manufacturing process that have very high requirements on parameters such as resolution and overlay may be performed using more advanced lithographic tools than other layers with lower requirements. Thus, some layers may be exposed in an immersion lithography tool, while other layers are exposed in a "dry" tool. Some layers may be exposed in a tool operating at a DUV wavelength, while other layers are exposed using EUV wavelength radiation.

[0035] In order to correctly and consistently expose the substrate exposed by the lithography equipment, it is desirable to inspect the exposed substrate to measure properties such as overlay error between subsequent layers, line thickness, critical dimension (CD), etc. Therefore, the manufacturing facility where the lithography unit LC is located also includes a measurement system that receives some or all of the substrates W that have been processed in the lithography unit. The measurement results are provided directly or indirectly to the supervisory control system SCS. If an error is detected, the exposure of subsequent substrates can be adjusted, especially if the measurement can be completed quickly and quickly enough so that other substrates of the same batch still need to be exposed. In addition, the already exposed substrate can be stripped and reprocessed to increase the yield, or discarded to avoid further processing on the known defective substrate. In the case where only some target parts of the substrate are faulty, further exposure can only be performed on those good target parts.

[0036] Figure 1 Also shown is a metrology device 240, which is provided for measuring parameters of the product at desired stages in the manufacturing process. A common example of a metrology station in a modern lithography production facility is a scatterometer, such as a dark field scatterometer, an angle resolved scatterometer or a spectral scatterometer, and which can be applied to measure properties of the developed substrate at 220 before etching in the device 222. Using the metrology device 240, it can be determined, for example, that important performance parameters such as overlay or critical dimension (CD) do not meet specified accuracy requirements in the developed resist. Prior to the etching step, there is an opportunity to strip the developed resist and reprocess the substrate 220 through the lithography cluster. By making small adjustments over time by the supervisory control system SCS and / or control unit LACU 206, the measurement results 242 from the device 240 can be used to maintain accurate performance of the patterning operation in the lithography cluster, thereby minimizing the risk that the product does not meet specifications and requires reprocessing.

[0037] Additionally, metrology equipment 240 and / or other metrology equipment (not shown) may be used to measure properties of processed substrates 232, 234 and incoming substrate 230. The metrology equipment may be used on processed substrates to determine important parameters such as overlay or CD.

[0038] Typically, the patterning process in the lithographic apparatus LA is one of the most critical steps in the process, which requires high accuracy in the size and placement of structures on the substrate W. In order to ensure this high accuracy, the patterning process can be performed in a manner such as Figure 2 Three systems are combined in a so-called "holistic" control environment schematically depicted in . One of these systems is a lithography apparatus LA, which is (virtually) connected to a metrology tool MET (a second system) and a computer system CL (a third system). The key to such an "holistic" environment is to optimize the cooperation between these three systems to enhance the overall process window and to provide a tight control loop to ensure that the patterning performed by the lithography apparatus LA remains within the process window. The process window defines a range of processing parameters (e.g., dose, focus, overlay) within which a particular manufacturing process produces a defined result (e.g., a functional semiconductor device) - typically the processing parameters in the lithography process or the patterning process are allowed to vary within this range.

[0039] The computer system CL can use (portions of) the design layout to be patterned to predict which resolution enhancement techniques to use and perform computational lithography simulations and calculations to determine which mask layouts and lithography equipment settings achieve the maximum overall process window for the patterning process ( Figure 2 Typically, the resolution enhancement technique is set to match the patterning possibilities of the lithographic apparatus LA. The computer system CL may also be used to detect where within the process window the lithographic apparatus LA is currently operating (e.g. using input from a metrology tool MET) to predict whether defects may be present (e.g. due to suboptimal processing). Figure 2 ) is depicted by an arrow pointing to “0” in the second scale SC2.

[0040] The metrology tool MET may provide input to the computer system CL to enable accurate simulations and predictions, and may provide feedback to the lithographic apparatus LA to identify possible drifts, e.g. in the calibration state of the lithographic apparatus LA (in Figure 2 SC3 is depicted by multiple arrows in the third scale SC3).

[0041] Various techniques can be used to improve the accuracy of replicating patterns on substrates. In IC production, accurately replicating patterns on substrates is not the only issue to consider. Another concern is yield, which is usually measured in terms of how many functional devices can be produced per substrate by a device manufacturer or device manufacturing process. Various methods can be used to improve yield. One such method attempts to make the production of devices (e.g., using a lithography device such as a scanner to image a portion of a design layout onto a substrate) more tolerant to perturbations in at least one processing parameter during processing of the substrate (e.g., during the use of a lithography device to image a portion of the design layout onto a substrate). The concept of an overlay process window (OPW) is a useful tool for this method. The production of devices (e.g., ICs) can include other steps such as substrate measurement before, after, or during imaging, loading or unloading substrates, loading or unloading patterning loads, positioning a die under projection optics before exposure, stepping from one die to another, and the like. In addition, various patterns on a patterning device can have different process windows (i.e., the processing parameter space under which the pattern will be produced according to specifications). Examples of pattern specifications associated with potential system defects include checking for necking, line pullback, line thinning, CD, edge placement, overlay, anti-top loss, anti-crushing and / or bridging. The process windows of all or some patterns (usually patterns within a specific area) on a patterning device can be obtained by merging (e.g., overlaying) the process windows of each individual pattern. Therefore, the process windows of these patterns are called overlay process windows. The boundaries of the OPW may contain the boundaries of the process windows of some individual patterns. In other words, these individual patterns limit the OPW. These individual patterns may be referred to as "hot spots", "critical features" or "process window limiting patterns (PWLP)" used interchangeably herein. When controlling a lithography process, it is possible and usually economical to focus on hot spots. When there are no defects in the hot spots, it is likely that all patterns are defect-free. If the processing parameter value is outside the OPW, then when the processing parameter value is closer to the OPW, or if the processing parameter value is inside the OPW, then when the processing parameter value is away from the boundary of the OPW, the imaging becomes more tolerant to disturbances.

[0042] Figure 3Exemplary sources of processing parameters 350 are shown. One source may be data 310 of processing equipment, such as parameters of lithographic equipment, sources of tracks, etc., projection optics, substrate stages, etc. Another source may be data 320 from various substrate metrology tools, such as substrate height maps, focus maps, critical dimension uniformity (CDU) maps, etc. The data 320 may be obtained before the applicable substrate undergoes a step (e.g., development), preventing reprocessing of the substrate. Another source may be data 330 from one or more patterning device metrology tools, patterning device CDU maps, patterning device (e.g., mask) film stack parameter changes, etc. Yet another source may be data 340 from an operator of the processing equipment.

[0043] Some of the overlay components (or other parameters of interest) on each substrate will be truly random in nature. However, other components are systematic in nature, whether their cause is known or not. In cases where similar substrates experience similar overlay error patterns, the error pattern can be referred to as the "fingerprint" of the lithography process. Overlay errors can be roughly divided into two different groups:

[0044] 1) Contributions that vary across the entire substrate are referred to in the art as inter-field fingerprints.

[0045] 2) The contribution of similar variations across each target portion (field) of the substrate is referred to in the art as an intra-field fingerprint.

[0046] The control of the lithographic process is usually based on feedback or feedforward measurements, which are then modeled using, for example, inter-field (cross-substrate fingerprint) or intra-field (cross-field fingerprint) models. U.S. Patent Application 20180292761 describes a control method for controlling performance parameters such as overlay at the subfield level using an advanced correction model, which is incorporated herein by reference. Another control method using subfield control is described in European Patent Application EP3343294A1, which is also incorporated herein by reference.

[0047] However, although an advanced correction model may include, for example, 20-30 parameters, currently used lithography equipment (for brevity, the term "scanner" will be used throughout the specification) may not have an actuator corresponding to one or more parameters. Therefore, only a subset of the entire parameter set of the model may be used at any given time. Furthermore, since advanced models require many measurements, it is undesirable to use these models in all cases, as the time required to perform the necessary measurements reduces production throughput.

[0048] Some of the main contributors to overlay error include, but are not limited to, the following:

[0049] Scanner-specific errors: These errors may come from various subsystems of the scanner used during exposure of the substrate, in effect creating a scanner-specific fingerprint;

[0050] Process-induced wafer deformation: Various processes performed on the substrate may deform the substrate or the wafer;

[0051] Differences in lighting setup: This is caused by the setup of the lighting system, such as the shape of the aperture, lens actuator positioning, etc.

[0052] Heating effects - The heating-induced effects are different between different subfields of a substrate, particularly for substrates where different subfields include different types of components or structures;

[0053] Reticle writing errors: due to manufacturing limitations, errors may already exist in the patterning device; and

[0054] Topography Variations: The substrate may have topography (height) variations, especially around the edge of the wafer.

[0055] Modeling of overlay errors of individual subfields of a field may be performed (e.g., at the die level or other functional area level) instead of or in addition to modeling overlay errors of the entire field. Although the latter requires more processing time, since both the field and the subfields within it are modeled, it allows correction of error sources related only to specific subfields as well as error sources related to the entire field. Of course, other combinations are possible, such as modeling the entire field and only certain subfields.

[0056] Even in cases where the errors are adequately modeled, there are difficulties with the excitation of the resulting corrections. Some corrections cannot be effectively performed using the available control parameters (control knobs). Furthermore, while other corrections may be actuable, actually doing so may result in undesirable side effects. In essence, the practical operation of the scanner to implement the corrections is limited due to dynamic and control limitations and sensitivity.

[0057] Figure 4A specific example of an intra-field overlay fingerprint that is difficult to initiate correction is shown. It shows a graph of the overlay OV (y-axis) in the opposite direction to the X (or Y) direction. Each intersection represents a measured overlay value, and each point is a necessary corresponding compensation correction. The fitted line is the (near ideal) correction distribution, which is fitted to the correction (point). The sawtooth pattern shown in the overlay fingerprint is obvious; each part through which the overlay passes varies essentially linearly, where X is a single die (the figure represents overlay measurements on 4 dies). The correction distribution follows (and therefore compensates for) the overlay fingerprint. Such fingerprints are believed to be the result of large stresses caused by large stacks used in, for example, 3D-NAND or DRAM processes. This stress manifests itself both at the wafer level (causing severe wafer warpage) and at the die level. At the die level, the overlay fingerprint includes an amplification of the inside of each die. Since there are multiple dies in the exposure field, the resulting field overlay fingerprint shows the sawtooth pattern shown (typically on a scale of tens of nanometers). Depending on the orientation of the device, the pattern can be through a slit or by scanning. Regardless of the orientation, the overprint cannot be corrected using the available models and actuators. In particular, it is not possible to activate the correction of such extreme patterns only within the scanner.

[0058] Although the embodiments herein will be described in terms of the presence of sawtooth patterns or fingerprints (e.g., caused by intra-die stress in 3D-NAND or DRAM processes, such as Figure 4 The invention is specifically described with respect to overlay or edge placement error (EPE) of the embodiment shown in FIG. 1 , but it will be appreciated that it can be used to correct any other higher order overlay, EPE or focus fingerprint.

[0059] In order to optimally correct Figure 4 For the overlaid fingerprint shown, it is important to be able to adjust the scanner at a spatial scale smaller than the pitch of the periodic distribution, for example, smaller than Figure 4 A "sawtooth" of a repetitive sawtooth distribution. Such a single sawtooth area is typically associated with a unit structure within a single die. Therefore, the interface to the scanner should allow the definition of individually controllable areas within the exposure field. This concept is called a sub-field control interface; an example of which is disclosed in the aforementioned European patent application EP3343294A1. For example, the control distribution of a wafer stage of a scanner configured for a first unit die / unit structure can be defined largely independently of the control distribution of a second unit / die structure positioned further along the scanning direction. The sub-field control infrastructure allows for a more optimized correction of repetitive overlay (or focus) variations with sub-field resolution. Furthermore, the ability to independently control different sub-field areas allows for reduced die-to-die or unit-to-unit variations in the overlay / focus fingerprint within a chip and / or within a unit.

[0060] Typically, scanner overlay control uses dynamic stage position control to adjust the placement of structures (features) so that overlay errors are minimized. In principle, this can be achieved by pre-correcting for expected overlay error fingerprints (e.g., due to stress accumulation from applying subsequent layers) and / or by adjusting the placement of features within subsequent layers to be adequately aligned with features in the previous layer(s).

[0061] Such scanner control can be used in conjunction with other techniques such as reticle feature correction offsets. Ideally, the shift would be exactly opposite to the error shift being corrected, e.g., feature shift due to stress-induced deformation after application of subsequent layers. The effect is that using such a reticle will leave much less to be corrected by the scanner overlay correction infrastructure. However, correction via the reticle is necessarily static and cannot account for any variations in the overlay fingerprint (e.g., field-to-field, wafer-to-wafer, and / or batch-to-batch variations). Such variations can be of the same order of magnitude as the fingerprint itself. Furthermore, there are startup and sensitivity limitations in controlling such reticle write corrections that are inherent in the writing tool used (e.g., an electron beam tool or similar tool).

[0062] Scanner overlay correction is usually applied by the stage controller and / or lens manipulator of the projection lens (odd aberration control can be used to control the placement of features). However, as mentioned above, the scanner cannot completely follow any desired overlay correction distribution. One of the reasons is due to the limitations on the speed and acceleration that can be achieved on the wafer (and mask) stage. Another reason is that the scanner exposes the substrate with a relatively large illumination spot (the so-called slit length represents the size of the spot in the scanning direction, reference: EP application EP19150960.3, the entire content of which is incorporated herein by reference). The extension of the spot means that during the scanning exposure, some part of the features within the die / unit will always be suboptimally positioned when the desired overlay correction is not just a simple shift on the entire die / unit. This change in the effective position (overlay) correction during the scanning operation effectively causes the aerial image of the feature to be blurred, which in turn leads to a loss of contrast. This dynamic effect is usually called the moving standard deviation (MSD). The limitations on the positioning of the platform are usually associated with the average position (overlay) error and are usually called the moving average (MA) error.

[0063] More specifically, the moving average (MA) error and the moving standard deviation (MSD) of the errors of the lithography platform involve a critical time window, which includes the time interval during which each point on the die is exposed (in other words: receives photons). If the average position error of a point on the die during this time interval is high (in other words: high MA error), the effect is a shift of the exposure image, resulting in an overlay error. If the standard deviation of the position error during this time interval is high (in other words: high MSD error), the image may be smeared, resulting in a fading error.

[0064] Both the average overlay error (MA) and the contrast loss due to MSD are contributors to the overall edge placement error (EPE) budget and therefore require careful balance when determining the specific control profile for the wafer and / or reticle platform; in general, a more MA-targeted control approach will produce a higher MSD impact, while an MSD-targeted control approach may result in unacceptably large MA errors. EPE is a combined error resulting from global critical dimension uniformity (CDU), local CDU (e.g., line edge roughness LER / line width roughness LWR), and overlay errors. It is these parameters that have the greatest impact on yield, as errors in these parameters affect the relative position of features and whether any two features are accidentally touching or accidentally not touching.

[0065] A number of methods for improving subfield control to correct intra-field fingerprints will now be described. First, a method for improving optimization of intra-field correction for edge fields (or other layouts) that include portions of die or have patterns that do not have uniform intra-die stress within the slot will be described. The tooling (slot / launch range) limits the correction capability, which means that correction for some dies will not be properly initiated.

[0066] For example, the optimization may include within-field "sub-field within specification" optimization, such as within-field "die within specification" or "sub-die within specification" optimization, the latter describing where the die may be further divided into sub-die regions, each sub-die region being defined by a different functional region. Functional regions may be defined and differentiated according to their intended functions (e.g., memory, logic, scribe lanes, etc.), as these functional regions may have different process control requirements (e.g., process windows and optimal parameter values). Another example of "sub-die within specification" optimization is when a die is exposed in multiple exposures (e.g., stitching dies).

[0067] Such an intra-field "sub-field within specification" optimization aims to maximize the number of die or sub-die on the field that are within specification and therefore may produce functional devices, rather than applying an average optimization (e.g., least squares minimization) over the entire field. Examples and methods for optimization and control of a single sub-field (e.g., a die or sub-die) are disclosed in the aforementioned European patent applications EP3343294A1 and US20180292761. EP3343294A1 discloses various methods that can be used to initiate corrections based on parameters of interest. These include tilting the mask platform and / or the wafer platform relative to each other. The curvature of the focus change can be introduced via a projection lens optical device (e.g., a lens manipulator) and (in the scanning direction) by changing the relative tilt of the mask platform relative to the wafer platform during exposure (in either direction, i.e., including passing through the exposure slit). These methods and other methods are obvious to the technician and will not be discussed further.

[0068] Specifically, US20180292761 discloses modeling the subfields individually to determine a single subfield correction. In an embodiment, the subfield optimization within the field specification described herein may include the intra-field model and the intra-field specification intra-die co-optimization of (multiple) subfield models.

[0069] When optimizing parameters of interest, within-field, within-specification sub-field (e.g., within-specification die) optimization can use prior knowledge of the product (die layout) and / or measurements of within-field stress or within-die stress. Least squares optimization typically treats each location within a sub-field equally, regardless of the field / die layout. Therefore, least squares optimization may prefer corrections that "only" have two locations that are out of specification, but each correction is in a different sub-field / die, rather than corrections that have four locations that are out of specification, but only affect one sub-field / die. However, since a single defect often causes a chip to be defective, maximizing the number of defect-free die (i.e., within-specification die) is ultimately more important than simply minimizing the number of defects in each field. It should be understood that within-specification die optimization can include maximum absolute value (max abs) optimization for each chip. This maximum abs optimization can minimize the maximum deviation of a performance parameter from a control target.

[0070] The subfield optimization within the specification of the field can determine the best subfield control trajectory that maximizes the number of die within the specification based on the intra-die stress and / or activation capability of the scanner. Edge die and / or die with non-uniform (or asymmetric) stress are often difficult to correct due to the correction capabilities within the scanner. Because of this, the optimization can allow such die to be sacrificed (e.g., allowing them to have a large number of defects), or otherwise weight them, or give them less consideration / importance. This can be achieved in a variety of ways, for example, by giving such die a large process window (e.g., close to or even larger than the feasible process window), or otherwise weighting them relative to the parameters related to these dies in the optimization. The decision to sacrifice a die or give a die a lower weight can be made based on the field location on the die and / or substrate (e.g., the location of the intra-die fingerprint expected to be particularly difficult, such as at the edge of the substrate), the expected, estimated or measured intra-die stress fingerprint (e.g., estimated from scanner measurements such as leveling data and corresponding intra-die topography - such as by using methods to be described later). Of course, even without such a weighting strategy, the maximum ABS optimization tends to correct for dies where stress within the die is uniform and easier to correct.

[0071] The correction capability across the width of the slit is particularly limited. Therefore, currently a single value can be selected for one or more parameters (e.g., overlay, MA or MSD) that minimizes the error across the slit (e.g., least squares minimization), and the single value is therefore applied to all subfields / die across the slit. This is not a problem for some fields, but for other fields, such as those near the edge of the substrate (including edge die) and / or those that include die that exhibit significant non-uniform die stress, there may not be a correction available that will produce all die across the slit / field. More specifically, the present optimization scheme can set a single threshold for the parameter of interest (e.g., MSD) and constrain any subfield or die to not exceed that threshold. However, in some cases, it may be better to allow exceeding the threshold for one subfield if the in-spec die metrics are improved. This may be the case if the start-up potential is insufficient to perform a correction that is determined to keep all subfields below the threshold, and / or if the subfield is relatively unimportant (e.g., edge die or die with non-uniform stress, and therefore unlikely to be produced anyway).

[0072] In another embodiment, corrections for in-field or in-die co-optimization of at least two control plans are proposed. The control plan may involve different tools used, for example, when forming a structure or integrated circuit on a substrate. In an embodiment, one of the tools may be a scanner (corrections in the scanner control plan). For example, the other tools may include one or more of an etcher (etching control plan), a baking tool (baking control plan, for example, where the parameter may be baking time), a developing tool (developing control plan), and a coating or deposition tool (deposition control plan, for example, where the parameter may be resist thickness or even the material used).

[0073] Intra-die stress and / or sub-field patterns within a field are largely due to process behavior. For example, controlling the process tool will affect how the intra-die stress builds up on the substrate. By adjusting the process tool parameters in conjunction with scanner correction, the fingerprint created by such intra-die stress can be better controlled. In particular, it is observed that the sub-field correction potential of the current sub-field model tends to be non-linear. Combining this with the non-linear correction potential of one or more process tools can provide a larger correction space and a more optimized correction.

[0074] The subfield controlled joint optimization can be, for example, one or more of overlay, MA, and MSD. It can be an in-spec die or subfield optimization as described above (i.e., these embodiments can be combined and complementary). The optimization can take into account throughput and the time to perform a particular correction. Specifically, some etching corrections, although beneficial in terms of overlay or other parameters, may take a long time to start. Therefore, the joint optimization can balance throughput with the parameters of interest, or decide to apply such longer duration corrections only to critical areas or "hot spots". Different areas (subfields or sub-die) can be assigned different weights between quality (e.g., overlay, MSD, EPE or other quality parameters of interest) and throughput / time to perform corrective actions. Such weighting or balance can depend on, for example, the "in-spec subfield" of the criticality or corresponding process window.

[0075] Furthermore, intra-field and / or intra-die fingerprints can be decomposed into group fingerprints, for example, which group fingerprints can then be linked to context (context data). The context data can describe the processing history of a particular substrate; for example, which processing steps have been applied, which one or more individual devices were used in the execution of these steps (for example, which etch chamber and / or deposition tool was used; and / or which scanner and / or chuck was used to expose the previous layer), and / or which parameter settings were applied by those one or more devices during the processing steps (for example, settings of temperature or pressure within an etch plan, or parameters such as illumination mode, alignment recipe, etc. in a scanner). Intra-die and intra-field stresses, as well as related sub-field and intra-field fingerprints (for example, overlay fingerprints) are highly dependent on such context. Therefore, the ability to predict such stresses (and therefore make appropriate corrections) based on the context is possible. This can be achieved, for example, by establishing a database or machine learning network that links such intra-field or intra-die fingerprints (for example, overlay fingerprints) with context data. For example, such a library can be built from a large amount of measurement data with known context.

[0076] Specifically, such techniques may include monitoring run-by-run residuals of intra-field or intra-die fingerprints, for example, using special reticle measurements that are very densely populated with targets and / or via in-die metrology techniques (metrology on intra-die targets), and / or leveling / wafer shape data. These shapes / fingerprints may then be separated by any suitable means (e.g., based on suitable KPIs and / or by component analysis techniques).

[0077] In run-by-run (often abbreviated run2run) control, a fingerprint (e.g., overlay fingerprint) is estimated from a set of substrates (e.g., wafers) measured per batch. One or more measurement fields from these substrates are fit to a fingerprint, which is then typically blended with an earlier fingerprint to create a new fingerprint estimate using an exponentially weighted moving average (EWMA) filter. Alternatively, the fingerprint may simply be updated periodically, or even measured once and left unchanged. Combinations of some or all of these approaches are also possible. The results of this calculation are then run through an optimization job to set one or more scanner launchers and / or other tool launchers / settings for the next batch to reduce or minimize overlay.

[0078] The co-optimization of the scanner parameters and one or more processing tool parameters may include optimization of the MA or MSD or MA / MSD combination associated with the scanner correction profile relative to a suitable performance parameter (e.g., overlay or expected EPE error of one or more key features within a subfield / die). In such an embodiment, the method may include identifying one or more key features within a subfield and performing a co-optimization to find a co-optimized setting for at least two different tools that minimizes the expected overlay, MSD and / or EPE of the key feature(s), and / or using the expected overlay, MSD and / or EPE of the key feature(s) as a value term in the value function.

[0079] In another embodiment, a physical and / or empirical through-stack model is proposed that describes how a parameter of interest (e.g., overlay or EPE) propagates through the stack (e.g., from layer to layer). This may include predicting / estimating overlay through the stack at a sub-field level, taking into account that the intra-die stress fingerprint will be affected by multiple different process fingerprints (e.g., involving deposition and / or etch processes).

[0080] This through-stack model has many advantages. Physical / empirical models will provide insights into overlay, for example, subfield correction models can calculate residuals after using subfield correction. Further knowledge of subfield correction can be merged back into the through-stack model to better optimize the stack design.

[0081] Modifying the product and / or changing the process will have an impact on both intra-field and intra-die (sub-field) fingerprints. Current approaches involve optimizing the process or product and then correcting via appropriate sub-field corrections, which is a short-term and expensive solution. Experimental iterations are expensive and time-consuming, while maximizing processing time / effort is operationally expensive. Balancing lithography and process effects via this through-stack model can accelerate R&D.

[0082] Such a through-stack model can be used to help implement the two optimization embodiments described herein (in-spec die optimization and / or multi-tool co-optimization). The ability to predict through-stack overlay (particularly caused by intra-die stress) provides potentially better predictions of in-spec die or yield loss. Furthermore, such model-based estimation of through-stack overlay better enables the construction of a fingerprint database to provide appropriate corrections.

[0083] It is also proposed to optimize the control strategy based on a sensitivity metric that describes the sensitivity of a particular correction to the input / measurement data used to determine the correction and / or layout of the device being exposed; for example, the sensitivity of the control profile to the quality of the measurement data (e.g., overlay data) used to determine the control profile. The subfield correction can be based on parameter and / or fading optimization, where key parameters such as MSD, correction profile, and wafer stage / reticle stage jitter have an impact on the overall performance of the subfield optimization.

[0084] For example, such a sensitivity metric can be used to determine and / or quantify accuracy; for example, the sensitivity metric can include an accuracy metric for a potential launch input (e.g., quantifying the possible accuracy of a potential launch). For example, the accuracy metric can indicate a lower accuracy in situations where the input data / measurement data used to determine the potential launch input is unreliable (e.g., due to noise) and / or the launch potential is limited and the potential launch input cannot be properly launched. Understanding the sensitivity and variations in one or more scanner parameters (e.g., KPIs) can improve process monitoring / control and more accurate fingerprint determination, resulting in better scanner launch and improved overlay, thereby improving yield. For example, different control strategies can be selected based on the sensitivity or accuracy metrics.

[0085] More specifically, the control strategy optimization can optimize, for example, a scanner-reticle co-optimization control distribution, a control loop time filter, and / or a control loop weighting. As an example, if the measurement data is known to be noisy, a different scanner-reticle co-optimization can be used than when the measurement data is less noisy. Scanner-reticle co-optimization is described in European patent application number EP 19177106.2, which is incorporated herein by reference, and describes a co-optimization of correction strategies for both a mask formation process and a scanner exposure process to determine an optimized mask correction so that the co-optimized scanner correction is corrected to be simpler in the scanning direction to enable an overlay error distribution. The co-optimization can also take into account the capabilities and / or sensitivities of the mask writing tool to better optimize the mask correction. Such a co-optimization can include, for example, solving an iterative algorithm that optimizes (e.g., minimizes) a performance parameter value (e.g., overlay or EPE) based on a sub-distribution of the scanner and the mask writing tool.

[0086] In addition, when a relatively "noise tolerant" control strategy is selected, a sparser and / or simpler measurement strategy can be used. This enables sensitivity to be controlled by controlling the measurement (e.g., by measuring more or fewer points). The sparser measurement data can also include scanner measurement data (combined to supplement or replace other measurement data), such as leveling measurement data.

[0087] In another embodiment, a control strategy or control recipe may be derived and / or selected based on a library of sparse (more specifically scanner) metrology data and intra-field or intra-sub-field (intra-die) fingerprints (or associated control recipes). This may significantly reduce the high computational effort involved in determining a control recipe for each process (e.g., each wafer). A database of intra-field (and / or intra-sub-field) fingerprints and / or associated corrections may be created for a particular field geometry based on, for example, training data associated with the associated MSD and sub-field correction parameters. Such a database may be used, for example, to determine a fast and relatively accurate correction profile for scanner activation based on (e.g., inline) scanner measurements. In contrast, currently activation profiles for intra-die stress-inducing fingerprints need to be generated by external tooling before the corrections are sent to the scanner.

[0088] For example, while all wafers have intra-die stress, it is difficult to understand how the stress fingerprint evolves from wafer to wafer because it is not possible to perform external measurements on all wafers. Currently, extensive measurements are performed to measure the intra-field, intra-sub-field or intra-die fingerprint resulting from such intra-die stress on a subset of wafers and to determine a correction that is merged with the leveling measurements for a specific wafer and used to determine the correction. Here, it is proposed to use the leveling data to estimate the fingerprint due to intra-die stress and / or the corresponding correction.

[0089] In this way, the training data may include non-scanner or external metrology data (e.g., fingerprint data including intra-field and / or intra-sub-field fingerprints, such as overlay fingerprint data measured using a dedicated metrology tool, etc.) and corresponding scanner metrology data (e.g., leveling data), and a suitable solver (e.g., higher order, such as third order, equation or even machine learning algorithm or network (e.g., neural network)) is trained to learn the correlation between the non-scanner / external metrology data and the scanner metrology data. Using such a database, the intra-field or intra-sub-field fingerprint and / or its appropriate correction can be determined based on the scanner metrology data, thereby achieving inline correction for the fingerprint (e.g., caused at least in part by intra-die stress). However, it should also be understood that such a database or trained solver can be used in a feedback control loop or monitoring tool (e.g., to flag particularly high stress distributions and therefore flag possible out-of-specification tooling).

[0090] Such a database that links scanner measurements to in-field fingerprints (such as those resulting from in-die stresses) can be used (or combined and trained) in conjunction with the aforementioned database that links context to in-field fingerprints. Thus, in-field fingerprints (e.g., resulting from in-die stresses) can be determined (e.g., inline) based on both context and scanner measurements.

[0091] Additionally, the sensitivity metric may be used in relation to current product performance (eg, CD ratio / lithography margin) to identify variations and excursions (eg, linking input data to the product via the sensitivity metric).

[0092] The sensitivity metric can also be used as an input to temporal filtering methods and APC control; for example, the weighting can be adjusted by the sensitivity of the activation distribution based on user preferences and input data or based on the noise level of the data.

[0093] Figure 5 is a flow chart showing an exemplary arrangement incorporating many of the concepts described above. The training phase TP uses external measurement data DAT MET and the corresponding scanner measurement data DAT SCAN . External measurement data DAT MET It may include, for example, fingerprint data such as intra-field fingerprints and / or optionally intra-sub-field or intra-die fingerprints (all references to intra-field fingerprints should be understood to include the possibility of sub-field fingerprints at smaller scales). For example, such intra-field fingerprints may be in the form of one or more of overlay data, intra-chip metrology data, scanning electron microscope data. For example, scanner metrology data DAT SCAN One or more leveling data may be included, such as leveling MA error, height map data, continuous wafer map.

[0094] In the training phase TP, the external measurement data DAT MET and the corresponding scanner measurement data DAT SCAN It can be used to construct a fingerprint database FPDB, which includes, for example, corresponding scanner measurement data DAT SCAN The fingerprint data linked to the MET The fingerprint database FPDB may also include appropriate corrections and / or correction recipes for each intra-field fingerprint.

[0095] In the production phase PP, the scanner measurement data DAT from the scanner SCAN SCAN Combined with the fingerprint database FPDB built during the training phase, it can be used to infer the field fingerprint as part of the optimization step OPT. External measurement data DAT from the measurement tool DAT can be used MET To support and / or verify the inference. MET Used only or primarily to verify DAT measurements via scanner SCANIn-field (e.g., stress) fingerprints are inferred, rather than actually determined, so it can be significantly sparser (fewer measurements, e.g., at fewer locations and / or using fewer wafers) than many existing metrology strategies. Alternatively or additionally, the metrology data can be targeted, e.g., based on the determined in-field / intra-die fingerprints. For example, the measurements can be for areas or locations where the fingerprint shows particularly large errors or residuals, which indicates that stress within the die is particularly large (e.g., compared to the rest of the die).

[0096] The optimization step OPT may also include determining a sensitivity metric, for example determining the sensitivity of a parameter of interest (eg, a KPI), and using the sensitivity metric to optimize the correction. Determining the sensitivity metric may use any of the methods described herein.

[0097] As described above, the optimization step OPT may be a joint optimization for controlling the scanner SCAN and another tool (eg the etcher ETCH).

[0098] As mentioned above, the optimization step OPT may be an in-spec die or an in-spec sub-field optimization.

[0099] As mentioned above, the optimization step OPT may use a through-stack model to take into account the influence of previous layers when optimizing.

[0100] Therefore, the output OUT may include one or more of the following:

[0101] Estimation of intra-field and / or intra-sub-field / intra-die fingerprints, such as those resulting (at least in part) from intra-die stresses, without direct measurement (e.g., per wafer)—this can be verified with (e.g., limited or sparse) metrology;

[0102] Optimized measurement schemes (e.g., sampling schemes) using sparse and / or directional measurements;

[0103] Optimize correction, for example, using in-field and / or in-die stress fingerprints, thereby reducing lead time and metrology costs;

[0104] Evolution data tracking the evolution of the intra-die fingerprint over time / field / wafer / batch.

[0105] Thus, such an arrangement enables per-wafer intra-die fingerprint (e.g., due to stress) monitoring features, the results of which (and the evolution of the fingerprint over time / field / wafer / batch) can be used to further fine-tune process control. The arrangement also provides more efficient metrology, reduces the performance of unnecessary measurements, and also provides guidance for measurements to points of interest where intra-die stress is more severe. In addition, the arrangement facilitates monitoring of applied scanner corrections to obtain intra-field stress fingerprints; for example, to monitor how good the applied drive is in terms of product performance.

[0106] Using such a database, the in-field fingerprint can be determined based on the scanner metrology data and / or appropriate corrections can be made thereto, thereby enabling inline correction of stress within the die.

[0107] The following numbered clauses encompass the concepts disclosed herein, each of which can be implemented as a computer program and / or within a suitably configured lithographic apparatus:

[0108] 1. A method for determining intra-field correction for sub-field control of a lithography process, the lithography process being used to expose a pattern on an exposure field of a substrate, the exposure field comprising a plurality of sub-fields, the method comprising performing an optimization to determine the intra-field correction, the optimization being such that it maximizes the number of said sub-fields within specification.

[0109] 2. The method of clause 1, wherein performing the optimization comprises weighting and / or sacrificing one or more sub-fields that are considered to have a higher probability of being non-functional.

[0110] 3. The method of clause 2, wherein the decision to weight and / or sacrifice one or more sub-fields is based on a priori knowledge of the product being exposed.

[0111] 4. A method according to clause 2 or 3, wherein the decision to weight and / or sacrifice one or more sub-fields is based on a measurement of stress within the field.

[0112] 5. The method of clause 4, wherein subfields that exhibit a higher level of non-uniformity to the stress are more likely to be weighted and / or sacrificed.

[0113] 6. The method of clause 5, wherein the higher level of non-uniformity is determined based on whether the stress uniformity of the die is above a stress uniformity threshold.

[0114] 7. A method according to any of clauses 2 to 6, wherein the decision to weight and / or sacrifice one or more subfields is based on the location of the fields and / or subfields on the substrate.

[0115] 8. The method of clause 7, wherein subfields at or near an edge of the substrate are more likely to be weighted and / or sacrificed.

[0116] 9. A method as described in any preceding clause, wherein the optimization comprises maximum absolute value optimization per subfield.

[0117] 10. A method as described in any preceding clause, wherein the optimization determines an optimal subfield control trajectory that maximizes the number of subfields within specifications.

[0118] 11. A method as described in any preceding clause, wherein the optimization takes into account the start-up capabilities of the lithographic equipment used to perform the lithographic process.

[0119] 12. A method as recited in any preceding clause, wherein each sub-field comprises a single die or a portion of a single die.

[0120] 13. A method as described in any preceding clause, wherein said determining an intra-field correction comprises at least partially correcting an intra-sub-field and / or intra-field fingerprint associated with a stress pattern within a sub-field or field.

[0121] 14. A method for determining intrafield corrections for subfield control of a manufacturing process, the manufacturing process comprising a lithography process for exposing a pattern on an exposure field of a substrate, the exposure field comprising a plurality of subfields, the manufacturing process comprising at least one additional processing step, the method comprising:

[0122] - performing an optimization to determine the intra-field correction, the optimization comprising a joint optimization based on at least one lithography parameter related to the lithography process and at least one processing parameter related to at least one additional processing step.

[0123] 15. A method according to clause 14, wherein the at least one lithography parameter relates to control of a lithographic apparatus for performing the lithography process and the at least one processing parameter relates to control of at least one processing apparatus for performing the at least one additional processing step.

[0124] 16. The method of clause 15, wherein the at least one processing tool comprises one or more of an etching tool or an etching tool chamber, a deposition tool, a baking tool, a developing tool, and a coating tool.

[0125] 17. A method according to any of clauses 14 to 16, wherein the optimization is with respect to one or more of edge placement error, overlay, moving average error and moving standard deviation error.

[0126] 18. The method of any of clauses 14 to 16, wherein the optimization is about maximizing the number of subfields that are within specifications.

[0127] 19. The method of clause 18, wherein the optimizing comprises performing the method of any one of clauses 1 to 13.

[0128] 20. The method according to any one of clauses 14 to 19, wherein the optimization comprises a balance between throughput and quality.

[0129] 21. The method of clause 20, wherein the balance between throughput and quality is weighted differently for different subfields.

[0130] 22. A method according to any of clauses 14 to 21, wherein the determining of the intra-field correction comprises at least partially correcting an intra-sub-field and / or intra-field fingerprint associated with a stress pattern within a sub-field or field; and the method comprises:

[0131] - predicting intra-subfield and / or intra-field fingerprints based on context data describing the processing context of the substrate; and

[0132] - wherein said determining an intrafield correction comprises determining a correction based on said predicted intrafield-subfield and / or intrafield fingerprint.

[0133] 23. The method of clause 22, wherein the step of determining a correction based on the predicted intra-sub-field and / or intra-field fingerprints comprises referring to a library of contextual data linking group fingerprints to a plurality of substrates.

[0134] 24. The method according to clause 23, wherein the method further comprises the following initial steps:

[0135] - obtaining fingerprint data describing said intra-subfield and / or intra-field fingerprints of a plurality of substrates and corresponding context data describing the processing history of each substrate;

[0136] - decomposing the intra-field and / or intra-sub-field fingerprints into group fingerprints; and

[0137] - compiling said library linking said set of fingerprints to said contextual data.

[0138] 25. A method for determining intrafield corrections for subfield control of a lithography process for exposing a pattern on an exposure field of a substrate in forming a plurality of layers of a stack, the exposure field comprising a plurality of subfields, the method comprising:

[0139] - Construct a physical and / or empirical through-stack model that describes how the parameter of interest propagates through the stack layer by layer.

[0140] 26. A method according to clause 25, comprising using the model to estimate the evolution of a parameter of interest through the stack at a sub-field level.

[0141] 27. A method according to clause 25 or 26, comprising using the model to calculate the residual error after initiating an in-field correction.

[0142] 28. A method according to any one of clauses 25 to 27, comprising using the straight-through stacking model when compiling the library in the method of clause 24.

[0143] 29. A method according to any one of clauses 25 to 27, comprising using the through-stack model to predict values ​​of parameters of interest; and using the predicted values ​​in the step of performing the optimization in the method of any one of clauses 1 to 13.

[0144] 30. A method for determining intra-field correction for sub-field control of a lithography process, wherein the lithography process is used to expose a pattern on an exposure field of a substrate, the exposure field comprising a plurality of sub-fields, the method comprising: determining a sensitivity metric describing the sensitivity of the correction to input data used to determine the correction and / or layout of the pattern; and determining the intra-field correction for sub-field control based on the sensitivity metric.

[0145] 31. The method of clause 30, wherein the sensitivity metric describes the accuracy of a potential activation input.

[0146] 32. A method according to clause 31, wherein the sensitivity measure indicates a lower accuracy in case the input data is unreliable and / or the activation potential is limited and cannot be activated correctly.

[0147] 33. A method according to any of clauses 30 to 32, wherein the step of determining the intra-field correction comprises optimizing one or more of: scanner-reticle co-optimization control distribution, control loop time filtering and / or control loop weighting.

[0148] 34. A method according to any of clauses 30 to 33, further comprising selecting a control strategy from a library of control strategies using a sensitivity metric based on lithographic apparatus metrology data.

[0149] 35. A method according to any of clauses 30 to 33, further comprising using a trained solver to select a control strategy using the sensitivity metric based on lithographic apparatus metrology data.

[0150] 36. A method according to clause 35, comprising: obtaining training data from a plurality of substrates, including non-lithographic equipment metrology data and corresponding lithographic equipment metrology data; and training the solver to link the non-lithographic equipment metrology data and the lithographic equipment metrology data.

[0151] 37. A method according to any of clauses 34 to 36, wherein the lithographic apparatus metrology data comprises levelling data.

[0152] 38. A method according to any of clauses 30 to 37, comprising determining an estimate of intra-die stress from the levelling data; and determining a correction based on the estimated intra-die stress.

[0153] 39. The method of clause 38, wherein the steps of determining an estimate and determining a correction are performed for each die based on leveling data from each substrate.

[0154] 40. A method for determining intrafield corrections for subfield control of a lithography process for exposing a pattern on an exposure field of a substrate, the exposure field comprising a plurality of subfields, the method comprising:

[0155] obtaining a database including in-field fingerprint data linked to historical lithography equipment metrology data;

[0156] determining an estimate of the in-field fingerprint based on the lithographic apparatus metrology data and the database; and

[0157] Intra-field corrections for the lithography process are determined based on the estimated intra-field fingerprint.

[0158] 41. The method of clause 40, wherein the intra-field fingerprint data comprises an intra-field fingerprint associated with a stress pattern within each field.

[0159] 42. A method according to clause 40 or 41, wherein the intra-field fingerprint data comprises an intra-sub-field fingerprint associated with a stress pattern within each sub-field.

[0160] 43. A method according to any of clauses 39 to 42, comprising obtaining external metrology data from an earlier substrate; and

[0161] An in-field correction is verified based on the external measurement data.

[0162] 44. A method according to clause 43, wherein the external measurement data is sparser than data required to directly determine the intra-field correction.

[0163] 45. A method according to clause 43 or 44, comprising using the estimate of the intra-field fingerprint to determine a measurement strategy for the external measurement.

[0164] 46. ​​The method of clause 45, wherein the determining a measurement strategy comprises determining a sampling scheme for the external measurement.

[0165] 47. A method according to any of clauses 39 to 46, comprising monitoring the relationship between the estimate for an intra-field fingerprint and the intra-field correction.

[0166] 48. A method according to any of clauses 40 to 47, wherein said determining an intra-field correction comprises performing an optimization of at least one parameter of interest.

[0167] 49. The method of clause 48, wherein the optimization is such that it maximizes the number of subfields that are within specifications.

[0168] 50. The method of clause 49, wherein the optimizing comprises a maximum absolute value optimization per subfield.

[0169] 51. A method according to clause 49 or 50, wherein said performing the optimization comprises weighting and / or sacrificing one or more sub-fields which are considered to have a higher probability of being non-functional.

[0170] 52. The method of clause 51, wherein the decision to weight and / or sacrifice one or more sub-fields is based on a priori knowledge of the product being exposed.

[0171] 53. A method according to clause 51 or 52, wherein the decision to weight and / or sacrifice one or more sub-fields is based on said estimation of the intra-field fingerprint.

[0172] 54. A method according to clause 53, wherein, in the event that the estimation of the intra-field fingerprint indicates that one or more non-uniform sub-fields exhibit a higher level of non-uniformity with respect to intra-sub-field stress, these non-uniform sub-fields are weighted and / or sacrificed.

[0173] 55. The method of clause 54, wherein the determination of the higher level of non-uniformity is based on a determination of whether a stress uniformity within a subfield of the subfield is above a stress uniformity threshold.

[0174] 56. A method according to any of clauses 51 to 55, wherein the decision to weight and / or sacrifice one or more sub-fields is based on the location of the fields and / or sub-fields on the substrate.

[0175] 57. The method of clause 56, wherein subfields at or near an edge of the substrate are more likely to be weighted and / or sacrificed.

[0176] 58. A method according to any of clauses 49 to 57, wherein the optimisation determines an optimal subfield control trajectory which maximises the number of subfields within specification.

[0177] 59. A method according to any of clauses 48 to 58, wherein the optimization takes into account a startup capability of a lithographic apparatus used to perform the lithographic process.

[0178] 60. A method according to any of clauses 48 to 59, wherein the parameters of interest include one or more of edge placement error, overlay, moving average error and moving standard deviation error.

[0179] 61. A method according to any of clauses 48 to 60, wherein the optimization comprises jointly optimizing at least two of the parameters of interest, the parameters of interest comprising at least one lithography parameter associated with the lithography process and at least one processing parameter associated with at least one additional processing step.

[0180] 62. A method according to clause 61, wherein the at least one lithography parameter relates to control of a lithographic apparatus for performing the lithography process and the at least one processing parameter relates to control of at least one processing apparatus for performing the at least one additional processing step.

[0181] 63. The method of clause 62, wherein the at least one processing apparatus comprises one or more of an etching apparatus or an etching apparatus chamber, a deposition apparatus, a baking apparatus, a developing apparatus, and a coating apparatus.

[0182] 64. A method according to any of clauses 48 to 63, comprising the step of constructing a physical and / or empirical through-stack model, the model describing how a parameter of interest propagates through a stack in a plurality of layers, the stack being formed on a substrate;

[0183] using the through-stack model to estimate the evolution of a parameter of interest through the stack at a sub-field level; and

[0184] The estimate of the evolution of the parameter of interest through the stack is used in the optimization.

[0185] 65. The method of clause 64, comprising, after initiating in-field correction, using the through-stack model to calculate residual error;

[0186] And using the residual error in subsequent optimization for intra-field correction.

[0187] 66. A method according to clause 64 or 65, comprising using said through-stack model to predict the value of a parameter of interest; and

[0188] The predicted value is used in the step of determining an intrafield correction.

[0189] 67. A method according to any of clauses 48 to 66, comprising determining a sensitivity metric describing the sensitivity of corrections to input data used to determine intra-field corrections and / or layout of the pattern; and

[0190] The sensitivity measure is used in the optimization step.

[0191] 68. The method of clause 67, wherein the sensitivity metric describes the accuracy of the potential activation input.

[0192] 69. A method according to clause 68, wherein the sensitivity metric indicates a lower accuracy in case the input data is unreliable and / or the activation potential is limited and cannot be activated correctly.

[0193] 70. A method according to any one of clauses 67 to 69, wherein the step of determining the intra-field correction comprises optimizing one or more of: scanner-reticle co-optimization control distribution, control loop time filtering and / or control loop weighting.

[0194] 71. A method according to any of clauses 67 to 70, further comprising selecting a control strategy from a library of control strategies using a sensitivity metric based on lithographic apparatus metrology data.

[0195] 72. The method of clause 40, wherein the step of determining an intra-field correction is further based on a database linking group fingerprints to contextual data.

[0196] 73. The method of any of clauses 40 to 72, wherein each sub-field comprises a single die or a portion of a single die.

[0197] 74. A method according to any of clauses 40 to 73, further comprising selecting a control strategy from a library of control strategies using an estimate of the intra-field fingerprint based on lithographic apparatus metrology data.

[0198] 75. The method according to any one of clauses 40 to 74, further comprising:

[0199] obtaining training data including external metrology data and / or in-field fingerprints derived therefrom and corresponding lithography apparatus metrology data from a plurality of substrates; and

[0200] The solver is trained to link the external metrology data and / or in-field fingerprints to the lithographic apparatus metrology data.

[0201] 76. A method according to any of clauses 40 to 75, wherein the lithographic apparatus metrology data comprises levelling data.

[0202] 77. A method according to any of clauses 40 to 76, wherein the steps of determining an estimate of an intra-field fingerprint and determining an intra-field correction are performed for each substrate.

[0203] 78. A method according to any of clauses 40 to 77, wherein the steps of determining an estimate of an intra-field fingerprint and determining an intra-field correction are performed for each field and / or each sub-field.

[0204] 79. A method according to any of clauses 40 to 78, comprising monitoring the evolution of in-field fingerprint data over time, wafers and / or batches.

[0205] 80. A method for determining intrafield corrections for subfield control of a lithography process for exposing a pattern on an exposure field of a substrate, the exposure field comprising a plurality of subfields, the method comprising:

[0206] An optimization is performed to determine an intrafield correction that maximizes the number of subfields that are within specification.

[0207] 81. A method for determining intrafield corrections for subfield control of a manufacturing process, the manufacturing process comprising a lithography process for exposing a pattern on an exposure field of a substrate, the exposure field comprising a plurality of subfields, the manufacturing process comprising at least one additional processing step, the method comprising:

[0208] - performing an optimization to determine the intra-field correction, the optimization comprising a joint optimization in terms of at least one lithography parameter related to the lithography process and at least one processing parameter related to at least one additional processing step.

[0209] 82. A method for determining intrafield corrections for subfield control of a lithography process for exposing a pattern on an exposure field of a substrate in forming a plurality of layers of a stack, the exposure field comprising a plurality of subfields, the method comprising:

[0210] A physical and / or empirical through-stack model is constructed that describes how the parameter of interest propagates through the stack layer by layer.

[0211] 83. A method for determining intra-field correction for sub-field control of a lithography process, wherein the lithography process is used to expose a pattern on an exposure field of a substrate, the exposure field comprising a plurality of sub-fields, the method comprising:

[0212] determining a sensitivity metric describing a sensitivity of correction to input data used to determine a correction and / or layout of the pattern; and

[0213] The intrafield correction for subfield control is determined based on the sensitivity measure.

[0214] 84. A computer program comprising program instructions operable, when run on suitable apparatus, to perform the method of any of clauses 40 to 83.

[0215] 85. A non-transitory computer program carrier comprising the computer program of clause 84.

[0216] 86. A lithographic apparatus operable to perform the method of any of clauses 40 to 83; and use the correction in a subsequent exposure.

[0217] 87. A method for determining intra-field corrections for controlling a lithographic apparatus configured to expose a pattern on an exposure field of a substrate, the method comprising:

[0218] acquiring measurement data for determining intra-field corrections;

[0219] In case the metrology data is unreliable and / or in case the lithographic apparatus is limited in activating a potential activation input based on said metrology data, determining an accuracy metric indicative of a lower accuracy; and

[0220] The intrafield correction is determined based at least in part on the accuracy metric.

[0221] 88. A method according to clause 87, wherein the potential activation input is configured to control a stage and / or a projection lens manipulator of a lithographic apparatus.

[0222] 89. A method according to clause 87, wherein the target of the intra-field correction is to control a sub-field of the exposure field.

[0223] 90. A method according to any of clauses 87 to 89, wherein the step of determining the intra-field correction comprises:

[0224] jointly optimizing a first control profile for a lithographic apparatus and a second control profile for a mask writing process; and / or

[0225] A time filter constant and / or a weighting constant used in a control loop for controlling a lithographic apparatus is optimized, wherein the control loop uses metrology data.

[0226] 91. The method of clause 87, further comprising selecting a control strategy from a library of control strategies using the accuracy metric, and wherein the in-field correction is based at least in part on the selected control strategy.

[0227] 92. A method according to clause 91, wherein the control strategy comprises a measurement strategy of a metrology apparatus and / or a lithographic apparatus.

[0228] 93. The method of clause 92, wherein a measurement density associated with a measurement strategy corresponding to a selected control strategy is dependent on a precision metric.

[0229] 94. The method of clause 87, further comprising using a trained solver based on lithographic apparatus metrology data to select a control strategy using the accuracy metric.

[0230] 95. The method of clause 94, comprising: obtaining training data from a plurality of substrates, the training data comprising non-lithographic device measurement data and corresponding lithographic device measurement data; and training the solver to link the non-lithographic device measurement data and the lithographic device measurement data.

[0231] 96. A method according to clause 94 or 95, wherein the lithographic apparatus metrology data comprises levelling data.

[0232] 97. The method of clause 96, further comprising determining an estimate of intra-die stress based on the leveling data; and determining an intra-field correction based on the estimated intra-die stress.

[0233] 98. The method of clause 97, wherein the steps of determining an estimate and determining an intra-field correction are performed for each die.

[0234] 99. A computer program comprising program instructions operable to perform the method of clause 87 when run on suitable apparatus.

[0235] 100. A non-transitory computer program carrier comprising the computer program of clause 99.

[0236] 101. A lithographic apparatus operable to perform the method of clause 87 and to use the intrafield correction in a subsequent exposure.

[0237] Although a patterning device in the form of a physical reticle has been described, the term "patterning device" in this application also includes a data product that conveys a pattern in digital form, such as for use in conjunction with a programmable patterning device.

[0238] Although specific reference may have been made above to the use of embodiments of the invention in the context of optical lithography, it will be appreciated that the invention may be used in other applications, such as imprint lithography, and is not limited to optical lithography where the context permits. In imprint lithography, the topography in the patterning device defines the pattern produced on the substrate. The topography of the patterning device may be pressed into a resist layer supplied to the substrate, upon which the resist is cured by applying electromagnetic radiation, heat, pressure, or a combination thereof. The patterning device is removed from the resist, leaving a pattern therein after the resist has cured.

[0239] The terms "radiation" and "beam" in relation to lithographic equipment include all types of electromagnetic radiation, including ultraviolet (UV) radiation (e.g., having wavelengths around 365, 355, 248, 193, 157 or 126 nm) and extreme ultraviolet (EUV) radiation (e.g., having wavelengths in the range of 5-20 nm), as well as particle beams such as ion beams or electron beams.

[0240] The term "lens," where the context allows, may refer to any one or combination of various types of optical components, including refractive, reflective, magnetic, electromagnetic, and electrostatic optical components.

[0241] The foregoing description of specific embodiments will so fully reveal the general nature of the invention that others can easily modify and / or adapt these specific embodiments to various applications by applying the knowledge of the art, without the need for endless experimentation, without departing from the general concept of the invention. Therefore, based on the teachings and guidance presented herein, such adaptations and modifications are intended to be within the meaning and range of equivalents of the disclosed embodiments. It should be understood that the phrases or terms herein are intended to be illustrative by way of example, rather than restrictive, so that the terms or phrases of this specification will be interpreted by the skilled person in accordance with the teachings and guidance.

[0242] The breadth and scope of the present invention should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

Claims

1. A method for determining intra-field corrections for controlling a lithographic apparatus configured to expose a pattern on an exposure field of a substrate, the method comprising: Acquiring measurement data for determining the intra-field correction; determining an accuracy metric indicative of a lower accuracy in case the metrology data is unreliable and / or in case the lithographic apparatus is limited in activating a potential activation input based on the metrology data; selecting a control strategy from a library of control strategies using the accuracy metric, and wherein the intra-field correction is based at least in part on the selected control strategy; as well as The intrafield correction is determined based at least in part on the accuracy metric. 2 . The method of claim 1 , wherein the potential activation input is configured to control a stage and / or a projection lens manipulator of the lithographic apparatus.

3. The method of claim 1, wherein the intra-field correction targets controlling a sub-field of the exposure field.

4. The method according to any one of claims 1 to 3, wherein the step of determining the intra-field correction comprises: jointly optimizing a first control profile for the lithography apparatus and a second control profile for a mask writing process; and / or A time filtering constant and / or a weighting constant used in a control loop for controlling the lithographic apparatus is optimized, wherein the control loop uses the metrology data. 5 . The method of claim 1 , wherein the control strategy comprises a measurement strategy for a metrology apparatus and / or the lithographic apparatus.

6. The method of claim 5, wherein a measurement density associated with the measurement strategy corresponding to the selected control strategy is dependent on the accuracy metric.

7. The method of claim 1, further comprising using the accuracy metric to select a control strategy using a trained solver based on lithographic apparatus metrology data.

8. The method according to claim 7, comprising: obtaining training data including non-lithographic equipment metrology data and corresponding lithographic equipment metrology data from a plurality of substrates; and training the solver to link the non-lithographic apparatus metrology data to the lithographic apparatus metrology data.

9. A method according to claim 7 or 8, wherein the lithographic apparatus metrology data comprises levelling data.

10. The method of claim 9, further comprising determining an estimate of intra-die stress from the leveling data; and determining the intra-field correction based on the estimated intra-die stress.

11. The method of claim 10, wherein the steps of determining an estimate and determining the intra-field correction are performed for each die.

12. A non-transitory computer program carrier storing a computer program, the computer program comprising program instructions operable to determine an intra-field correction to control a lithographic apparatus configured to expose a pattern on an exposure field of a substrate, the program instructions being configured to: Acquiring measurement data for determining the intra-field correction; determining an accuracy metric indicative of a lower accuracy in case the metrology data is unreliable and / or in case the lithographic apparatus is limited in activating a potential activation input based on the metrology data; selecting a control strategy using the accuracy metric based on lithography apparatus metrology data using a trained solver; as well as The intrafield correction is determined based at least in part on the accuracy metric.

13. A computer program carrier according to claim 12, wherein the potential activation input is configured for controlling a stage and / or a projection lens manipulator of the lithographic apparatus.

14. A computer program carrier according to claim 12, wherein the intra-field correction targets controlling a sub-field of the exposure field.

15. The computer program carrier of claim 12, wherein the program instructions configured to determine the intrafield correction include instructions configured to: jointly optimizing a first control profile for the lithographic apparatus and a second control profile for a mask writing process; and / or A time filtering constant and / or a weighting constant used in a control loop for controlling the lithographic apparatus is optimized, wherein the control loop uses the metrology data.

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