Data processing method and device, electronic equipment and storage medium

Abstract

The present disclosure relates to a data processing method and device, electronic equipment and storage medium, which are applied to a multi-processor many-core system. The processing method comprises: dividing the data into a plurality of first data, and determining a vector number corresponding to a first first data; wherein the first data comprises at least one vector; determining the vector number corresponding to the vector in each first data based on the vector number corresponding to the first first data; and sequentially allocating the vector in each first data to a corresponding computing core based on the vector number corresponding to the vector in each first data. The above processing method realizes flexible allocation of the first data. In addition, the above processing method is not limited by the number of dimensions, and the allocation of the first data by the vector number can simplify the process of allocating multi-dimensional data to the computing core, realize high flexibility and convenient data allocation, and thus improve the processing efficiency of the multi-processor many-core system.

Description

Technical Field

[0001] This disclosure relates to the field of data processing, and more particularly to a data processing method, apparatus, electronic device, and storage medium. Background Technology

[0002] Neuromorphic computing chips adopt a decentralized many-core parallel processing architecture, where each computing core can run independently and exchange data. Typically, this in-memory computing architecture can lead to limited computing resources for each computing core. Therefore, how to divide the data and how to allocate the divided data to each computing core will directly affect the data processing efficiency of the computing core. Summary of the Invention

[0003] According to a first aspect of this disclosure, a data processing method is provided, applied to a multiprocessor many-core system, the multiprocessor many-core system including multiple processors, each processor including multiple computing cores, the processing method including: dividing the data into multiple first data, and determining a vector number corresponding to the first first data; wherein, the first data includes at least one vector; determining a vector number corresponding to a vector within each first data based on the vector number corresponding to the first first data; and sequentially assigning the vectors in each first data to the corresponding computing cores based on the vector numbers corresponding to the vectors within each first data.

[0004] In one possible implementation, the vector includes multiple second data, and the allocation order numbers corresponding to the second data within the same vector are consecutive, the allocation order numbers being used to indicate the order in which the second data are allocated to the computing core.

[0005] In one possible implementation, determining the vector number corresponding to the first data includes: if the number of distribution dimensions of the data is greater than or equal to two, performing the following operations: determining a first dimension that is not the first to be allocated and a second dimension that is not the last to be allocated, based on the allocation order of the data in the distribution dimensions; and determining all vector numbers corresponding to the first data based on the length of the first data in the first dimension and the number of the first data in the second dimension.

[0006] In one possible implementation, the step of sequentially assigning vectors in each first data to corresponding computational kernels based on the vector number corresponding to each first data vector includes: determining the computational kernel corresponding to each first data; and sequentially assigning vectors corresponding to the vector numbers to the corresponding computational kernels according to the order of the vector numbers corresponding to each first data.

[0007] In one possible implementation, dividing the data into multiple first data includes: dividing the data into multiple first data based on preset division parameters; wherein the division parameters are used to determine the number of first data in each dimension; and generating coordinates corresponding to each first data based on the division parameters.

[0008] In one possible implementation, determining the vector number corresponding to each vector within the first data based on the vector number corresponding to the first first data includes: when the number of distribution dimensions of the data is greater than or equal to two, performing the following operations: determining the vector number corresponding to the first vector within each first data based on the length of the first data in the first dimension, the number in the second dimension, and the corresponding coordinates; and determining all vector numbers corresponding to each first data based on the first vector number corresponding to each first data and all vector numbers in the first first data.

[0009] In one possible implementation, determining the vector number corresponding to each vector within the first data based on the vector number corresponding to the first first data includes: when the number of distribution dimensions of the data is equal to one, determining the vector number corresponding to each first data based on the number of distribution dimensions of the first data and the vector number corresponding to the first first data.

[0010] According to a second aspect of this disclosure, a data processing apparatus is provided, applied to a multiprocessor many-core system, the multiprocessor many-core system including multiple processors, each processor including multiple computing cores, the processing apparatus including: a data partitioning module, used to partition the data into multiple first data and determine a vector number corresponding to the first first data; wherein the first data includes at least one vector; a vector allocation module, used to determine a vector number corresponding to a vector within each first data based on the vector number corresponding to the first first data; and a data allocation module, used to sequentially allocate the vectors in each first data to corresponding computing cores based on the vector number corresponding to the vectors within each first data.

[0011] The processor is configured to perform the data processing method according to any one of claims 1 to 8.

[0012] According to a third aspect of this disclosure, an electronic device is provided, comprising: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to perform a data processing method as described in any of the preceding claims.

[0013] According to a fourth aspect of this disclosure, a non-volatile computer-readable storage medium is provided, having stored thereon computer program instructions that, when executed by a processor, implement the data processing method described in any of the preceding claims.

[0014] This disclosure provides a data processing method applied to a multiprocessor many-core system. The method divides data into multiple first data sets, determines the vector number corresponding to the first first data set, and then, based on the vector number corresponding to the first first data set, determines the vector number corresponding to the vector within each first data set. Finally, based on the vector number corresponding to the vector within each first data set, the vectors in each first data set are sequentially assigned to the corresponding computing cores, thereby achieving flexible allocation of the first data. Furthermore, the above processing method is not limited by the number of dimensions and simplifies the process of allocating multidimensional data to computing cores by assigning first data through vector numbers, achieving highly flexible and convenient data allocation, thereby improving the processing efficiency of the multiprocessor many-core system.

[0015] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Other features and aspects of this disclosure will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. Attached Figure Description

[0016] The accompanying drawings, which are included in and form part of this specification, illustrate exemplary embodiments, features, and aspects of this disclosure together with the specification and serve to explain the principles of this disclosure.

[0017] Figure 1 This is a reference diagram for data partitioning in related technologies.

[0018] Figure 2 This is a reference schematic diagram of a multiprocessor many-core system provided according to an embodiment of the present disclosure.

[0019] Figure 3 This is a flowchart of a data processing method provided according to an embodiment of the present disclosure.

[0020] Figure 4 This is a reference schematic diagram illustrating the processing of two-dimensional data according to a data processing method provided in an embodiment of the present disclosure.

[0021] Figure 5 This is a reference schematic diagram illustrating the processing of three-dimensional data according to a data processing method provided in an embodiment of the present disclosure.

[0022] Figure 6 This is a reference schematic diagram illustrating the processing of three-dimensional data according to a data processing method provided in an embodiment of the present disclosure.

[0023] Figure 7 This is a reference schematic diagram illustrating the processing of four-dimensional data according to a data processing method provided in an embodiment of this disclosure.

[0024] Figure 8This is a reference schematic diagram illustrating the processing of two-dimensional data according to a data processing method provided in an embodiment of the present disclosure.

[0025] Figure 9 This is a reference schematic diagram of a data processing method provided according to an embodiment of the present disclosure.

[0026] Figure 10 This is a block diagram of a data processing apparatus provided according to an embodiment of the present disclosure.

[0027] Figure 11 This is a block diagram of an electronic device 1200 provided according to an embodiment of the present disclosure.

[0028] Figure 12 This is a block diagram of an electronic device provided according to an embodiment of the present disclosure. Detailed Implementation

[0029] Various exemplary embodiments, features, and aspects of this disclosure will now be described in detail with reference to the accompanying drawings. The same reference numerals in the drawings denote elements that have the same or similar functions. Although various aspects of the embodiments are shown in the drawings, they are not necessarily drawn to scale unless specifically indicated otherwise.

[0030] The term “exemplary” as used herein means “serving as an example, embodiment, or illustration.” Any embodiment illustrated herein as “exemplary” is not necessarily to be construed as superior to or better than other embodiments.

[0031] Furthermore, to better illustrate this disclosure, numerous specific details are set forth in the following detailed description. Those skilled in the art will understand that this disclosure can be practiced without certain specific details. In some instances, methods, means, components, and circuits well known to those skilled in the art have not been described in detail in order to highlight the main points of this disclosure.

[0032] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this disclosure, "a plurality of" means two or more, unless otherwise expressly specified.

[0033] See Figure 1 , Figure 1 This is a reference diagram for data partitioning in related technologies. Figure 1Core_0 to Core_5 represent 6 computing cores. Each small square represents a sub-data (e.g., a frame in a one-dimensional time-series signal). Numbers 1 to 24 represent the storage sequence number of each sub-data in the storage medium (which can also be understood as the sequence number of the sub-data allocated to the computing cores during the sub-data allocation process). In related technologies, for this one-dimensional data, an equal distribution method is usually adopted, that is, the total number of sub-data divided by the number of computing cores to be allocated. Figure 1 In this example, the number of computational cores is 6, and the number of sub-data is 24. Therefore, each computational core is allocated 24 / 6, or 4, sub-data. Combined with... Figure 1 The inventors discovered that this allocation method suffers from inflexible data allocation. Specifically, it restricts the sequential storage order of sub-data within each computing core and between adjacent cores. For example, the sub-data within Core_0 is numbered 1 to 4 sequentially, and after allocation, the last sub-data in Core_0 is numbered 4, which is consecutive to the first sub-data in Core_1 (numbered 5). Furthermore, this allocation method cannot be well extended to multi-dimensional applications, resulting in low flexibility in data allocation to computing cores.

[0034] In view of this, embodiments of this disclosure provide a data processing method applied to a multiprocessor many-core system. The method divides data into multiple first data sets, determines the vector number corresponding to the first first data set, and then, based on the vector number corresponding to the first first data set, determines the vector number corresponding to the vector within each first data set. Finally, based on the vector number corresponding to the vector within each first data set, the vectors in each first data set are sequentially assigned to the corresponding computing cores, thereby achieving flexible allocation of the first data. Furthermore, the above processing method is not limited by the number of dimensions and simplifies the process of allocating multidimensional data to computing cores by assigning first data through vector numbers, achieving highly flexible and convenient data allocation, thereby improving the processing efficiency of the multiprocessor many-core system.

[0035] See Figure 2 As shown, Figure 2 This is a reference schematic diagram of a multiprocessor many-core system provided according to an embodiment of the present disclosure. Figure 2 As shown, a multiprocessor many-core system may include multiple processors.

[0036] In one possible implementation, such as Figure 2 As shown, each processor may include multiple computing cores, and data can be transferred between computing cores within each processor and between computing cores of different processors; wherein, each computing core includes a storage component, which is used to store data transferred with other computing cores.

[0037] In one possible implementation, such as Figure 2 As shown, each computing core may include a processing unit and a storage unit. The processing unit may include dendritic units, axonal units, cell body units, and routing units. The storage unit may include multiple storage units.

[0038] In one possible implementation, multiple processors can be integrated into a single neuromorphic computing chip. This neuromorphic chip, also known as a memory-based neuromorphic circuit, references the brain's processing model, simulating the transmission and processing of information by neurons in the brain to improve processing efficiency and reduce power consumption. Each processor can include multiple computing cores, which can independently process different tasks or process the same task in parallel to improve efficiency. Inter-core information can be transmitted between computing cores through routing units within the cores.

[0039] Within a computing core, processing units and storage units can be configured. The processing unit may include dendritic units, axonal units, cell body units, and routing units. The processing unit can simulate the information processing pattern of neurons in the brain, where dendritic units receive signals, axonal units transmit spike signals, cell body units integrate and transform signals, and routing units transmit information with other computing cores. The processing unit within the computing core can read and write to multiple storage units in the storage unit to interact with data within the core, and can each undertake its own data processing and / or data transmission tasks to obtain data processing results, or communicate with other computing cores. Communication with other computing cores includes communication with other computing cores within the same processor, as well as communication with computing cores within other processors.

[0040] In one possible implementation, the storage component includes multiple storage cells, wherein the storage cells can be Static Random Access Memory (SRAM). For example, it can include SRAM with a read / write width of 16 bytes and a capacity of 12 KB. This disclosure does not limit the capacity or bit width of the storage cells.

[0041] Based on the above multiprocessor many-core system, see [link / reference] Figure 3 As shown, Figure 3 This is a flowchart of a data processing method according to an embodiment of the present disclosure. (In conjunction with...) Figure 3 The above processing methods include:

[0042] Step S100: Divide the data into multiple first data sets and determine the vector number corresponding to the first first data set, wherein the first data set includes at least one vector. The vector number is used to determine the order in which the data is allocated to the computing core. For example, the vector may include multiple second data sets, and the allocation order numbers corresponding to the second data sets within the same vector are consecutive. The allocation order number is used to indicate the order in which the second data sets are allocated to the computing core. In one example, the data may be stored in an external memory or in a processor A in a multiprocessor many-core system. This external memory or processor may be connected to another processor B to transfer data to some or all of the computing cores of processor B. For example, the second data set may be the basic unit that makes up the data set. For example, in one-dimensional time-series data, the second data set may be the time-series signal of each frame; in two-dimensional or three-dimensional images, the second data set may be pixels.

[0043] See Figure 4 As shown, Figure 4 This is a reference schematic diagram illustrating the processing of two-dimensional data according to a data processing method provided in an embodiment of the present disclosure.

[0044] Combination Figure 4 The first data is Figure 4 The first data is a rectangle with a width (horizontal side length) of 4 and a height (vertical side length) of 2. The second data consists of small squares with a width and height of 1. Figure 4 The data includes 18 first data points, and each first data point includes 8 second data points. Each of the first data points is assigned to a corresponding computational core. For example, the second sub-data points with assignment order numbers 1, 2, 3, 4, 13, 14, 15, and 16 belong to the first first data point, and their corresponding computational core is Core_0. Within this first data point, the assignment order numbers of the second sub-data points 1, 2, 3, and 4 are consecutive and are represented as one vector, while the assignment order numbers of the second sub-data points 13, 14, 15, and 16 are consecutive and are represented as another vector.

[0045] Continue reading Figure 3 Step S200: Based on the vector number corresponding to the first data, determine the vector number corresponding to each vector within the first data.

[0046] Step S300: Based on the vector number corresponding to each vector in the first data, the vectors in each first data are sequentially assigned to the corresponding computing cores. For example, each first data may correspond to one computing core. Based on the order of the vector numbers in the first data, the external memory or processor A sequentially assigns the second data to each computing core of processor B.

[0047] This disclosure provides a data processing method applied to a multiprocessor many-core system. The method divides data into multiple first data sets, determines the vector number corresponding to the first first data set, and then, based on the vector number corresponding to the first first data set, determines the vector number corresponding to the vector within each first data set. Finally, based on the vector number corresponding to the vector within each first data set, the vectors in each first data set are sequentially assigned to the corresponding computing cores, thereby achieving flexible allocation of the first data. Furthermore, the above processing method is not limited by the number of dimensions and simplifies the process of allocating multidimensional data to computing cores by assigning first data through vector numbers, achieving highly flexible and convenient data allocation, thereby improving the processing efficiency of the multiprocessor many-core system.

[0048] In one possible implementation, step S100 may include: if the number of distribution dimensions of the data is greater than or equal to two, performing the following operations: determining a first dimension that is not the first to be allocated and a second dimension that is not the last to be allocated, based on the allocation order of the data in the distribution dimensions; determining all vector numbers corresponding to the first data based on the length of the first data in the first dimension and the number of data in the second dimension.

[0049] For example, the above distribution dimension refers to the dimension in which the data is distributed. The above allocation order, that is, the order in which the data is allocated across each dimension, can also be understood as the storage order of the data before it is allocated to the computing core. For example: combining... Figure 4 If the data is two-dimensional, then the data distribution dimensions include width and height. Within the width and height dimensions, if the data is distributed in the order of width first, then height, then the distribution will be as follows: Figure 4 The arrangement of the allocation order numbers in the data refers to the consecutive allocation order numbers within the same row (i.e., the width dimension). If the data is allocated in the order of height dimension first, then width dimension, then the allocation order numbers within the same column (i.e., the height dimension) will be consecutive. Here, we take... Figure 4 Taking the allocation order as an example, the first dimension that is not the first in the allocation order is the height dimension, and the second dimension that is not the last in the allocation order is the width dimension. Based on the data length (i.e., 2) of the first data in the height dimension and the number of data in the width dimension (i.e., 3), all vector numbers corresponding to the first data can be determined.

[0050] For ease of understanding, each first data point can be numbered first, then the height. That is, the first first data point is numbered 1, 2, 3, 4, 13, 14, 15, 16; the second first data point is numbered 5, 6, 7, 8, 17, 18, 19, 20; the fourth first data point is numbered 25, 26, 27, 28, 37, 38, 39, 40, and so on. Each first data point... Figure 4 It includes two vectors, namely multiple second data with consecutive sequential numbers. For example, the first data includes vectors: 1, 2, 3, 4, and vectors: 13, 14, 15, 16.

[0051] For example, when the data is two-dimensional, the above method of determining all vector numbers corresponding to the first data based on the length of the first data in the first dimension and the number of data in the second dimension can be calculated using the following Python pseudocode:

[0052] For y in range(Div_Fy):

[0053] Core[0].Vector_num_th=J*y

[0054] Where Div_Fy is the length of the first data in the first dimension, that is... Figure 4 The length of the first data point in the height dimension. Figure 4 The median is 2. `For y in range(Div_Fy)` means y takes the range of every integer from 0 to Div_Fy (inclusive of 0, exclusive of Div_Fy). `Core[0].Vector_num_th` is the pre-assigned vector number of `Core_0`, which is the vector number within the first data element mentioned above. `J` is the number of data elements in the second dimension of the first data element, i.e. Figure 4 The first number of data items in the width dimension. Figure 4 The median is 3. That is, the vector number of the vectors included in the first data can be determined by the product of the number of data points in the second dimension of the first data and each integer between 0 and the length of the first data in the first dimension.

[0055] Referring to the pseudocode above, the calculation can be performed at... Figure 4 In the first data, there are two vectors: one with vector number 0 (i.e., 3*0) and the other with vector number 3 (i.e., 3*1).

[0056] Reference Figure 5 As shown, Figure 5 This is a reference schematic diagram illustrating the processing of three-dimensional data according to a data processing method provided in an embodiment of this disclosure. For example... Figure 5As shown, the data is three-dimensional, meaning that the data distribution dimensions include depth and width (i.e.,...). Figure 5 (middle x-axis), height (i.e.) Figure 5 Given the y-axis (and the storage order is depth first, then width, and finally height), the storage order of this data (which can also be understood as the order in which it is allocated to the computational kernel) follows... Figure 5 The table shown (i.e. Figure 5 (Data storage for computational tasks). Each small cube in the diagram can be considered as secondary data.

[0057] Where Fz is the data length in the depth dimension ( Figure 5 The width is 96px, and Fx is the length of the data in the width dimension. Figure 5 The value in the middle is 4px), and M is the number of data partitions in the depth dimension (that is, the number of the first data points in the depth dimension). Figure 5 The value in the middle is 3), and I is the length of the data in the height dimension. Figure 5 The width is 4px, and J is the length of the data in the width dimension. Figure 5 The value in the middle is 4px), Fz / M is the length of each vector ( Figure 5 (The value is 32px).

[0058] Reference Figure 6 As shown, Figure 6 This is a reference schematic diagram illustrating the processing of three-dimensional data according to a data processing method provided in an embodiment of the present disclosure. Figure 6 The storage order is: depth first, then width, and finally height. Here, M represents the number of data partitions in the depth dimension (i.e., the number of data points in the depth dimension). Figure 6 The value in the middle is 3), where I is the number of data divisions in the height dimension (i.e., the number of the first data points in the height dimension). Figure 6 2 represents the number of data divisions along the width dimension (i.e., the number of the first data points along the width dimension). Figure 6 (2). Figure 6 The first data point (Core_0 in the diagram) includes: vectors numbered 0 (containing pixels numbered 0 to 31), 3 (vector M, containing pixels numbered 96 to 127), 12 (vector Fx*M, containing pixels numbered 384 to 415), and 15 (vector Fx*M+M, containing pixels numbered 480 to 511). For example: Figure 6 The fourth first data point (i.e.) Figure 6Core_4 includes vectors numbered 6 (which includes pixels with storage order numbers 192 to 223), 9 (which includes pixels with storage order numbers 288 to 319), 18 (which includes pixels with storage order numbers 576 to 607), and 21 (which includes pixels with storage order numbers 672 to 703).

[0059] For example, when the data is three-dimensional, the above determination of all vector numbers corresponding to the first data point can be calculated using the following Python pseudocode:

[0060] For x in range(Div_Fx):

[0061] For y in range(Div_Fy):

[0062] Core[0].Vector_num_th=M*(y*Fx+x)

[0063] Where Div_Fx represents the length of the first data in the width dimension ( Figure 6 The value in the middle is 2px), and Div_Fy represents the length of the first data in the height dimension. Figure 6 The width is 2px, and Fx is the length of the data in the width dimension. Figure 6 The value in the middle is 4px, which can be obtained by Fx = J * Div_Fx, where J is the number of the first data in the width dimension ( Figure 6 The value in the middle is 2). M represents the number of data points in the depth dimension ( Figure 6 (3). Combining the definitions of the first dimension (not the first dimension) and the second dimension (not the last dimension) above, that is, in... Figure 6 In this context, the first dimension includes the width and height dimensions, and the second dimension includes the depth and width dimensions.

[0064] For example, Figure 6 Substituting the values ​​of each parameter into the pseudocode above, we can obtain:

[0065] For x in range(2):

[0066] For y in range(2):

[0067] Core[0].Vector_num_th=3*(y*4+x)

[0068] Therefore, it can be concluded that Figure 6 The first data in the first part includes vector numbers 0, 3, 12, and 15.

[0069] In one possible implementation, step S100 may further include: dividing the data into multiple first data based on preset partitioning parameters; and generating coordinates corresponding to each first data based on the partitioning parameters. The partitioning parameters are used to determine the number of first data in each dimension. For example, I, J, and M mentioned above can all be used as partitioning parameters. These partitioning parameters can be set according to the actual capacity of the storage units in the computing core, and this embodiment of the present disclosure does not impose any limitations. The coordinates are used to represent the positional relationship of each first data after partitioning. Figure 4 For example, this graph includes two dimensions: width and height, stored in the order of width first, then height. Using width as the first coordinate value and height as the second, each first data point can be represented as (0,0), (1,0), (2,0), (0,1), (1,1), etc. Taking (0,0) as an example, it represents the 0th first data point in both the width and height dimensions. In other words, each coordinate value represents which first data point is located within that dimension. The coordinates of each first data point are used to subsequently calculate the vector number corresponding to each data point.

[0070] See Figure 7 , Figure 7 This is a reference schematic diagram illustrating the processing of four-dimensional data according to a data processing method provided in an embodiment of this disclosure. Exemplarily, the four-dimensional data may be weight data used by a neural network in performing convolution operations. Figure 7 The four-dimensional data shown is distributed in the following order: number dimension (which can be understood as the number of convolution kernels in the convolution operation), depth dimension, width dimension, and height dimension.

[0071] The partitioning parameters, in the order described above, are represented as N, M, J, and I. Figure 7 In this configuration, N is set to 4, M to 2, J to 1, and I to 1. The weight data is stored according to the number of each small cube, and the value of each small cube represents a value in the convolution kernel, where W is the number of the convolution kernel. Figure 7 There are a total of 128 convolutional kernels. Based on this, the four-dimensional data is divided into 8 parts. Since the values ​​of J and I are 1, it can be understood that only two coordinate values ​​are needed in this example, namely the coordinates representing the M and N values. Figure 7 The first coordinate value can be selected as the M value, and the second coordinate value can be selected as the N value. That is, each first data point can be represented as (0,0), (0,1), (0,2), (0,3), (1,0), (1,1), (1,2), (1,3). Convolutional kernels 0 to 31 (i.e.,...) Figure 7 The convolution kernels (W0 to W31) are divided into coordinates (0, 0) and (1, 0), and kernels 32 to 63 are used. Figure 7The coordinates (W32 to W63) are divided into coordinates (0, 1), (1, 1), and so on, which will not be elaborated here. For example, combined with... Figure 7 As shown, the first data (i.e. Figure 7 The first data (m=0, n=0) includes a vector representing the weights of the assigned sequence numbers 0 to 31, a vector representing the weights of the assigned sequence numbers 128 to 159, a vector representing the weights of the assigned sequence numbers 256 to 287, etc.

[0072] In one possible implementation, step S200 may include: if the number of distribution dimensions of the data is greater than or equal to two, performing the following operations: determining the vector number corresponding to the first vector in each first data based on the length of the first data in the first dimension, the number in the second dimension, and the corresponding coordinates; determining all vector numbers corresponding to each first data based on the first vector number corresponding to each first data and all vector numbers in the first first data.

[0073] Combination Figure 4 When the data is two-dimensional, the vector number corresponding to the first vector within each set of data can be determined based on the length of the first dimension, the number of vectors in the second dimension, and the corresponding coordinates. The following Python pseudocode can be used as an example:

[0074] Core[X].Vector_start=Div_Fy*J*i+j

[0075] Here, j and i are the coordinates (j, i) corresponding to the Xth first data point. Other parameters have been explained and will not be repeated here.

[0076] For example, if the coordinates of the second first data point (i.e., the first data point with the allocation order number 5) are (1, 0), then the vector number corresponding to its first vector is 2*3*0+1=1. As another example, if the coordinates of the sixth first data point (i.e., the first data point with the allocation order number 33) are (2, 1), then the vector number corresponding to its first vector is 2*3*1+2=8.

[0077] For example, when the data is two-dimensional, based on the first vector number corresponding to each first data point and all vector numbers in the first first data point, all vector numbers corresponding to each first data point are determined. The following Python pseudocode can be used as an example:

[0078] For i in range(core_num):

[0079] For j in range(core[0]Vector[vector_num]):

[0080] core[i]Vector[j]=core[0]Vector[j]+core[i]Vector[0]

[0081] Where core_num represents the total number of the first data, and core[0]Vector[vector_num] represents the total number of vectors in the first data.

[0082] Based on the above formula, with Figure 4 Taking the second set of first data as an example, given that the vector numbers in the first set of first data are 0 and 3, and the first vector number in the second set of first data is 1, we know that the second vector number in the second set of first data is 1 + 3 = 4. Continuing the example, if the first vector number in the fifth set of first data is 4, we know that the second vector number in the fifth set of first data is 4 + 3 = 7. In other words, the number of each vector in the first set of first data can be obtained by successively adding each vector number in the first set of first data to the first vector number in the set to be determined.

[0083] See Figure 8 , Figure 8 This is a reference schematic diagram illustrating the processing of two-dimensional data according to a data processing method provided in an embodiment of the present disclosure. Figure 8 The division method in Figure 4 Although the methods differ, the vector numbering can still be determined by referring to the pseudocode of the two-dimensional data mentioned above.

[0084] For example: storing data first in the width direction, then in the height direction. Figure 8 The left half (i.e.) Figure 8 In a row-first, column-later storage (DLP) architecture, since data is partitioned only along one dimension, only one coordinate value is needed to represent different first data points. The omitted coordinate values ​​are considered 1, meaning the first data point (Core_0 in the diagram) to the sixth data point (Core_5 in the diagram) are represented by coordinates based on the dimension allocation order (the number of first data points in the width dimension, the number of first data points in the height dimension), i.e., (1,0), (1,1), (1,2), (1,3), etc. In Core[X].Vector_start = Div_Fy*J*i+j, i is always 1. Similarly, the right half (i.e., ... Figure 8The coordinates of the data in the row-first, column-later storage are arranged according to the allocation order. The corresponding coordinates are (the number of the first data in the height dimension and the number of the first data in the width dimension), which are represented as (1,0), (1,1), (1,2), (1,3). This is the same as the row-first, column-later storage. In other words, the above pseudocode can be applied to various two-dimensional data partitioning situations.

[0085] Combination Figure 6 In the case of three-dimensional data, the vector number corresponding to the first vector within each set of data can be determined based on the length of the first data in the first dimension, the number of vectors in the second dimension, and the corresponding coordinates. The following Python pseudocode can be used as an example:

[0086] Core[X].Vector_start=M*(Div_Fx*(Div_Fy*J*i+j))+m

[0087] Here, j, i, and m are the coordinates (m, j, i) corresponding to the Xth first data point. Other parameters have been explained and will not be repeated here.

[0088] For example, if the coordinates of the second first data point (i.e., the first data point with the allocation order number 32) are (1, 0, 0), then the vector number corresponding to its first vector is 3*(2*(2*2*0+0))+1=1. As another example, if the coordinates of the fourth first data point (i.e., the first data point with the allocation order number 192) are (0, 1, 0), then the vector number corresponding to its first vector is 3*(2*(2*2*0+1))+0=6.

[0089] In processing the above three-dimensional data, based on the first vector number corresponding to each first data and all vector numbers in the first first data, the calculation of all vector numbers corresponding to each first data can be performed with reference to the pseudocode of the two-dimensional data, which will not be elaborated here.

[0090] In one possible implementation, step S200 may include: when the number of distribution dimensions of the data is equal to one, determining the vector number corresponding to each first data based on the number of distribution dimensions of the first data and the vector number corresponding to the first first data.

[0091] For example, the vector number corresponding to each first data point can be determined by sequentially adding the vector number corresponding to the first data point to the number of the first data points in the distribution dimension. For example: combining Figure 1 As shown, the number of its distribution dimensions is 6. Then, the vector number 0 corresponding to the first data is added to 0, 1, 2, 3, 4, and 5 in sequence to obtain the vector numbers of the first to sixth data in the first data.

[0092] Continue to refer to Figure 3 Step S300 involves sequentially assigning vectors from each first data set to their corresponding computational cores based on the vector numbers corresponding to the vectors within each first data set. For example, this step may include: determining the computational core corresponding to each first data set; and sequentially assigning vectors corresponding to the vector numbers to the corresponding computational cores according to the order of the vector numbers corresponding to each first data set. This embodiment does not limit the correspondence between computational cores and first data sets; any preset rule can be used to determine the first data set to be processed by each computational core. For example, for a total of Q first data sets, Q computational cores can be assigned one-to-one with each first data set. For each computational core, vectors are assigned sequentially according to the order of the vector numbers (e.g., 0, 3) in its corresponding first data set for computation. The number of vectors assigned each time can be determined based on the number of vectors that the computational core can simultaneously receive or process. This simplifies the process of allocating multidimensional data to computational cores and is not limited to the continuous allocation of vectors, thus improving the processing efficiency of multi-processor many-core chips.

[0093] refer to Figure 9 , Figure 9 This is a reference schematic diagram of a data processing method provided according to an embodiment of the present disclosure.

[0094] Combination Figure 9 The data D (i.e., FMin*Dx*Dy in the figure) can be 3D image data, the weight data W (i.e., FMin*FMout*K in the figure), and the output data O (FMout*Ox*Oy). A data D can be divided according to the depth direction m, the width direction i, and the height direction j, which is represented as D(i;j;m) in the figure. The weight data W can be divided according to the depth direction m and the number direction (or the convolution kernel sorting direction, convolution kernel numbering direction) n of the convolution kernel, which is represented as W(m,n) in the figure. Among them, Core(i;j;m;n) represents the coordinates of each partitioned data D and weight data W assigned to the computation kernel. Different coordinates are used to identify different computation kernels. Each value in the coordinate corresponds one-to-one with i, j, m, and n in the data D and weight data W. The computation kernel generates output data O based on the weight data W and data D to complete the convolution operation of the computation kernel.

[0095] See Figure 10 As shown, Figure 10 This is a block diagram of a data processing apparatus provided according to an embodiment of the present disclosure.

[0096] Combination Figure 10In one possible implementation, this disclosure also provides a data processing apparatus 100 applied to a multiprocessor many-core system, the multiprocessor many-core system including multiple processors, each processor including multiple computing cores, the processing apparatus including: a data partitioning module 110, used to partition the data into multiple first data and determine the vector number corresponding to the first first data; wherein, the first data includes at least one vector; a vector allocation module 120, used to determine the vector number corresponding to the vector in each first data based on the vector number corresponding to the first first data; and a data allocation module 130, used to sequentially allocate the vectors in each first data to the corresponding computing cores based on the vector number corresponding to the vector in each first data.

[0097] In one possible implementation, determining the vector number corresponding to the first data includes: if the number of distribution dimensions of the data is greater than or equal to two, performing the following operations: determining a first dimension that is not the first to be allocated and a second dimension that is not the last to be allocated, based on the allocation order of the data in the distribution dimensions; and determining all vector numbers corresponding to the first data based on the length of the first data in the first dimension and the number of the first data in the second dimension.

[0098] In one possible implementation, the step of sequentially assigning vectors in each first data to corresponding computational kernels based on the vector number corresponding to each first data vector includes: determining the computational kernel corresponding to each first data; and sequentially assigning vectors corresponding to the vector numbers to the corresponding computational kernels according to the order of the vector numbers corresponding to each first data.

[0099] In one possible implementation, dividing the data into multiple first data includes: dividing the data into multiple first data based on preset division parameters; wherein the division parameters are used to determine the number of first data in each dimension; and generating coordinates corresponding to each first data based on the division parameters.

[0100] In one possible implementation, determining the vector number corresponding to each vector within the first data based on the vector number corresponding to the first first data includes: when the number of distribution dimensions of the data is greater than or equal to two, performing the following operations: determining the vector number corresponding to the first vector within each first data based on the length of the first data in the first dimension, the number in the second dimension, and the corresponding coordinates; and determining all vector numbers corresponding to each first data based on the first vector number corresponding to each first data and all vector numbers in the first first data.

[0101] In one possible implementation, determining the vector number corresponding to each vector within the first data based on the vector number corresponding to the first first data includes: when the number of distribution dimensions of the data is equal to one, determining the vector number corresponding to each first data based on the number of distribution dimensions of the first data and the vector number corresponding to the first first data.

[0102] In some embodiments, the system provided in this disclosure may have functions or include modules that can be used to execute the methods described in the above method embodiments. The specific implementation of these methods can be referred to the description in the above method embodiments, and for the sake of brevity, they will not be repeated here.

[0103] This disclosure also provides a computer-readable storage medium storing computer program instructions thereon, which, when executed by a processor, implement the above-described method. The computer-readable storage medium may be a non-volatile computer-readable storage medium.

[0104] This disclosure also provides an electronic device, including: a processor; and a memory for storing processor-executable instructions; wherein the processor is configured to invoke the instructions stored in the memory to execute the above-described method.

[0105] This disclosure also provides a computer program product, including computer-readable code, or a non-volatile computer-readable storage medium carrying computer-readable code, wherein when the computer-readable code is run in a processor of an electronic device, the processor in the electronic device performs the above-described method.

[0106] Electronic devices can be provided as terminals, servers, or other forms of devices.

[0107] See Figure 11 , Figure 11 This is a block diagram of an electronic device 1200 according to an embodiment of the present disclosure. Figure 11 As shown, the electronic device 1200 includes a computing processing unit 1202 (e.g., the processor system mentioned above that includes multiple artificial intelligence chips), an interface device 1204, other processing units 1206, and a storage unit 1208. Depending on the application scenario, the computing processing unit may include one or more computing units 1210 (e.g., artificial intelligence chips, where each chip may include multiple functional cores).

[0108] In one possible implementation, the computing processing apparatus of this disclosure can be configured to perform user-specified operations. In exemplary applications, the computing processing apparatus can be implemented as a single-chip artificial intelligence processor or a multi-chip artificial intelligence processor. Similarly, one or more computing devices included within the computing processing apparatus can be implemented as an artificial intelligence chip or a portion of the hardware structure of an artificial intelligence chip. When multiple computing devices are implemented as artificial intelligence chips or portions of the hardware structure of artificial intelligence chips, the computing processing apparatus of this disclosure can be considered to have a single-chip structure or a homogeneous multi-chip structure.

[0109] In exemplary operation, the computing processing device of this disclosure can interact with other processing devices through interface devices to jointly complete user-specified operations. Depending on the implementation, other processing devices of this disclosure may include one or more types of processors such as a central processing unit (CPU), a graphics processing unit (GPU), and an artificial intelligence processor, both general-purpose and / or special-purpose processors. These processors may include, but are not limited to, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc., and their number can be determined according to actual needs. As mentioned above, the computing processing device of this disclosure can be considered to have a single-core structure or a homogeneous multi-core structure. However, when the computing processing device and other processing devices are considered together, they can be considered to form a heterogeneous multi-core structure.

[0110] In one or more embodiments, the other processing device may serve as an interface between the computing processing device of this disclosure (which may be specifically embodied in a computing device related to artificial intelligence, such as neural network computing) and external data and control, performing basic controls including but not limited to data transfer, starting and / or stopping the computing device. In another embodiment, the other processing device may also cooperate with the computing processing device to jointly complete the computing task.

[0111] In one or more embodiments, the interface device can be used to transfer data and control commands between a computing processing device and other processing devices. For example, the computing processing device can obtain input data from other processing devices via the interface device and write it to on-chip storage (or memory) of the computing processing device. Further, the computing processing device can obtain control commands from other processing devices via the interface device and write them to on-chip control cache of the computing processing device. Alternatively or optionally, the interface device can also read data from the storage device of the computing processing device and transmit it to other processing devices.

[0112] Additionally or optionally, the electronic device disclosed herein may further include a storage device. As shown in the figures, the storage device is connected to both the computing processing device and the other processing device. In one or more embodiments, the storage device may be used to store data from the computing processing device and / or the other processing device. For example, the data may be data that cannot be fully stored in the internal or on-chip storage of the computing processing device or other processing device.

[0113] Depending on the application scenario, the artificial intelligence chip disclosed herein can be used in servers, cloud servers, server clusters, data processing devices, robots, computers, printers, scanners, tablets, smart terminals, PC devices, IoT terminals, mobile terminals, mobile phones, dashcams, navigators, sensors, cameras, camcorders, projectors, watches, headphones, mobile storage, wearable devices, visual terminals, autonomous driving terminals, vehicles, home appliances, and / or medical devices. The vehicles include airplanes, ships, and / or vehicles; the home appliances include televisions, air conditioners, microwave ovens, refrigerators, rice cookers, humidifiers, washing machines, lights, gas stoves, and range hoods; the medical devices include MRI scanners, ultrasound scanners, and / or electrocardiographs.

[0114] Please see Figure 12 , Figure 12 A block diagram of an electronic device provided according to an embodiment of the present disclosure is shown.

[0115] For example, electronic device 1900 can be provided as a terminal device or a server. (See reference...) Figure 12 The electronic device 1900 includes a processing component 1922, which further includes one or more processors, and memory resources represented by memory 1932 for storing instructions, such as application programs, that can be executed by the processing component 1922. The application programs stored in memory 1932 may include one or more modules, each corresponding to a set of instructions. Furthermore, the processing component 1922 is configured to execute instructions to perform the methods described above.

[0116] Electronic device 1900 may also include a power supply component 1926 configured to perform power management of electronic device 1900, a wired or wireless network interface 1950 configured to connect electronic device 1900 to a network, and an input / output (I / O) interface 1958. Electronic device 1900 can operate on an operating system stored in memory 1932, such as Microsoft Server operating system (Windows Server). TM Apple's graphical user interface-based operating system (Mac OSX) TM ), a multi-user, multi-process computer operating system (Unix) TM Linux is a free and open-source Unix-like operating system. TM ), the open-source Unix-like operating system (FreeBSD) TM (or similar.)

[0117] In an exemplary embodiment, a non-volatile computer-readable storage medium is also provided, such as a memory 1932 including computer program instructions that can be executed by a processing component 1922 of an electronic device 1900 to perform the above-described method.

[0118] This disclosure can be a system, method, and / or computer program product. A computer program product may include a computer-readable storage medium having computer-readable program instructions loaded thereon for causing a processor to implement various aspects of this disclosure.

[0119] Computer-readable storage media can be tangible devices capable of holding and storing instructions for use by an instruction execution device. Computer-readable storage media can be, for example, (but not limited to) electrical storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of computer-readable storage media include: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disc read-only memory (CD-ROM), digital multifunction disc (DVD), memory sticks, floppy disks, mechanical encoding devices, such as punch cards or recessed protrusions storing instructions thereon, and any suitable combination of the foregoing. The computer-readable storage media used herein are not to be construed as transient signals themselves, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., light pulses through fiber optic cables), or electrical signals transmitted through wires.

[0120] The computer-readable program instructions described herein can be downloaded from computer-readable storage media to various computing / processing devices, or downloaded via a network, such as the Internet, local area network, wide area network, and / or wireless network, to an external computer or external storage device. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to the computer-readable storage media in the respective computing / processing device.

[0121] Computer program instructions used to perform the operations of this disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, status setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, etc., and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, electronic circuitry, such as programmable logic circuitry, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), is personalized by utilizing the status information of the computer-readable program instructions to implement various aspects of this disclosure.

[0122] Various aspects of this disclosure are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this disclosure. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0123] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that, when executed by the processor of the computer or other programmable data processing apparatus, they create means for implementing the functions / actions specified in one or more blocks of the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium that causes a computer, programmable data processing apparatus, and / or other device to operate in a particular manner; thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing aspects of the functions / actions specified in one or more blocks of the flowchart and / or block diagram.

[0124] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0125] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of an instruction containing one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions marked in the blocks may occur in a different order than those shown in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0126] The computer program product can be implemented specifically through hardware, software, or a combination thereof. In one alternative embodiment, the computer program product is specifically embodied in a computer storage medium; in another alternative embodiment, the computer program product is specifically embodied in a software product, such as a software development kit (SDK), etc.

[0127] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of an instruction containing one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions marked in the blocks may occur in a different order than those shown in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0128] The various embodiments of this disclosure have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical application, or improvement of the technology in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A data processing method applied to a multi-processor many-core system, the multi-processor many-core system comprising a plurality of processors, each processor comprising a plurality of computing cores, characterized in that, The processing method comprises: dividing the data into a plurality of first data, and determining a vector number corresponding to a first first data; wherein the first data comprises at least one vector; determining a vector number corresponding to a vector in each first data based on the vector number corresponding to the first first data; sequentially assigning the vectors in each first data to corresponding computing cores based on the vector number corresponding to the vector in each first data; the determining of the vector number corresponding to the first first data comprises: in a case where a number of distribution dimensions of the data is greater than or equal to two, performing the following operations: determining a first dimension of a non-first allocation order and a second dimension of a non-last allocation order according to an allocation order of the data in the distribution dimensions; determining all vector numbers corresponding to the first first data based on a length of the first data in the first dimension and a number of the first data in the second dimension.

2. The treatment method of claim 1, wherein, the vector comprises a plurality of second data, and allocation order numbers of the second data in a same vector are continuous, and the allocation order numbers are used to represent an order in which the second data is allocated to the computing cores.

3. The treatment method of claim 1, wherein the sequentially assigning the vectors in each first data to corresponding computing cores based on the vector number corresponding to the vector in each first data comprises: determining a computing core corresponding to each first data; sequentially assigning vectors corresponding to the vector numbers to corresponding computing cores according to an order of the vector numbers corresponding to each first data.

4. The treatment method of claim 1, wherein the dividing the data into a plurality of first data comprises: dividing the data into a plurality of first data based on a preset division parameter; wherein the division parameter is used to determine a number of the first data in each dimension; generating a coordinate corresponding to each first data based on the division parameter.

5. The treatment method of claim 4, wherein, the determining of the vector number corresponding to the vector in each first data based on the vector number corresponding to the first first data comprises: in a case where a number of distribution dimensions of the data is greater than or equal to two, performing the following operations: determining a vector number corresponding to a first vector in each first data based on a length of the first data in a first dimension, a number of the first data in a second dimension, and a corresponding coordinate; determining all vector numbers corresponding to each first data based on the vector number corresponding to the first vector of each first data and all vector numbers in the first first data.

6. The treatment method of claim 4, wherein the determining of the vector number corresponding to the vector in each first data based on the vector number corresponding to the first first data comprises: in a case where a number of distribution dimensions of the data is equal to one, determining a vector number corresponding to each first data based on the number of distribution dimensions of the first data and the vector number corresponding to the first first data.

7. A data processing apparatus applied to a multiprocessor many-core system, the multiprocessor many-core system comprising multiple processors, each processor comprising multiple computing cores, characterized in that, the processing device comprises: a data division module configured to divide the data into a plurality of first data, and determine a vector number corresponding to a first first data; wherein the first data comprises at least one vector; a vector assignment module configured to determine a vector number corresponding to a vector in each first data based on the vector number corresponding to the first first data; a data distribution module, configured to sequentially distribute each vector in each first data to a corresponding calculation core based on a vector number corresponding to each first data inwards vector; the determining of the vector number corresponding to the first first data comprises: in a case that the number of the distribution dimensions of the data is greater than or equal to two, the following operations are performed: determining, according to the distribution sequence of the data in the distribution dimensions, a first dimension of a non-first distribution sequence and a second dimension of a non-last distribution sequence; determining, based on the length of the first data in the first dimension and the number of the first data in the second dimension, all vector numbers corresponding to the first first data.

8. An electronic device, comprising: comprise: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to execute the data processing method of any one of claims 1 to 6.

9. A non-transitory computer readable storage medium having stored thereon computer program instructions, wherein, the computer program instructions, when executed by the processor, implement the data processing method of any one of claims 1 to 6.

Images