A method for handling the "unimplemented" exception of floating-point operations in Loongson processors

Abstract

The present invention discloses a method for handling a floating-point operation "not implemented" exception in a Loongson processor, and relates to the field of computer technology. The method is applied to a floating-point operation unit (FPU), and mainly includes the following steps: S1: when a floating-point operation "not implemented" exception occurs, the system enters kernel mode, constructs a trap program environment, and saves on-site register group information; S2: based on the on-site register group information, determines the type of floating-point operation exception and calls a specified floating-point operation exception handling function; S3: uses the floating-point operation exception handling function to perform branch judgment to determine the type of floating-point operation exception; when it is determined to be a floating-point operation "not implemented" exception, calls an FPU simulation operation function to obtain the corresponding result and execution status of the floating-point operation "not implemented" exception; S5: the FPU simulation operation function is executed. Compared with existing technical solutions, the present invention can fully utilize hardware resources while ensuring program compatibility, thereby improving floating-point operation performance.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a method for processing an "unimplemented" exception of a floating-point operation in a Loongson processor. Background Art

[0002] The Loongson processor is based on the MIPS architecture and belongs to the RICS instruction set. The MIPS architecture boasts a powerful instruction set, comprehensive standards, and strong scalability. However, many manufacturers designing processors based on the MIPS architecture do not implement all MIPS instruction set features due to design priorities such as application scenarios and device power consumption.

[0003] In the embedded field, in order to save costs and reduce power consumption, the floating-point operation modules (FPUs) integrated in some processors are not fully functional and cannot fully implement the floating-point operation rules specified by the IEEE754 standard. The exceptions generated in their floating-point operations will cause the floating-point operation pipeline to stop; or if some special values and abnormal results are encountered and cannot be handled correctly, an "unimplemented operation" trap will be generated, resulting in slower running speed.

[0004] There are currently two solutions: the first is to fully emulate all floating-point operations using a software floating-point library, and the second is to avoid using floating-point operations in the program as much as possible. These methods, while carefully avoiding them through software programming, ensure proper program operation, but they reduce program compatibility and sacrifice runtime and efficiency. Summary of the Invention

[0005] The present invention provides a method for processing the "unimplemented" exception of floating-point operations in Loongson processors. It provides a system-level solution to the system operation abnormalities and programming problems caused by the "unimplemented" exception of floating-point operations in Loongson processors. While ensuring program compatibility, it fully utilizes hardware resources and improves floating-point operation performance.

[0006] In order to achieve the above technical objectives, the present invention mainly adopts the following technical solutions:

[0007] A method for processing the "unimplemented" exception of floating-point operation in a Loongson processor, the method is applied to a floating-point operation unit (FPU), and mainly includes the following steps:

[0008] S1: When a floating-point operation "unimplemented" exception occurs, the system enters the kernel state from the system state, builds a trap program environment, and saves the on-site register group information;

[0009] S2: Based on the on-site register group information, the general exception entry function is used to determine the type of floating-point operation exception, and based on the type of floating-point operation exception, the specified floating-point operation exception handling function is called;

[0010] S3: Use the floating-point operation exception handling function to perform branch judgment to determine whether a floating-point operation unit FPU exists. If the FPU does not exist, call the exception management interface function; if the FPU exists, further determine the type of floating-point operation exception;

[0011] S4: When it is determined that the floating-point operation is an "unimplemented" exception, the floating-point operation "unimplemented" exception handling function is called, and under the floating-point operation "unimplemented" exception handling function, the FPU simulation operation function is called to obtain the corresponding result and execution status of the floating-point operation "unimplemented" exception;

[0012] S5: The FPU simulation operation function is executed, exits the kernel state, returns to the system state, restores the context, and returns to the address pointed to by the register group to continue running.

[0013] Wherein, in the present invention, the field register group includes an EPC register, a BadVaddr register and a CAUSE register.

[0014] Furthermore, the EPC register records the PC of the instruction that is continued to be executed after the floating-point operation exception is processed; the BadVaddr register records the instruction that caused the floating-point operation exception; and the CAUSE register records the type of floating-point operation exception that occurred.

[0015] Furthermore, in step S2, a specific value is first read from the ExcCode field in the CAUSE register by a general exception entry function to determine the type of floating-point operation exception.

[0016] In the present invention, in step S3, the floating-point operation exception types include "unimplemented" exception, illegal operation exception, division by zero exception, overflow exception, underflow exception and inaccurate exception. When the illegal operation exception, division by zero exception, overflow exception, underflow exception and inaccurate exception occur, the exception management interface function is still called.

[0017] Preferably, in step S4, the instruction causing the floating-point operation exception recorded in the BadVaddr register is simulated by adopting a single floating-point operation instruction mode to obtain the corresponding result and execution status of the floating-point operation "unimplemented" exception.

[0018] More preferably, the execution status includes five states: simulation success, undefined quality, bus error, illegal address and FPU.

[0019] Furthermore, after obtaining the corresponding result and execution status of the floating-point operation "unimplemented" exception, the FPU simulation operation function exits the simulation loop.

[0020] Furthermore, in step S5, the address pointed to by the register group is specifically the address pointed to by the EPC register.

[0021] As a further improvement of the present invention, in step S1, before the floating-point operation "unimplemented" exception occurs, a floating-point operation exception function is first specified in the system as a service function of the exception vector number 15, and the exception vector number 15 corresponds to the floating-point operation exception type.

[0022] Compared with the prior art, the present invention has the following beneficial effects: the present invention takes over the "unimplemented" floating-point operation exception of the Loongson processor through the system, builds a trap program environment, and if there is no floating-point operation unit FPU, calls the exception management interface function; if there is FPU and it is a "unimplemented" floating-point operation exception, uses software to simulate the FPU operation to obtain the operation result, thereby eliminating the system operation exception and programming troubles caused by the "unimplemented" floating-point operation exception of the Loongson processor. Compared with the prior art solutions, it can fully utilize hardware resources while ensuring program compatibility, thereby improving floating-point operation performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 This is a floating point operation exception processing flow chart of the present invention;

[0024] Figure 2 It is the floating point control / status register FCSR in the present invention. DETAILED DESCRIPTION

[0025] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0026] The present invention will construct a trap program through the "unimplemented" exception of the floating-point operation of the Loongson processor, and then perform branch judgment and floating-point operation "unimplemented" exception processing through the program to return the operation result. The specific scheme is described as follows:

[0027] 1. First, specify the floating-point operation exception handling function in the system as the service function of exception vector number 15. Exception vector number 15 corresponds to the floating-point operation exception type.

[0028] Among them, floating-point operation exception types include "unimplemented" exception, illegal operation exception, division by zero exception, overflow exception, underflow exception and inexact exception. When the above floating-point operation exceptions occur, the floating-point operation exception handling function is used to determine the type of floating-point operation exception, and the PC is forced to be assigned to the address of the corresponding exception vector number 15.

[0029] Among them, the exception vector table is as follows:

[0030]

[0031]

[0032] When an exception occurs in the system program, it enters the startup.S exception vector table -> executes the MIPS_EXCEPTION_HANDLE function -> calls archExceptionEntry -> calls the archExceptionHandle function.

[0033] The specific workflow is as follows: When a system program exception occurs, the program jumps to the startup.S exception vector table, starting at the address shown in the exception vector table. Depending on the exception type (TLB flush / cash error / general exception / cash interrupt / system restart), different handling functions are executed. The floating-point "unimplemented" exception is a general exception. When a floating-point "unimplemented" exception occurs, the MIPS_EXCEPTION_HANDLE address is used to jump to the handling code segment, as shown below:

[0034]

[0035] The general exception entry jump function archExceptionEntry is executed in it, as shown below:

[0036] Then enter the general exception entry, in which the general exception entry function archExceptionHandle is executed, as shown below:

[0037]

[0038]

[0039] 2. When a floating-point operation "unimplemented" exception occurs, the system enters the kernel state from the system state, builds a trap program environment, saves the information of the on-site register group, and uses the general exception entry function to determine the type of floating-point operation exception based on the information of the on-site register group. Based on the type of floating-point operation exception, the specified floating-point operation exception handling function is called. The specific floating-point operation exception handling function code list is shown in the figure below:

[0040]

[0041]

[0042]

[0043] The field register group includes the EPC register, BadVaddr register, and CAUSE register. The information contained in these registers will be saved as important parameters and will be processed later. Among them, EPC records the PC of the instruction that continues to be executed after the exception is handled, BadVaddr records the instruction that caused the exception, and CAUSE records the type of exception that occurred.

[0044] The type of floating-point arithmetic exception is determined by first reading the specific value from the ExcCode field in the CAUSE register through the general exception entry function. After the type of floating-point arithmetic exception is determined, the specified floating-point arithmetic exception handling function is called.

[0045] The CAUSE register collects information about floating-point operation exceptions and records it in the ExcCode field, so that the specific value of the ExcCode field can be read through the general exception entry function to calculate the type of floating-point operation exception.

[0046] 3. In the floating-point operation exception handling function, first determine whether there is a floating-point operation unit FPU; if there is no FPU, call the exception management interface function; if there is an FPU, further determine what type of floating-point operation exception type it is. The specific judgment process is: read the value of the floating-point control / status register FCSR, and then determine the flag bit of the Cause field [E (unimplemented exception) / V (illegal operation exception) / Z (division by zero exception) / O (overflow exception) / U (underflow exception) / I (inaccurate exception)] to know what type of floating-point operation exception it is, such as Figure 2 And the following code listing:

[0047]

[0048]

[0049] As mentioned above, floating-point operation exception types include "unimplemented" exception, illegal operation exception, division by zero exception, overflow exception, underflow exception and inexact exception. In addition to the floating-point "unimplemented" exception, the other five floating-point exceptions, namely illegal operation exception, division by zero exception, overflow exception, underflow exception and inexact exception, also call the exception management interface function.

[0050] In other words, the floating-point operation "unimplemented" exception handling function is only used to determine the corresponding floating-point operation "unimplemented" exception, and cannot handle other exception situations. It has a dedicated nature. All other exception situations call the exception management interface function, and are not limited to the above exceptions. In this way, the floating-point operation "unimplemented" exception can be accurately identified and handled.

[0051] 4. For the floating-point operation "unimplemented" exception, a dedicated floating-point operation "unimplemented" exception handling function is called. The floating-point operation "unimplemented" exception handling function code list is shown in the figure below:

[0052]

[0053]

[0054] Under the floating-point operation "unimplemented" exception handling function, the FPU simulation operation function is called. Specifically, the FPU simulation operation function code list is shown below:

[0055]

[0056]

[0057]

[0058]

[0059] Use a single floating-point operation instruction to simulate the instruction that causes a floating-point exception recorded in the BadVaddr register, and obtain the corresponding result and execution status, where the execution status includes simulation success, undefined instruction, bus error, illegal address, and FPU error. Exit the simulation loop after one iteration to allow the FPU hardware to execute any subsequent instructions;

[0060] 5. After the FPU simulation operation function is executed, the system exits the kernel state, returns to the system state, restores the context, and returns to the address pointed to by the EPC register to continue execution.

[0061] That is, the floating-point operation "unimplemented" exception handling process is as follows: when an exception occurs, the system enters the kernel state, builds a trap program environment, saves the on-site register group, and then enters the general exception entry function, and calls the floating-point operation exception handling function according to the exception type; then branch judgment is performed, and for the floating-point operation "unimplemented" exception, FPU simulation operation is performed to obtain the result and execution status, thereby completing the floating-point unimplemented exception handling process.

[0062] The present invention takes over the floating-point unimplemented exception of the Loongson processor through the system and builds a trap program environment. If there is no FPU, the exception management interface function is called. If there is an FPU and the floating-point operation is "unimplemented", the software is used to simulate the FPU operation to obtain the operation result, thereby eliminating the system operation abnormality and programming problems caused by the floating-point operation unimplemented exception of the Loongson processor. Compared with the existing solutions, the present invention can fully utilize hardware resources and improve floating-point operation performance while ensuring program compatibility.

[0063] The above-described embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the patent for this invention shall be determined by the appended claims.

Claims

1. A method for processing the "not implemented" exception of a Loongson processor floating-point operation, characterized in that: The method is applied to a floating point unit (FPU), and comprises the following steps: S1: When a floating-point operation "unimplemented" exception occurs, the system enters the kernel state from the system state, builds a trap program environment, and saves the on-site register group information; The field register group includes an EPC register, a BadVaddr register and a CAUSE register; The EPC register records the instruction PC that continues to be executed after the floating-point operation exception is processed; the BadVaddr register records the instruction that caused the floating-point operation exception; the CAUSE register records the information of the floating-point operation exception; S2: Based on the on-site register group information, the general exception entry function is used to determine the type of floating-point operation exception, and based on the type of floating-point operation exception, the specified floating-point operation exception handling function is called; S3: Use the floating-point operation exception handling function to perform branch judgment to determine whether a floating-point operation unit FPU exists. If the FPU does not exist, call the exception management interface function; if the FPU exists, further determine the type of floating-point operation exception; S4: When it is determined that the floating-point operation is "not implemented" exception, the floating-point operation "not implemented" exception handling function is called, and under the floating-point operation "not implemented" exception handling function, the FPU simulation operation function is called to obtain the corresponding result and execution status of the floating-point operation "not implemented" exception; S5: The FPU simulation operation function is executed, and the kernel state is exited, the system state is returned, the context is restored, and the program returns to the address pointed to by the register group to continue running. Among them, the general exception entry function is used to determine the type of floating-point operation exception, including: The general exception entry function first reads the specific value from the ExcCode field in the CAUSE register to determine the type of floating-point operation exception; When it is determined that the floating-point operation is "not implemented" exception, the floating-point operation "not implemented" exception handling function is called, and under the floating-point operation "not implemented" exception handling function, the FPU simulation operation function is called to obtain the corresponding result and execution status of the floating-point operation "not implemented" exception, including: By using a single floating-point operation instruction to simulate the instruction that causes the floating-point operation exception recorded in the BadVaddr register, the corresponding result and execution status of the floating-point operation "unimplemented" exception are obtained.

2. The method for processing the "not implemented" exception of the Loongson processor floating-point operation according to claim 1, characterized in that: In step S3, the floating-point operation exception types include "unimplemented" exception, illegal operation exception, division by zero exception, overflow exception, underflow exception and inexact exception. When the illegal operation exception, division by zero exception, overflow exception, underflow exception and inexact exception occur, the exception management interface function is still called.

3. The method for processing the "not implemented" exception of the Loongson processor floating-point operation according to claim 1, characterized in that: The execution status includes five states: simulation success, undefined instruction, bus error, illegal address and FPU error.

4. The method for processing the "not implemented" exception of the Loongson processor floating-point operation according to claim 3, characterized in that: After obtaining the corresponding result and execution status of the floating-point operation "unimplemented" exception, the FPU simulation operation function exits the simulation loop.

5. The method for processing the "not implemented" exception of the Loongson processor floating-point operation according to claim 1, characterized in that: In step S5, the address pointed to by the register group is specifically the address pointed to by the EPC register.

6. The method for processing the "not implemented" exception of the floating-point operation of the Loongson processor according to any one of claims 1 to 5, characterized in that: In step S1, before the floating-point operation "not implemented" exception occurs, a floating-point operation exception function is first designated in the system as a service function of the exception vector number 15, and the exception vector number 15 corresponds to the floating-point operation exception type.

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