Debugging method, device and equipment for single-chip microcomputer

Abstract

The application provides a debugging method, device and equipment of a single-chip microcomputer, and relates to the single-chip microcomputer technology.The method comprises the following steps: receiving a control instruction sent by an upper computer through a USB interface, wherein the control instruction is an instruction conforming to the USB protocol; converting the control instruction into a debugging instruction conforming to the JTAG protocol; sending the debugging instruction to a second single-chip microcomputer through a JTAG interface, wherein the debugging instruction is used for instructing the second single-chip microcomputer to execute a debugging task indicated by the debugging instruction and generate debugging result information; receiving the debugging result information sent by the second single-chip microcomputer, and sending the debugging result information to the upper computer through the USB interface.The method can use the upper computer and a first single-chip microcomputer as debugging equipment, send a control instruction to the second single-chip microcomputer according to the upper computer and the first single-chip microcomputer, and then make the second single-chip microcomputer debug according to the control instruction to obtain the debugging result information, thereby solving the technical problem that a single-chip microcomputer cannot be debugged due to the lack of a debugger.

Description

TECHNICAL FIELD

[0001] The present application relates to the single-chip microcomputer technology, and particularly to a single-chip microcomputer debugging method, device and equipment. BACKGROUND

[0002] At present, in the embedded development system, when a single-chip microcomputer cannot complete all work in some occasions, a second single-chip microcomputer with slightly lower performance is needed to assist work, so two single-chip microcomputers are set on the control board. During the single-chip microcomputer is put into work or in the working process of the single-chip microcomputer, the single-chip microcomputer needs to be debugged.

[0003] In the prior art, a debugger can be provided, the debugger is connected with the host computer, and the debugger is connected with the two single-chip microcomputers respectively. The host computer sends a debugging instruction to one of the single-chip microcomputers through the debugger, and then the single-chip microcomputer is debugged.

[0004] However, in the prior art, when the single-chip microcomputer is debugged, the debugger is missing, the single-chip microcomputer cannot directly recognize the debugging instruction sent by the host computer, the single-chip microcomputer cannot be debugged, and the program in the single-chip microcomputer cannot be ensured to be normal. SUMMARY

[0005] The present application provides a single-chip microcomputer debugging method, device and equipment to solve the technical problem that the single-chip microcomputer cannot be debugged due to the lack of a debugger.

[0006] In a first aspect, the present application provides a single-chip microcomputer debugging method, which is applied to a first single-chip microcomputer, the first single-chip microcomputer is connected with a second single-chip microcomputer through a joint test action group (JTAG) interface, and the first single-chip microcomputer and the second single-chip microcomputer are connected with a host computer through a universal serial bus (USB) interface; the method comprises the following steps:

[0007] receiving a control instruction sent by the host computer through the USB interface, the control instruction being a command conforming to the USB protocol;

[0008] converting the control instruction into a debugging instruction conforming to the JTAG protocol;

[0009] sending the debugging instruction to the second single-chip microcomputer through the JTAG interface, the debugging instruction being used to instruct the second single-chip microcomputer to execute a debugging task indicated by the debugging instruction and generate debugging result information;

[0010] receiving the debugging result information sent by the second single-chip microcomputer, and sending the debugging result information to the host computer through the USB interface.

[0011] Further, the step of converting the control instruction into a debugging instruction conforming to the JTAG protocol comprises the following steps:

[0012] According to the pre-stored JTAG debugging code, the control instruction is converted into a debugging instruction conforming to the JTAG protocol; wherein the JTAG debugging code is a conversion code of the USB protocol and the JTAG protocol.

[0013] Further, the control instruction includes an identifier of the single-chip microcomputer to be debugged.

[0014] According to the identifier of the single-chip microcomputer to be debugged, the debugging instruction is sent to the second single-chip microcomputer through the JTAG interface.

[0015] Further, before receiving the debugging result information sent by the second single-chip microcomputer, the method further includes:

[0016] The read-back instruction is sent to the second single-chip microcomputer through the JTAG interface, wherein the read-back instruction is used to instruct the second single-chip microcomputer to return the debugging result information to the first single-chip microcomputer.

[0017] Further, the debugging result information is sent to the host computer through the USB interface, including:

[0018] The debugging result information is converted into debugging result information conforming to the USB protocol, and the debugging result information conforming to the USB protocol is sent to the host computer through the USB interface.

[0019] Further, the first single-chip microcomputer and the second single-chip microcomputer are arranged on a control board, and the control board is provided with the USB interface; the first single-chip microcomputer is connected with the USB interface through a wire harness, and the second single-chip microcomputer is connected with the USB interface through a wire harness.

[0020] Further, the host computer is used to mark the debugging result information if it is determined that the debugging result information has an error.

[0021] Further, the method further includes:

[0022] The deletion instruction sent by the host computer is received through the USB interface, wherein the deletion instruction is used to instruct to delete an error program in the second single-chip microcomputer, and the error program is a program corresponding to a debugging task with an error debugging result information;

[0023] The deletion instruction is converted into a deletion instruction conforming to the JTAG protocol;

[0024] The deletion instruction conforming to the JTAG protocol is sent to the second single-chip microcomputer through the JTAG interface for deletion processing.

[0025] In a second aspect, the application provides a debugging device of a single-chip microcomputer, which is applied to a first single-chip microcomputer, the first single-chip microcomputer is connected with a second single-chip microcomputer through a Joint Test Action Group (JTAG) interface, and the first single-chip microcomputer and the second single-chip microcomputer are connected with an upper computer through a Universal Serial Bus (USB) interface; the device comprises:

[0026] a first receiving unit configured to receive a control instruction sent by the upper computer through the USB interface, the control instruction being an instruction conforming to a USB protocol;

[0027] a first converting unit configured to convert the control instruction into a debugging instruction conforming to a JTAG protocol;

[0028] a first sending unit configured to send the debugging instruction to the second single-chip microcomputer through the JTAG interface, the debugging instruction being used to instruct the second single-chip microcomputer to execute a debugging task indicated by the debugging instruction and generate debugging result information;

[0029] a second receiving unit configured to receive the debugging result information sent by the second single-chip microcomputer;

[0030] a second sending unit configured to send the debugging result information to the upper computer through the USB interface.

[0031] Further, the first converting unit is configured to:

[0032] convert the control instruction into the debugging instruction conforming to the JTAG protocol according to a pre-stored JTAG debugging code, wherein the JTAG debugging code is a conversion code of the USB protocol and the JTAG protocol.

[0033] Further, the control instruction comprises an identifier of a single-chip microcomputer to be debugged;

[0034] the debugging instruction is sent to the second single-chip microcomputer through the JTAG interface according to the identifier of the single-chip microcomputer to be debugged.

[0035] Further, the device further comprises, before the second receiving unit:

[0036] a third sending unit configured to send a read-back instruction to the second single-chip microcomputer through the JTAG interface, wherein the read-back instruction is used to instruct the second single-chip microcomputer to return the debugging result information to the first single-chip microcomputer.

[0037] Further, the second sending unit is configured to:

[0038] convert the debugging result information into debugging result information conforming to the USB protocol, and send the debugging result information conforming to the USB protocol to the upper computer through the USB interface.

[0039] Further, the first single-chip microcomputer and the second single-chip microcomputer are arranged on a control board, and the control board is provided with the USB interface; the first single-chip microcomputer is connected with the USB interface through a wire harness, and the second single-chip microcomputer is connected with the USB interface through a wire harness.

[0040] Further, the host computer is configured to mark the debugging result information if it is determined that the debugging result information is incorrect.

[0041] Further, the apparatus further comprises:

[0042] a third receiving unit configured to receive a deletion instruction sent by the host computer through the USB interface, wherein the deletion instruction is configured to instruct to delete an incorrect program in the second single-chip microcomputer, and the incorrect program is a program corresponding to a debugging task with incorrect debugging result information;

[0043] a second converting unit configured to convert the deletion instruction into a deletion instruction conforming to a JTAG protocol;

[0044] a fourth sending unit configured to send the deletion instruction conforming to the JTAG protocol to the second single-chip microcomputer through a JTAG interface for deletion processing.

[0045] In a third aspect, the present application provides a debugging system of a single-chip microcomputer, which comprises a host computer, a first single-chip microcomputer and a second single-chip microcomputer.

[0046] The first single-chip microcomputer is configured to execute the method of the first aspect.

[0047] In a fourth aspect, the present application provides a single-chip microcomputer, which comprises a memory and a processor, and the memory stores a computer program capable of running on the processor, and the processor executes the computer program to implement the method of the first aspect.

[0048] In a fifth aspect, the present application provides a computer readable storage medium, which stores computer execution instructions, and the computer execution instructions are executed by a processor to implement the method of the first aspect.

[0049] In a sixth aspect, the present application provides a computer program product, which comprises a computer program, and the computer program is executed by a processor to implement the method of the first aspect.

[0050] The application provides a single-chip microcomputer debugging method, device and equipment, a control instruction sent by an upper computer is received through a USB interface, the control instruction is an instruction conforming to a USB protocol; the control instruction is converted into a debugging instruction conforming to a JTAG protocol; the debugging instruction is sent to a second single-chip microcomputer through a JTAG interface, the debugging instruction is used for instructing the second single-chip microcomputer to execute a debugging task instructed by the debugging instruction and generate debugging result information; the debugging result information sent by the second single-chip microcomputer is received, and the debugging result information is sent to the upper computer through the USB interface. In the scheme, the upper computer needs to send the control instruction to the first single-chip microcomputer through the USB interface, therefore, the first single-chip microcomputer receives the control instruction conforming to the USB protocol, the first single-chip microcomputer needs to convert the control instruction into the debugging instruction conforming to the JTAG protocol, then the debugging instruction is sent to the second single-chip microcomputer through the JTAG interface, so that the second single-chip microcomputer executes the debugging task instructed by the debugging instruction and generates the debugging result information, finally, the first single-chip microcomputer receives the debugging result information sent by the second single-chip microcomputer, and sends the debugging result information to the upper computer through the USB interface. Therefore, for the second single-chip microcomputer to be debugged, the upper computer and the first single-chip microcomputer can be used as a debugging device, the control instruction is sent to the second single-chip microcomputer according to the upper computer and the first single-chip microcomputer, so that the second single-chip microcomputer is debugged according to the control instruction, and finally the debugging result information is obtained, thereby solving the technical problem that the single-chip microcomputer cannot be debugged due to lack of a debugger. BRIEF DESCRIPTION OF DRAWINGS

[0051] The accompanying drawings, which are incorporated herein and form part of the specification, illustrate embodiments consistent with the present disclosure and, together with the description, further serve to explain the principles of the present disclosure.

[0052] Figure 1 A flowchart of a single-chip microcomputer debugging method provided by an embodiment of the application;

[0053] Figure 2 A flowchart of another single-chip microcomputer debugging method provided by an embodiment of the application;

[0054] Figure 3 A structural diagram of a single-chip microcomputer debugging device provided by an embodiment of the application;

[0055] Figure 4 A structural diagram of another single-chip microcomputer debugging device provided by an embodiment of the application;

[0056] Figure 5 A structural diagram of a single-chip microcomputer debugging system provided by an embodiment of the application;

[0057] Figure 6 A structural diagram of a single-chip microcomputer provided by an embodiment of the application;

[0058] Figure 7 A block diagram of a single-chip microcomputer is provided for an embodiment of the present application.

[0059] The specific embodiments of the present disclosure have been shown through the above-described drawings, and will be described in more detail hereinafter. The drawings and the written description are not intended to limit the scope of the present disclosure in any way, but to explain the concept of the present disclosure to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0060] Exemplary embodiments will be described in detail herein with reference to the accompanying drawings. In the following description, the same numbers refer to the same elements throughout the drawings. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present disclosure.

[0061] In one example, in an embedded development system, when a single-chip microcomputer cannot complete all work in some cases, a second single-chip microcomputer with slightly lower performance than the single-chip microcomputer is needed to assist in work, so two single-chip microcomputers are set on the control board. During the work of the single-chip microcomputer or in the process of the single-chip microcomputer, the single-chip microcomputer needs to be debugged. In the prior art, a debugger can be provided, the debugger is connected with an upper computer, and the debugger is connected with the two single-chip microcomputers. The upper computer sends a debugging instruction to one of the single-chip microcomputers through the debugger, and then debugs the single-chip microcomputer. In a specific test process, first, the upper computer sends a debugging instruction to the debugger, and the debugger receives the debugging instruction. Since the debugging instruction is in a universal serial bus (USB) interface protocol format, the debugger needs to convert the USB interface protocol format of the debugging instruction into a joint test action group (JTAG) interface protocol format, and then sends the debugging instruction in the JTAG interface protocol format to the single-chip microcomputer through a data output interface, so that the single-chip microcomputer generates debugging result information according to the debugging instruction. Finally, the upper computer can obtain the debugging result information through a data receiving interface. However, in the prior art, when the single-chip microcomputer is debugged, the debugger may be missing, the single-chip microcomputer cannot directly recognize the debugging instruction sent by the upper computer, the single-chip microcomputer cannot be debugged, and the program in the single-chip microcomputer cannot be ensured to be normal.

[0062] The single-chip microcomputer debugging method, device and equipment provided by the present application aim to solve the above technical problems in the prior art.

[0063] The technical solutions of the present application and how the technical solutions solve the above technical problems will be described in detail below with specific examples. The following specific examples can be combined with each other, and the same or similar concepts or processes can not be described again in some examples. The embodiments of the present application will be described below with reference to the drawings.

[0064] Figure 1 A flowchart of a debugging method of a single-chip microcomputer provided by an embodiment of the present application is shown in FIG. 1, the method is applied to a first single-chip microcomputer, the first single-chip microcomputer is connected with a second single-chip microcomputer through a Joint Test Action Group (JTAG) interface, and the first single-chip microcomputer and the second single-chip microcomputer are both connected with a host computer through Universal Serial Bus (USB) interfaces; the method comprises the following steps. Figure 1

[0065] 101. Receiving a control instruction sent by the host computer through the USB interface, the control instruction being a command conforming to the USB protocol.

[0066] By way of example, the execution subject of the present embodiment is the first single-chip microcomputer. Since a single-chip microcomputer can be divided into a master single-chip microcomputer or a slave single-chip microcomputer when it is put into use, the first single-chip microcomputer can refer to the master single-chip microcomputer, or the first single-chip microcomputer can also refer to the slave single-chip microcomputer.

[0067] The host computer is provided with a USB interface; and the first single-chip microcomputer and the second single-chip microcomputer are arranged on a control board, and a USB interface is arranged on the control board, the first single-chip microcomputer is connected with the USB interface, and the second single-chip microcomputer is also connected with the USB interface, thereby providing the first single-chip microcomputer and the second single-chip microcomputer with a USB interface. The host computer can be connected with the USB interface of the control board through the USB interface of the host computer, thereby enabling the host computer to communicate with the first single-chip microcomputer and the second single-chip microcomputer.

[0068] The JTAG interface is arranged on the first single-chip microcomputer, and the JTAG interface is arranged on the second single-chip microcomputer, the first single-chip microcomputer is connected with the JTAG interface of the second single-chip microcomputer through the JTAG interface of the first single-chip microcomputer, thereby enabling the first single-chip microcomputer to be connected with the second single-chip microcomputer through the JTAG interface.

[0069] When the host computer determines that the function of the second single-chip microcomputer needs to be tested based on automatic triggering or user triggering, the host computer can generate a control instruction, and the control instruction conforms to the USB protocol. Since the host computer can communicate with the single-chip microcomputer through the USB interface, and the control instruction is required to test the function of the second single-chip microcomputer, the host computer can determine that the control instruction needs to be sent to the first single-chip microcomputer first. Then, the host computer sends the control instruction to the first single-chip microcomputer through the USB interface.

[0070] 102. Converting the control instruction into a debugging instruction conforming to the JTAG protocol. ​

[0071] Exemplarily, since the control instruction conforms to the USB protocol, the single-chip microcomputer cannot directly recognize and execute the control instruction, and thus the first single-chip microcomputer needs to convert the control instruction into a debugging instruction conforming to the JTAG protocol. In an example, the first single-chip microcomputer pre-stores a JTAG debugging code, and when the first single-chip microcomputer receives the control instruction conforming to the USB protocol, the first single-chip microcomputer converts the control instruction into the debugging instruction conforming to the JTAG protocol based on the JTAG debugging code.

[0072] 103. sending the debugging instruction to the second single-chip microcomputer through the JTAG interface, the debugging instruction being used to instruct the second single-chip microcomputer to execute a debugging task instructed by the debugging instruction and to generate debugging result information.

[0073] Exemplarily, after the first single-chip microcomputer obtains the debugging instruction conforming to the JTAG protocol, the first single-chip microcomputer transmits the debugging instruction to the JTAG interface of the second single-chip microcomputer through the JTAG interface of the first single-chip microcomputer, and thus the second single-chip microcomputer receives the debugging instruction conforming to the JTAG protocol. When the second single-chip microcomputer receives the debugging instruction, the second single-chip microcomputer can execute the debugging task instructed by the debugging instruction and generate the debugging result information.

[0074] 104. receiving the debugging result information sent by the second single-chip microcomputer and sending the debugging result information to the host computer through the USB interface.

[0075] Exemplarily, the second single-chip microcomputer transmits the debugging result information to the JTAG interface of the first single-chip microcomputer through the JTAG interface of the second single-chip microcomputer, and thus the first single-chip microcomputer receives the debugging result information sent by the second single-chip microcomputer. The debugging result information conforms to the JTAG protocol, and the first single-chip microcomputer converts the debugging result information conforming to the JTAG protocol into debugging result information conforming to the USB protocol. Then the first single-chip microcomputer transmits the debugging result information conforming to the USB protocol to the USB interface of the host computer through the USB interface on the control board, and thus the host computer receives the debugging result information.

[0076] For example, the host computer determines that the read-write function of the second single-chip microcomputer needs to be debugged, and then the host computer generates a control instruction conforming to the USB protocol, which represents the debugging of the read-write function of the second single-chip microcomputer; the host computer transmits the control instruction for debugging the read-write function of the second single-chip microcomputer to the USB interface on the control board through the USB interface of the host computer; since the first single-chip microcomputer is connected with the USB interface on the control board, and the control instruction needs to be transmitted to the first single-chip microcomputer, the first single-chip microcomputer can receive the control instruction conforming to the USB protocol. Then, the first single-chip microcomputer converts the control instruction conforming to the USB protocol into a debugging instruction conforming to the JTAG protocol. The first single-chip microcomputer and the second single-chip microcomputer are connected and communicate through the JTAG interface, and the first single-chip microcomputer transmits the debugging instruction conforming to the JTAG protocol to the JTAG interface of the second single-chip microcomputer through the JTAG interface of the first single-chip microcomputer. Then, the second single-chip microcomputer can receive the debugging instruction and debug the read-write function of the second single-chip microcomputer based on the debugging instruction to generate debugging result information, which includes the debugging result of the read-write function of the second single-chip microcomputer. The second single-chip microcomputer sends the debugging result information to the JTAG interface of the first single-chip microcomputer through the JTAG interface of the second single-chip microcomputer, so that the first single-chip microcomputer can receive the debugging result information and send the debugging result information to the USB interface of the host computer through the USB interface on the control board, so that the host computer receives the debugging result information sent by the first single-chip microcomputer.

[0077] Alternatively, the control instruction can also represent the debugging of the storage function of the second single-chip microcomputer. In the process of testing the storage function of the second single-chip microcomputer, the host computer first generates a control instruction for debugging the storage function of the second single-chip microcomputer, which is a control instruction conforming to the USB protocol, and then sends the control instruction to the USB interface on the control board through the USB interface of the host computer. Since the first single-chip microcomputer is connected with the USB interface on the control board, and the control instruction needs to be transmitted to the first single-chip microcomputer, the first single-chip microcomputer can receive the control instruction conforming to the USB protocol, convert the control instruction into a debugging instruction conforming to the JTAG protocol based on the JTAG debugging code, and send the debugging instruction conforming to the JTAG protocol to the JTAG interface of the second single-chip microcomputer through the JTAG interface of the first single-chip microcomputer, so that the second single-chip microcomputer receives the debugging instruction conforming to the JTAG protocol. Then, the second single-chip microcomputer can debug the storage function of the second single-chip microcomputer based on the debugging instruction to generate debugging result information, which includes the debugging result of the storage function of the second single-chip microcomputer. Finally, the second single-chip microcomputer sends the debugging result information to the JTAG interface of the first single-chip microcomputer through the JTAG interface of the second single-chip microcomputer, so that the first single-chip microcomputer can receive the debugging result information and send the debugging result information to the USB interface of the host computer through the USB interface on the control board, so that the host computer receives the debugging result information about the storage function of the second single-chip microcomputer.

[0078] When the host computer determines that the function of the first single-chip microcomputer needs to be tested based on automatic triggering or user triggering, the host computer generates a control instruction for debugging the function of the first single-chip microcomputer, the control instruction being an instruction conforming to the USB protocol. The host computer sends the control instruction to the USB interface on the control board through the USB interface of the host computer. Since the second single-chip microcomputer is connected to the USB interface on the control board and the control instruction needs to be transmitted to the second single-chip microcomputer, the second single-chip microcomputer can receive the control instruction sent by the host computer. The second single-chip microcomputer converts the control instruction into a debugging instruction conforming to the JTAG protocol based on the JTAG debugging code and sends the debugging instruction conforming to the JTAG protocol to the JTAG interface of the first single-chip microcomputer through the JTAG interface of the second single-chip microcomputer, so that the first single-chip microcomputer receives the debugging instruction conforming to the JTAG protocol. Then, the first single-chip microcomputer can debug the function of the first single-chip microcomputer based on the debugging instruction and generate debugging result information, the debugging result information including the debugging result of the function of the first single-chip microcomputer. Finally, the first single-chip microcomputer sends the debugging result information to the JTAG interface of the second single-chip microcomputer through the JTAG interface of the first single-chip microcomputer, so that the second single-chip microcomputer can receive the debugging result information and send the debugging result information to the USB interface of the host computer through the USB interface on the control board, so that the host computer receives the debugging result information of the function of the first single-chip microcomputer.

[0079] In the embodiment of the application, the control instruction conforming to the USB protocol is received through the USB interface. The control instruction is converted into a debugging instruction conforming to the JTAG protocol. The debugging instruction is sent to the second single-chip microcomputer through the JTAG interface, and the debugging instruction is used to instruct the second single-chip microcomputer to perform a debugging task indicated by the debugging instruction and generate debugging result information. The debugging result information sent by the second single-chip microcomputer is received, and the debugging result information is sent to the host computer through the USB interface. In the scheme, since the host computer needs to send a control instruction to the first single-chip microcomputer through the USB interface, the first single-chip microcomputer receives the control instruction conforming to the USB protocol. The first single-chip microcomputer needs to convert the control instruction into a debugging instruction conforming to the JTAG protocol, and then send the debugging instruction to the second single-chip microcomputer through the JTAG interface, so that the second single-chip microcomputer performs a debugging task indicated by the debugging instruction and generates debugging result information. Finally, the first single-chip microcomputer receives the debugging result information sent by the second single-chip microcomputer and sends the debugging result information to the host computer through the USB interface. Therefore, for the second single-chip microcomputer to be debugged, the host computer and the first single-chip microcomputer can be used as debugging devices. The host computer and the first single-chip microcomputer send a control instruction to the second single-chip microcomputer, so that the second single-chip microcomputer is debugged according to the control instruction and finally obtains debugging result information, thereby solving the technical problem that a single-chip microcomputer cannot be debugged due to lack of a debugger.

[0080] Figure 2 Another flowchart of the debugging method of the single-chip microcomputer is provided for the embodiments of the present application, as shown in Figure 2 The method is applied to a first single-chip microcomputer, the first single-chip microcomputer is connected with a second single-chip microcomputer through a JTAG interface, and the first single-chip microcomputer and the second single-chip microcomputer are both connected with an upper computer through USB interfaces; the method comprises the following steps.

[0081] 201. Receiving a control instruction sent by the upper computer through the USB interface, the control instruction being an instruction conforming to a USB protocol.

[0082] By way of example, this step can refer to step 101 in Figure 1 , and will not be described again.

[0083] 202. Converting the control instruction into a debugging instruction conforming to a JTAG protocol according to pre-stored JTAG debugging code; the JTAG debugging code being conversion code between the USB protocol and the JTAG protocol.

[0084] By way of example, since the first single-chip microcomputer pre-stores the JTAG debugging code, which is conversion code between the USB protocol and the JTAG protocol, the first single-chip microcomputer can convert the received control instruction conforming to the USB protocol into a debugging instruction conforming to the JTAG protocol according to the JTAG debugging code.

[0085] 203. The control instruction comprises an identifier of a single-chip microcomputer to be debugged; and the debugging instruction is sent to the second single-chip microcomputer through the JTAG interface according to the identifier of the single-chip microcomputer to be debugged, the debugging instruction being used to instruct the second single-chip microcomputer to execute a debugging task indicated by the debugging instruction and generate debugging result information.

[0086] By way of example, the control instruction comprises an identifier of a single-chip microcomputer to be debugged, since the identifier of the single-chip microcomputer is unique and there is a corresponding relationship between the identifier and the single-chip microcomputer, the first single-chip microcomputer can send the debugging instruction to the JTAG interface of the second single-chip microcomputer corresponding to the identifier through the JTAG interface of the first single-chip microcomputer, the debugging instruction being used to instruct the second single-chip microcomputer to execute a debugging task indicated by the debugging instruction and generate debugging result information. For example, when checking whether a flash memory in the second single-chip microcomputer has a damage function, according to the corresponding relationship between the second single-chip microcomputer and the identifier, the first single-chip microcomputer sends the debugging instruction to the JTAG interface of the second single-chip microcomputer corresponding to the identifier through the JTAG interface of the first single-chip microcomputer, the debugging instruction being read-write of the flash memory, when the second single-chip microcomputer receives the debugging instruction of read-write of the flash memory through the JTAG interface of the second single-chip microcomputer, the second single-chip microcomputer executes the debugging task indicated by the debugging instruction and generates the debugging result information.

[0087] 204. sending a read-back instruction to the second single-chip microcomputer through the JTAG interface, wherein the read-back instruction is used to instruct the second single-chip microcomputer to return the debugging result information to the first single-chip microcomputer.

[0088] Exemplarily, after step 203, the first single-chip microcomputer can send a read-back instruction to the JTAG interface of the second single-chip microcomputer through the JTAG interface of the first single-chip microcomputer, so that when the second single-chip microcomputer receives the read-back instruction through the JTAG interface of the second single-chip microcomputer, the second single-chip microcomputer returns the generated debugging result information to the first single-chip microcomputer.

[0089] 205. receiving the debugging result information sent by the second single-chip microcomputer.

[0090] Exemplarily, when the second single-chip microcomputer receives the read-back instruction through the JTAG interface of the second single-chip microcomputer and sends the debugging result information to the JTAG interface of the first single-chip microcomputer according to the read-back instruction, the first single-chip microcomputer receives the debugging result information sent by the second single-chip microcomputer through the JTAG interface of the first single-chip microcomputer.

[0091] 206. converting the debugging result information into debugging result information conforming to the USB protocol, and sending the debugging result information conforming to the USB protocol to the host computer through the USB interface.

[0092] In one example, the host computer is configured to mark the debugging result information if it is determined that the debugging result information is incorrect.

[0093] Exemplarily, step 206 includes two implementation manners:

[0094] In the first manner, the first single-chip microcomputer converts the debugging result information into debugging result information conforming to the USB protocol, judges the debugging result information to obtain judgment result information, and finally sends the debugging result information conforming to the USB protocol and the judgment result information to the USB interface of the host computer through the USB interface of the control board. The host computer receives the debugging result information and the judgment result information through the USB interface of the host computer. If it is determined that the debugging result information is incorrect, the host computer marks the debugging result information. Exemplarily, the debugging instruction is to read and write the flash memory. The first single-chip microcomputer judges whether the debugging result information is consistent with the pre-stored correct result information. If the two are inconsistent, the obtained judgment result information is incorrect. Then, the debugging result information conforming to the USB protocol and the judgment result information are sent to the USB interface of the host computer through the USB interface of the control board. The host computer receives the debugging result information and the judgment result information through the USB interface of the host computer. Since the debugging result information is incorrect, the host computer marks the debugging result information.

[0095] In the second mode, the first single-chip microcomputer converts the debugging result information into debugging result information conforming to the USB protocol, and sends the debugging result information conforming to the USB protocol to the USB interface on the host computer through the USB interface on the control board. The host computer receives the debugging result information through the USB interface on the host computer, judges whether the debugging result information is correct, and marks the debugging result information if it is determined that the debugging result information is incorrect. For example, the debugging instruction is to read and write the flash memory, and the host computer judges whether the debugging result information is consistent with the pre-stored correct result information. If the two are inconsistent, the obtained judgment result information is incorrect, and therefore the host computer marks the debugging result information.

[0096] 207. receiving, through the USB interface, a deletion instruction sent by the host computer, wherein the deletion instruction is used to indicate deletion of an incorrect program in the second single-chip microcomputer, and the incorrect program is a program corresponding to a debugging task whose debugging result information is incorrect.

[0097] In one example, the first single-chip microcomputer and the second single-chip microcomputer are arranged on the control board, and the control board is provided with a USB interface; the first single-chip microcomputer is connected to the USB interface through a wire harness, and the second single-chip microcomputer is connected to the USB interface through a wire harness.

[0098] For example, the first single-chip microcomputer and the second single-chip microcomputer are arranged on the control board, and the control board is provided with a USB interface; the first single-chip microcomputer is connected to the USB interface through a wire harness, and the second single-chip microcomputer is connected to the USB interface through a wire harness. When it is necessary to delete an incorrect program in the second single-chip microcomputer, the host computer sends a deletion instruction to the USB interface on the control board through the USB interface on the host computer, and the first single-chip microcomputer can receive the deletion instruction sent by the host computer through the USB interface on the control board. The deletion instruction is used to indicate deletion of an incorrect program in the second single-chip microcomputer, and the incorrect program is a program corresponding to a debugging task whose debugging result information is incorrect.

[0099] 208. converting the deletion instruction into a deletion instruction conforming to the JTAG protocol.

[0100] For example, after the first single-chip microcomputer receives the deletion instruction conforming to the USB protocol through the USB interface on the control board, the first single-chip microcomputer can convert the deletion instruction into a deletion instruction conforming to the JTAG protocol according to the JTAG debugging code.

[0101] 209. sending, through the JTAG interface, the deletion instruction conforming to the JTAG protocol to the second single-chip microcomputer for deletion processing.

[0102] Exemplarily, the first single-chip microcomputer sends a delete instruction conforming to the JTAG protocol to the JTAG interface of the second single-chip microcomputer, and the second single-chip microcomputer receives the delete instruction through the JTAG interface of the second single-chip microcomputer and performs a delete operation according to the delete instruction.

[0103] In the embodiment of the application, the control instruction conforming to the USB protocol is received through the USB interface, and the control instruction is converted into a debugging instruction conforming to the JTAG protocol according to the pre-stored JTAG debugging code. The control instruction includes the identifier of the single-chip microcomputer to be debugged. The debugging instruction is sent to the second single-chip microcomputer through the JTAG interface according to the identifier of the single-chip microcomputer to be debugged, and the debugging instruction is used to instruct the second single-chip microcomputer to perform the debugging task indicated by the debugging instruction and generate the debugging result information. The read-back instruction is sent to the second single-chip microcomputer through the JTAG interface, and the debugging result information sent by the second single-chip microcomputer is received. The debugging result information is converted into the debugging result information conforming to the USB protocol, and the debugging result information conforming to the USB protocol is sent to the host computer through the USB interface. The delete instruction is received through the USB interface. The delete instruction is converted into the delete instruction conforming to the JTAG protocol. The delete instruction conforming to the JTAG protocol is sent to the second single-chip microcomputer through the JTAG interface for delete processing. In the scheme, the host computer and the first single-chip microcomputer can be used as the debugging device for the second single-chip microcomputer to be debugged, the control instruction is sent to the second single-chip microcomputer by the host computer and the first single-chip microcomputer, and then the second single-chip microcomputer performs debugging according to the control instruction, so that the debugging result information is finally obtained, and the technical problem that the single-chip microcomputer cannot be debugged due to the lack of a debugger is solved.

[0104] Figure 3 A structure diagram of a debugging device for a single-chip microcomputer provided in the embodiment of the application is shown in FIG. 1. Figure 3 As shown in FIG. 1, the device is applied to a first single-chip microcomputer, the first single-chip microcomputer is connected with a second single-chip microcomputer through a JTAG interface, and the first single-chip microcomputer and the second single-chip microcomputer are connected with a host computer through USB interfaces. The device includes:

[0105] A first receiving unit 31 is configured to receive a control instruction sent by the host computer through the USB interface, and the control instruction conforms to the USB protocol.

[0106] A first converting unit 32 is configured to convert the control instruction into a debugging instruction conforming to the JTAG protocol.

[0107] A first sending unit 33 is configured to send the debugging instruction to the second single-chip microcomputer through the JTAG interface, and the debugging instruction is used to instruct the second single-chip microcomputer to perform a debugging task indicated by the debugging instruction and generate debugging result information.

[0108] The second receiving unit 34 is configured to receive the debugging result information sent by the second single-chip microcomputer.

[0109] The second sending unit 35 is configured to send the debugging result information to the host computer through the USB interface.

[0110] The device of the embodiment can implement the technical solutions in the above method, and the specific implementation process and technical principles are the same, which will not be repeated here.

[0111] Figure 4 Another structure diagram of the debugging device of the single-chip microcomputer provided by the embodiment of the present application is shown in Figure 3 Based on the embodiment shown in Figure 4 The first conversion unit 32 is configured to:

[0112] According to the pre-stored JTAG debugging code, the control instruction is converted into a debugging instruction conforming to the JTAG protocol; wherein the JTAG debugging code is the conversion code of the USB protocol and the JTAG protocol.

[0113] In one example, the control instruction includes the identifier of the single-chip microcomputer to be debugged; the first sending unit 33 is configured to:

[0114] According to the identifier of the single-chip microcomputer to be debugged, the debugging instruction is sent to the second single-chip microcomputer through the JTAG interface.

[0115] In one example, before the second receiving unit 34, it further includes:

[0116] The third sending unit 41 is configured to send the read-back instruction to the second single-chip microcomputer through the JTAG interface, wherein the read-back instruction is used to instruct the second single-chip microcomputer to return the debugging result information to the first single-chip microcomputer.

[0117] In one example, the second sending unit 35 is configured to:

[0118] convert the debugging result information into debugging result information conforming to the USB protocol, and send the debugging result information conforming to the USB protocol to the host computer through the USB interface.

[0119] In one example, the first single-chip microcomputer and the second single-chip microcomputer are arranged on a control board, and the control board is provided with a USB interface; the first single-chip microcomputer is connected with the USB interface through a wire harness, and the second single-chip microcomputer is connected with the USB interface through a wire harness.

[0120] In one example, the host computer is configured to mark the debugging result information if it is determined that the debugging result information has an error.

[0121] In one example, the device further includes:

[0122] The third receiving unit 42 is configured to receive a deletion instruction sent by the host computer through the USB interface, wherein the deletion instruction is used to instruct to delete an error program in the second single-chip microcomputer, and the error program is a program corresponding to a debugging task whose debugging result information is error.

[0123] The second converting unit 43 is configured to convert the deletion instruction into a deletion instruction conforming to the JTAG protocol.

[0124] The fourth sending unit 44 is configured to send the deletion instruction conforming to the JTAG protocol to the second single-chip microcomputer through the JTAG interface for deletion processing.

[0125] The device of the embodiment can execute the technical solutions in the method, and the specific implementation process and technical principles are the same, which will not be repeated here.

[0126] Figure 5 A structure diagram of a debugging system of a single-chip microcomputer provided by the embodiment of the present application is shown in FIG. 1. Figure 5 The system includes a host computer, a first single-chip microcomputer and a second single-chip microcomputer.

[0127] The first single-chip microcomputer is configured to execute the method provided by the above embodiment.

[0128] The system further includes a control board and a USB interface on the control board.

[0129] Figure 6 A structure diagram of a single-chip microcomputer provided by the embodiment of the present application is shown in FIG. 2. Figure 6 The single-chip microcomputer includes a memory 61 and a processor 62.

[0130] The memory 61 stores a computer program that can run on the processor 62.

[0131] The processor 62 is configured to execute the method provided by the above embodiment.

[0132] The single-chip microcomputer further includes a receiver 63 and a transmitter 64. The receiver 63 is configured to receive instructions and data sent by an external device, and the transmitter 64 is configured to send instructions and data to the external device.

[0133] Figure 7 A block diagram of a single-chip microcomputer provided by the embodiment of the present application is shown in FIG. 3. The single-chip microcomputer can be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0134] The device 700 can include one or more of the following components: a processing component 702, a memory 704, a power supply component 706, a multimedia component 708, an audio component 710, an input / output (I / O) interface 712, a sensor component 714, and a communication component 716.

[0135] The processing component 702 typically controls overall operations of the device 700, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component 702 can include one or more processors 720 to execute instructions to complete the steps of the methods described above, in whole or in part. Moreover, the processing component 702 can include one or more modules to facilitate interaction between the processing component 702 and other components. For example, the processing component 702 can include a multimedia module to facilitate the interaction between the multimedia component 708 and the processing component 702.

[0136] The memory 704 is configured to store various types of data to support operations of the device 700. Examples of these data include instructions to operate any applications or methods on the device 700, contact data, phonebook data, messages, pictures, videos, and so on. The memory 704 can be implemented by any type of volatile or non-volatile storage devices or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read only memory (EEPROM), erasable programmable read only memory (EPROM), programmable read only memory (PROM), read only memory (ROM), magnetic memory, flash memory, magnetic disk, or optical disk.

[0137] The power supply component 706 supplies power for various components of the device 700. The power supply component 706 can include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the device 700.

[0138] The multimedia component 708 includes a screen providing an output interface between the device 700 and a user. In some embodiments, the screen can include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes the touch panel, the screen can be implemented as a touch screen to receive an input signal from a user. The touch panel includes one or more touch sensors to sense a touch, a slide, and a gesture on the touch panel. The touch sensor can not only sense a boundary of a touching or a sliding action, but also detect duration and pressure related to the touching or sliding action. In some embodiments, the multimedia component 708 includes a front camera and / or a back camera. The front camera and / or the back camera can receive external multimedia data when the device 700 is in an operating mode, such as a shooting mode or a video mode. Each of the front camera and the back camera can be a fixed optical lens system or have a focal length and optical zoom capability.

[0139] The audio component 710 is configured to output and / or input audio signals. For example, the audio component 710 includes a microphone (MIC) that is configured to receive an external audio signal when the device 700 is in an operation mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signal can be further stored in the memory 704 or transmitted via the communication component 716. In some embodiments, the audio component 710 also includes a speaker for outputting audio signals.

[0140] The I / O interface 712 provides an interface between the processing component 702 and peripheral interface modules, which can be a keypad, a click wheel, buttons, and the like. The buttons can include, but are not limited to, a home button, a volume button, a start button, and a lock button.

[0141] The sensor component 714 includes one or more sensors for providing status assessments of various aspects of the device 700. For example, the sensor component 714 can detect an open / closed position of the device 700, relative positioning of components, such as a display and a keypad of the device 700, a change of position of the device 700 or a component of the device 700, presence or absence of user contact with the device 700, changes in orientation or acceleration / deceleration

[0142] The communication component 716 is configured to facilitate wired or wireless communication between the device 700 and other devices. The device 700 can access a wireless network based on a corresponding communication standard, such as WiFi, 2G, or 3G, or a combination thereof. In an example embodiment, the communication component 716 receives broadcast signals or broadcast-related information from external broadcast management systems via a broadcast channel. In an example embodiment, the communication component 716 also includes a Near Field Communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on Radio Frequency Identification (RFID) techniques, infrared data association (IrDA) techniques, ultra-wideband (UWB) techniques, Bluetooth (BT) techniques, and other techniques.

[0143] In exemplary embodiments, the apparatus 700 can be implemented using one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, micro-controllers, microprocessors or other electronic devices, to perform the above-described methods.

[0144] In exemplary embodiments, a non-transitory computer readable storage medium including instructions, such as the memory 704 including instructions, is also provided, which can be executed by the processor 720 of the apparatus 700 to complete the above-described methods. For example, the non-transitory computer readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disc, and an optical data storage device, etc.

[0145] Embodiments of the present application also provide a non-transitory computer readable storage medium, when instructions in the storage medium are executed by a processor of a single-chip microcomputer, the single-chip microcomputer can execute the method provided by the above-described embodiments.

[0146] Embodiments of the present application also provide a computer program product, the computer program product comprising: a computer program stored in a readable storage medium, at least one processor of a single-chip microcomputer can read the computer program from the readable storage medium, and the at least one processor executes the computer program to make the single-chip microcomputer execute the scheme provided by any of the above-described embodiments.

[0147] Other embodiments of the present disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the application disclosed herein. It is intended that the present disclosure cover any and all variations of the present disclosure that come within the scope of the following claims and their equivalents. It is intended that the specification and examples be considered exemplary only, with the true scope and spirit of the present disclosure being indicated by the following claims.

[0148] It should be understood that the present disclosure is not limited to the precise structures herein described and illustrated in the drawings, and that various modifications and changes can be made without departing from the scope thereof. The scope of the present disclosure is limited only by the claims that follow.

Claims

1. A debugging method for a microcontroller, characterized in that, The method is applied to a first microcontroller, which is connected to a second microcontroller via a Joint Test Group (JTAG) interface. Both the first and second microcontrollers are connected to a host computer via a Universal Serial Bus (USB) interface. The method includes: When the host computer determines that the function of the second microcontroller needs to be tested based on automatic triggering or user triggering, The system receives control commands sent by the host computer through the USB interface. These control commands are compliant with the USB protocol. Based on the pre-stored JTAG debugging code, the control commands are converted into debugging commands conforming to the JTAG protocol; wherein, the JTAG debugging code is the conversion code between the USB protocol and the JTAG protocol; The debugging instructions are sent to the second microcontroller via the JTAG interface. The debugging instructions are used to instruct the second microcontroller to execute the debugging task indicated by the debugging instructions and generate debugging result information. The readback command is sent to the second microcontroller via the JTAG interface, wherein the readback command is used to instruct the second microcontroller to return the debugging result information to the first microcontroller; The system receives the debugging result information sent by the second microcontroller and sends the debugging result information to the host computer via the USB interface. When the host computer determines that the function of the first microcontroller needs to be tested based on automatic triggering or user triggering, The first microcontroller receives JTAG-compliant debugging commands sent by the second microcontroller's JTAG interface through the JTAG interface, and debugs the function of the first microcontroller based on the debugging commands to generate debugging result information; wherein, the debugging commands are generated by the second microcontroller after receiving control commands sent by the host computer and converting them according to its pre-stored JTAG debugging code, and the debugging result information includes the debugging results of the function of the first microcontroller. The debugging result information is sent from the JTAG interface of the first microcontroller to the JTAG interface of the second microcontroller. The second microcontroller receives the debugging result information from the first microcontroller and sends the debugging result information to the host computer through the USB interface.

2. The method according to claim 1, characterized in that, The control commands include the identifier of the microcontroller to be debugged; Based on the identifier of the microcontroller to be debugged, the debugging command is sent to the second microcontroller via the JTAG interface.

3. The method according to claim 1, characterized in that, Sending the debugging result information to the host computer via the USB interface includes: The debugging result information is converted into debugging result information conforming to the USB protocol, and the debugging result information conforming to the USB protocol is sent to the host computer through the USB interface.

4. The method according to claim 1, characterized in that, The first microcontroller and the second microcontroller are mounted on a control board, which is equipped with the USB interface. The first microcontroller is connected to the USB interface via a ribbon cable, and the second microcontroller is also connected to the USB interface via a ribbon cable.

5. The method according to any one of claims 1-4, characterized in that, The host computer is used to mark the debugging result information if it determines that an error has occurred.

6. The method according to any one of claims 1-4, characterized in that, The method further includes: The deletion command sent by the host computer is received through the USB interface. The deletion command is used to indicate the deletion of the erroneous program in the second microcontroller. The erroneous program is the program corresponding to the debugging task whose debugging result information is incorrect. Convert the deletion command into a deletion command that conforms to the JTAG protocol; The deletion command conforming to the JTAG protocol is sent to the second microcontroller via the JTAG interface for deletion processing.

7. A debugging device for a microcontroller, characterized in that, The device is applied to a first microcontroller, which is connected to a second microcontroller via a Joint Test Group (JTAG) interface. Both the first and second microcontrollers are connected to a host computer via a Universal Serial Bus (USB) interface. The device includes: When the host computer determines that the function of the second microcontroller needs to be tested based on automatic triggering or user triggering, The first receiving unit is configured to receive control commands sent by the host computer through the USB interface, wherein the control commands are commands conforming to the USB protocol. The first conversion unit is used to convert the control instructions into JTAG-compliant debugging instructions based on pre-stored JTAG debugging code; wherein the JTAG debugging code is a conversion code between the USB protocol and the JTAG protocol. The first sending unit is used to send the debugging instruction to the second microcontroller through the JTAG interface. The debugging instruction is used to instruct the second microcontroller to execute the debugging task indicated by the debugging instruction and generate debugging result information. The third sending unit is used to send a readback instruction to the second microcontroller via the JTAG interface, wherein the readback instruction is used to instruct the second microcontroller to return the debugging result information to the first microcontroller; The second receiving unit is used to receive the debugging result information sent by the second microcontroller; The second sending unit is used to send the debugging result information to the host computer through the USB interface; When the host computer determines that the function of the first microcontroller needs to be tested based on automatic triggering or user triggering, The fourth receiving unit is used to receive JTAG-compliant debugging instructions sent by the JTAG interface of the second microcontroller through the JTAG interface, debug the function of the first microcontroller based on the debugging instructions, and generate debugging result information; wherein, the debugging instructions are generated by the second microcontroller after receiving control instructions sent by the host computer and converting them according to its pre-stored JTAG debugging code, and the debugging result information includes the debugging results of the function of the first microcontroller; The fifth sending unit is used to send the debugging result information to the JTAG interface of the second microcontroller through the JTAG interface of the first microcontroller. The second microcontroller receives the debugging result information from the first microcontroller and sends the debugging result information to the host computer through the USB interface.

8. A debugging system for a microcontroller, characterized in that, The system includes a host computer, a first microcontroller, and a second microcontroller; The first microcontroller is used to execute the method as described in any one of claims 1-6.

9. A microcontroller, characterized in that, The method includes a memory and a processor, wherein the memory stores a computer program that can run on the processor, and the processor executes the computer program to implement the method of any one of claims 1-6.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which, when executed by a processor, are used to implement the method as described in any one of claims 1-6.

11. A computer program product, characterized in that, Includes a computer program that, when executed by a processor, implements the method of any one of claims 1-6.

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