Hardware connection checking method and device, storage medium and electronic equipment

Abstract

Embodiments of the present application provide a hardware connection checking method, device, storage medium and electronic equipment, wherein the hardware connection checking method comprises: obtaining a signal list of a circuit to be checked; setting, by a hardware connection checking tool, an enable signal and a start point signal of a start point of each hardware connection to be checked in the circuit to be checked according to a connection start point, a connection end point and the enable signal of each hardware connection to be checked in the signal list, and obtaining an end point signal corresponding to the connection end point of the hardware connection to be checked. The hardware connection checking method, device, storage medium and electronic equipment provided by the embodiments of the present application can improve the efficiency of hardware connection checking on the basis of realizing hardware connection checking of connections with logical functions.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the computer field, and in particular, to a hardware connection checking method and device, a storage medium and an electronic device. BACKGROUND

[0002] The internal hierarchy of an SOC (System on Chip) includes a large number of modules. As chip design becomes more and more complex, the internal connections become more and more numerous. Due to the different levels of connection relationships between interfaces, connection errors are prone to occur. Therefore, when the chip is integrated at the top level, it is usually necessary to check whether each connection is correct.

[0003] There are mainly two existing hardware connection checking methods, namely, writing assertions and using a hardware connection checking tool. The writing of assertions has high complexity and needs to be manually confirmed, which is high in labor cost and low in efficiency. The hardware connection checking tool can only check connections without logic functions, so when a connection has a logic function, it will be divided by the hardware connection checking tool into several connections without logic functions, and further checking of the logic function part between the connections without logic functions is needed in combination with other methods to verify whether the connection with the logic function is correct. The steps are complicated and the checking efficiency is low.

[0004] Therefore, how to improve the efficiency of hardware connection checking on the basis of hardware connection checking of a connection with a logic function has become a technical problem to be solved by those skilled in the art. SUMMARY

[0005] In view of the above, embodiments of the present application provide a hardware connection checking method, device, storage medium and electronic device to improve the efficiency of hardware connection checking on the basis of hardware connection checking of a connection with a logic function.

[0006] To achieve the above object, embodiments of the present application provide the following technical solutions.

[0007] In a first aspect, embodiments of the present application provide a hardware connection checking method, comprising:

[0008] obtaining a signal list of a circuit to be connected and checked;

[0009] setting, by a hardware connection checking tool, an enable signal and a start point signal of a start point of each hardware connection to be checked in the circuit to be connected and checked according to a connection start point, a connection end point and the enable signal of each hardware connection to be checked in the signal list, and obtaining an end point signal corresponding to the connection end point of the hardware connection to be checked.

[0010] In a second aspect, embodiments of the present application provide a hardware connection checking device, comprising:

[0011] The signal list acquisition module is suitable for acquiring a signal list of the to-be-wired inspection circuit.

[0012] The hardware wiring inspection module is suitable for setting the start point signal of the wiring start point and the enable signal of each to-be-inspected hardware wiring in the to-be-wired inspection circuit according to the wiring start point, the wiring end point and the enable signal of each to-be-inspected hardware wiring in the signal list by using a hardware wiring inspection tool, and acquiring the end point signal corresponding to the wiring end point of the to-be-inspected hardware wiring.

[0013] In a third aspect, an embodiment of the present application provides a storage medium, which has a program suitable for inspecting wiring, so as to implement the hardware wiring inspection method in any one of the embodiments of the first aspect.

[0014] In a fourth aspect, an embodiment of the present application provides an electronic device, which comprises at least one memory and at least one processor; the memory stores a program, and the processor invokes the program to execute the hardware wiring inspection method in any one of the embodiments of the first aspect.

[0015] The hardware wiring inspection method provided by the embodiment of the present application firstly acquires the enable signal of the to-be-inspected hardware wiring with a logic function, that is, the value of the other signal in the logic function module through which the to-be-inspected hardware wiring passes, except the start point signal and the end point signal of the to-be-inspected hardware wiring, then controls the enable signal, so that the logic between the start point signal and the end point signal of the to-be-inspected hardware wiring is unique, thereby realizing the inspection of the to-be-inspected hardware wiring through the comparison of the start point signal and the end point signal. It can be seen that, by using the enable signal, the hardware wiring inspection method provided by the embodiment of the present application changes the logic of the to-be-inspected hardware wiring with a logic function, so that the start point signal of the wiring start point and the end point signal of the wiring end point are logically unique, and the inspection of the hardware wiring with a logic function is realized by using the hardware wiring inspection tool, thereby not only realizing the inspection of the hardware wiring with a logic function, but also realizing the fast inspection and improving the hardware wiring inspection efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced. Obviously, the drawings in the following description are only embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative effort on the basis of the provided drawings.

[0017] Figure 1a is a structural schematic diagram of an internal part structure of a chip;

[0018] Figure 1b is Figure 1aStructure diagram of the middle data selector 1;

[0019] Figure 2a Flow chart of the hardware connection checking method provided by the embodiment of the present application;

[0020] Figure 2b Structure diagram of the chip internal part;

[0021] Figure 2c Structure diagram of the hardware connection checking device provided by the embodiment of the present application; Figure 2b Truth table of the structure;

[0022] Figure 3a Flow chart of the signal list acquisition of the hardware connection checking method provided by the embodiment of the present application;

[0023] Figure 3b Structure diagram of the signal list of the hardware connection checking method provided by the embodiment of the present application;

[0024] Figure 4 Flow chart of the hardware connection checking tool starting of the hardware connection checking method provided by the embodiment of the present application;

[0025] Figure 5 Flow chart of the file list acquisition of the hardware connection checking method provided by the embodiment of the present application;

[0026] Figure 6a Flow chart of the timing logic connection checking of the hardware connection checking method provided by the embodiment of the present application;

[0027] Figure 6b Another structure diagram of the signal list of the hardware connection checking method provided by the embodiment of the present application;

[0028] Figure 6c Timing diagram of the structure; Figure 2b

[0029] Frame diagram of the hardware connection checking device provided by the embodiment of the present application; Figure 7

[0030] Frame diagram of the signal list acquisition module of the hardware connection checking device provided by the embodiment of the present application. Figure 8 DETAILED DESCRIPTION

[0031] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.​

[0032] For the convenience of understanding, the following first introduces the existing hardware connection checking method using hardware connection checking tools. Please refer to Figure 1a and Figure 1b , Figure 1a is a structural diagram of a part of the chip internal structure; Figure 1b is Figure 1a a structural diagram of the data selector 1 in

[0033] As shown in Figure 1a , the pins inside the chip and module A are connected to the data selector 1 as the starting point of the data selector 1, the data selector 1 is connected to the data selector 2 as the starting point of the data selector 2, and module C is connected to the data selector 2 as the end point of the data selector 2. The data selector 1 and the data selector 2 are controlled by the control module. Of course, the modules such as module A, module B and module C refer to units with certain functions inside the chip, which can be SOC-level chips with certain functions inside the chip (such as IP chips), or logic gates in SOC-level chips or IP chips.

[0034] When the pin receives a signal and needs to transmit the signal to module C, the control module will control the data selector 1 to select the signal received by a1 as the end point signal in a1 and b1, that is, the end point signal y1 of the data selector 1 is the same as a1, and the control module will control the data selector 2 to select the signal received by a2 as the end point signal in a2 (equal to y1) and b2, so as to realize the transmission process from the pin to the data selector 1, from the data selector 1 to the data selector 2, that is, the end point signal y2 of the data selector 1 is the same as a2, and finally from the data selector 2 to module C. The completion of the signal transmission depends on the connection of the pin-data selector 1-data selector 2-module C, which is referred to as connection X for the convenience of description.

[0035] As can be seen from the figure, the connection X includes not only the connection part without logic function, such as the connection part between port c and port b1, but also the connection part with logic function, such as the connection part from port b1 to port y1, which passes through the data selector 1. The data selector 1 has logic function, and its internal structure can be as shown in Figure 1b .

[0036] It is easy to understand that in order to ensure that the signal is transmitted from the pin along the connection X to the module C, the whole connection of the connection X needs to be correct, that is, not only the connection part without logic function in the connection X needs to be connected correctly, but also the logic of the connection part with logic function needs to be correct.

[0037] When using existing hardware connection inspection tools to inspect connection X, only the three non-logical function connection segments—the pin-to-port a1 connection, the port y1-to-port a2 connection, and the port y2-to-port d connection—can be inspected. However, the logical function connection segments—the port a1-to-port y1 connection via data selector 1 and the port a2-to-port d connection via data selector 2—cannot be directly inspected. Therefore, to inspect connection X, it is necessary to combine other methods with the hardware connection inspection tools to inspect the remaining logical function segments after the hardware connection inspection tools have completed their inspection of connection X.

[0038] Of course, the statement that the connection from port a1 to port y1 via data selector 1 and the connection from port a2 to port d via data selector 2, as mentioned above, cannot be directly inspected, does not mean that existing hardware connection inspection tools cannot access the internal components of data selector 1 and data selector 2 for inspection. Non-logical functional parts within these components can also be inspected by hardware connection inspection tools, such as... Figure 1b As shown, inside data selector 1, the hardware wiring inspection tool can further inspect the wiring between port a1 and the AND gate, the wiring between the AND gate and the OR gate, and the wiring between the OR gate and port y1. However, based on the same principle, the wiring between the start and end points of the AND gate and the OR gate, which have logical functions, cannot be inspected by the hardware wiring inspection tool. Since the AND gate and OR gate are the most basic gate-level circuits, they are indivisible. Therefore, the wiring parts with logical functions mentioned above cannot be inspected by the hardware wiring inspection tool. At the same time, in-depth inspection to the gate-level module will also increase the time cost of hardware wiring inspection.

[0039] Therefore, existing hardware connection inspection tools must be combined with other testing methods to achieve a complete inspection of hardware connections with logical functions, resulting in low overall efficiency of hardware connection inspection.

[0040] To address the aforementioned issues, embodiments of this application provide a hardware connectivity inspection method, apparatus, storage medium, and electronic device to achieve more efficient hardware connectivity inspection.

[0041] Please refer to Figure 2a , Figure 2a This is a flowchart of a hardware connectivity inspection method provided in an embodiment of this application.

[0042] like Figure 2a As shown, the hardware connection checking method provided in this application embodiment includes:

[0043] In step S210, a signal list of the circuit to be connected for inspection is obtained.

[0044] Of course, the to-be-wired checking circuit is a target circuit that needs to be wired checked, and is usually an integrated circuit, and specifically can be a SOC-level chip.

[0045] In a computer, the to-be-wired checking circuit is usually represented in the form of an rtl code and a schematic diagram, that is, in the form of a file, and specifically can be represented in the form of a file list, that is, the file list can be regarded as the to-be-wired checking circuit itself, that is, the hardware wired checking of the to-be-wired checking circuit by the hardware wired checking tool, and specifically can be the hardware wired checking of the file list by the hardware wired checking tool.

[0046] When the hardware wired checking tool performs the hardware wired checking on the to-be-wired checking circuit, a signal needs to be given based on the signal list of the to-be-wired checking circuit, and therefore, the signal list of the to-be-wired checking circuit needs to be acquired.

[0047] The signal list is the basis of the hardware wired checking, and contains information of each to-be-checked hardware wire in the to-be-wired checking circuit, including a wire name, a wire start point, a wire end point, and the like. In this application, in order to implement the checking on the to-be-checked hardware wire containing a logical relationship, the information contained in the signal list also needs to include an enabling signal corresponding to the specific to-be-checked hardware wire.

[0048] It should be noted that the enabling signal described in this paper refers to a signal of a start point of other signals that can ensure that the logical relationship between the start point signal of the start point of the to-be-checked hardware wire and the end point signal of the end point of the to-be-checked hardware wire is unique based on the logical circuit passed through by the to-be-checked hardware wire, that is, after the enabling signal is set, the end point signal of the to-be-checked hardware wire is determined only by the start point signal, and when the start point signal changes, the end point signal also changes.

[0049] It is easy to understand that the content in the signal list is provided by the designer of the to-be-wired checking circuit, and for the hardware wired checking, the information that needs to be contained in the signal list provided by the designer of the to-be-wired checking circuit needs to be informed.

[0050] In some embodiments, the format of the signal list provided by the designer of the to-be-wired checking circuit can not be suitable for being acquired and used by the hardware wired checking tool, and therefore, the signal list needs to be processed to obtain a signal list suitable for the hardware wired checking by the hardware wired checking tool. Please refer to Figure 3a and Figure 3b , Figure 3a a flowchart of the signal list acquisition of the hardware wired checking method provided by the embodiments of this application; Figure 3b a schematic diagram of the signal list of the hardware wired checking method provided by the embodiments of this application.

[0051] Of course, in order to distinguish from the signal list suitable for being acquired by the hardware connection checking tool, the signal list provided by the designer of the circuit to be connected and checked is called a source signal list.

[0052] As shown in Figure 3a the hardware connection checking method provided by the embodiments of the present application, the specific steps of acquiring the signal list from the source signal list can include:

[0053] In step S211, the source signal list of the circuit to be connected and checked is acquired.

[0054] Based on the foregoing description, the source signal list is the original signal list provided by the designer of the circuit to be connected and checked, which at least includes the connection starting point, the connection ending point and the enable signal of each hardware connection to be checked of the circuit to be connected and checked, i.e. contains all the information of the signal list.

[0055] Of course, in order to meet the requirements of a specific hardware connection checking tool, the hardware connection to be checked of the circuit to be connected and checked can also include a connection name.

[0056] It is easy to understand that the format of the source signal list can be different based on the designer of the circuit to be connected and checked.

[0057] Of course, based on the foregoing description, the source signal list is not different from the signal list except that it cannot be directly read by the hardware connection checking tool and cannot be used for hardware connection checking, and the reason why the source signal list cannot be acquired by the hardware connection checking tool is usually that it does not have a file format suitable for being acquired by the hardware connection checking tool, and the arrangement of information in the list does not match the configuration of the hardware connection checking tool.

[0058] For example: the hardware connection checking tool needs to acquire the information in the signal list based on each hardware connection to be checked and check the hardware connection to be checked, but the source signal list can represent each hardware connection to be checked in a simplified manner, and the hardware connection to be checked with the same enable signal is represented in a combined manner, thereby causing the hardware connection checking tool to be unable to read.

[0059] In step S212, the connection starting point, the connection ending point and the enable signal of each hardware connection to be checked in the source signal list are processed according to the predetermined signal list format of the hardware connection checking tool, and the signal list meeting the requirements of the predetermined signal list format is obtained.

[0060] The processing refers to converting the file format of the source signal list into a format suitable for being read by the hardware connection checking tool, i.e. the aforementioned predetermined signal list format.

[0061] In some embodiments, the predetermined signal list format can be a CSV format, which is universal and easy to convert, so that the difficulty of conversion can be reduced while ensuring the universality of the converted signal list.

[0062] In other embodiments, for hardware connection checking tools that can read and use excel format or text format, the predetermined signal list format can also be an excel format or a text format.

[0063] Of course, in other embodiments, it can also be converted into a format required by other hardware connection checking tools.

[0064] In this way, the needs of hardware connection checking using hardware connection checking tools can be met while reducing the requirements for the source signal list provided by the designer of the circuit to be checked.

[0065] In a specific embodiment, the signal list can be obtained through a format adjustment script, so that the source file list can be converted into a file list more quickly, the signal list can be obtained more quickly, and the efficiency of hardware connection checking can be improved.

[0066] Of course, the format adjustment script is pre-written, and when the source signal list is obtained, the format of the source signal list can be adjusted through the format adjustment script, so that the signal list that meets the format requirements can be obtained.

[0067] In step S220, through the hardware connection checking tool, according to the connection starting point, the connection ending point and the enable signal of each hardware connection to be checked in the signal list, the starting point signal of the connection starting point and the enable signal of each hardware connection to be checked in the circuit to be checked are set, and the ending point signal corresponding to the connection ending point of the hardware connection to be checked is obtained.

[0068] As mentioned above, the signal list includes the connection starting point, the connection ending point and the enable signal of each hardware connection to be checked, and the enable signal can ensure that the logical relationship between the starting point signal of the connection starting point and the ending point signal of the connection ending point of the hardware connection to be checked is unique.

[0069] For the convenience of understanding the enable signal, please refer to Figure 2b and Figure 2c , Figure 2b is a schematic diagram of a part of the internal structure of a chip; Figure 2c is Figure 2b a truth table of the structure.

[0070] As Figure 2bAs shown, the internal part of the chip structure includes three controllable starting points A_in, B_in and D_in, an ending point E_out, three logic gate circuits, namely AND gate, OR gate and NOT gate. For the convenience of understanding, the ending point C_out of the AND gate is also marked in the internal structure. Of course, C_out cannot be directly controlled by the control module, and its value can only be determined by A_in and B_in.

[0071] If the hardware connection to be checked is A_in to E_out, i.e. the connection of A_in-AND gate-C_out-OR gate-E_out (hereinafter referred to as hardware connection to be checked 1), the A_in-AND gate-C_out connection part and the C_out-OR gate-E_out connection part pass through the logic AND gate and the logic OR gate respectively, which belong to the connection part with logic function, wherein the logic AND gate and the logic OR gate are both logic function modules. The starting point signal of the logic AND gate is A_in, the ending point signal is C_out, the starting point signal of the logic OR gate is C_out, and the ending point signal is E_out. The ending point signal of the hardware connection to be checked 1 is affected, but it is not the starting point signal of the hardware connection to be checked 1. The signal includes B_in && D_in.

[0072] According to the truth table as shown in Figure 2c When the logic relationship signal is B_in and D_in both being 1, E_out is uniquely determined by A_in, so that the enable signal is (B_in && D_in), i.e. when (B_in && D_in) = 1 is satisfied, the ending point signal E_out of the hardware connection to be checked 1 is uniquely determined by the starting point signal A_in, which maintains the logic uniqueness. Therefore, the hardware connection to be checked 1 as a whole does not have logic function, and can be directly checked by the hardware connection checking tool.

[0073] Of course, (B_in && D_in) = 1 as the enable signal is based on the need to be set in the signal list in advance. When the hardware connection is checked, only the enable signal corresponding to the hardware connection to be checked is obtained from the signal list and set.

[0074] Specifically, when the hardware connection is checked, the hardware connection checking tool reads Figure 2bThe hardware connection 1 to be checked in the signal list of the circuit to be checked is shown in the structure. According to the connection starting point A_in, the connection end point E_out and the enable signal (B_in&&D_in) recorded in the instance of the connection 1, the enable signal (B_in&&D_in) and the starting point signal of the connection starting point A_in of the hardware connection 1 to be checked in the connection to be checked circuit are set, and the end point signal corresponding to the connection end point of the hardware connection is obtained, that is, A_in is set to 1 and 0 respectively when B_in and D_in satisfy the enable signal (B_in&&D_in), and the corresponding value of E_out is obtained.

[0075] It is easy to understand that when the hardware connection checking tool is used to check the connection 1, if the logic function modules and the AND gate, OR gate and NOT gate fail to cause logic function errors, or the connection errors between them cause overall logic function errors, or the control modules of the connection starting points A_in, B_in and D_in have errors that cannot control the functions, etc. Connection faults will cause the logic of the end point signal and the starting point signal to be inconsistent, that is, not to satisfy the truth table Figure 2c The 1-1 and 0-0 relationship shown is thus checked by the hardware connection checking tool.

[0076] Of course, the logic is not only that the end point signal is the same as the end point signal, that is, 1-1 and 0-0, but also 1-0 and 0-1, as long as the end point signal is uniquely determined by the starting point signal. It is easy to understand that the unique determination does not include the case that multiple values of the starting point signal correspond to one value of the end point signal.

[0077] There are usually a large number of hardware connections to be checked in the signal list, and the hardware connection checking tool checks the next hardware connection to be checked after checking each hardware connection to be checked, until all hardware connections to be checked are checked. If the checking results of all instances are correct, the checking is passed, and the hardware connection checking of the connection to be checked circuit is completed.

[0078] Of course, if a hardware connection to be checked is found to be incorrect, that is, not passed, the connection name of the error hardware connection to be checked is obtained, that is, the instance name recorded in the signal list, and then the next instance is obtained, and the next hardware connection to be checked is checked until all hardware connections to be checked are checked. The connection names of all hardware connections to be checked that are not passed are returned.

[0079] In this way, the checking result can be returned to the user (such as the designer of the connection checking circuit), so that the designer of the connection checking circuit can take the next step according to the checking result, such as finding the error reason and adjusting.

[0080] It can be seen that the hardware connection checking method provided by the embodiment of the application changes the logic of the hardware connection to be checked with a logic function by using an enable signal, makes the start point signal of the start point of the connection and the end point signal of the end point of the connection logically unique, and realizes checking of the hardware connection with a logic function by using a hardware connection checking tool, so that not only the hardware connection with a logic function can be checked, but also fast checking can be realized, and the hardware connection checking efficiency is improved.

[0081] Of course, in order to further simplify the process of hardware connection checking, the starting of the hardware connection checking tool can also be simplified, and the embodiment of the application further provides a hardware connection checking method, which is specifically described with reference to Figure 4 , Figure 4 A flowchart of the starting of the hardware connection checking tool of the hardware connection checking method provided by the embodiment of the application.

[0082] As shown in Figure 4 , the starting steps of the hardware connection checking tool of the hardware connection checking method provided by the embodiment of the application can include:

[0083] In step S310, a first tool starting script is run, the version of the hardware connection checking tool is selected through the first tool starting script, and the hardware connection checking tool and a second tool starting script are started.

[0084] It is easy to understand that even the same tool provided by the same company will have different versions released in different periods, and the differences between different versions will affect the automatic processing of the script, so it is necessary to first select the version through the first tool starting script and start the hardware connection checking tool of the corresponding version.

[0085] In order to simplify the operation process, the first tool starting script can include a second tool starting script for selecting the working mode of the hardware connection checking tool, so that the starting of the second tool starting script can also be realized at the same time by only running the first tool starting script.

[0086] In step S320, the working mode of the hardware connection checking tool is selected through the second tool starting script.

[0087] Of course, the hardware connection checking tool has different working modes, and taking the VC Formal tool as an example, only the CC mode can perform hardware connection checking, and the selection of the working mode of the hardware connection checking tool can be directly realized through the second tool starting script without too much operation.

[0088] In this way, by writing the steps of selecting a version of the hardware connection checking tool and starting the hardware connection checking tool and the step of selecting a working mode of the started hardware connection checking tool into two scripts, i.e., a first tool starting script and a second tool starting script, and writing a second tool starting script command of starting the second tool starting script in the first tool starting script, the automatic starting script is realized, and meanwhile, the script logic is clear, which is beneficial to the subsequent nesting or modification of the script.

[0089] Of course, in another specific embodiment, the functions of selecting a version of the hardware connection checking tool and selecting a working mode of the hardware connection checking tool can be realized by one script.

[0090] Of course, in another specific embodiment, in order to improve the convenience of the hardware connection checking, the following can also be included:

[0091] In step S330, the hardware connection checking tool is configured to correspond to the entries of the signal list by the second tool starting script.

[0092] It is easy to understand that before the hardware connection checking by the hardware connection checking tool, the hardware connection checking tool needs to be configured to correspond to the entries of the signal list, so that the hardware connection checking tool can read the information of the signal list and perform the hardware connection checking according to the information.

[0093] The entries of the signal list, as shown in Figure 3b include a to-be-checked connection name, an enabling signal, a connection starting point and a connection ending point, and therefore, the configuration of the hardware connection checking tool includes the connection name, the connection starting point, the connection ending point and the enabling signal of the to-be-checked hardware connection and other information.

[0094] Of course, the configuration of the hardware connection checking tool is written in the second tool starting script in advance, and the adjustment of the source signal list is also written in the format adjustment script in advance, and therefore, the configuration of the hardware connection checking tool to correspond to the entries of the signal list by the second tool starting script is realized by directly writing the configuration command of the tool and the format adjustment command of the signal list as a corresponding relationship when the second tool starting script and the format adjustment script are written.

[0095] For the convenience of understanding, taking the VC Formal tool as an example, the VC Formal tool needs to be configured as follows:

[0096]

[0097] In this way, the tool configuration command for configuring the tool written in the second tool startup script can configure the hardware connection checking tool while selecting the working mode, thereby reducing the labor cost and improving the efficiency of the hardware connection checking.

[0098] In addition to the foregoing functions realized by the script, in another specific embodiment, more functions can be realized by the script, thereby improving the convenience of the hardware connection checking.

[0099] Specifically, the hardware connection checking tool startup step of the hardware connection checking method provided by the embodiment of the application can further include:

[0100] In step S340, the file list and the signal list of the circuit to be connected for checking are imported by the second tool startup script.

[0101] Of course, the file list and the signal list are suitable for being read and used by the hardware connection checking tool.

[0102] In this way, the file import command for importing the file list and the signal list of the circuit to be connected for checking written in the second tool startup script can import the file list and the signal list suitable for being read and used by the hardware connection checking tool after the mode of the hardware connection checking is selected and configured, thereby realizing that the hardware connection checking of the circuit by the hardware connection checking tool can be automatically realized as long as the first tool startup script is started, and the hardware connection checking is more convenient.

[0103] In one specific embodiment, in order to ensure that the file list of the circuit to be checked is suitable for being read by the hardware connection checking tool, the embodiment of the application further provides a hardware connection checking method, and details are described with reference to Figure 5 , Figure 5 A flowchart of the file list acquisition step of the hardware connection checking method provided by the embodiment of the application.

[0104] As shown in Figure 5 , the file list acquisition step of the hardware connection checking method provided by the embodiment of the application includes:

[0105] In step S410, the source file list of the circuit to be connected for checking is acquired.

[0106] The source signal list is the original file list provided by the designer of the circuit to be connected for checking. The format of the source file list can be different based on the designer of the circuit to be connected for checking. The source file list usually has header information.

[0107] In step S420, the source file list is processed to obtain the file list readable by the hardware connection checking tool.

[0108] Specifically, some characters in the source file list can be removed to process the source file list and obtain the file list.

[0109] After obtaining the file list and the signal list readable by the hardware connection checking tool, the second tool can be used to start a script to import the hardware connection checking tool.

[0110] Of course, in other embodiments, after obtaining the file list and the signal list readable by the hardware connection checking tool, the file list and the signal list can be imported into the hardware connection checking tool in other ways to perform hardware connection checking.

[0111] It is easy to understand that when performing hardware connection checking, the file list is equivalent to a circuit to be connected and checked.

[0112] To facilitate the import of the file list, please refer to Figure 5 In a specific embodiment, the file list acquisition step of the hardware connection checking method provided by the embodiment of the application can further include:

[0113] In step S430, the obtained file list is placed in a designated directory suitable for the import and identification of the hardware connection checking tool.

[0114] By placing the file list in a designated directory suitable for the import and identification of the hardware connection checking tool, script automation can be further facilitated, for example, the file list is imported by the second tool starting script, thereby improving the efficiency of hardware connection checking.

[0115] However, the hardware connection to be checked with a logic function can also have a timing relationship, that is, the logic function unit is a timing logic circuit, in which case the connection checking needs to check not only whether the end point signal of the connection is logically unique with the start point signal, but also whether it meets the timing requirements. Therefore, the embodiment of the application also provides a hardware connection checking method, please refer to Figure 6a 、 Figure 6b and Figure 6c , Figure 6a a flowchart of the timing logic connection checking of the hardware connection checking method provided by the embodiment of the application; Figure 6b another schematic diagram of the signal list of the hardware connection checking method provided by the embodiment of the application; Figure 6c a timing diagram of Figure 2b the structure.

[0116] As Figure 6a shown, the steps of the timing logic connection checking of the hardware connection checking method provided by the embodiment of the application include:

[0117] In step S510, a signal list of the to-be-connected checking circuit is acquired.

[0118] The step of acquiring the signal list of the to-be-connected checking circuit is specifically described in the foregoing description of step S210. Of course, in the signal list acquired in step S510, not only the connection starting point, the connection ending point and the enable signal, but also the enable signal holding period and the clock period are included. The specific contents are shown in Figure 6b

[0119] The enable signal holding period indicates how many clock periods the hardware connection checking tool needs to control the enable signal to be held, and the clock period indicates how many clock periods the connection starting point needs to send the starting point signal and then obtain the ending point signal at the connection ending point.

[0120] In step S520, according to the connection starting point, the connection ending point, the enable signal, the enable signal holding period and the clock period of each to-be-checked hardware connection in the signal list, the hardware connection checking tool sets the enable signal and the starting point signal of the connection starting point of each to-be-checked hardware connection in the connection checking circuit, and acquires the receiving clock period of the ending point signal corresponding to the connection ending point of the to-be-checked hardware connection.

[0121] The specific steps of acquiring the ending point signal corresponding to the connection ending point of the to-be-checked hardware connection are described in the foregoing description of step S220. It is easy to understand that, in some embodiments, the hardware connection checking tool needs to be configured before the hardware connection checking is performed by using the hardware connection checking tool. The specific steps are described in the foregoing description of step S330. Of course, in order to correspond to the signal list, the configuration of the hardware connection checking tool also includes the enable signal holding period and the clock period.

[0122] Of course, in step S520, in addition to the ending point signal, the receiving clock period of the ending point signal, i.e., the clock period at the time of receiving, is also acquired.

[0123] For ease of understanding, the hardware connection checking of the to-be-checked hardware connection 1 is taken as an example for further description. It is assumed that the to-be-checked hardware connection 1 has a timing relationship, as shown in Figure 6b The clock period from the generation of the starting point signal of the connection starting point A_in to the reception of the ending point signal of the connection ending point E_out is 4, and the clock period that the enable signal (B_in&&D_in) needs to hold is 4.

[0124] The timing diagram obtained by the hardware connection checking tool after checking the to-be-checked hardware connection 1 is shown in Figure 6c ​As shown in the figure, the potential is changed at the rising edge of each clock cycle, and the high level is logic 1 and the low level is logic 0. Then the start signal logic 1 is generated at the start point A_in of the clock 1 line, and the logic 1 is simultaneously generated at B_in and D_in to satisfy the enable signal (B_in && D_in) = 1. The logic 1 generated at A_in is received by the AND gate, and the logic 1 generated at B_in is received by the OR gate. At the clock 2, the AND gate receives the logic 1 of A_in and B_in at the clock 1, and thus the logic 1 end point is generated at C_out, and the OR gate receives the logic 1 of C_out, and A_in and B_in end to be logic 0 again because they have completed the task of generating the logic 1 end point at C_out. At the clock 3 and the clock 4, no level change occurs. At the clock 5, the OR gate generates the logic 1, and E_out becomes the high level logic 1. At the same time, D_in and C_out end to be logic 0 again because they have completed the task of generating the logic 1 end point at E_out.

[0125] Therefore, the hardware connection checking tool enables the information that the signal list enables the signal to keep for 4 clock cycles, controls D_in to keep for 4 clock cycles, controls B_in to keep for 3 clock cycles to generate C_out at the second clock cycle, and finally obtains the E_out end point signal at the fifth clock cycle. From the start point signal A_in generated at the first clock cycle to the end point signal E_out received at the fifth clock cycle, a total of 4 clock cycles are passed, and thus the receiving clock cycle is 4, which is consistent with the clock cycle of the signal list, and thus the timing relationship of the connection 1 is correct.

[0126] The timing relationship in the above example is a multi-tap timing relationship, that is, the OR gate generates the end point signal E_out after 3 clock cycles after receiving all the start point signals. It is easy to understand that the hardware connection checking method provided in the embodiment of the present application can also check the single-tap timing relationship.

[0127] It can be seen that the hardware connection checking method provided in the embodiment of the present application can obtain the receiving clock cycle of the end point signal of the end point of the hardware connection to be checked.

[0128] In this way, the hardware connection checking method provided in the embodiment of the present application can not only check the hardware connection to be checked through the combinational logic circuit, but also check the hardware connection to be checked through the sequential logic circuit, further expanding the range of hardware connection checking. When checking the hardware connection with both logic function and timing relationship in the integrated circuit, not only the hardware connection with logic function can be checked, but also the fast checking can be realized, and the hardware connection checking efficiency can be improved.

[0129] In step S530, it is judged whether the end point signal and the start point signal are the same, if the same, step S540 is executed, if different, step S560 is executed.

[0130] In step S540, it is judged whether the acceptance clock signal and the clock period are the same, if the same, step S550 is executed, if different, step S560 is executed.

[0131] After obtaining the acceptance clock period of the end point signal of the end point of the hardware to be checked, further comparison is made to judge whether the end point signal and the start point signal are the same, and whether the acceptance clock signal and the clock period are the same.

[0132] Of course, when there is no timing relationship of the hardware to be checked, it is only needed to judge whether the end point signal and the start point signal are the same.

[0133] In step S550, each of the hardware to be checked of the hardware to be checked checking circuit is checked.

[0134] It is easily understood that there are usually a large number of hardware to be checked in the signal list, and the hardware to be checked checking tool reads the next hardware to be checked after checking each hardware to be checked, until all instances are checked, i.e. all hardware to be checked are checked. If the checking results of all instances are correct, the checking is passed.

[0135] In step S560, the connection name corresponding to the hardware to be checked is obtained.

[0136] Of course, if a hardware to be checked is checked to be wrong, i.e. not passed, the connection name of the wrong hardware to be checked is obtained, and then the next hardware to be checked is obtained and checked, until all hardware to be checked are checked, and the connection names of all hardware to be checked not passed are returned.

[0137] In some embodiments, the returned connection name can further include the error name.

[0138] In this way, the checking result can be returned to the user, so that the user can take the next step according to the checking result.

[0139] The above describes the multiple embodiment schemes provided by the embodiments of the present application, and each optional mode introduced by each embodiment scheme can be combined, cross-referenced in the case of no conflict, thereby extending multiple possible embodiment schemes, which can be considered as the embodiment schemes disclosed and disclosed by the embodiments of the present application.

[0140] The embodiment of the present application further provides a hardware connection checking device which can be considered as a functional module required to be set to implement the hardware connection checking method provided by the embodiment of the present application. The device content described herein corresponds to the method content described above.

[0141] Please refer to Figure 7 and Figure 8 , Figure 7 the framework diagram of the hardware connection checking device provided by the embodiment of the present application; Figure 8 the framework diagram of the signal list obtaining module of the hardware connection checking device provided by the embodiment of the present application. The hardware connection checking device is applicable to the hardware connection checking method provided by the embodiment of the present application, as shown in Figure 7 the hardware connection checking device comprises:

[0142] a signal list obtaining module 110 adapted to obtain a signal list of a circuit to be connected and checked;

[0143] a hardware connection checking module 120 adapted to set, by a hardware connection checking tool, an enable signal of each hardware connection to be checked and a start point signal of a start point of the hardware connection to be checked according to a connection start point, a connection end point and the enable signal of each hardware connection to be checked in the signal list of the circuit to be connected and checked, and obtain an end point signal corresponding to the connection end point of the hardware connection to be checked.

[0144] It can be seen that the hardware connection checking device provided by the embodiment of the present application makes the start point signal of the connection start point and the end point signal of the connection end point consistent by the enable signal, converts the hardware connection to be checked having a logic function into a hardware connection to be checked having no logic function, implements the checking of the hardware connection having the logic function by using the hardware connection checking tool, and thus quickly implements the checking of the connection having the logic function, thereby improving the hardware connection checking efficiency.

[0145] In a specific embodiment, as shown in Figure 8 the signal list obtaining module 110 comprises:

[0146] a source signal list obtaining unit 111 adapted to obtain a source signal list of the circuit to be connected and checked;

[0147] a signal list format converting unit 112 adapted to process the connection start point, the connection end point and the enable signal of each hardware connection to be checked in the source signal list according to a predetermined signal list format of the hardware connection checking tool, and obtain the signal list meeting the requirement of the predetermined signal list format.

[0148] In a specific embodiment, the predetermined signal list format comprises a csv format, an excel format or a text format.

[0149] In an embodiment, the signal list is obtained by a format adjustment script.

[0150] In an embodiment, the hardware connection checking tool is started by a hardware connection checking tool starting module 130, which is adapted to:

[0151] run a first tool starting script, by which a version of the hardware connection checking tool is selected, and start the hardware connection checking tool and a second tool starting script;

[0152] select a working mode of the hardware connection checking tool by the second tool starting script.

[0153] In an embodiment, the hardware connection checking tool starting module 130 is further adapted to:

[0154] configure the hardware connection checking tool to correspond to entries of the signal list by the second tool starting script.

[0155] In an embodiment, the hardware connection checking tool starting module 130 is further adapted to:

[0156] import a file list of the circuit to be connected and checked and the signal list by the second tool starting script.

[0157] In an embodiment, the file list is obtained by a file list obtaining module 140, which is adapted to:

[0158] obtain a source file list of the circuit to be connected and checked;

[0159] process the source file list to obtain the file list which is readable by the hardware connection checking tool.

[0160] In an embodiment, the file list obtaining module 140 is further adapted to:

[0161] put the obtained file list into a designated directory which is suitable for import and recognition by the hardware connection checking tool.

[0162] In an embodiment, the hardware connection checking module 120 is adapted to set, by the hardware connection checking tool, the enable signal of each of the hardware connections to be checked and the start signal of the start point of the hardware connection to be checked in the circuit to be connected and checked according to the start point, the end point and the enable signal of each of the hardware connections to be checked in the signal list, obtain the end signal corresponding to the end point of the hardware connection to be checked, comprising:

[0163] The hardware connection checking tool sets the enable signal and the start point signal of the start point of each to-be-checked hardware connection in the to-be-connected checking circuit according to the connection start point, the connection end point, the enable signal, the enable signal holding period and the clock period of each to-be-checked hardware connection of the signal list, and obtains the end point signal corresponding to the connection end point of the to-be-checked hardware connection and the receiving clock period of the end point signal.

[0164] In an embodiment, the method further comprises:

[0165] The hardware connection checking feedback module 150 is adapted to obtain the connection name of the to-be-checked hardware connection when the end point signal is different from the start point signal or the receiving clock signal is different from the clock period.

[0166] In an embodiment, the hardware connection checking feedback module 150 is further adapted to check the to-be-checked hardware connection of the to-be-connected checking circuit when the end point signal of each to-be-checked hardware connection is the same as the start point signal and the receiving clock signal is the same as the clock period.

[0167] The embodiment of the application further provides a storage medium, which has a program suitable for hardware connection checking, so as to implement the hardware connection checking method of any embodiment of the application.

[0168] It can be seen that the storage medium provided by the embodiment of the application changes the logic of the to-be-checked hardware connection with logic function by using the enable signal, makes the start point signal of the connection start point and the end point signal of the connection end point logically unique, implements the checking of the hardware connection with logic function using the hardware connection checking tool, and thus can not only implement the checking of the hardware connection with logic function, but also can implement fast checking and improve the hardware connection checking efficiency.

[0169] The embodiment of the application further provides an electronic device, which comprises at least one memory and at least one processor; the memory stores a program, and the processor invokes the program to execute the hardware connection checking method of any embodiment of the application.

[0170] It can be seen that the electronic device provided by the embodiment of the application changes the logic of the to-be-checked hardware connection with logic function by using the enable signal, makes the start point signal of the connection start point and the end point signal of the connection end point logically unique, implements the checking of the hardware connection with logic function using the hardware connection checking tool, and thus can not only implement the checking of the hardware connection with logic function, but also can implement fast checking and improve the hardware connection checking efficiency.

[0171] Although the present application discloses the above-mentioned embodiments, the present application is not limited to this. Any person skilled in the art, without departing from the spirit and scope of the present application, can make various changes and modifications, therefore the protection scope of the present application should be limited by the scope defined in the claims.

Claims

1. A hardware wiring check method, characterized by, The application relates to a method for checking hardware connection, and comprises the following steps: acquiring a signal list of a to-be-connected checking circuit, wherein the signal list comprises a connection starting point, a connection ending point and an enabling signal of each to-be-checked hardware connection; setting, by a hardware connection checking tool, the enabling signal and the starting point signal of the connection starting point of each to-be-checked hardware connection in the to-be-connected checking circuit according to the connection starting point, the connection ending point and the enabling signal of each to-be-checked hardware connection in the signal list, and acquiring the ending point signal corresponding to the connection ending point of the to-be-checked hardware connection, wherein the enabling signal can ensure that the logical relationship between the starting point signal of the connection starting point and the ending point signal of the connection ending point of the to-be-checked hardware connection is unique, so that the hardware connection checking tool can be used to check the hardware connection with a logical function.

2. The hardware-wiring checking method of claim 1, wherein, The step of acquiring the signal list of the to-be-connected checking circuit comprises the following steps: acquiring a source signal list of the to-be-connected checking circuit; processing the connection starting point, the connection ending point and the enabling signal of each to-be-checked hardware connection in the source signal list according to a predetermined signal list format of the hardware connection checking tool, so as to obtain the signal list meeting the requirement of the predetermined signal list format.

3. The hardware-wiring checking method of claim 2, wherein, The predetermined signal list format comprises a csv format, an excel format or a text format.

4. The hardware-wiring checking method of claim 1, wherein, The signal list is acquired by a format adjustment script.

5. The hardware-wiring checking method of claim 1, wherein, The starting step of the hardware connection checking tool comprises the following steps: running a first tool starting script, selecting the version of the hardware connection checking tool by the first tool starting script, starting the hardware connection checking tool and a second tool starting script by the first tool starting script; selecting the working mode of the hardware connection checking tool by the second tool starting script.

6. The hardware-wiring checking method of claim 5, wherein, The starting step of the hardware connection checking tool further comprises the following steps: configuring the hardware connection checking tool to correspond to the table entry of the signal list by the second tool starting script.

7. The hardware-wiring checking method of claim 6, wherein, The starting step of the hardware connection checking tool further comprises the following steps: importing the file list and the signal list of the to-be-connected checking circuit by the second tool starting script.

8. The hardware-wiring checking method of claim 7, wherein, The acquiring step of the file list comprises the following steps: acquiring a source file list of the to-be-connected checking circuit; processing the source file list, so as to obtain the file list readable by the hardware connection checking tool.

9. The hardware-wiring checking method of claim 8, wherein, The acquiring step of the file list further comprises the following steps: putting the obtained file list into a specified directory suitable for the hardware connection checking tool to import and identify.

10. The hardware-wiring checking method of claim 1, wherein, The step of setting, by the hardware connection checking tool, the enabling signal and the starting point signal of the connection starting point of each to-be-checked hardware connection in the to-be-connected checking circuit according to the connection starting point, the connection ending point and the enabling signal of each to-be-checked hardware connection in the signal list, and acquiring the ending point signal corresponding to the connection ending point of the to-be-checked hardware connection comprises the following steps: The hardware connection checking tool sets the enable signal of each to-be-checked hardware connection and the start point signal of the connection start point of each to-be-checked hardware connection in the to-be-connected checking circuit according to the connection start point, the connection end point, the enable signal, the enable signal holding period and the clock period of each to-be-checked hardware connection of the signal list, and obtains the end point signal corresponding to the connection end point of the to-be-checked hardware connection and the receiving clock period of the end point signal.

11. The hardware-wiring checking method of claim 10, wherein, Also comprising: When the end point signal is different from the start point signal or the receiving clock signal is different from the clock period, the connection name of the corresponding to-be-checked hardware connection is obtained.

12. The hardware-wiring checking method of claim 11, wherein, Also comprising: When the end point signal of each to-be-checked hardware connection is the same as the start point signal and the receiving clock signal is the same as the clock period, each to-be-checked hardware connection of the to-be-connected checking circuit is checked through.

13. A hardware wiring check apparatus, characterized by comprising: Comprising: A signal list obtaining module is adapted to obtain a signal list of a to-be-connected checking circuit, and the signal list includes the connection start point, the connection end point and the enable signal of each to-be-checked hardware connection; A hardware connection checking module is adapted to set the enable signal of each to-be-checked hardware connection and the start point signal of the connection start point of each to-be-checked hardware connection in the to-be-connected checking circuit according to the connection start point, the connection end point and the enable signal of each to-be-checked hardware connection of the signal list through a hardware connection checking tool, and obtain the end point signal corresponding to the connection end point of the to-be-checked hardware connection, wherein the enable signal can ensure that the logical relationship between the start point signal of the connection start point and the end point signal of the connection end point of the to-be-checked hardware connection is unique, and the hardware connection checking tool is used to check the hardware connection with a logical function.

14. The hardware-wired check device of claim 13, wherein, The signal list obtaining module comprises: A source signal list obtaining unit is adapted to obtain a source signal list of the to-be-connected checking circuit; A signal list format conversion unit is adapted to process the connection start point, the connection end point and the enable signal of each to-be-checked hardware connection in the source signal list according to a predetermined signal list format of the hardware connection checking tool, and obtain the signal list meeting the requirement of the predetermined signal list format.

15. The hardware-wired check device of claim 14, wherein, The predetermined signal list format comprises a csv format, an excel format or a text format.

16. The hardware-wired check device of claim 13, wherein, The signal list is obtained through a format adjustment script.

17. The hardware-wired check device of claim 13, wherein, The hardware connection checking tool is started through a hardware connection checking tool starting module, and the hardware connection checking tool starting module is adapted to: Run a first tool starting script, select the version of the hardware connection checking tool through the first tool starting script, start the hardware connection checking tool and a second tool starting script, and select the working mode of the hardware connection checking tool through the second tool starting script. The hardware connection checking tool starting module is further adapted to:

18. The hardware-wired check device of claim 17, wherein, Configure the hardware connection checking tool to correspond to the table entry of the signal list through the second tool starting script. The hardware connection checking tool starting module is further adapted to:

19. The hardware-wired check device of claim 18, wherein, Import the file list and the signal list of the to-be-connected checking circuit through the second tool starting script. ​ 20. The hardware-wired check device of claim 19, wherein, The file list is obtained by a file list obtaining module, which is adapted to: obtain a source file list of the to-be-wired checking circuit; process the source file list to obtain the file list readable by the hardware wiring checking tool.

21. The hardware-wired check device of claim 20, wherein, The file list obtaining module is further adapted to: put the obtained file list into a specified directory suitable for import and recognition by the hardware wiring checking tool.

22. The hardware-wired check device of claim 13, wherein, The hardware wiring checking module is adapted to set, by the hardware wiring checking tool, the enable signal of each to-be-checked hardware wiring and the start point signal of the start point of the to-be-checked hardware wiring in the to-be-wired checking circuit according to the wiring start point, the wiring end point and the enable signal of each to-be-checked hardware wiring in the signal list, obtain the end point signal corresponding to the wiring end point of the to-be-checked hardware wiring, and include: setting, by the hardware wiring checking tool, the enable signal of each to-be-checked hardware wiring and the start point signal of the start point of the to-be-checked hardware wiring in the to-be-wired checking circuit according to the wiring start point, the wiring end point, the enable signal, the enable signal holding period and the clock period of each to-be-checked hardware wiring in the signal list, obtaining the end point signal corresponding to the wiring end point of the to-be-checked hardware wiring and the receiving clock period of the end point signal.

23. The hardware-wired check device of claim 22, wherein, Further comprising: a hardware wiring checking feedback module adapted to obtain the wiring name of the to-be-checked hardware wiring corresponding when the end point signal is different from the start point signal or the receiving clock signal is different from the clock period.

24. The hardware-wired check device of claim 23, wherein, The hardware wiring checking feedback module is further adapted to check each to-be-checked hardware wiring of the to-be-wired checking circuit when the end point signal of each to-be-checked hardware wiring is the same as the start point signal and the receiving clock signal is the same as the clock period.

25. A storage medium, characterized by The storage medium has a program suitable for hardware wiring checking, to realize the hardware wiring checking method of any one of claims 1-12.

26. An electronic device, comprising: The storage medium has a program suitable for hardware wiring checking, to realize the hardware wiring checking method of any one of claims 1-12. The storage medium has a program suitable for hardware wiring checking, to realize the hardware wiring checking method of any one of claims 1-12.

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