Trench-Filled Super-Junction Power Device and Process Method

Abstract

The present invention discloses a process method for a trench-filled superjunction power device. Its drift region is formed by a trench process, forming a superjunction structure with the epitaxial layer around the trench. The cross-sectional structure of the trench-type drift region is an inverted trapezoid structure, with its upper end having a larger lateral width than the lower end, enabling the drift region in the shallow surface layer to have the largest possible impurity concentration, which is more conducive to the full depletion of the drift region in the shallow surface layer in the superjunction structure and can reduce the on-resistance. The present invention also discloses the process method for the power device, which uses existing trench etching and filling processes, reducing the process difficulty and achieving better device performance.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor device design and manufacturing, and specifically refers to a trench-filled superjunction power device.

[0002] The present invention also relates to a manufacturing process method for the above device. Background Art

[0003] The superjunction power device is a new type of power semiconductor device that has developed rapidly and is widely used. It is based on the double-diffused metal oxide semiconductor (DMOS). By introducing a superjunction structure, in addition to having the characteristics of high input impedance, fast switching speed, high operating frequency, good thermal stability, simple drive circuit, and easy integration of DMOS, it also overcomes the disadvantage that the on-resistance of DMOS increases with the breakdown voltage to the power of 2.5. Currently, superjunction DMOS has been widely used in power supplies or adapters for consumer electronic products such as personal computers, laptops, netbooks, mobile phones, lighting (high-pressure gas discharge lamps), and televisions (liquid crystal or plasma televisions) and game consoles.

[0004] The superjunction device adopts a new breakdown voltage layer structure, that is, a series of alternately arranged P-type and N-type semiconductor thin layers are used to deplete the P-type and N-type regions composed of P-type and N-type semiconductor thin layers (pillar regions) at a lower voltage in the off state, realizing charge mutual compensation. By combining the superjunction device with the well-known VDMOS process in the industry, a MOSFET with a superjunction structure can be fabricated. It can significantly reduce the on-resistance of the device by using a low-resistivity epitaxial layer while the reverse breakdown voltage is the same as that of the traditional VDMOS. The carrier distribution of P-type impurities and N-type impurities in this thin layer and their matching will affect the device characteristics, including its reverse breakdown voltage and current handling ability. In general device designs, the best charge balance is achieved in the alternating P / N thin layers, that is, the P-type thin layer and the N-type thin layer, to obtain the maximum reverse breakdown voltage of the device. Therefore, the superjunction device is a MOSFET structure that uses the in-body Resurf technology of PN charge balance to increase the device's reverse breakdown voltage BV while maintaining a small on-resistance. The Resurf principle utilizes the two-dimensional effect of the electric field distribution in the device. When the electric field near the P-substrate / N-epitaxial junction in the vertical direction has not reached the critical electric field, due to its interaction with the lateral N-epitaxial / P-well junction, that is, by using the interaction between the lateral junction and the vertical junction, the epitaxial layer is completely depleted before the lateral junction reaches the critical avalanche breakdown electric field. By reasonably optimizing the device parameters, the breakdown of the device occurs at the vertical junction, thus playing a role in reducing the surface electric field.

[0005] There are mainly two superjunction formation processes for superjunction devices: one is the epitaxial process, which forms P pillars (P-Pillars) on an N-type epitaxial substrate by means of multiple epitaxies and implantations; the other is the trench filling type, in which a uniformly doped drift region layer is first grown on a low-resistance substrate, then multiple parallel trenches are etched, and then P-type epitaxial material is filled in the parallel trenches to form an alternating P, N, P, N structure.

[0006] Compared with the process of multiple epitaxies plus multiple ion implantations, the trench filling type superjunction manufacturing process is a very efficient and low-cost manufacturing method.

[0007] The characteristics of the trench etching process and the requirements of trench filling determine that the morphology of the trench is an inverted trapezoid shape with a large opening and a small bottom, which is more conducive to trench filling.

[0008] The inverted trapezoid P pillar morphology determines that the drift region and the P pillar are more difficult to deplete towards the device surface. However, in the DMOS device with a superjunction structure, the drift region and the P pillar are originally a lateral abrupt junction, and the lateral potential difference between the drift region and the P pillar from the bottom to the surface gradually decreases. In the case of uniform doping in the drift region, it is desired that the lateral width of the P pillar on the surface is smaller than the lateral width of the P pillar at the bottom, which is most conducive to the full depletion of the drift region and the P pillar and realizes the maximization of the doping concentration in the drift region. However, the expected morphology of the inverted trapezoid P pillar is exactly opposite to the requirements of trench filling, which is not conducive to improving the performance of the superjunction. Summary of the Invention

[0009] The technical problem to be solved by the present invention is to provide a trench filling type superjunction power device to form a superjunction structure with ideal effects.

[0010] Another technical problem to be solved by the present invention is to provide a process method for the trench filling type superjunction power device.

[0011] To solve the above problems, the process method of the trench filling type superjunction power device of the present invention includes the following process steps:

[0012] Step 1: Provide a semiconductor substrate of a second conductivity type, perform ion implantation of the second conductivity type on the semiconductor substrate to form a drift region, and then form an epitaxial layer of a first conductivity type on the semiconductor substrate;

[0013] Step 2: Etch in the epitaxial layer to form a first trench, and then fill the formed first trench with an epitaxial material of the second conductivity type;

[0014] Step 3: Perform ion implantation of the first conductivity type in the epitaxial layer to form the body region of the power device;

[0015] Step 4: Etch at the center above the first trench to form a second trench; the second trench forms the gate of the power device; form a gate dielectric layer in the second trench; then fill with polysilicon of the second conductivity type and polish or etch back to the silicon surface to form the trench gate of the power device.

[0016] Step 5: Define the implantation region of the source region by lithography, and perform ion implantation of the second conductivity type on both sides of the second trench to form the source region of the power device.

[0017] Step 6: Define the body region extraction region by lithography and etching, and perform ion implantation of the first conductivity type to form the body region extraction region.

[0018] Further, in Step 1, the semiconductor substrate is a heavily doped substrate, and the drift region and the epitaxial layer are both lightly doped regions; the semiconductor substrate is a silicon substrate, a silicon-germanium substrate, or a gallium arsenide substrate.

[0019] Further, in Step 2, the first trench is a trench with an inverted trapezoidal cross-sectional structure, that is, the upper lateral opening of the trench is larger than the bottom lateral width, and the side walls of the trench are in a gradually inwardly converging inclined shape; fill the first trench with a lightly doped epitaxial material of the second conductivity type to form an integral body with the drift region at the bottom of the first trench to form the overall drift region of the power device.

[0020] Further, in Step 3, perform lightly doped ion implantation of the first conductivity type in the epitaxial layer to form the body region of the power device; during the ion implantation process, the upper part of the epitaxial material filled in the original first trench is also ion implanted and converted to the opposite conductivity type. After the body region ion implantation is completed, the relative depth of the first trench becomes shallower.

[0021] Further, in Step 4, a gate dielectric layer is formed on the second trench by thermal oxidation or deposition; then fill with heavily doped polysilicon of the second conductivity type, the polysilicon fills the second trench, and after etching back, the upper surface of the polysilicon inside the second trench is flush with the epitaxial layer to form the trench gate of the power device.

[0022] Further, in Step 6, the body region extraction region is located outside the source region away from the device center region, and the body region extraction region is formed by heavy doping ion implantation to extract the body region.

[0023] Further, the first trench in an inverted trapezoidal shape and the epitaxial layer of the first conductivity type around it form a superjunction structure; the epitaxial layer outside the first trench has a structure opposite to that of the first trench, that is, the epitaxial layer outside the first trench serves as the columnar thin layer in the superjunction structure, and the columnar thin layer has a shape that is narrow at the top and wide at the bottom; this makes the drift region near the device surface easier to deplete and reduces the on-resistance of the power device.

[0024] Further, after the above process steps, a back-end process is further included, depositing a dielectric layer, contact holes, and a front-side metal layer to form a front-side lead-out, and thinning the back side and metallizing the back side to lead out the drain of the device.

[0025] Further, the first conductivity type is P-type and the second conductivity type is N-type; when the definitions of the first conductivity type and the second conductivity type are exchanged, the formed device is of the opposite type.

[0026] A trench-filled superjunction power device provided by the present invention has a drift region of the second conductivity type in a semiconductor substrate of the second conductivity type, and a superjunction structure layer of the trench-filled superjunction power device is above the drift region; in the superjunction structure layer, there is a trench-type drift region with an inverted trapezoidal cross-sectional structure, and the periphery of the trench-type is a columnar thin layer of the superjunction formed by epitaxy of the first conductivity type;

[0027] Above the superjunction structure layer is the body region of the power device. In the body region above the trench-type drift region, there is a trench-type gate. The bottom of the trench of the trench-type gate is located in the trench-type drift region. The trench-type gate is formed by attaching a gate dielectric layer to the inner wall of the trench and filling it with heavily doped polysilicon; in the body regions on both sides of the trench-type gate, there are source regions of the power device, and outside the source regions is the body region lead-out region.

[0028] Further, the trench-type drift region in an inverted trapezoidal shape and the epitaxial layer in a positive trapezoidal shape outside it form a superjunction structure. As the columnar thin layer in the superjunction structure, it has a structure with a narrow lateral width at the upper end and a large lateral width at the lower end; the wider drift region at the upper end realizes the maximization of the drift region concentration, and it is more conducive to achieving full depletion with the narrower columnar thin layer at the upper end, reducing the resistance of the drift region.

[0029] Further, for the columnar thin layer of the superjunction with a narrow lateral width at the upper end and a large lateral width at the lower end, its concentration distribution gradually decreases from top to bottom.

[0030] Further, the source region is a heavily doped injection region of the second conductivity type, and the body region lead-out region is a heavily doped injection region of the first conductivity type.

[0031] The beneficial effects of the present invention are as follows:

[0032] The present invention swaps the epitaxial drift region and the trench-filled columnar thin layer (pillar) in the conventional trench-fill superjunction device process to fabricate a columnar epitaxy and a trench drift region, so as to achieve a positive trapezoidal column region with a small opening and a large bottom, maximize the doping concentration of the drift region, and obtain the minimum on-resistance of the device. Description of the Drawings

[0033] Figures 1 to 6 Schematic diagram of the process steps of the trench-fill superjunction power device of the present invention.

[0034] Figure 7 Process flow chart of the process steps of the trench-fill superjunction power device of the present invention.

[0035] Description of the Reference Numerals

[0036] 1 is the substrate, 2 is the drift region, 3 is the column region (epitaxial layer), 4 is the trench-type drift region, 5 is the body region, 6 is the trench gate, 7 is the source region, and 8 is the body region lead-out region. Detailed Description of the Invention

[0037] The following provides the detailed implementation manners of the present invention in conjunction with the drawings, and clearly and completely describes the technical solutions in the present invention. However, the present invention is not limited to the following implementation manners. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. According to the following description and the claims, the advantages and features of the present invention will be clearer. It should be noted that the drawings are all in a very simplified form and use non-precise ratios, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention. It should be understood that the present invention can be implemented in different forms and should not be construed as limited to the embodiments presented herein. On the contrary, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of the present invention to those skilled in the art. In the drawings, for clarity, the dimensions and relative dimensions of the layers and regions may be exaggerated, and the same reference numerals represent the same elements throughout.

[0038] The structure of the trench-fill superjunction power device described in the present invention is as Figure 6 shown, swapping the fabrication of the conventional trench-fill P pillar and the drift region. The following embodiments are all described by taking the N-type trench-fill superjunction power device as an example. For P-type devices, the doping types of each part of the structure in the description can be changed to the opposite.

[0039] Figure 61 is a heavily doped N-type semiconductor substrate, with an N-type drift region 2 in the semiconductor substrate, and an N-type epitaxial layer 3 of the trench-filled super junction power device above the drift region 2. The epitaxial layer has a trench-type drift region 4 that is wide at the top and narrow at the bottom and in an inverted trapezoidal shape, and above the drift region of the epitaxial layer 3 is a body region 5 of the power device, which is a P-type doped region. When a voltage is applied to the gate, a channel of the power device is formed in the body region.

[0040] The epitaxial layer 3 and the groove-type drift region therein constitute the super junction structure of the power device, wherein the epitaxial layer serves as the P column in the super junction structure, and the groove-type drift region with an inverted trapezoidal cross-sectional structure is equivalent to widening the lateral width of the drift region in the super junction, and as the P column, the lateral width of the upper end thereof is narrowed, so as to maximize the doping concentration of the upper drift region, and the narrower P column at the upper end is more conducive to achieving full depletion and obtaining the minimum device on-resistance. The P column of the super junction with a narrow lateral width at the upper end and a large lateral width at the lower end has a concentration distribution in which the doping concentration gradually decreases from top to bottom.

[0041] The body region above the trench-type drift region includes a trench-type gate 6, the bottom of the trench of the trench-type gate is located in the trench-type drift region, and the trench-type gate 6 is composed of a gate dielectric layer attached to the inner wall of the trench and filled with heavily doped polysilicon; the body regions on both sides of the trench-type gate include the N+ source region of the power device, and the outer side of the source region 7 is the P+ body region lead-out region 8.

[0042] The above-mentioned process method of trench filling super junction power device is completed by using the following process steps (N-type device), and each specific process step corresponds to the attached Figures 1 to 6 :

[0043] Step 1: provide an N+ type semiconductor substrate such as a silicon substrate 1, perform N- type ion implantation on the substrate to form a drift region 2, and then form a P- type epitaxial layer on the silicon substrate, such as Figure 1 shown.

[0044] Step 2: Using the existing etching process for trench gates, etch a relatively large first trench in the epitaxial layer, and then fill the formed first trench with N-type epitaxial material. In this step, a new superjunction structure is formed, which is opposite to the structural characteristics of the traditional superjunction structure. That is, the deposited P-type epitaxial material 3 serves as the P pillars of the superjunction, and the first trench etched out serves as the drift region of the power device after depositing N-type material, which is different from the traditional process. The first trench is trapezoidal in reverse, with a large upper opening and a small bottom width, which is equivalent to making the traditional P pillars exhibit opposite structural characteristics. That is, the new P pillars formed in the present invention are regular trapezoidal structures with a narrow upper end and a wide lower end. After completion, corresponding ion implantation is carried out, and the doping concentration in the P pillars gradually decreases from top to bottom, forming a graded distribution.

[0045] Step 3: Perform P-type ion implantation in the epitaxial layer to form the body region 5 of the power device. During the implantation process, the original N-type drift region in the upper part of the first trench is inverted into P-type. After the implantation is completed, the longitudinal depth of the drift region of the first trench decreases correspondingly.

[0046] Step 4: Etch in the body region at the center above the first trench to form a second trench; the second trench forms the gate 6 of the power device. Then form a gate dielectric layer in the second trench, and the deposition methods include thermal oxidation method, deposition method, etc.; then fill with N+-type polysilicon and polish or etch back to the silicon surface to be flush with the silicon surface to form the trench-type gate 6 of the power device.

[0047] Step 5: Define the implantation region of the source region through photolithography, and perform N+-type ion implantation on both sides of the second trench to form the source region 7 of the power device.

[0048] Step 6: Define the body region lead-out region through photolithography and etching, and perform P+-type ion implantation to form the body region lead-out region 8.

[0049] After the above process steps, there is also a back-end process, including depositing a dielectric layer, contact holes, and a front metal layer to form a front lead-out, and thinning the back and metallizing the back to lead out the drain of the device.

[0050] In the ion implantation process of each of the above steps, when the implantation type is P-type, the impurity ions used are boron ions, and when the implantation type is N-type, the impurity ions used are phosphorus or arsenic, etc. If a device of the opposite type, i.e., P-type, is to be formed, the implantation types of each part can be changed to the opposite.

[0051] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A process method for a trench-filled superjunction power device, characterized in that: it includes the following process steps: Step 1: Provide a semiconductor substrate of a second conductivity type. Perform ion implantation of the second conductivity type on the semiconductor substrate to form a drift region, and then form an epitaxial layer of a first conductivity type on the semiconductor substrate; Step 2: Etch in the epitaxial layer to form a first trench, and then fill the formed first trench with epitaxial material of the second conductivity type; the first trench is a trench with an inverted trapezoidal cross-sectional structure, that is, the upper horizontal opening of the first trench is larger than the bottom horizontal width, and the side walls of the first trench are in a gradually inwardly converging inclined shape; fill the first trench with lightly doped epitaxial material of the second conductivity type to form an integral body with the drift region at the bottom of the first trench, forming the overall drift region of the power device; the inverted trapezoidal first trench and the surrounding epitaxial layer of the first conductivity type form a superjunction structure; the epitaxial layer outside the first trench has a structure opposite to that of the first trench, that is, the epitaxial layer outside the first trench serves as a columnar thin layer in the superjunction structure, and the columnar thin layer has a shape that is narrow at the top and wide at the bottom, and the doping concentration gradually decreases from top to bottom; making the drift region near the upper surface of the device easier to deplete and reducing the on-resistance of the power device; Step 3: Perform ion implantation of the first conductivity type in the epitaxial layer to form the body region of the power device; Step 4: Etch at the center above the first trench to form a second trench; the second trench forms the gate of the power device; form a gate dielectric layer in the second trench; then fill with polysilicon of the second conductivity type and polish or etch back to the silicon surface to form the trench gate of the power device; Step 5: Define the implantation region of the source region through photolithography, and perform ion implantation of the second conductivity type on both sides of the second trench to form the source region of the power device; Step 6: Define the body region lead-out region through photolithography and etching, and perform ion implantation of the first conductivity type to form the body region lead-out region.

2. The process method for a trench-filled superjunction power device as described in claim 1, characterized in that: in the said Step 1, the semiconductor substrate is a heavily doped substrate, and both the drift region and the epitaxial layer are lightly doped regions; the semiconductor substrate is a silicon substrate, a silicon-germanium substrate or a gallium arsenide substrate.

3. The process method for a trench-filled superjunction power device as described in claim 1, characterized in that: in the said Step 3, perform lightly doped ion implantation of the first conductivity type in the epitaxial layer to form the body region of the power device; during the ion implantation process, the upper part of the epitaxial material filled in the original first trench is also ion implanted and converted to the opposite conductivity type. After the body region ion implantation is completed, the relative depth of the first trench becomes shallower.

4. The process method for a trench-filled superjunction power device as described in claim 1, characterized in that: In the fourth step described above, a gate dielectric layer is formed on the second trench by thermal oxidation or deposition; then, polysilicon of the second conductive type with heavy doping is filled, and the second trench is filled with polysilicon. After etch-back, the upper surface of the polysilicon inside the second trench is flush with the epitaxial layer, forming the trench gate of the power device.

5. The process method of the trench-filled superjunction power device as described in claim 1, wherein: In the sixth step, the body region lead-out region is located outside the source region away from the center region of the device. The body region lead-out region is formed by heavy doping ion implantation to lead out the body region.

6. The process method of the trench-filled superjunction power device as described in claim 1, wherein: After the process steps described above, a back-end process is further included, depositing a dielectric layer, contact holes, and a front metal layer to form a front lead-out, and thinning the back surface and metallizing the back surface to lead out the drain of the device.

7. The process method of the trench-filled superjunction power device as described in any one of claims 1 to 6, wherein: The first conductive type is P-type, and the second conductive type is N-type; when the definitions of the first conductive type and the second conductive type are exchanged, the formed device is of the opposite type.

8. A trench-filled superjunction power device formed by using the process method as described in any one of claims 1 to 6, wherein: In a semiconductor substrate of the second conductive type, there is a drift region of the second conductive type. Above the drift region is the superjunction structure layer of the trench-filled superjunction power device; in the superjunction structure layer, there is a trench-type drift region with an inverted trapezoidal cross-sectional structure. The periphery of the trench-type is a columnar thin layer of the superjunction formed by epitaxy of the first conductive type; Above the superjunction structure layer is the body region of the power device. In the body region above the trench-type drift region, there is a trench-type gate. For the trench-type gate, the bottom of the second trench is located in the trench-type drift region. The trench-type gate is composed of attaching a gate dielectric layer on the inner wall of the second trench and filling it with polysilicon of heavy doping; in the body regions on both sides of the trench-type gate, there are source regions of the power device, and outside the source regions is the body region lead-out region; the inverted trapezoidal trench-type drift region and its outer positive trapezoidal epitaxial layer form a superjunction structure. As the columnar thin layer in the superjunction structure, it has a structure with a narrow transverse width at the upper end and a large transverse width at the lower end; the wider drift region at the upper end realizes the maximization of the drift region concentration, and the narrower columnar thin layer at the upper end is more conducive to achieving full depletion and reducing the resistance of the drift region.

9. The trench-filled superjunction power device as described in claim 8, wherein: For the columnar thin layer of the superjunction with a narrow transverse width at the upper end and a large transverse width at the lower end, its concentration distribution gradually decreases from top to bottom.

10. The trench-filled superjunction power device as described in claim 8, wherein: The source region is an injection region of the second conductive type with heavy doping, and the body region lead-out region is an injection region of the first conductive type with heavy doping.

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