Etching method of contact hole and manufacturing method of dram
By introducing EPD etching and wavelength intensity ratio adjustment into the HARC etching process, combined with the use of an anti-reflective coating, the problem of the lack of EPD etching in the prior art is solved, and precise etching and efficient control of high aspect ratio contact holes are achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- INST OF MICROELECTRONICS CHINESE ACAD OF SCI LTD
- Filing Date
- 2020-09-09
- Publication Date
- 2026-05-29
Smart Images
Figure CN114242652B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and in particular to a method for etching contact holes and a method for manufacturing DRAM. Background Technology
[0002] Memory is a device or component in a digital system used to store large amounts of information, and it is an important part of computers and digital devices. Memory can be divided into two main categories: Random Access Memory (RAM) and Read-Only Memory (ROM). RAM includes DRAM, PRAM, MRAM, etc. Conductive components are one of the key components in the manufacture of these RAMs. Metal contact plugs are used to electrically connect conductive components to other conductors.
[0003] In semiconductor manufacturing, contact plugs are widely used in interconnect structures connecting conductors, with contact holes forming these plugs. Dry etching tools can be equipped with an EPD (End Point Detector) system. An EPD is a device that stops etching during the etching process based on sensed changes in the film material. Most etching processes use time-based etching and EPD etching. However, existing HARC (High Aspect Ratio Contact) etching formulations lack an EPD etching step, only having a time-based etching step. HARC etching is a process for etching high aspect ratio holes. In HARC etching, where the contact hole is only formed in the peripheral region of the wafer, the emitted wavelength signal is too small during etching, rendering EPD etching ineffective. Summary of the Invention
[0004] Based on the above analysis, the present invention aims to provide a contact hole etching method and a DRAM manufacturing method to solve the problems of existing HARC etching recipes having only a time etching step but no EPD etching step, and the EPD etching not working due to the emitted wavelength signal being too small during contact hole etching.
[0005] On one hand, embodiments of the present invention provide a method for etching a contact hole, wherein the contact hole is a high aspect ratio hole. The etching method includes: providing a semiconductor substrate, wherein a conductive component is formed in the semiconductor substrate; sequentially forming an etch stop layer, a layer to be etched, a first mask layer, and a second mask layer above the semiconductor substrate from bottom to top; performing a photolithography process on the second mask layer to form a second mask layer pattern; transferring the second mask layer pattern to the first mask layer to form a first mask layer pattern; and using the first mask layer pattern as a mask, etching the layer to be etched and the etch stop layer to form a contact hole and expose the conductive component, wherein endpoint detection (EPD) is used in the etching of the layer to be etched.
[0006] The beneficial effects of the above technical solution are as follows: using EPD etching to implement the transfer and etching steps during HARC etching can overcome the technical bias of existing HARC etching formulations that only have a time etching step and not an EPD etching step.
[0007] Based on further improvements to the above method, the aspect ratio is greater than 10:1-100:1.
[0008] Based on a further improvement of the above method, EPD is also used in the etching of the first mask layer and the etching stop layer. The EPD includes: during the etching of the first mask layer, the layer to be etched, or the etching stop layer, detecting the specific wavelength intensity of the etching material in real time using the EPD; and determining the distance from the etching point to the endpoint of the current etching material based on the change in the specific wavelength intensity of the etching material, wherein different etching materials have different specific wavelength intensities.
[0009] Further improvements to the above method, determining the distance from the etching point to the endpoint of the current etching material based on the change in the intensity of a specific wavelength of the etching material, further includes: calculating the ratio of the intensity of a specific wavelength at the current moment to the intensity of a specific wavelength at a previous moment; amplifying the ratio by more than 10,000 times; and determining the distance from the etching point to the endpoint of the current etching material when the ratio changes.
[0010] Based on a further improvement of the above method, the etching method for contact holes further includes: stopping the current EPD etching in advance before the etching point reaches the endpoint of the current etching material, so as to continue etching the current etching material using the remaining etching gas; and after stopping the current EPD etching, adjusting the etching parameters of the next EPD etching according to the etching menu.
[0011] Based on a further improvement of the above method, the first mask layer includes: an amorphous carbon ACL mask layer; a silicon oxynitride mask layer located above the amorphous carbon ACL mask layer; and a bottom anti-reflective coating located above the silicon oxynitride mask layer, wherein the anti-reflective coating contacts the second mask layer and is located below the second mask layer.
[0012] A further improvement to the above method, transferring the second mask layer pattern into the first mask layer to form the first mask layer pattern, further includes: using the second mask layer pattern as a mask, etching the bottom anti-reflective coating and the silicon oxynitride mask layer under first etching parameters to form the silicon oxynitride mask layer pattern, wherein the first etching parameters include: etching pressure of 30-70 mT, etching power of 600-1000 W60 or 100-300 W27, CF4 flow rate of 50-150 sccm, CHF3 flow rate of 20-80 sccm, and CH2F2 flow rate of 10-30 sccm. The O2 flow rate is 5-15 sccm; and before the current etching material is changed from silicon oxynitride to ACL, the current EPD etching is stopped in advance and the first etching parameter is adjusted to the second etching parameter according to the etching menu. The silicon oxynitride mask layer pattern is used as a mask to etch the ACL mask layer to form the ACL mask layer pattern as the first mask layer pattern. The second etching parameters include: etching pressure of 10-20 mT, etching power of 500-1500 W60 or 50-150 W27, O2 flow rate of 100-200 sccm and carbonyl sulfide (COS) flow rate of 30-70 sccm.
[0013] Based on a further improvement of the above method, the etch stop layer is disposed above the semiconductor substrate, wherein the material of the etch stop layer is silicon nitride; and the layer to be etched is disposed above the etch stop layer, wherein the material of the layer to be etched is oxide.
[0014] A further improvement to the above method, using the first mask layer pattern as a mask, etching the layer to be etched to form a contact hole pattern further includes: before the current etching material is changed from the ACL to an oxide, stopping the current EPD etching in advance and adjusting the etching parameters to the first oxide layer etching parameters according to the etching menu, and etching the oxide layer using the first mask layer pattern as a mask; and before determining that the etching point exceeds 2 / 3 of the thickness of the oxide layer, stopping the current EPD etching in advance and changing the first oxide layer etching parameters to the second oxide layer etching parameters according to the etching menu, wherein the first oxide layer etching parameters include: etching pressure of 10-30 mT, etching power of 2000-3000 W60. The etching parameters for the second oxide layer include: etching pressure of 10-30 mT, etching power of 1000-4000 W, 200-800 W, or 5000-9000 W, with a flow rate of 10-50 sccm for C4F8, 10-40 sccm for C4F6, 10-30 sccm for CH2F2, 20-60 sccm for O2, and 100-300 sccm for Ar.
[0015] Based on a further improvement of the above method, the etching method for contact holes further includes: before the current etching material changes from the oxide to the silicon nitride, stopping the current EPD etching in advance and adjusting the etching parameters to a third etching parameter according to the etching menu to quickly remove the photoresist and polymer on the etched surface; and after quickly removing the photoresist and polymer on the etched surface, adjusting the third etching parameter to the etching stop layer etching parameter; and etching the etching stop layer, stopping the etching in advance before determining through the EPD that the current etching material has changed to a conductive component material, wherein the third etching parameter... The etching parameters include: etching pressure of 10-30 mT, etching power of 100-300 W60 or 100-300 W27, O2 flow rate of 10-30 sccm, Ar flow rate of 50-150 sccm, and etching time of 5-30 seconds. The etching stop layer etching parameters include: etching pressure of 10-50 mT, etching power of 200-600 W60 or 100-300 W2, CF4 flow rate of 50-150 sccm, CHF3 flow rate of 10-50 sccm, O2 flow rate of 2-8 sccm, and Ar flow rate of 100-300 sccm.
[0016] On the other hand, embodiments of the present invention provide a method for manufacturing DRAM, including the steps of the contact hole etching method described above.
[0017] Based on a further improvement of the above method, the DRAM manufacturing method further includes: forming a conductive material in the contact hole to form a contact plug; and forming a metal interconnect above the contact plug that contacts the contact plug.
[0018] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects:
[0019] 1. Using EPD etching to implement the transfer and etching steps during HARC etching can overcome the technical bias of existing HARC etching formulations that only have a time etching step and not an EPD etching step.
[0020] 2. When etching high aspect ratio contact holes, the ratio of the intensity of a specific wavelength at the current moment to that at a previous moment is calculated and amplified by more than 10,000 times. This makes the ratio change significant enough to determine the current etching material during EPD etching. Thus, this improved EPD etching can adjust the etching parameters or stop the etching process in a timely manner.
[0021] 3. This EPD etching formula can control not-open etching (i.e., under-etching) or over-etching.
[0022] 4. By forming a bottom anti-reflection coating above the silicon oxynitride mask layer, the light reflection effect during photolithography is reduced, which facilitates the photolithography process.
[0023] In this invention, the above-described technical solutions can be combined with each other to achieve more preferred combinations. Other features and advantages of this invention will be set forth in the following description, and some advantages may become apparent from the description or be learned by practicing the invention. The objects and other advantages of this invention can be realized and obtained from what is particularly pointed out in the description and drawings. Attached Figure Description
[0024] The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts.
[0025] Figure 1 This is a cross-sectional schematic diagram of an intermediate stage of the etching method for contact holes according to an embodiment of the present invention;
[0026] Figure 2 This is a cross-sectional schematic diagram of an intermediate stage of the etching method for contact holes according to an embodiment of the present invention;
[0027] Figure 3 This is a cross-sectional schematic diagram of an intermediate stage of the etching method for contact holes according to an embodiment of the present invention;
[0028] Figure 4 This is a cross-sectional schematic diagram of an intermediate stage of the etching method for contact holes according to an embodiment of the present invention;
[0029] Figure 5 A cross-sectional schematic diagram of an intermediate stage of the contact hole etching method according to an embodiment of the present invention; and
[0030] Figure 6 This is a cross-sectional schematic diagram of an intermediate stage of the etching method for contact holes according to an embodiment of the present invention.
[0031] Figure label:
[0032] 102 - Semiconductor substrate; 104 - Conductive component; 106 - Etch stop layer; 108 - Oxide layer; 110 - Amorphous carbon mask layer; 112 - Silicon oxynitride mask layer; 114 - Bottom antireflective coating; 116 - Second mask layer; 118 - Bottom antireflective coating pattern; 120 - Silicon oxynitride mask layer pattern; 122 - Opening; 124 - Opening; 126 - Amorphous carbon mask layer pattern; 128 - Opening; 130 - First oxide layer pattern; 132 - First contact hole; 134 - Second contact hole; 136 - Second oxide layer pattern; 138 - Third contact hole; 140 - Etch stop layer pattern Detailed Implementation
[0033] Embodiments of the present disclosure will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the disclosure. Furthermore, descriptions of well-known structures and technologies are omitted in the following description to avoid unnecessarily obscuring the concepts of the present disclosure.
[0034] The accompanying drawings illustrate various structural schematics according to embodiments of the present disclosure. These drawings are not to scale, and some details have been enlarged for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.
[0035] In the context of this disclosure, when a layer / element is referred to as being "above" another layer / element, the layer / element may be directly above the other layer / element, or there may be an intermediate layer / element between them. Additionally, if a layer / element is "above" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "below" the other layer / element.
[0036] One specific embodiment of the present invention discloses a method for etching contact holes. Hereinafter, reference will be made to... Figures 1 to 6 The etching method for contact holes is described in detail. (Reference) Figure 1 The etching method for contact holes is applied to contact holes with high aspect ratios, for example, with an aspect ratio greater than 10:1-100:1.
[0037] refer to Figure 1 A semiconductor substrate 102 may be provided, wherein a plurality of conductive components 104 may be formed in the semiconductor substrate 102. For example, the material of the conductive components 104 may be tungsten (W).
[0038] refer to Figure 1 An etch stop layer 106, an etchable layer 108, a first mask layer, and a second mask layer 116 can be sequentially formed from bottom to top on a semiconductor substrate 102. The etch stop layer (ESL) 106 is disposed above the semiconductor substrate 102, and the material of the etch stop layer 106 is silicon nitride; and the etchable layer 108 is disposed above the etch stop layer 106, and the material of the etchable layer 108 is oxide. The first mask layer may include: an amorphous carbon (ACL) mask layer 110; a silicon oxynitride mask layer 112, located above the amorphous carbon mask layer 110; and a bottom anti-reflective coating (BARC) 114, located above the silicon oxynitride mask layer 112, wherein the anti-reflective coating 114 contacts the second mask layer 116 and is located below the second mask layer 116. For example, the second mask layer 116 can be photoresist (abbreviated as PR).
[0039] Refer again Figure 1After forming the layer to be etched, the first mask layer, and the second mask layer, a photolithography process can be performed on the second mask layer 116 to form a second mask layer pattern. Specifically, the second mask layer pattern may include multiple openings corresponding to multiple conductive components 104 in the semiconductor substrate 102. Since the anti-reflective coating 114 is disposed below the second mask layer 116, the light reflection effect caused by photolithography on the second mask layer 116 can be reduced, thereby the anti-reflective coating 114 is beneficial to the photolithography process.
[0040] refer to Figures 2 to 3 After the photolithography process, the second mask layer pattern is transferred into the first mask layer to form the first mask layer pattern. Specifically, using the second mask layer pattern as a mask, the first mask layer is etched to form the first mask layer pattern, wherein EPD can be used in the etching of the first mask layer. The first mask layer includes, from bottom to top, an amorphous carbon mask layer 110, a silicon oxynitride mask layer 112, and a bottom anti-reflective coating 114. For example, see reference... Figure 2 The pattern transfer step sequentially etches the upper bottom anti-reflective coating 114, the middle silicon oxynitride mask layer 112, and the bottom amorphous carbon mask layer 110 to sequentially form the bottom anti-reflective coating pattern 118, the silicon oxynitride mask layer pattern 120, and the amorphous carbon mask layer pattern 126 (see reference). Figure 3 The bottom anti-reflective coating pattern 118 may include an opening 124, the silicon oxynitride mask layer pattern 120 may include an opening 122, and the amorphous carbon mask layer pattern 126 may include an opening 128 (see reference). Figure 3 ).
[0041] In this embodiment, EPD may include: during the etching of the first mask layer, detecting the specific wavelength intensity of the etching material in real time using EPD; and determining the distance from the etching point to the endpoint of the current etching material based on the change in the specific wavelength intensity of the etching material, wherein different etching materials have different specific wavelength intensities. The current EPD etching is stopped before the etching point reaches the endpoint of the current etching material to continue etching the current etching material using the remaining etching gas; and after stopping the current EPD etching, the etching parameters for the subsequent EPD etching are adjusted according to the etching menu. For example, during the etching of the first mask layer, and before the etching point reaches the ACL mask layer, the current EPD etching is stopped in advance; then the etching parameters for the subsequent EPD etching are adjusted according to the etching menu. Hereinafter, reference is made to... Figure 2 and Figure 3 The parameter adjustments during the etching process of the first mask layer are described in detail.
[0042] Specifically, transferring the second mask layer pattern into the first mask layer to form the first mask layer pattern further includes: referencing Figure 2Using the second mask layer pattern as a mask, the bottom anti-reflective coating and the silicon oxynitride mask layer are etched under the conditions of the first etching parameters to form the silicon oxynitride mask layer pattern. The first etching parameters include: etching pressure of 30-70 mT, etching power of 600-1000 W / 60 or 100-300 W / 27, CF4 flow rate of 50-150 sccm, CHF3 flow rate of 20-80 sccm, CH2F2 flow rate of 10-30 sccm, and O2 flow rate of 5-15 sccm; and, before changing the current etching material from silicon oxynitride to ACL, the current EPD etching is stopped in advance, allowing the remaining etching gas to continue etching the silicon oxynitride mask layer. Then, refer to... Figure 3 According to the etching menu, the first etching parameters are adjusted to the second etching parameters. Using the silicon oxynitride mask layer pattern as a mask, the ACL mask layer is etched to form the ACL mask layer pattern as the first mask layer pattern. For example, the second etching parameters may include: etching pressure of 10-20 mT, etching power of 500-1500 W60 or 50-150 W27, O2 flow rate of 100-200 sccm, and carbonyl sulfide (COS) flow rate of 30-70 sccm. In the BARC / SiON film etching step, the critical dimension (CD) needs to be controlled during etching to enable the formation of a high-precision ACL mask layer pattern in subsequent steps.
[0043] Compared to existing technologies, the etching method provided in this embodiment stops EPD etching before the etching of the current etching material (silicon oxynitride) is completed (i.e., the etching power supply is disconnected and the etching gas supply is stopped), thereby allowing the remaining etching gas to continue etching the remaining current etching material (silicon oxynitride). Therefore, since the remaining etching gas can continue etching after the power is disconnected, over-etching can be avoided by stopping etching in advance, and under-etching can be avoided by controlling the time of stopping EPD etching in advance. Furthermore, after stopping EPD etching, there is sufficient time to adjust the etching parameters during the period when the remaining etching gas continues to etch the remaining current etching material, thus saving adjustment time or stopping time and improving etching efficiency.
[0044] refer to Figures 4 to 6 After forming the first mask layer pattern, the first mask layer pattern is used as a mask to etch the layer to be etched 108 and the etch stop layer 106 to form contact holes and expose the conductive component 104. Endpoint detection (EPD) is used in the etching of the layer to be etched 108. For example, refer to... Figures 4 to 6 The etching step sequentially etches the upper oxide layer 108 and the lower etch stop layer 106 to sequentially form an oxide layer pattern and an etch stop layer pattern. The first oxide layer pattern 130 may include a first contact hole 132 (see reference). Figure 4The second oxide layer pattern 136 may include a second contact hole 134 (see reference). Figure 5 The etch stop layer pattern 140 may include a third contact hole 138 (see reference). Figure 6 ).
[0045] In this embodiment, EPD may include: during etching of the layer to be etched or the etching stop layer, detecting the specific wavelength intensity of the etching material in real time using EPD; and determining the distance from the etching point to the endpoint of the current etching material based on the change in the specific wavelength intensity of the etching material, wherein different etching materials have different specific wavelength intensities. Determining the distance from the etching point to the endpoint of the current etching material based on the change in the specific wavelength intensity of the etching material during etching of the layer to be etched or the etching stop layer may further include: calculating the ratio of the specific wavelength intensity at the current moment to the specific wavelength intensity at a previous moment; amplifying the ratio by more than 10,000 times, preferably, amplifying the ratio by 10,000 to 1,000,000,000 times, i.e., (10,000 to 1,000,000,000) * (first specific wavelength intensity / second specific wavelength intensity); and determining the distance from the etching point to the endpoint of the current etching material when the ratio changes. Before the etching point reaches the endpoint of the current etchable material, the current EPD etching is stopped in advance to utilize the remaining etching gas to continue etching the current etchable material; and after stopping the current EPD etching, the etching parameters for the next EPD etching are adjusted according to the etching menu. (Refer to the following text.) Figures 4 to 6 The parameter adjustments during the etching process of the etch layer and the etch stop layer are described in detail.
[0046] Specifically, using the pattern of the first mask layer as a mask, etching the layer to be etched to form the second contact hole pattern further includes: (reference) Figure 4 Before changing the etching material from ACL to oxide, EPD etching is stopped in advance, allowing the remaining etching gas to continue etching the ACL mask layer. After stopping EPD etching in advance, the etching parameters are adjusted to the first oxide layer etching parameters according to the etching menu, using the first mask layer pattern as a mask to etch the oxide layer. For example, the first oxide layer etching parameters may include: etching pressure of 10-30 mT, etching power of 2000-3000 W60, 300-700 W27, or 5000-9000 W2, C4F8 flow rate of 10-50 sccm, C4F6 flow rate of 10-40 sccm, CH2F2 flow rate of 10-30 sccm, O2 flow rate of 20-60 sccm, and Ar flow rate of 100-300 sccm. (Reference) Figure 5Before determining that the etching point exceeds 2 / 3 of the oxide layer thickness, EPD etching is stopped in advance, allowing the remaining etching gas to continue etching the remaining first oxide layer. After stopping EPD etching in advance, the etching parameters of the first oxide layer are changed to the etching parameters of the second oxide layer according to the etching menu. For example, the etching parameters of the second oxide layer include: etching pressure of 10-30 mT, etching power of 1000-4000 W60, 200-800 W27, or 5000-9000 W2, C4F8 flow rate of 10-50 sccm, C4F6 flow rate of 10-40 sccm, O2 flow rate of 10-60 sccm, and Ar flow rate of 100-300 sccm.
[0047] Before the etching of the oxide layer is completed or before the current etching material changes from the second oxide to silicon nitride, EPD etching is stopped in advance, allowing the remaining etching gas to continue etching the remaining second oxide layer. After stopping EPD etching in advance, the etching parameters for the second oxide layer are adjusted to the third etching parameters according to the etching menu to quickly remove the photoresist and polymer from the etched surface. For example, the third etching parameters include: etching pressure of 10-30 mT, etching power of 100-300 W60 or 100-300 W27, O2 flow rate of 10-30 sccm, Ar flow rate of 50-150 sccm, and etching time of 5-30 seconds. After quickly removing the photoresist and polymer from the etched surface, the third etching parameters are adjusted to the etching stop layer etching parameters. For example, etching parameters for the etch stop layer include: etching pressure of 10-50 mT, etching power of 200-600 W / 60 or 100-300 W / 2, CF4 flow rate of 50-150 sccm, CHF3 flow rate of 10-50 sccm, O2 flow rate of 2-8 sccm, and Ar flow rate of 100-300 sccm. (Reference) Figure 6 The etching stop layer is etched. EPD etching is stopped before the current etching material is determined to change to a conductive component material by EPD. That is, after stopping the etching of silicon nitride, the remaining etching gas can be used to continue etching the remaining silicon oxide. For example, the etching parameters for the etch stop layer may include: etching pressure of 10-50 mT, etching power of 200-600 W / 60 or 100-300 W / 2, CF4 flow rate of 50-150 sccm, CHF3 flow rate of 10-50 sccm, O2 flow rate of 2-8 sccm, and Ar flow rate of 100-300 sccm.
[0048] Compared with existing technologies, the etching method provided in this embodiment can calculate the ratio of a specific wavelength intensity at the current moment to that at a previous moment and amplify the ratio by more than 10,000 times. This ensures that the ratio change during EPD etching is significant enough to determine the current etching material, thereby enabling timely adjustment of etching parameters or cessation of etching. Furthermore, by stopping etching before the current etching material is completely etched, etching parameters can be adjusted in a timely manner, thus controlling under-etching or over-etching.
[0049] Another specific embodiment of the present invention discloses a method for manufacturing DRAM, including the steps of the contact hole etching method described above. Furthermore, the DRAM manufacturing method further includes: forming a metal material in the contact hole to form a contact plug; and forming a metal interconnect above the contact plug that contacts the contact plug. For example, by electrically connecting the contact plug and the metal interconnect, power can be provided to the conductive components below.
[0050] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects:
[0051] 1. Using EPD etching to implement the transfer and etching steps during HARC etching can overcome the technical bias of existing HARC etching formulations that only have a time etching step and not an EPD etching step.
[0052] 2. When etching high aspect ratio contact holes, the ratio of the intensity of a specific wavelength at the current moment to that at a previous moment is calculated and amplified by more than 10,000 times. This makes the ratio change significant enough to determine the current etching material during EPD etching. Thus, this improved EPD etching can adjust the etching parameters or stop the etching process in a timely manner.
[0053] 3. This EPD etching formula can control not-open etching (i.e., under-etching) or over-etching.
[0054] 4. By forming a bottom anti-reflection coating above the silicon oxynitride mask layer, the light reflection effect during photolithography is reduced, which facilitates the photolithography process.
[0055] The above description does not provide detailed explanations of the technical aspects of each layer's patterning, etching, etc. However, those skilled in the art should understand that various technical means can be used to form layers and regions of the desired shape. Furthermore, to form the same structure, those skilled in the art can also design methods that are not entirely identical to those described above. Additionally, although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination.
[0056] The embodiments of this disclosure have been described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of this disclosure. The scope of this disclosure is defined by the appended claims and their equivalents. Various substitutions and modifications can be made by those skilled in the art without departing from the scope of this disclosure, and all such substitutions and modifications should fall within the scope of this disclosure.
Claims
1. A method for etching contact holes, characterized in that, The contact hole is a high aspect ratio hole, and the etching method includes: A semiconductor substrate is provided, wherein conductive components are formed therein; An etch stop layer, a layer to be etched, a first mask layer, and a second mask layer are sequentially formed from bottom to top on the semiconductor substrate. The second mask layer is subjected to photolithography to form a pattern of the second mask layer; The second mask layer pattern is transferred into the first mask layer to form the first mask layer pattern; and Using the pattern of the first mask layer as a mask, the layer to be etched and the etching stop layer are etched to form contact holes and expose the conductive components. The etching of the layer to be etched employs endpoint detection (EPD), and EPD is also employed in the etching of the first mask layer and the etching stop layer. The EPD includes: real-time detection of the specific wavelength intensity of the etching material during the etching of the first mask layer, the layer to be etched, or the etching stop layer; and determining the distance from the current etching point to the endpoint of the etching material based on the change in the specific wavelength intensity of the etching material. Determining the distance from the etching point to the endpoint of the current etching material based on the change in the intensity of a specific wavelength of the etching material further includes: calculating the ratio of the intensity of the specific wavelength at the current moment to the intensity of the specific wavelength at a previous moment; amplifying the ratio by more than 10,000 times; and determining the distance from the etching point to the endpoint of the current etching material when the ratio changes. Before the etching point reaches the endpoint of the current etching material, the current EPD etching is stopped in advance so that the remaining etching gas can be used to continue etching the current etching material; and after the current EPD etching is stopped, the etching parameters of the next EPD etching are adjusted according to the etching menu.
2. The etching method for contact holes according to claim 1, characterized in that, The aspect ratio is greater than 10:1-100:
1.
3. The etching method for contact holes according to claim 1, characterized in that, Different etching materials have different specific wavelength intensities.
4. The etching method for contact holes according to claim 3, characterized in that, The first mask layer includes: Amorphous carbon ACL mask layer; A silicon oxynitride mask layer is located above the amorphous carbon ACL mask layer; and A bottom anti-reflective coating is located above the silicon oxynitride mask layer, wherein the anti-reflective coating contacts the second mask layer and is located below the second mask layer.
5. The etching method for contact holes according to claim 4, characterized in that, Transferring the second mask layer pattern into the first mask layer to form the first mask layer pattern further includes: Using the second mask layer pattern as a mask, the bottom anti-reflective coating and the silicon oxynitride mask layer are etched under the conditions of the first etching parameters to form the silicon oxynitride mask layer pattern. The first etching parameters include: etching pressure of 30-70 mT, etching power of 600-1000 W / 60 or 100-300 W / 27, CF4 flow rate of 50-150 sccm, CHF3 flow rate of 20-80 sccm, CH2F2 flow rate of 10-30 sccm, and O2 flow rate of 5-15 sccm; and Before the current etching material is changed from silicon oxynitride to ACL, the current EPD etching is stopped in advance, and the first etching parameter is adjusted to the second etching parameter according to the etching menu. The silicon oxynitride mask layer pattern is used as a mask, and the ACL mask layer is etched to form an ACL mask layer pattern as the first mask layer pattern. The second etching parameters include: etching pressure of 10-20 mT, etching power of 500-1500 W60 or 50-150 W27, O2 flow rate of 100-200 sccm and carbonyl sulfide (COS) flow rate of 30-70 sccm.
6. The etching method for contact holes according to claim 4, characterized in that, The etch stop layer is disposed above the semiconductor substrate, wherein the material of the etch stop layer is silicon nitride; and The layer to be etched is disposed above the etching stop layer, wherein the material of the layer to be etched is an oxide.
7. The etching method for contact holes according to claim 6, characterized in that, Using the first mask layer pattern as a mask, etching the layer to be etched to form a contact hole pattern further includes: Before the current etching material is changed from the ACL to an oxide, the current EPD etching is stopped in advance, and the etching parameters are adjusted to the first oxide layer etching parameters according to the etching menu, and the oxide layer is etched using the first mask layer pattern as a mask; and Before determining that the etching point exceeds 2 / 3 of the thickness of the oxide layer, the current EPD etching is stopped in advance, and the etching parameters of the first oxide layer are changed to the etching parameters of the second oxide layer according to the etching menu, wherein, The etching parameters for the first oxide layer include: etching pressure of 10-30 mT, etching power of 2000-3000 W / 6, 300-700 W / 2, or 5000-9000 W / 2, C4F8 flow rate of 10-50 sccm, C4F6 flow rate of 10-40 sccm, CH2F2 flow rate of 10-30 sccm, O2 flow rate of 20-60 sccm, and Ar flow rate of 100-300 sccm. The etching parameters for the second oxide layer include: etching pressure of 10-30 mT, etching power of 1000-4000 W60, 200-800 W27 or 5000-9000 W2, C4F8 flow rate of 10-50 sccm, C4F6 flow rate of 10-40 sccm, O2 flow rate of 10-60 sccm, and Ar flow rate of 100-300 sccm.
8. The etching method for contact holes according to claim 7, characterized in that, Also includes: Before the current etching material is changed from the oxide to the silicon nitride, the current EPD etching is stopped in advance and the etching parameters are adjusted to the third etching parameter according to the etching menu to quickly remove the photoresist and polymer on the etched surface; After rapidly removing the photoresist and polymer from the etched surface, the third etching parameter is adjusted to the etching stop layer etching parameter; as well as The etching stop layer is etched, and etching is stopped before the EPD determines that the current etching material has changed to a conductive component material. The third etching parameters include: etching pressure of 10-30 mT, etching power of 100-300 W60 or 100-300 W27, O2 flow rate of 10-30 sccm, Ar flow rate of 50-150 sccm, and etching time of 5-30 seconds. The etching parameters for the etching stop layer include: etching pressure of 10-50 mT, etching power of 200-600 W60 or 100-300 W2, CF4 flow rate of 50-150 sccm, CHF3 flow rate of 10-50 sccm, O2 flow rate of 2-8 sccm, and Ar flow rate of 100-300 sccm.
9. A method for manufacturing DRAM, characterized in that, The method includes the steps of the contact hole etching method according to any one of claims 1 to 8.
10. The method for manufacturing DRAM according to claim 9, characterized in that, Also includes: A conductive material is formed in the contact hole to form a contact plug; as well as A metal connection is formed above the contact plug to contact the contact plug.