A traveling wave tube modulator circuit with a maximum duty cycle of 100%

Abstract

The application provides a traveling wave tube modulator circuit with a maximum duty cycle of 100%. A signal high-frequency modulation unit performs logical operation on a received modulation signal and an enable signal, generates two signals in a logical non-relation, and high-frequency modulates the operated signals to obtain a high-frequency modulation pulse signal 1 and a high-frequency modulation pulse signal 2, which correspond to high-level and low-level parts of the modulation signal respectively. The output of the signal high-frequency modulation unit is sent to an isolation driving transformer to realize signal transmission from a low-voltage side to a high-voltage side. A driving generation unit restores the signal sent by the isolation driving transformer into a driving signal with the same information as the modulation signal on the low-voltage side, and uses the driving signal to control a high-voltage modulator circuit. The high-voltage modulator circuit switches the gate voltage between a positive gate voltage and a negative gate voltage by turning on and off the driving switch tube. The traveling wave tube modulator circuit has the characteristics of a maximum duty cycle of 100%, short delay, simple method, small size and the like.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of high-voltage power supply of traveling wave tube, in particular to a traveling wave tube modulator circuit with maximum duty ratio of 100%. BACKGROUND

[0002] The traveling wave tube is a kind of electric vacuum device which exchanges energy between electron beam and high-frequency traveling wave field to complete the amplification of radio frequency signal, and is widely used in electronic countermeasure, radar and other fields. Due to the characteristics of the traveling wave tube device itself, a high-voltage electric field must be established inside to bunch, accelerate and recover the electron beam. The on-off of the grid voltage controls the on-off of the output power of the traveling wave tube. The traveling wave tube modulator is to generate a modulated grid voltage according to the modulating signal to power the traveling wave tube.

[0003] At present, the common modulator design scheme separates the modulating signal input from the low-voltage side into front and rear edges to generate front and rear edge pulses, which are then transmitted to the high-voltage side through a pulse isolation transformer to drive the modulator circuit. In this scheme, the modulator drive signal on the high-voltage side is generated by the front and rear edge pulses, and its inherent defect is that it cannot adapt to the modulating signal with a large pulse width or a duty ratio of 100%. Therefore, it is basically used in the low-duty-ratio and small-pulse-width pulse traveling wave tube. In some cases, the traveling wave tube needs to work in continuous wave or large-pulse-width modulation state, and this scheme cannot meet the requirements. SUMMARY

[0004] The purpose of the present application is to provide a traveling wave tube modulator circuit with a maximum duty ratio of 100%.

[0005] The technical solution for achieving the purpose of the present application is as follows: a traveling wave tube modulator circuit with a maximum duty ratio of 100%, comprising: a signal high-frequency modulation unit, an isolation drive transformer, a drive generation unit, and a high-voltage modulation circuit, wherein: the signal high-frequency modulation unit receives the input modulating signal and the enable signal, performs logical operation, generates two signals in logical NOT relationship, and high-frequency modulates the operated signals to obtain high-frequency modulated pulse signal 1 and high-frequency modulated pulse signal 2 corresponding to the high-level part and the low-level part of the modulating signal respectively; the output of the signal high-frequency modulation unit is sent to the isolation drive transformer to realize the transmission of the signal from the low-voltage side to the high-voltage side; the drive generation unit restores the signal sent by the isolation drive transformer into a drive signal with the same information as the modulating signal on the low-voltage side to control the high-voltage modulator circuit, and the high-voltage modulator circuit switches the grid voltage between the positive grid voltage and the negative grid voltage by turning on and off the driving switch tube.

[0006] Further, the high-frequency pulse signal 1 and the high-frequency pulse signal 2 obtained after high-frequency modulation have a pulse repetition frequency of 1MHz-2MHz and a pulse width of 80nS-120nS.

[0007] Further, the signal high-frequency modulation unit comprises a first NAND gate, a second NAND gate, a third NAND gate, a fourth NAND gate, a fifth NAND gate, a sixth NAND gate, a first diode, a second diode, a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, and a second capacitor.

[0008] The input modulation signal and the enable signal are simultaneously input to the first input end and the second input end of the first NAND gate, the output of the first NAND gate is connected to the first input end and the second input end of the second NAND gate, and the output of the first NAND gate is also connected to the first input end of the third NAND gate, the first end of the first capacitor is connected to the second input end of the third NAND gate and the first end of the second resistor and the anode of the first diode, the second end of the first capacitor is grounded, the second end of the second resistor is connected to the output of the third NAND gate and the second end of the third resistor, and the cathode of the first diode is connected to the first end of the first resistor; the output end of the second NAND gate is connected to the first input end of the fourth NAND gate, the first end of the second capacitor is connected to the second input end of the fourth NAND gate and the first end of the fourth resistor and the anode of the second diode, the second end of the second capacitor is grounded, the second end of the fourth resistor is connected to the output of the fourth NAND gate and the second end of the third resistor, and the cathode of the second diode is connected to the first end of the third resistor; the output of the third NAND gate is simultaneously connected to the first input end and the second input end of the fifth NAND gate, and the output of the fourth NAND gate is simultaneously connected to the first input end and the second input end of the sixth NAND gate, the output signal of the fifth NAND gate is the high-frequency pulse signal 2, and the output signal of the sixth NAND gate is the high-frequency pulse signal 1.

[0009] Further, the first diode and the second diode are germanium diodes or Schottky diodes.

[0010] Further, the third NAND gate and the fourth NAND gate are NAND gates with Schmitt trigger.

[0011] Further, the isolation driving transformer comprises a first isolation transformer and a second isolation transformer, the first input end 1 of the first isolation transformer is connected to the high-frequency pulse modulation signal 1, and the second input end 2 of the first transformer is grounded; the first input end 1 of the second isolation transformer is connected to the high-frequency pulse modulation signal 2, and the second input end 2 of the second transformer is grounded.

[0012] Further, the drive generation unit comprises a first driver, a second driver, a third capacitor, a fourth capacitor, a thirteenth resistor, a third diode, a third transistor, a fourteenth resistor, a fifteenth resistor, a fifth capacitor, a sixth capacitor, a sixteenth resistor, a fourth diode, a fourth transistor, a seventeenth resistor, and an eighteenth resistor, wherein: the first driver and the second driver are MC33152, the second end and the fourth end of the first driver are connected to the signals after the high-frequency modulation pulse signal 1 and the high-frequency modulation pulse signal 2 are isolated by an isolation driving transformer, the thirteenth resistor and the third diode are connected in series and connected between the seventh end of the first driver and the collector of the third transistor, the fifteenth resistor and the fourth capacitor are connected in parallel and connected between the fifth end of the first driver and the base of the third transistor, the first end of the fourteenth resistor is connected to the collector of the third transistor, and the second end of the fourteenth resistor is connected to the emitter of the third transistor; the second end and the fourth end of the second driver are connected to the signals after the high-frequency modulation pulse signal 2 and the high-frequency modulation pulse signal 1 are isolated by an isolation driving transformer, the sixteenth resistor and the fourth diode are connected in series and connected between the seventh end of the second driver and the collector of the fourth transistor, the eighteenth resistor and the sixth capacitor are connected in parallel and connected between the fifth end of the second driver and the base of the fourth transistor, the first end of the seventeenth resistor is connected to the collector of the fourth transistor, and the second end of the seventeenth resistor is connected to the emitter of the fourth transistor.

[0013] Further, the high-voltage modulation circuit comprises a first switch tube, a second switch tube, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, and a twenty-second resistor, the gate of the first switch tube is connected to the cathode of the third diode, the drain of the first switch tube is connected to a positive grid voltage (+Eg), the source of the first switch tube is connected to the first end of the nineteenth resistor and the first end of the twentieth resistor, the second end of the twentieth resistor is connected to the first end of the twenty-first resistor, the gate of the second switch tube is connected to the cathode of the fourth diode, the drain of the second switch tube is connected to the second end of the twenty-first resistor and the first end of the twenty-second resistor, the source of the second switch tube is connected to a negative grid voltage (-Eg) and the second end of the twenty-second resistor is connected to the third end of the second driver, and the second end of the nineteenth resistor is connected to Ug, which is the output of the modulator.

[0014] A maximum duty cycle 100% traveling wave tube modulation method, which is based on the traveling wave tube modulator circuit to achieve a maximum duty cycle 100% traveling wave tube modulation.

[0015] Compared with existing technologies, the present invention has the following significant advantages: 1) Maximum modulation duty cycle of 100%: The traveling wave tube modulator circuit of the present invention, after high-frequency modulation of the input modulation signal, is transmitted to the high-voltage side through an isolation drive transformer, achieving a maximum modulation duty cycle of 100%. 2) Short delay: The signal modulation unit on the low-voltage side of the traveling wave tube modulator circuit of the present invention only requires processing through 3 levels of gate circuits, resulting in a short signal transmission delay; the modulation switch driver is located on the high-voltage side, shortening the rising and falling edges of the modulation switch and reducing the switching delay. 3) Simple method and small size: The traveling wave tube modulator circuit of the present invention uses fewer components, and the size of the isolation drive transformer is reduced after high-frequency modulation by carrier wave, thus reducing the size of the traveling wave tube modulator. Attached Figure Description

[0016] Figure 1 This is a block diagram of the traveling wave tube modulator circuit of the present invention.

[0017] Figure 2 This is a schematic diagram of the high-frequency modulation unit of the low-voltage side of the traveling wave tube modulator circuit of the present invention.

[0018] Figure 3 This is a schematic diagram of the input and output signals of the high-frequency modulation unit of the present invention.

[0019] Figure 4 This is a circuit diagram of the high-voltage side portion of the traveling wave tube modulator circuit of the present invention. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0021] like Figure 1 As shown in the figure, the traveling wave tube modulator circuit block diagram of the present invention includes: a high-frequency signal modulation unit 1, an isolation drive transformer 2, a drive generation unit 3, and a high-voltage modulation circuit 4.

[0022] The high-frequency modulation unit 1 operates on the low-voltage side, performing logical operations on the input modulation signal and enable signal, then performing high-frequency modulation, and finally sending the generated high-frequency modulation pulse signal to the subsequent isolation drive transformer.

[0023] The isolation drive transformer 2 is mainly used to isolate signals and send the high-frequency modulated pulse signal from the low-voltage side to the drive generation unit on the high-voltage side.

[0024] The drive generation unit 3 operates on the high-voltage side, converting the high-frequency modulation pulse signal output by the isolation drive transformer into a drive signal that can drive the high-voltage modulation circuit.

[0025] The high-voltage modulation circuit 4 works at the high-voltage side end, is controlled by the driving signal of the driving generation unit, generates the gate voltage satisfying the need of the traveling wave tube, and the duty ratio is corresponding to the low-voltage side input modulation signal, and the highest can reach 100%, namely the normal open state.

[0026] As Figure 2 The schematic diagram of the signal high-frequency modulation unit 2 in the application is shown in the figure, which comprises a first NAND gate U1, a second NAND gate U2, a third NAND gate U3, a fourth NAND gate U4, a fifth NAND gate U5, a sixth NAND gate U6, a first diode D1, a second diode D2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first capacitor C1 and a second capacitor C2.

[0027] The connection relationship is that the input modulation signal and the enable signal are simultaneously input into the first input end and the second input end of the first NAND gate U1, the output of the first NAND gate U1 is connected to the first input end and the second input end of the second NAND gate U2. Meanwhile, the output of the first NAND gate U1 is also connected to the first input end of the third NAND gate U3, the first end of the first capacitor C1 is connected to the second input end of the third NAND gate U3, and is connected to the first end of the second resistor R2 and the anode of the first diode D1, the second end of the first capacitor C1 is grounded, the second end of the second resistor R2 is connected to the output of the third NAND gate U3, and is connected to the second end of the first resistor R1, the cathode of the first diode D1 is connected to the first end of the first resistor R1. The output end of the second NAND gate U2 is connected to the first input end of the fourth NAND gate U4, the first end of the second capacitor C2 is connected to the second input end of the fourth NAND gate U4, and is connected to the first end of the fourth resistor R4 and the anode of the second diode D2, the second end of the second capacitor C2 is grounded, the second end of the fourth resistor R4 is connected to the output of the fourth NAND gate U4, and is connected to the second end of the third resistor R3, the cathode of the second diode D2 is connected to the first end of the third resistor R3. The output of the third NAND gate U3 is simultaneously connected to the first input end and the second input end of the fifth NAND gate U5, and the output of the fourth NAND gate U4 is simultaneously connected to the first input end and the second input end of the sixth NAND gate U6. The output signal of the fifth NAND gate U5 is the high-frequency modulation pulse signal 2, and the output signal of the sixth NAND gate U6 is the high-frequency modulation pulse signal 1.

[0028] Based on the specific connection relationship of the above circuit, the working principle of the high-frequency modulation unit 2 in this invention is explained: The first NAND gate U1 and the second NAND gate U2 perform logical operations on the input signal to obtain two complementary phase signals. The high-frequency modulation signal circuit is composed of diode D1, resistor R1, resistor R2, NAND gate U3, and capacitor C1. The parameter selection is based on the following: In this circuit, diode D1 is selected as a diode with a low forward voltage drop. Preferably, a germanium diode is better, but a Schottky diode with a low forward voltage drop can also be selected. NAND gate U3 is selected as a NAND gate with Schmitt trigger, preferably such as SN54LS132, but other models are also acceptable, and it is not limited to this. The parameter of capacitor C1 is selected to be around 1000pF. Preferably, the high-frequency carrier frequency of this circuit is set at around 1.5MHz. The principle of this circuit is described as follows based on the characteristics of the input signal: When the first input terminal of NAND gate U3 is high, capacitor C1 is not charged. At this time, according to the logical relationship, the output of NAND gate U3 is high. The output of NAND gate U3 charges capacitor C1 through resistor R2, causing the voltage across capacitor C1 to rise. This means the second input voltage of NAND gate U3 rises. When it reaches a high level, according to the logic, the output of NAND gate U3 flips low. At this time, capacitor C1 discharges through diode D1 and resistor R1, causing the second input voltage of NAND gate U3 to drop. When it reaches a low level, the output of NAND gate U3 flips high. This process continues until the first input of NAND gate U3 is low. When the first input of NAND gate U3 is low, the output of NAND gate U3 is high regardless of whether capacitor C1 is charging. The fifth NAND gate U5 inverts the signal from the previous stage.

[0029] The principle and parameters of the high-frequency modulation signal circuit composed of diode D2, resistor R3, resistor R4, NAND gate U4, NAND gate U6, and capacitor C2 are the same as above, and the working process will not be described here.

[0030] like Figure 3 As shown, the schematic diagram of the input and output signals of the high-frequency modulation unit of the present invention, combined with the above description of the principle of the high-frequency modulation unit, can easily obtain the logical relationship between the input and output signals of the high-frequency modulation unit and its high-frequency modulation characteristics.

[0031] like Figure 4 The diagram shows the high-voltage side circuit of the traveling wave tube modulator circuit provided by this invention. The isolation drive transformers include a first isolation transformer T1 and a second isolation transformer T2. Their connections are as follows: the first input terminal 1 of the first isolation transformer T1 is connected to a high-frequency pulse modulation signal 1, and the second input terminal 2 of the first isolation transformer T1 is grounded. The first input terminal 1 of the second isolation transformer T2 is connected to a high-frequency pulse modulation signal 2, and the second input terminal 2 of the second isolation transformer T2 is grounded.

[0032] The drive generation unit comprises a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a first driver chip N1, a second driver chip N2, a third capacitor C3, a fourth capacitor C4, a thirteenth resistor R13, a third diode D3, a third transistor V3, a fourteenth resistor R14, a fifth capacitor C5, a sixth capacitor C6, a sixteenth resistor R16, a fourth diode D4, a fourth transistor V3, an eighteenth resistor R18. The connection relationship is: the third output end 3 of the secondary winding of the first isolation transformer T1 is connected to the first end of the fifth resistor R5, the second end of the fifth resistor R5 is connected to the first end of the sixth resistor R6, and is also connected to the second end of the first driver N1. The second end of the sixth resistor R6 is connected to the fourth output end 4 of the secondary winding of the first isolation transformer T1, and is also connected to the third end of the first driver N1. The seventh end of the first driver N1 is connected to the first end of the thirteenth resistor R13. The second end of the thirteenth resistor R13 is connected to the anode of the third diode D3. The third output end 3 of the secondary winding of the second isolation transformer T2 is connected to the first end of the ninth resistor R9, the second end of the ninth resistor R9 is connected to the first end of the tenth resistor R10, and is also connected to the fourth end of the first driver N1. The second end of the tenth resistor R10 is connected to the fourth output end 4 of the secondary winding of the second isolation transformer T2, and is also connected to the third end of the first driver N1. The fifth end of the first driver N1 is connected to the first end of the fifteenth resistor R15, and is also connected to the first end of the fourth capacitor C4. The second end of the fifteenth resistor R15 is connected to the second end of the fourth capacitor C4, and is also connected to the base of the third transistor V3. The collector of the third transistor V3 is connected to the cathode of the third diode D3, and is also connected to the first end of the fourteenth resistor. The emitter of the third transistor V3 is connected to the second end of the fourteenth resistor, and is also connected to the third end of the first driver N1.

[0033] The fifth output end 5 of the secondary winding of the first isolation transformer T1 is connected to the first end of the seventh resistor R7, the second end of the seventh resistor R7 is connected to the first end of the eighth resistor R8, and the fourth end of the second driver N2 is connected to the first end of the eighth resistor R8. The second end of the eighth resistor R8 is connected to the sixth output end 6 of the secondary winding of the first isolation transformer T1, and the third end of the second driver N2 is connected to the second end of the eighth resistor R8. The fifth output end 5 of the secondary winding of the second isolation transformer T2 is connected to the first end of the eleventh resistor R11, the second end of the eleventh resistor R11 is connected to the first end of the twelfth resistor R12, and the second end of the twelfth resistor R12 is connected to the second end of the first driver N1. The second end of the twelfth resistor R12 is connected to the sixth output end 6 of the secondary winding of the second isolation transformer T2, and the third end of the second driver N1 is connected to the second end of the twelfth resistor R12. The seventh end of the second driver N2 is connected to the first end of the sixteenth resistor R16. The second end of the sixteenth resistor R16 is connected to the anode of the fourth diode D4. The fifth end of the second driver N1 is connected to the first end of the eighteenth resistor R15, and the first end of the sixth capacitor C6 is connected to the fifth end of the second driver N1. The second end of the eighteenth resistor R18 is connected to the second end of the sixth capacitor C6, and the base of the fourth transistor V4 is connected to the second end of the eighteenth resistor R18. The collector of the fourth transistor V4 is connected to the cathode of the fourth diode D4 and the first end of the seventeenth resistor R17. The emitter of the fourth transistor V4 is connected to the second end of the seventeenth resistor R17 and the third end of the second driver N2.

[0034] The high-voltage modulation circuit includes a first switch tube V1, a second switch tube V2, a nineteenth resistor R19, a twentieth resistor R20, a twenty-first resistor R21, and a twenty-second resistor R22. The connection relationship is as follows: the gate of the first switch tube V1 is connected to the cathode of the third diode D3. The drain of the first switch tube V1 is connected to the positive gate voltage (+Eg). The source of the second switch tube V2 is connected to the first end of the nineteenth resistor R19 and the first end of the twentieth resistor R20. The second end of the twentieth resistor R20 is connected to the first end of the twenty-first resistor R21. The gate of the second switch tube V2 is connected to the cathode of the fourth diode D4. The drain of the second switch tube V2 is connected to the second end of the twenty-first resistor R21 and the first end of the twenty-second resistor R22. The source of the second switch tube V2 is connected to the negative gate voltage (-Eg) and the second end of the twenty-second resistor R22 is connected to the third end of the second driver N2. The second end of the nineteenth resistor R19 is connected to Ug, which is the output of the modulator.

[0035] It should be noted that the same name end relationship of the first drive transformer T1 and the second drive transformer T2 has been marked in Figure 4 The first driver N1 and the second driver N2 are preferably MC33152, but other models can also be used, and this place is not limited to this.

[0036] The working principle of the high-voltage side circuit diagram of the traveling wave tube modulator circuit provided by the present application is described in combination with the specific connection relationship of the above-mentioned circuit: referring to Figure 3, the high-frequency pulse part of the high-frequency modulated pulse signal 1 corresponds to the high level part of the input modulated signal, and the high-frequency pulse part of the high-frequency modulated pulse signal 2 corresponds to the low level part of the input modulated signal. The generation unit drives the high-voltage modulator circuit according to the above characteristics to restore the modulated signal and drive. The first driver N1 and its peripheral circuit and the second driver N2 and its peripheral circuit realize similar functions, and the mechanism of restoring the high-frequency modulated pulse signal into a driving signal is the same. Here, the working principle of the circuit is explained by taking the first driver N1 and its peripheral circuit as an example. The traveling wave tube modulator is floating on the cathode high-voltage power supply, and the interference caused by the high-voltage power supply is inevitable. The resistors R5 and R6 absorb some glitch interference. The seventh end output of the driver N1 passes through the resistor R13, the capacitor D3, and interacts with the main switch tube V1 self-junction capacitor Cgs. By charging the main switch tube V1 self-junction capacitor Cgs, the high-frequency pulse signal is shaped and restored into the square wave driving signal required by the main switch tube V1. The high-frequency pulse part of the fifth end output of the driver N1 corresponds to the off signal of the modulated signal, i.e. the low level part. The fifth end output of the driver N1 passes through the resistor R15 and the acceleration capacitor C4 to act on the transistor V3, so that when the modulated signal is in the low level part, the charge on the main switch tube V1 self-junction capacitor Cgs can be quickly discharged through the transistor V3. In this way, the main switch tube V1 can be quickly turned off. In order to improve the trailing edge of the gate voltage pulse output by the modulator, the trailing edge is made steep, Figure 4 The main switch tube V2 is a truncated switch tube, which is also jointly acted on by the high-frequency modulated pulse signal 2 and the high-frequency modulated pulse signal 1 after isolation by the isolation driving transformer. When the low-voltage side modulated signal is in the low level, the truncated switch tube is opened to provide a discharge circuit for quickly discharging the capacitance between the load end gate and the cathode.

[0037] In summary, the signal modulation unit realizes the logical operation of the modulated signal and the enable signal on the low-voltage side, and the result after operation is high-frequency modulated. The high-frequency modulated modulated signal can be transmitted to the high-voltage side through a small-size isolation driving transformer. The generation unit drives the high-voltage modulator circuit to restore the signal sent out by the isolation driving transformer into a driving signal with the same information as the control signal on the low-voltage side.

[0038] The technical features of the above embodiments can be combined in any way. In order to make the description concise, not all possible combinations of the technical features in the above embodiments are described, but as long as the combinations of the technical features do not exist, they should be considered as the scope of the description.

[0039] The above-described embodiments are merely illustrative of several embodiments of the present application, which are described in more detail and in a specific and detailed manner, but should not be construed as limiting the scope of the patent. It should be noted that for those skilled in the art, several modifications and improvements can be made without departing from the concept of the present application, and these are all within the scope of the present application. Therefore, the scope of protection of the patent of the present application should be subject to the appended claims.

Claims

1. A circuit for a traveling wave tube modulator with maximum duty cycle of 100%, characterized in that, The utility model relates to a signal high frequency modulation unit (1), an isolation drive transformer (2), a drive generation unit (3) and a high voltage modulation circuit (4), wherein the signal high frequency modulation unit (1) receives input modulation signals and enable signals, carries out logical operation, generates two signals in logical non-relation, and carries out high frequency modulation to the signal after operation to obtain high frequency modulation pulse signal 1 and high frequency modulation pulse signal 2, which correspond to the high level part and the low level part of the modulation signal respectively; the output of the signal high frequency modulation unit (1) is sent to the isolation drive transformer (2) to realize signal transmission from the low voltage side to the high voltage side; the drive generation unit (3) restores the signal sent by the isolation drive transformer (2) into a drive signal with the same information as the modulation signal on the low voltage side to control the high voltage modulator circuit (4), and the high voltage modulator circuit (4) realizes the switching of the gate voltage between the positive gate voltage and the negative gate voltage by the opening and closing of the driving switch tube; The signal high frequency modulation unit (1) comprises a first NAND gate (U1), a second NAND gate (U2), a third NAND gate (U3), a fourth NAND gate (U4), a fifth NAND gate (U5), a sixth NAND gate (U6), a first diode (D1), a second diode (D2), a first resistor (R1), a second resistor (R2), a third resistor (R3), a fourth resistor (R4), a first capacitor (C1) and a second capacitor (C2), wherein: ​ The input modulation signal and the enable signal are input to the first input end and the second input end of the first NAND gate (U1) respectively, the output of the first NAND gate (U1) is connected to the first input end and the second input end of the second NAND gate (U2), and the output of the first NAND gate (U1) is also connected to the first input end of the third NAND gate (U3), the first end of the first capacitor (C1) is connected to the second input end of the third NAND gate (U3) and the first end of the second resistor (R2) and the anode of the first diode (D1), the second end of the first capacitor (C1) is grounded, the second end of the second resistor (R2) is connected to the output of the third NAND gate (U3) and the second end of the first resistor (R1), the cathode of the first diode (D1) is connected to the first end of the first resistor (R1); the output of the second NAND gate (U2) is connected to the first input end of the fourth NAND gate (U4), the first end of the second capacitor (C2) is connected to the second input end of the fourth NAND gate (U4) and the first end of the fourth resistor (R4) and the anode of the second diode (D2), the second end of the second capacitor (C2) is grounded, the second end of the fourth resistor (R4) is connected to the output of the fourth NAND gate (U4) and the second end of the third resistor (R3), the cathode of the second diode (D2) is connected to the first end of the third resistor (R3); the output of the third NAND gate (U3) is connected to the first input end and the second input end of the fifth NAND gate (U5) and the first input end and the second input end of the sixth NAND gate (U6), the output signal of the fifth NAND gate (U5) is the high-frequency modulation pulse signal 2, and the output signal of the sixth NAND gate (U6) is the high-frequency modulation pulse signal 1; The isolation driving transformer (2) comprises a first isolation transformer (T1) and a second isolation transformer (T2), the first input end 1 of the first isolation transformer (T1) is connected to the high-frequency pulse modulation signal 1, and the second input end 2 of the first transformer (T1) is grounded; the first input end 1 of the second isolation transformer (T2) is connected to the high-frequency pulse modulation signal 2, and the second input end 2 of the second transformer (T2) is grounded; The drive generation unit (3) comprises a first driver (N1), a second driver (N2), a third capacitor (C3), a fourth capacitor (C4), a thirteenth resistor (R13), a third diode (D3), a third transistor (V3), a fourteenth resistor (R14), a fifteenth resistor (R15), a fifth capacitor (C5), a sixth capacitor (C6), a sixteenth resistor (R16), a fourth diode (D4), a fourth transistor (V4), a seventeenth resistor (R17), and an eighteenth resistor (R18), wherein: the first driver (N1) and the second driver (N2) are MC33152, the second end and the fourth end of the first driver (N1) are connected to signals after isolation of the high-frequency modulation pulse signal 1 and the high-frequency modulation pulse signal 2 through an isolation driving transformer, the thirteenth resistor (R13) and the third diode (D3) are connected in series and connected between the seventh end of the first driver (N1) and the collector of the third transistor (V3), the fifteenth resistor (R15) and the fourth capacitor (C4) are connected in parallel and connected between the fifth end of the first driver (N1) and the base of the third transistor (V3), the first end of the fourteenth resistor (R14) is connected to the collector of the third transistor (V3), and the second end of the fourteenth resistor (R14) is connected to the emitter of the third transistor (V3); the second end and the fourth end of the second driver (N2) are connected to signals after isolation of the high-frequency modulation pulse signal 2 and the high-frequency modulation pulse signal 1 through an isolation driving transformer, the sixteenth resistor (R16) and the fourth diode (D4) are connected in series and connected between the seventh end of the second driver (N2) and the collector of the fourth transistor (V4), the eighteenth resistor (R18) and the sixth capacitor (C6) are connected in parallel and connected between the fifth end of the second driver (N2) and the base of the fourth transistor (V4), and the first end of the seventeenth resistor (R17) is connected to the collector of the fourth transistor (V4), and the second end of the seventeenth resistor (R17) is connected to the emitter of the fourth transistor (V4); The high-voltage modulation circuit (4) comprises a first switch tube (V1), a second switch tube (V2), a nineteenth resistor (R19), a twentieth resistor (R20), a twenty-first resistor (R21), and a twenty-second resistor (R22), the gate of the first switch tube (V1) is connected to the cathode of the third diode (D3), the drain of the first switch tube (V1) is connected to a positive gate voltage (+Eg), the source of the first switch tube (V1) is connected to the first end of the nineteenth resistor (R19) and the first end of the twentieth resistor (R20), the second end of the twentieth resistor (R20) is connected to the first end of the twenty-first resistor (R21), the gate of the second switch tube (V2) is connected to the cathode of the fourth diode (D4), the drain of the second switch tube (V2) is connected to the second end of the twenty-first resistor (R21) and the first end of the twenty-second resistor (R22), the source of the second switch tube (V2) is connected to a negative gate voltage (-Eg) and the second end of the twenty-second resistor (R22) is connected to the third end of the second driver (N2), and the second end of the nineteenth resistor (R19) is Ug, which is the output of the modulator.

2. The traveling wave tube modulator circuit of claim 1, wherein: The high-frequency modulation pulse signal 1 and the high-frequency modulation pulse signal 2 obtained after high-frequency modulation have a pulse repetition frequency of 1-2 MHz and a pulse width of 80-120 ns.

3. The traveling wave tube modulator circuit of claim 1, wherein: The first diode (D1) and the second diode (D2) are germanium diodes or Schottky diodes.

4. The traveling wave tube modulator circuit of claim 1, wherein: The third NAND gate (U3) and the fourth NAND gate (U4) are NAND gates with Schmitt trigger.

5. A method for maximum duty cycle 100% TWT modulation, the method being implemented by the TWT modulator circuit according to any one of claims 1-4 to achieve maximum duty cycle 100% TWT modulation.

Images